blob: 68e2958c87d269dc8c5f3162c63f8b0b4fc3a80f [file] [log] [blame]
Neels Hofmeyr3cf797d2018-04-05 16:56:38 +02001<?xml version="1.0"?>
Oliver Smith690d60f2019-07-23 13:09:08 +02002<testsuite name='Titan' tests='154' failures='9' errors='0' skipped='0' inconc='0' time='MASKED'>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +02003 <testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
4 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
5 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
Neels Hofmeyr873ae202018-09-06 14:13:34 +02006 <testcase classname='MSC_Tests' name='TC_lu_imsi_reject' time='MASKED'/>
7 <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_gsup' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +02008 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +02009 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi' time='MASKED'/>
Pau Espin Pedrold3d54a92019-12-17 17:02:54 +010010 <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
11 <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
12 MSC_Tests.ttcn:MASKED TC_lu_imsi_timeout_tmsi_realloc testcase
13 </failure>
14 </testcase>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020015 <testcase classname='MSC_Tests' name='TC_cmserv_imsi_unknown' time='MASKED'/>
16 <testcase classname='MSC_Tests' name='TC_lu_and_mo_call' time='MASKED'/>
Pau Espin Pedrola42745c2020-01-10 18:03:28 +010017 <testcase classname='MSC_Tests' name='TC_lu_and_mo_call_sccp_tiar_timeout' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020018 <testcase classname='MSC_Tests' name='TC_lu_auth_sai_timeout' time='MASKED'/>
19 <testcase classname='MSC_Tests' name='TC_lu_auth_sai_err' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020020 <testcase classname='MSC_Tests' name='TC_lu_clear_request' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020021 <testcase classname='MSC_Tests' name='TC_lu_disconnect' time='MASKED'/>
22 <testcase classname='MSC_Tests' name='TC_lu_by_imei' time='MASKED'/>
23 <testcase classname='MSC_Tests' name='TC_lu_by_tmsi_noauth_unknown' time='MASKED'/>
24 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imsi' time='MASKED'/>
25 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_tmsi' time='MASKED'/>
26 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imei' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020027 <testcase classname='MSC_Tests' name='TC_emerg_call_imei_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020028 <testcase classname='MSC_Tests' name='TC_emerg_call_imsi' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020029 <testcase classname='MSC_Tests' name='TC_cm_serv_req_vgcs_reject' time='MASKED'/>
30 <testcase classname='MSC_Tests' name='TC_cm_serv_req_vbs_reject' time='MASKED'/>
31 <testcase classname='MSC_Tests' name='TC_cm_serv_req_lcs_reject' time='MASKED'/>
32 <testcase classname='MSC_Tests' name='TC_cm_reest_req_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020033 <testcase classname='MSC_Tests' name='TC_lu_auth_2G_fail' time='MASKED'/>
34 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_13' time='MASKED'/>
35 <testcase classname='MSC_Tests' name='TC_cl3_no_payload' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020036 <testcase classname='MSC_Tests' name='TC_cl3_rnd_payload' time='MASKED'/>
Stefan Sperlingf46eb262018-06-01 17:30:45 +020037 <testcase classname='MSC_Tests' name='TC_establish_and_nothing' time='MASKED'/>
Neels Hofmeyr2caf3492019-01-23 12:44:09 +010038 <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020039 <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_timeout' time='MASKED'/>
40 <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_reject' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020041 <testcase classname='MSC_Tests' name='TC_mt_crcx_ran_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020042 <testcase classname='MSC_Tests' name='TC_mo_setup_and_dtmf_dup' time='MASKED'/>
Neels Hofmeyr2caf3492019-01-23 12:44:09 +010043 <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020044 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_1_13' time='MASKED'/>
45 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_13' time='MASKED'/>
46 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1' time='MASKED'/>
47 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_no_cm' time='MASKED'/>
48 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_2' time='MASKED'/>
49 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_013_2' time='MASKED'/>
50 <testcase classname='MSC_Tests' name='TC_mo_release_timeout' time='MASKED'/>
51 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
52 <testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>
53 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='MASKED'/>
Neels Hofmeyr98d428d2018-04-11 15:54:07 +020054 <testcase classname='MSC_Tests' name='TC_lu_and_mo_sms' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020055 <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms' time='MASKED'/>
Philipp Maier3983e702018-11-22 19:01:33 +010056 <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020057 <testcase classname='MSC_Tests' name='TC_smpp_mo_sms' time='MASKED'/>
Vadim Yanitskiy33820762020-01-15 11:26:07 +070058 <testcase classname='MSC_Tests' name='TC_smpp_mo_sms_rp_error' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020059 <testcase classname='MSC_Tests' name='TC_smpp_mt_sms' time='MASKED'/>
Vadim Yanitskiy103d09f2018-11-12 02:50:23 +070060 <testcase classname='MSC_Tests' name='TC_gsup_mo_sms' time='MASKED'/>
Vadim Yanitskiy9cc019a2018-11-15 02:06:07 +070061 <testcase classname='MSC_Tests' name='TC_gsup_mo_smma' time='MASKED'/>
Vadim Yanitskiyd7b37ab2018-11-24 03:40:20 +070062 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_ack' time='MASKED'/>
63 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_err' time='MASKED'/>
Vadim Yanitskiybe1ff4b2019-01-18 15:04:13 +070064 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_rp_mr' time='MASKED'/>
Vadim Yanitskiy5ac49cc2019-01-24 16:57:31 +070065 <testcase classname='MSC_Tests' name='TC_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020066 <testcase classname='MSC_Tests' name='TC_gsup_mt_multi_part_sms' time='MASKED'/>
Vadim Yanitskiy2a978b92018-06-19 17:51:20 +070067 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_single_request' time='MASKED'/>
Vadim Yanitskiy13e4a272018-06-19 18:24:31 +070068 <testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_notification' time='MASKED'/>
Vadim Yanitskiy2a978b92018-06-19 17:51:20 +070069 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_during_mt_call' time='MASKED'/>
Vadim Yanitskiy13e4a272018-06-19 18:24:31 +070070 <testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_during_mt_call' time='MASKED'/>
Vadim Yanitskiy2daf52d2018-06-21 04:19:58 +070071 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_mo_release' time='MASKED'/>
Vadim Yanitskiy78329c72019-06-17 23:20:00 +070072 <testcase classname='MSC_Tests' name='TC_lu_and_ss_session_timeout' time='MASKED'/>
73 <testcase classname='MSC_Tests' name='TC_mt_ussd_for_unknown_subscr' time='MASKED'/>
74 <testcase classname='MSC_Tests' name='TC_mo_ussd_for_unknown_trans' time='MASKED'/>
75 <testcase classname='MSC_Tests' name='TC_proc_ss_for_unknown_session' time='MASKED'/>
76 <testcase classname='MSC_Tests' name='TC_proc_ss_paging_fail' time='MASKED'/>
77 <testcase classname='MSC_Tests' name='TC_proc_ss_abort' time='MASKED'/>
Vadim Yanitskiy1c9754d2020-01-07 21:56:55 +010078 <testcase classname='MSC_Tests' name='TC_multi_lu_and_mo_ussd' time='MASKED'/>
79 <testcase classname='MSC_Tests' name='TC_multi_lu_and_mt_ussd' time='MASKED'/>
Stefan Sperling89eb1f32018-12-17 15:06:20 +010080 <testcase classname='MSC_Tests' name='TC_cipher_complete_with_invalid_cipher' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020081 <testcase classname='MSC_Tests' name='TC_cipher_complete_1_without_cipher' time='MASKED'/>
82 <testcase classname='MSC_Tests' name='TC_cipher_complete_3_without_cipher' time='MASKED'/>
83 <testcase classname='MSC_Tests' name='TC_cipher_complete_13_without_cipher' time='MASKED'/>
84 <testcase classname='MSC_Tests' name='TC_lu_with_invalid_mcc_mnc' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010085 <testcase classname='MSC_Tests' name='TC_sgsap_reset' time='MASKED'/>
86 <testcase classname='MSC_Tests' name='TC_sgsap_lu' time='MASKED'/>
87 <testcase classname='MSC_Tests' name='TC_sgsap_lu_imsi_reject' time='MASKED'/>
88 <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_nothing' time='MASKED'/>
89 <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_eps' time='MASKED'/>
Philipp Maierfc19f172019-03-21 11:17:54 +010090 <testcase classname='MSC_Tests' name='TC_sgsap_impl_imsi_det_eps' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010091 <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_noneps' time='MASKED'/>
Philipp Maier5d812702019-03-21 10:51:26 +010092 <testcase classname='MSC_Tests' name='TC_sgsap_impl_imsi_det_noneps' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010093 <testcase classname='MSC_Tests' name='TC_sgsap_paging_rej' time='MASKED'/>
94 <testcase classname='MSC_Tests' name='TC_sgsap_paging_subscr_rej' time='MASKED'/>
95 <testcase classname='MSC_Tests' name='TC_sgsap_paging_ue_unr' time='MASKED'/>
96 <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_nothing' time='MASKED'/>
97 <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_lu' time='MASKED'/>
98 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms' time='MASKED'/>
99 <testcase classname='MSC_Tests' name='TC_sgsap_mo_sms' time='MASKED'/>
100 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_nothing' time='MASKED'/>
101 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_reject' time='MASKED'/>
102 <testcase classname='MSC_Tests' name='TC_sgsap_unexp_ud' time='MASKED'/>
103 <testcase classname='MSC_Tests' name='TC_sgsap_unsol_ud' time='MASKED'/>
104 <testcase classname='MSC_Tests' name='TC_bssap_lu_sgsap_lu_and_mt_call' time='MASKED'/>
105 <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_mt_call' time='MASKED'/>
Philipp Maier628c0052019-04-09 17:36:57 +0200106 <testcase classname='MSC_Tests' name='TC_sgsap_vlr_failure' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200107 <testcase classname='MSC_Tests' name='TC_ho_inter_bsc_unknown_cell' time='MASKED'/>
108 <testcase classname='MSC_Tests' name='TC_ho_inter_bsc' time='MASKED'/>
109 <testcase classname='MSC_Tests' name='TC_ho_inter_msc_out' time='MASKED'/>
Oliver Smith1d118ff2019-07-03 10:57:35 +0200110 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei' time='MASKED'/>
111 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi_check_imei' time='MASKED'/>
112 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi_check_imei' time='MASKED'/>
113 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi_check_imei' time='MASKED'/>
Oliver Smith690d60f2019-07-23 13:09:08 +0200114 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_nack' time='MASKED'/>
115 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_err' time='MASKED'/>
Oliver Smith1d118ff2019-07-03 10:57:35 +0200116 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early' time='MASKED'/>
117 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi_check_imei_early' time='MASKED'/>
118 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi_check_imei_early' time='MASKED'/>
119 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi_check_imei_early' time='MASKED'/>
120 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early_nack' time='MASKED'/>
121 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early_err' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200122 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
123 <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
124 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_osmux' time='MASKED'/>
125 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'>
126 <failure type='fail-verdict'>Tguard timeout
127 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
128 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_reject testcase
129 </failure>
130 </testcase>
131 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'>
132 <failure type='fail-verdict'>Tguard timeout
133 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
134 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_gsup testcase
135 </failure>
136 </testcase>
137 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_auth3g_tmsi' time='MASKED'/>
Pau Espin Pedrold3d54a92019-12-17 17:02:54 +0100138 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
139 <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
140 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_tmsi_realloc testcase
141 </failure>
142 </testcase>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200143 <testcase classname='MSC_Tests_Iu' name='TC_iu_cmserv_imsi_unknown' time='MASKED'>
144 <failure type='fail-verdict'>Tguard timeout
145 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
146 MSC_Tests_Iu.ttcn:MASKED TC_iu_cmserv_imsi_unknown testcase
147 </failure>
148 </testcase>
149 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'>
150 <failure type='fail-verdict'>Tguard timeout
151 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
152 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_call testcase
153 </failure>
154 </testcase>
155 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_timeout' time='MASKED'/>
156 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_err' time='MASKED'/>
157 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_release_request' time='MASKED'/>
158 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_disconnect' time='MASKED'/>
159 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_by_imei' time='MASKED'/>
160 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imsi' time='MASKED'/>
161 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_tmsi' time='MASKED'/>
162 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imei' time='MASKED'/>
163 <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imei_reject' time='MASKED'/>
164 <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'>
165 <failure type='fail-verdict'>Tguard timeout
166 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
167 MSC_Tests_Iu.ttcn:MASKED TC_iu_emerg_call_imsi testcase
168 </failure>
169 </testcase>
170 <testcase classname='MSC_Tests_Iu' name='TC_iu_establish_and_nothing' time='MASKED'/>
171 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_setup_and_nothing' time='MASKED'/>
172 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_timeout' time='MASKED'/>
173 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'>
174 <failure type='fail-verdict'>Timeout waiting for channel release
175 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
176 MSC_Tests_Iu.ttcn:MASKED TC_iu_mo_crcx_ran_reject testcase
177 </failure>
178 </testcase>
179 <testcase classname='MSC_Tests_Iu' name='TC_iu_mt_crcx_ran_reject' time='MASKED'/>
180 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'>
181 <failure type='fail-verdict'>Tguard timeout
182 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
183 MSC_Tests_Iu.ttcn:MASKED TC_iu_gsup_cancel testcase
184 </failure>
185 </testcase>
186 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_release_timeout' time='MASKED'/>
187 <testcase classname='MSC_Tests' name='TC_reset_two_1iu' time='MASKED'/>
188 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_sms' time='MASKED'/>
189 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms' time='MASKED'/>
190 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
191 <testcase classname='MSC_Tests_Iu' name='TC_iu_smpp_mo_sms' time='MASKED'/>
192 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_sms' time='MASKED'/>
193 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_smma' time='MASKED'/>
194 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_ack' time='MASKED'/>
195 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_err' time='MASKED'/>
196 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_rp_mr' time='MASKED'/>
197 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
198 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_single_request' time='MASKED'/>
199 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_notification' time='MASKED'/>
200 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'>
201 <failure type='fail-verdict'>Tguard timeout
202 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
203 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_ussd_during_mt_call testcase
204 </failure>
205 </testcase>
206 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'>
207 <failure type='fail-verdict'>Tguard timeout
208 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
209 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_ussd_during_mt_call testcase
210 </failure>
211 </testcase>
212 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_mo_release' time='MASKED'/>
213 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_ss_session_timeout' time='MASKED'/>
Vadim Yanitskiy373b0542020-01-07 22:57:46 +0100214 <testcase classname='MSC_Tests_Iu' name='TC_iu_mt_ussd_for_unknown_subscr' time='MASKED'/>
215 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_ussd_for_unknown_trans' time='MASKED'/>
216 <testcase classname='MSC_Tests_Iu' name='TC_iu_proc_ss_for_unknown_session' time='MASKED'/>
217 <testcase classname='MSC_Tests_Iu' name='TC_iu_proc_ss_paging_fail' time='MASKED'/>
218 <testcase classname='MSC_Tests_Iu' name='TC_iu_proc_ss_abort' time='MASKED'/>
Vadim Yanitskiy1c9754d2020-01-07 21:56:55 +0100219 <testcase classname='MSC_Tests_Iu' name='TC_iu_multi_lu_and_mo_ussd' time='MASKED'/>
220 <testcase classname='MSC_Tests_Iu' name='TC_iu_multi_lu_and_mt_ussd' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200221 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_with_invalid_mcc_mnc' time='MASKED'/>
222 <testcase classname='MSC_Tests_Iu' name='TC_mo_cc_iu_release' time='MASKED'/>
Neels Hofmeyr3cf797d2018-04-05 16:56:38 +0200223</testsuite>