blob: f94c781b2d604d82ffffc8c62e862e37b41f71ab [file] [log] [blame]
Neels Hofmeyr3cf797d2018-04-05 16:56:38 +02001<?xml version="1.0"?>
Oliver Smith690d60f2019-07-23 13:09:08 +02002<testsuite name='Titan' tests='154' failures='9' errors='0' skipped='0' inconc='0' time='MASKED'>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +02003 <testcase classname='MSC_Tests' name='TC_cr_before_reset' time='MASKED'/>
4 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi' time='MASKED'/>
5 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi' time='MASKED'/>
Neels Hofmeyr873ae202018-09-06 14:13:34 +02006 <testcase classname='MSC_Tests' name='TC_lu_imsi_reject' time='MASKED'/>
7 <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_gsup' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +02008 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +02009 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi' time='MASKED'/>
Pau Espin Pedrold3d54a92019-12-17 17:02:54 +010010 <testcase classname='MSC_Tests' name='TC_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
11 <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
12 MSC_Tests.ttcn:MASKED TC_lu_imsi_timeout_tmsi_realloc testcase
13 </failure>
14 </testcase>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020015 <testcase classname='MSC_Tests' name='TC_cmserv_imsi_unknown' time='MASKED'/>
16 <testcase classname='MSC_Tests' name='TC_lu_and_mo_call' time='MASKED'/>
17 <testcase classname='MSC_Tests' name='TC_lu_auth_sai_timeout' time='MASKED'/>
18 <testcase classname='MSC_Tests' name='TC_lu_auth_sai_err' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020019 <testcase classname='MSC_Tests' name='TC_lu_clear_request' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020020 <testcase classname='MSC_Tests' name='TC_lu_disconnect' time='MASKED'/>
21 <testcase classname='MSC_Tests' name='TC_lu_by_imei' time='MASKED'/>
22 <testcase classname='MSC_Tests' name='TC_lu_by_tmsi_noauth_unknown' time='MASKED'/>
23 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imsi' time='MASKED'/>
24 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_tmsi' time='MASKED'/>
25 <testcase classname='MSC_Tests' name='TC_imsi_detach_by_imei' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020026 <testcase classname='MSC_Tests' name='TC_emerg_call_imei_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020027 <testcase classname='MSC_Tests' name='TC_emerg_call_imsi' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020028 <testcase classname='MSC_Tests' name='TC_cm_serv_req_vgcs_reject' time='MASKED'/>
29 <testcase classname='MSC_Tests' name='TC_cm_serv_req_vbs_reject' time='MASKED'/>
30 <testcase classname='MSC_Tests' name='TC_cm_serv_req_lcs_reject' time='MASKED'/>
31 <testcase classname='MSC_Tests' name='TC_cm_reest_req_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020032 <testcase classname='MSC_Tests' name='TC_lu_auth_2G_fail' time='MASKED'/>
33 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_13' time='MASKED'/>
34 <testcase classname='MSC_Tests' name='TC_cl3_no_payload' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020035 <testcase classname='MSC_Tests' name='TC_cl3_rnd_payload' time='MASKED'/>
Stefan Sperlingf46eb262018-06-01 17:30:45 +020036 <testcase classname='MSC_Tests' name='TC_establish_and_nothing' time='MASKED'/>
Neels Hofmeyr2caf3492019-01-23 12:44:09 +010037 <testcase classname='MSC_Tests' name='TC_mo_setup_and_nothing' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020038 <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_timeout' time='MASKED'/>
39 <testcase classname='MSC_Tests' name='TC_mo_crcx_ran_reject' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020040 <testcase classname='MSC_Tests' name='TC_mt_crcx_ran_reject' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020041 <testcase classname='MSC_Tests' name='TC_mo_setup_and_dtmf_dup' time='MASKED'/>
Neels Hofmeyr2caf3492019-01-23 12:44:09 +010042 <testcase classname='MSC_Tests' name='TC_gsup_cancel' time='MASKED'/>
Neels Hofmeyrfc0384a2018-04-11 15:56:41 +020043 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_1_13' time='MASKED'/>
44 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_13' time='MASKED'/>
45 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1' time='MASKED'/>
46 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_no_cm' time='MASKED'/>
47 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_13_2' time='MASKED'/>
48 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_013_2' time='MASKED'/>
49 <testcase classname='MSC_Tests' name='TC_mo_release_timeout' time='MASKED'/>
50 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_no_dlcx_resp' time='MASKED'/>
51 <testcase classname='MSC_Tests' name='TC_reset_two' time='MASKED'/>
52 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call' time='MASKED'/>
Neels Hofmeyr98d428d2018-04-11 15:54:07 +020053 <testcase classname='MSC_Tests' name='TC_lu_and_mo_sms' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020054 <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms' time='MASKED'/>
Philipp Maier3983e702018-11-22 19:01:33 +010055 <testcase classname='MSC_Tests' name='TC_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
Neels Hofmeyrde172222018-05-02 11:59:18 +020056 <testcase classname='MSC_Tests' name='TC_smpp_mo_sms' time='MASKED'/>
57 <testcase classname='MSC_Tests' name='TC_smpp_mt_sms' time='MASKED'/>
Vadim Yanitskiy103d09f2018-11-12 02:50:23 +070058 <testcase classname='MSC_Tests' name='TC_gsup_mo_sms' time='MASKED'/>
Vadim Yanitskiy9cc019a2018-11-15 02:06:07 +070059 <testcase classname='MSC_Tests' name='TC_gsup_mo_smma' time='MASKED'/>
Vadim Yanitskiyd7b37ab2018-11-24 03:40:20 +070060 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_ack' time='MASKED'/>
61 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_err' time='MASKED'/>
Vadim Yanitskiybe1ff4b2019-01-18 15:04:13 +070062 <testcase classname='MSC_Tests' name='TC_gsup_mt_sms_rp_mr' time='MASKED'/>
Vadim Yanitskiy5ac49cc2019-01-24 16:57:31 +070063 <testcase classname='MSC_Tests' name='TC_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020064 <testcase classname='MSC_Tests' name='TC_gsup_mt_multi_part_sms' time='MASKED'/>
Vadim Yanitskiy2a978b92018-06-19 17:51:20 +070065 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_single_request' time='MASKED'/>
Vadim Yanitskiy13e4a272018-06-19 18:24:31 +070066 <testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_notification' time='MASKED'/>
Vadim Yanitskiy2a978b92018-06-19 17:51:20 +070067 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_during_mt_call' time='MASKED'/>
Vadim Yanitskiy13e4a272018-06-19 18:24:31 +070068 <testcase classname='MSC_Tests' name='TC_lu_and_mt_ussd_during_mt_call' time='MASKED'/>
Vadim Yanitskiy2daf52d2018-06-21 04:19:58 +070069 <testcase classname='MSC_Tests' name='TC_lu_and_mo_ussd_mo_release' time='MASKED'/>
Vadim Yanitskiy78329c72019-06-17 23:20:00 +070070 <testcase classname='MSC_Tests' name='TC_lu_and_ss_session_timeout' time='MASKED'/>
71 <testcase classname='MSC_Tests' name='TC_mt_ussd_for_unknown_subscr' time='MASKED'/>
72 <testcase classname='MSC_Tests' name='TC_mo_ussd_for_unknown_trans' time='MASKED'/>
73 <testcase classname='MSC_Tests' name='TC_proc_ss_for_unknown_session' time='MASKED'/>
74 <testcase classname='MSC_Tests' name='TC_proc_ss_paging_fail' time='MASKED'/>
75 <testcase classname='MSC_Tests' name='TC_proc_ss_abort' time='MASKED'/>
Stefan Sperling89eb1f32018-12-17 15:06:20 +010076 <testcase classname='MSC_Tests' name='TC_cipher_complete_with_invalid_cipher' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +020077 <testcase classname='MSC_Tests' name='TC_cipher_complete_1_without_cipher' time='MASKED'/>
78 <testcase classname='MSC_Tests' name='TC_cipher_complete_3_without_cipher' time='MASKED'/>
79 <testcase classname='MSC_Tests' name='TC_cipher_complete_13_without_cipher' time='MASKED'/>
80 <testcase classname='MSC_Tests' name='TC_lu_with_invalid_mcc_mnc' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010081 <testcase classname='MSC_Tests' name='TC_sgsap_reset' time='MASKED'/>
82 <testcase classname='MSC_Tests' name='TC_sgsap_lu' time='MASKED'/>
83 <testcase classname='MSC_Tests' name='TC_sgsap_lu_imsi_reject' time='MASKED'/>
84 <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_nothing' time='MASKED'/>
85 <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_eps' time='MASKED'/>
Philipp Maierfc19f172019-03-21 11:17:54 +010086 <testcase classname='MSC_Tests' name='TC_sgsap_impl_imsi_det_eps' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010087 <testcase classname='MSC_Tests' name='TC_sgsap_expl_imsi_det_noneps' time='MASKED'/>
Philipp Maier5d812702019-03-21 10:51:26 +010088 <testcase classname='MSC_Tests' name='TC_sgsap_impl_imsi_det_noneps' time='MASKED'/>
Harald Welte43d36b92019-02-17 21:40:59 +010089 <testcase classname='MSC_Tests' name='TC_sgsap_paging_rej' time='MASKED'/>
90 <testcase classname='MSC_Tests' name='TC_sgsap_paging_subscr_rej' time='MASKED'/>
91 <testcase classname='MSC_Tests' name='TC_sgsap_paging_ue_unr' time='MASKED'/>
92 <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_nothing' time='MASKED'/>
93 <testcase classname='MSC_Tests' name='TC_sgsap_paging_and_lu' time='MASKED'/>
94 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms' time='MASKED'/>
95 <testcase classname='MSC_Tests' name='TC_sgsap_mo_sms' time='MASKED'/>
96 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_nothing' time='MASKED'/>
97 <testcase classname='MSC_Tests' name='TC_sgsap_mt_sms_and_reject' time='MASKED'/>
98 <testcase classname='MSC_Tests' name='TC_sgsap_unexp_ud' time='MASKED'/>
99 <testcase classname='MSC_Tests' name='TC_sgsap_unsol_ud' time='MASKED'/>
100 <testcase classname='MSC_Tests' name='TC_bssap_lu_sgsap_lu_and_mt_call' time='MASKED'/>
101 <testcase classname='MSC_Tests' name='TC_sgsap_lu_and_mt_call' time='MASKED'/>
Philipp Maier628c0052019-04-09 17:36:57 +0200102 <testcase classname='MSC_Tests' name='TC_sgsap_vlr_failure' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200103 <testcase classname='MSC_Tests' name='TC_ho_inter_bsc_unknown_cell' time='MASKED'/>
104 <testcase classname='MSC_Tests' name='TC_ho_inter_bsc' time='MASKED'/>
105 <testcase classname='MSC_Tests' name='TC_ho_inter_msc_out' time='MASKED'/>
Oliver Smith1d118ff2019-07-03 10:57:35 +0200106 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei' time='MASKED'/>
107 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi_check_imei' time='MASKED'/>
108 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi_check_imei' time='MASKED'/>
109 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi_check_imei' time='MASKED'/>
Oliver Smith690d60f2019-07-23 13:09:08 +0200110 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_nack' time='MASKED'/>
111 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_err' time='MASKED'/>
Oliver Smith1d118ff2019-07-03 10:57:35 +0200112 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early' time='MASKED'/>
113 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth3g_tmsi_check_imei_early' time='MASKED'/>
114 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_tmsi_check_imei_early' time='MASKED'/>
115 <testcase classname='MSC_Tests' name='TC_lu_imsi_noauth_notmsi_check_imei_early' time='MASKED'/>
116 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early_nack' time='MASKED'/>
117 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_check_imei_early_err' time='MASKED'/>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200118 <testcase classname='MSC_Tests' name='TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debug' time='MASKED'/>
119 <testcase classname='MSC_Tests' name='TC_mo_cc_bssmap_clear' time='MASKED'/>
120 <testcase classname='MSC_Tests' name='TC_lu_and_mt_call_osmux' time='MASKED'/>
121 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_reject' time='MASKED'>
122 <failure type='fail-verdict'>Tguard timeout
123 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
124 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_reject testcase
125 </failure>
126 </testcase>
127 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_gsup' time='MASKED'>
128 <failure type='fail-verdict'>Tguard timeout
129 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
130 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_gsup testcase
131 </failure>
132 </testcase>
133 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_auth3g_tmsi' time='MASKED'/>
Pau Espin Pedrold3d54a92019-12-17 17:02:54 +0100134 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_imsi_timeout_tmsi_realloc' time='MASKED'>
135 <failure type='fail-verdict'>Timeout waiting for ClearCommand/Release
136 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_imsi_timeout_tmsi_realloc testcase
137 </failure>
138 </testcase>
Oliver Smithbe4c5312019-07-23 15:00:04 +0200139 <testcase classname='MSC_Tests_Iu' name='TC_iu_cmserv_imsi_unknown' time='MASKED'>
140 <failure type='fail-verdict'>Tguard timeout
141 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
142 MSC_Tests_Iu.ttcn:MASKED TC_iu_cmserv_imsi_unknown testcase
143 </failure>
144 </testcase>
145 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_call' time='MASKED'>
146 <failure type='fail-verdict'>Tguard timeout
147 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
148 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_call testcase
149 </failure>
150 </testcase>
151 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_timeout' time='MASKED'/>
152 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_auth_sai_err' time='MASKED'/>
153 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_release_request' time='MASKED'/>
154 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_disconnect' time='MASKED'/>
155 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_by_imei' time='MASKED'/>
156 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imsi' time='MASKED'/>
157 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_tmsi' time='MASKED'/>
158 <testcase classname='MSC_Tests_Iu' name='TC_iu_imsi_detach_by_imei' time='MASKED'/>
159 <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imei_reject' time='MASKED'/>
160 <testcase classname='MSC_Tests_Iu' name='TC_iu_emerg_call_imsi' time='MASKED'>
161 <failure type='fail-verdict'>Tguard timeout
162 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
163 MSC_Tests_Iu.ttcn:MASKED TC_iu_emerg_call_imsi testcase
164 </failure>
165 </testcase>
166 <testcase classname='MSC_Tests_Iu' name='TC_iu_establish_and_nothing' time='MASKED'/>
167 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_setup_and_nothing' time='MASKED'/>
168 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_timeout' time='MASKED'/>
169 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_crcx_ran_reject' time='MASKED'>
170 <failure type='fail-verdict'>Timeout waiting for channel release
171 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
172 MSC_Tests_Iu.ttcn:MASKED TC_iu_mo_crcx_ran_reject testcase
173 </failure>
174 </testcase>
175 <testcase classname='MSC_Tests_Iu' name='TC_iu_mt_crcx_ran_reject' time='MASKED'/>
176 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_cancel' time='MASKED'>
177 <failure type='fail-verdict'>Tguard timeout
178 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
179 MSC_Tests_Iu.ttcn:MASKED TC_iu_gsup_cancel testcase
180 </failure>
181 </testcase>
182 <testcase classname='MSC_Tests_Iu' name='TC_iu_mo_release_timeout' time='MASKED'/>
183 <testcase classname='MSC_Tests' name='TC_reset_two_1iu' time='MASKED'/>
184 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_sms' time='MASKED'/>
185 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms' time='MASKED'/>
186 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_sms_paging_and_nothing' time='MASKED'/>
187 <testcase classname='MSC_Tests_Iu' name='TC_iu_smpp_mo_sms' time='MASKED'/>
188 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_sms' time='MASKED'/>
189 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_smma' time='MASKED'/>
190 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_ack' time='MASKED'/>
191 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_err' time='MASKED'/>
192 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mt_sms_rp_mr' time='MASKED'/>
193 <testcase classname='MSC_Tests_Iu' name='TC_iu_gsup_mo_mt_sms_rp_mr' time='MASKED'/>
194 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_single_request' time='MASKED'/>
195 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_notification' time='MASKED'/>
196 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_during_mt_call' time='MASKED'>
197 <failure type='fail-verdict'>Tguard timeout
198 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
199 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mo_ussd_during_mt_call testcase
200 </failure>
201 </testcase>
202 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mt_ussd_during_mt_call' time='MASKED'>
203 <failure type='fail-verdict'>Tguard timeout
204 MSC_Tests_Iu.ttcn:MASKED MSC_Tests_Iu control part
205 MSC_Tests_Iu.ttcn:MASKED TC_iu_lu_and_mt_ussd_during_mt_call testcase
206 </failure>
207 </testcase>
208 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_mo_ussd_mo_release' time='MASKED'/>
209 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_and_ss_session_timeout' time='MASKED'/>
210 <testcase classname='MSC_Tests_Iu' name='TC_iu_lu_with_invalid_mcc_mnc' time='MASKED'/>
211 <testcase classname='MSC_Tests_Iu' name='TC_mo_cc_iu_release' time='MASKED'/>
Neels Hofmeyr3cf797d2018-04-05 16:56:38 +0200212</testsuite>