Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 1 | /* Code providing a ccid_slot_ops implementation based on iso7716_fsm, |
| 2 | * (which in turn sits on top of card_uart) */ |
| 3 | |
| 4 | #include <unistd.h> |
| 5 | #include <errno.h> |
Harald Welte | 6def1cf | 2019-10-10 15:40:02 +0200 | [diff] [blame] | 6 | #include <string.h> |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 7 | |
| 8 | #include <osmocom/core/msgb.h> |
| 9 | #include <osmocom/core/timer.h> |
| 10 | #include <osmocom/core/logging.h> |
| 11 | #include <osmocom/core/fsm.h> |
| 12 | |
| 13 | #include "ccid_device.h" |
| 14 | #include "cuart.h" |
| 15 | #include "iso7816_fsm.h" |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 16 | #include "iso7816_3.h" |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 17 | |
| 18 | struct iso_fsm_slot { |
| 19 | /* CCID slot above us */ |
| 20 | struct ccid_slot *cs; |
| 21 | /* main ISO7816-3 FSM instance beneath us */ |
| 22 | struct osmo_fsm_inst *fi; |
| 23 | /* UART beneath the ISO7816-3 FSM */ |
| 24 | struct card_uart *cuart; |
| 25 | /* bSeq of the operation currently in progress */ |
| 26 | uint8_t seq; |
| 27 | }; |
| 28 | |
| 29 | struct iso_fsm_slot_instance { |
| 30 | struct iso_fsm_slot slot[NR_SLOTS]; |
| 31 | }; |
| 32 | |
| 33 | static struct iso_fsm_slot_instance g_si; |
| 34 | |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 35 | static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs) |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 36 | { |
| 37 | OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot)); |
| 38 | return &g_si.slot[cs->slot_nr]; |
| 39 | } |
| 40 | |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 41 | struct card_uart *cuart4slot_nr(uint8_t slot_nr) |
| 42 | { |
| 43 | OSMO_ASSERT(slot_nr < ARRAY_SIZE(g_si.slot)); |
| 44 | return g_si.slot[slot_nr].cuart; |
| 45 | } |
| 46 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 47 | static const uint8_t sysmousim_sjs1_atr[] = { |
| 48 | 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31, |
| 49 | 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20, |
| 50 | 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 }; |
| 51 | |
| 52 | static const struct ccid_pars_decoded iso_fsm_def_pars = { |
| 53 | .fi = 372, |
| 54 | .di = 1, |
| 55 | .clock_stop = CCID_CLOCK_STOP_NOTALLOWED, |
| 56 | .inverse_convention = false, |
| 57 | .t0 = { |
| 58 | .guard_time_etu = 0, |
| 59 | .waiting_integer = 0, |
| 60 | }, |
| 61 | /* FIXME: T=1 */ |
| 62 | }; |
| 63 | |
| 64 | static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg) |
| 65 | { |
| 66 | /* do nothing; real hardware would update the slot related state here */ |
| 67 | } |
| 68 | |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 69 | static void iso_fsm_slot_icc_set_insertion_status(struct ccid_slot *cs, bool present) { |
| 70 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 71 | |
| 72 | if(present == cs->icc_present) |
| 73 | return; |
| 74 | |
| 75 | cs->icc_present = present; |
| 76 | |
| 77 | if (!present) { |
| 78 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_CARD_REMOVAL, NULL); |
| 79 | card_uart_ctrl(ss->cuart, CUART_CTL_RST, true); |
| 80 | card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false); |
| 81 | cs->icc_powered = false; |
| 82 | cs->cmd_busy = false; |
| 83 | } |
| 84 | } |
| 85 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 86 | static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg, |
| 87 | const struct ccid_pc_to_rdr_icc_power_on *ipo) |
| 88 | { |
| 89 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 90 | |
| 91 | ss->seq = ipo->hdr.bSeq; |
| 92 | LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n"); |
| 93 | |
| 94 | /* FIXME: do this via a FSM? */ |
| 95 | card_uart_ctrl(ss->cuart, CUART_CTL_RST, true); |
Harald Welte | f54a6b2 | 2019-10-10 13:30:24 +0200 | [diff] [blame] | 96 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 97 | card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true); |
| 98 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL); |
| 99 | cs->icc_powered = true; |
| 100 | card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true); |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 101 | delay_us(10000); |
| 102 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 103 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL); |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 104 | card_uart_ctrl(ss->cuart, CUART_CTL_RST, false); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 105 | |
| 106 | msgb_free(msg); |
| 107 | /* continues in iso_fsm_clot_user_cb once ATR is received */ |
| 108 | } |
| 109 | static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data) |
| 110 | { |
| 111 | struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi); |
| 112 | struct ccid_slot *cs = ss->cs; |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 113 | |
| 114 | switch (event) { |
| 115 | case ISO7816_E_ATR_DONE_IND: |
| 116 | case ISO7816_E_ATR_ERR_IND: |
| 117 | case ISO7816_E_TPDU_DONE_IND: |
| 118 | case ISO7816_E_TPDU_FAILED_IND: |
| 119 | case ISO7816_E_PPS_DONE_IND: |
| 120 | case ISO7816_E_PPS_FAILED_IND: |
| 121 | cs->event_data = data; |
| 122 | asm volatile("dmb st": : :"memory"); |
| 123 | cs->event = event; |
| 124 | break; |
| 125 | default: |
| 126 | LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, cause=%d, data=%p) unhandled\n", |
| 127 | __func__, event, cause, data); |
| 128 | break; |
| 129 | } |
| 130 | } |
| 131 | |
| 132 | static int iso_handle_fsm_events(struct ccid_slot *cs, bool enable){ |
| 133 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 134 | struct msgb *tpdu, *resp; |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 135 | volatile uint32_t event = cs->event; |
| 136 | volatile void * volatile data = cs->event_data; |
| 137 | |
| 138 | if(!event) |
| 139 | return 0; |
| 140 | if(event && !data) |
| 141 | return 0; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 142 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 143 | switch (event) { |
| 144 | case ISO7816_E_ATR_DONE_IND: |
| 145 | tpdu = data; |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 146 | LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event, |
Harald Welte | 22dd1ff | 2019-10-10 15:40:53 +0200 | [diff] [blame] | 147 | msgb_hexdump(tpdu)); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 148 | resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, |
| 149 | msgb_data(tpdu), msgb_length(tpdu)); |
| 150 | ccid_slot_send_unbusy(cs, resp); |
Harald Welte | bbb5009 | 2019-10-10 14:55:25 +0200 | [diff] [blame] | 151 | /* Don't free "TPDU" here, as the ATR should survive */ |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 152 | cs->event = 0; |
| 153 | break; |
| 154 | case ISO7816_E_ATR_ERR_IND: |
| 155 | tpdu = data; |
| 156 | LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event, |
| 157 | msgb_hexdump(tpdu)); |
| 158 | resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, |
| 159 | msgb_data(tpdu), msgb_length(tpdu)); |
| 160 | ccid_slot_send_unbusy(cs, resp); |
| 161 | /* Don't free "TPDU" here, as the ATR should survive */ |
| 162 | cs->event = 0; |
| 163 | break; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 164 | break; |
| 165 | case ISO7816_E_TPDU_DONE_IND: |
| 166 | tpdu = data; |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 167 | LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event, |
Harald Welte | 22dd1ff | 2019-10-10 15:40:53 +0200 | [diff] [blame] | 168 | msgb_hexdump(tpdu)); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 169 | resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l2(tpdu), msgb_l2len(tpdu)); |
| 170 | ccid_slot_send_unbusy(cs, resp); |
| 171 | msgb_free(tpdu); |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 172 | cs->event = 0; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 173 | break; |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 174 | case ISO7816_E_TPDU_FAILED_IND: |
| 175 | tpdu = data; |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 176 | LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event, |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 177 | msgb_hexdump(tpdu)); |
| 178 | /* FIXME: other error causes than card removal?*/ |
| 179 | resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, msgb_l2(tpdu), 0); |
| 180 | ccid_slot_send_unbusy(cs, resp); |
| 181 | msgb_free(tpdu); |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 182 | cs->event = 0; |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 183 | break; |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 184 | case ISO7816_E_PPS_DONE_IND: |
| 185 | tpdu = data; |
| 186 | /* pps was successful, so we know these values are fine */ |
| 187 | uint16_t F = iso7816_3_fi_table[cs->proposed_pars.fi]; |
| 188 | uint8_t D = iso7816_3_di_table[cs->proposed_pars.di]; |
| 189 | uint32_t fmax = iso7816_3_fmax_table[cs->proposed_pars.fi]; |
| 190 | |
Eric Wild | a057457 | 2019-11-21 15:28:59 +0100 | [diff] [blame] | 191 | /* 7816-3 5.2.3 |
| 192 | * No information shall be exchanged when switching the |
| 193 | * frequency value. Two different times are recommended |
| 194 | * for switching the frequency value, either |
| 195 | * - after ATR while card is idle |
| 196 | * - after PPS while card is idle |
| 197 | */ |
Eric Wild | 587d4fb | 2019-11-27 18:59:43 +0100 | [diff] [blame] | 198 | card_uart_ctrl(ss->cuart, CUART_CTL_SET_CLOCK_FREQ, fmax); |
| 199 | card_uart_ctrl(ss->cuart, CUART_CTL_SET_FD, F/D); |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 200 | card_uart_ctrl(ss->cuart, CUART_CTL_WTIME, cs->proposed_pars.t0.waiting_integer); |
| 201 | |
| 202 | cs->pars = cs->proposed_pars; |
| 203 | resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_OK, 0); |
| 204 | |
| 205 | ccid_slot_send_unbusy(cs, resp); |
| 206 | |
| 207 | /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */ |
| 208 | msgb_free(tpdu); |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 209 | cs->event = 0; |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 210 | break; |
| 211 | case ISO7816_E_PPS_FAILED_IND: |
| 212 | tpdu = data; |
| 213 | /* failed fi/di */ |
| 214 | resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_FAILED, 10); |
| 215 | ccid_slot_send_unbusy(cs, resp); |
| 216 | /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */ |
| 217 | msgb_free(tpdu); |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 218 | cs->event = 0; |
| 219 | break; |
| 220 | case 0: |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 221 | break; |
Harald Welte | 22dd1ff | 2019-10-10 15:40:53 +0200 | [diff] [blame] | 222 | default: |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 223 | LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, data=%p) unhandled\n", |
| 224 | __func__, event, data); |
Harald Welte | 22dd1ff | 2019-10-10 15:40:53 +0200 | [diff] [blame] | 225 | break; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 226 | } |
| 227 | } |
| 228 | |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 229 | static int iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg, |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 230 | const struct ccid_pc_to_rdr_xfr_block *xfb) |
| 231 | { |
| 232 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 233 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 234 | |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 235 | ss->seq = xfb->hdr.bSeq; |
Harald Welte | 6def1cf | 2019-10-10 15:40:02 +0200 | [diff] [blame] | 236 | |
| 237 | /* must be '0' for TPDU level exchanges or for short APDU */ |
| 238 | OSMO_ASSERT(xfb->wLevelParameter == 0x0000); |
| 239 | OSMO_ASSERT(msgb_length(msg) > xfb->hdr.dwLength); |
| 240 | |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 241 | msgb_pull(msg, 10); |
Harald Welte | 6def1cf | 2019-10-10 15:40:02 +0200 | [diff] [blame] | 242 | |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 243 | LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer: %s\n", msgb_hexdump(msg)); |
| 244 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, msg); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 245 | /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */ |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 246 | return 0; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | |
| 250 | static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable) |
| 251 | { |
| 252 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 253 | |
| 254 | if (enable) { |
| 255 | card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true); |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 256 | cs->icc_powered = true; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 257 | } else { |
| 258 | card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false); |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 259 | cs->icc_powered = false; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 260 | } |
| 261 | } |
| 262 | |
| 263 | static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd) |
| 264 | { |
| 265 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 266 | |
| 267 | switch (cmd) { |
| 268 | case CCID_CLOCK_CMD_STOP: |
| 269 | card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false); |
| 270 | break; |
| 271 | case CCID_CLOCK_CMD_RESTART: |
| 272 | card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true); |
| 273 | break; |
| 274 | default: |
| 275 | OSMO_ASSERT(0); |
| 276 | } |
| 277 | } |
| 278 | |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 279 | static int iso_fsm_slot_set_params(struct ccid_slot *cs, uint8_t seq, enum ccid_protocol_num proto, |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 280 | const struct ccid_pars_decoded *pars_dec) |
| 281 | { |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 282 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 283 | struct msgb *tpdu; |
| 284 | |
| 285 | /* see 6.1.7 for error offsets */ |
| 286 | if(proto != CCID_PROTOCOL_NUM_T0) |
| 287 | return -7; |
| 288 | |
| 289 | if(pars_dec->t0.guard_time_etu != 0) |
| 290 | return -12; |
| 291 | |
| 292 | if(pars_dec->clock_stop != CCID_CLOCK_STOP_NOTALLOWED) |
| 293 | return -14; |
| 294 | |
| 295 | ss->seq = seq; |
| 296 | |
Eric Wild | 45e930d | 2019-11-21 14:38:16 +0100 | [diff] [blame] | 297 | /* FIXME: |
| 298 | When using D=64, the interface device shall ensure a delay |
| 299 | of at least 16 etu between the leading edge of the last |
| 300 | received character and the leading edge of the character transmitted |
| 301 | for initiating a command. |
| 302 | -> we can't really do 4 stop bits?! |
| 303 | */ |
| 304 | |
Eric Wild | ad1edce | 2019-11-27 16:51:08 +0100 | [diff] [blame] | 305 | /* Hardware does not support SPU, so no PPS2, and PPS3 is reserved anyway */ |
| 306 | tpdu = msgb_alloc(6, "PPSRQ"); |
| 307 | OSMO_ASSERT(tpdu); |
| 308 | msgb_put_u8(tpdu, 0xff); |
| 309 | msgb_put_u8(tpdu, (1 << 4)); /* only PPS1, T=0 */ |
| 310 | msgb_put_u8(tpdu, (pars_dec->fi << 4 | pars_dec->di)); |
| 311 | msgb_put_u8(tpdu, 0xff ^ (1 << 4) ^ (pars_dec->fi << 4 | pars_dec->di)); |
| 312 | |
| 313 | |
| 314 | LOGPCS(cs, LOGL_DEBUG, "scheduling PPS transfer: %s\n", msgb_hexdump(tpdu)); |
| 315 | osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_PPS_CMD, tpdu); |
| 316 | /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */ |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 317 | return 0; |
| 318 | } |
| 319 | |
| 320 | static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t freq_hz, uint32_t rate_bps) |
| 321 | { |
| 322 | /* we always acknowledge all rates/clocks */ |
| 323 | return 0; |
| 324 | } |
| 325 | |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 326 | extern void *g_tall_ctx; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 327 | static int iso_fsm_slot_init(struct ccid_slot *cs) |
| 328 | { |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 329 | void *ctx = g_tall_ctx; /* FIXME */ |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 330 | struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs); |
| 331 | struct card_uart *cuart = talloc_zero(ctx, struct card_uart); |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 332 | char id_buf[16] = "SIM0"; |
| 333 | char devname[] = "foobar"; |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 334 | int rc; |
| 335 | |
| 336 | LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__); |
| 337 | |
Harald Welte | 515d5b2 | 2019-10-10 13:46:13 +0200 | [diff] [blame] | 338 | /* HACK: make this in some way configurable so it works both in the firmware |
| 339 | * and on the host (functionfs) */ |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 340 | // if (cs->slot_nr == 0) { |
| 341 | // cs->icc_present = true; |
| 342 | // devname = "/dev/ttyUSB5"; |
| 343 | // } |
| 344 | devname[0] = cs->slot_nr +0x30; |
| 345 | devname[1] = 0; |
| 346 | //sprintf(devname, "%d", cs->slot_nr); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 347 | |
| 348 | if (!cuart) |
| 349 | return -ENOMEM; |
| 350 | |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 351 | //snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr); |
| 352 | id_buf[3] = cs->slot_nr +0x30; |
Harald Welte | 515d5b2 | 2019-10-10 13:46:13 +0200 | [diff] [blame] | 353 | if (devname) { |
Harald Welte | 03d6ebb | 2019-09-28 23:19:31 +0200 | [diff] [blame] | 354 | rc = card_uart_open(cuart, "asf4", devname); |
Harald Welte | 515d5b2 | 2019-10-10 13:46:13 +0200 | [diff] [blame] | 355 | if (rc < 0) { |
| 356 | LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc); |
| 357 | talloc_free(cuart); |
| 358 | return rc; |
| 359 | } |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 360 | } |
| 361 | ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss); |
| 362 | if (!ss->fi) { |
Harald Welte | 515d5b2 | 2019-10-10 13:46:13 +0200 | [diff] [blame] | 363 | LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n"); |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 364 | talloc_free(cuart); |
| 365 | return -1; |
| 366 | } |
| 367 | |
| 368 | cs->default_pars = &iso_fsm_def_pars; |
| 369 | ss->cuart = cuart; |
| 370 | ss->cs = cs; |
| 371 | |
| 372 | |
| 373 | return 0; |
| 374 | } |
| 375 | |
| 376 | const struct ccid_slot_ops iso_fsm_slot_ops = { |
| 377 | .init = iso_fsm_slot_init, |
| 378 | .pre_proc_cb = iso_fsm_slot_pre_proc_cb, |
| 379 | .icc_power_on_async = iso_fsm_slot_icc_power_on_async, |
Eric Wild | 9e622dc | 2019-11-27 14:43:16 +0100 | [diff] [blame] | 380 | .icc_set_insertion_status = iso_fsm_slot_icc_set_insertion_status, |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 381 | .xfr_block_async = iso_fsm_slot_xfr_block_async, |
| 382 | .set_power = iso_fsm_slot_set_power, |
| 383 | .set_clock = iso_fsm_slot_set_clock, |
| 384 | .set_params = iso_fsm_slot_set_params, |
| 385 | .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock, |
Eric Wild | 759a646 | 2019-11-11 14:22:52 +0100 | [diff] [blame] | 386 | .handle_fsm_events = iso_handle_fsm_events, |
Harald Welte | 727d675 | 2019-09-30 21:46:44 +0200 | [diff] [blame] | 387 | }; |