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Harald Welte727d6752019-09-30 21:46:44 +02001/* Code providing a ccid_slot_ops implementation based on iso7716_fsm,
2 * (which in turn sits on top of card_uart) */
3
4#include <unistd.h>
5#include <errno.h>
Harald Welte6def1cf2019-10-10 15:40:02 +02006#include <string.h>
Harald Welte727d6752019-09-30 21:46:44 +02007
8#include <osmocom/core/msgb.h>
9#include <osmocom/core/timer.h>
10#include <osmocom/core/logging.h>
11#include <osmocom/core/fsm.h>
12
13#include "ccid_device.h"
14#include "cuart.h"
15#include "iso7816_fsm.h"
Eric Wildad1edce2019-11-27 16:51:08 +010016#include "iso7816_3.h"
Harald Welte727d6752019-09-30 21:46:44 +020017
18struct iso_fsm_slot {
19 /* CCID slot above us */
20 struct ccid_slot *cs;
21 /* main ISO7816-3 FSM instance beneath us */
22 struct osmo_fsm_inst *fi;
23 /* UART beneath the ISO7816-3 FSM */
24 struct card_uart *cuart;
25 /* bSeq of the operation currently in progress */
26 uint8_t seq;
27};
28
29struct iso_fsm_slot_instance {
30 struct iso_fsm_slot slot[NR_SLOTS];
31};
32
33static struct iso_fsm_slot_instance g_si;
34
Harald Welte03d6ebb2019-09-28 23:19:31 +020035static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
Harald Welte727d6752019-09-30 21:46:44 +020036{
37 OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
38 return &g_si.slot[cs->slot_nr];
39}
40
Harald Welte03d6ebb2019-09-28 23:19:31 +020041struct card_uart *cuart4slot_nr(uint8_t slot_nr)
42{
43 OSMO_ASSERT(slot_nr < ARRAY_SIZE(g_si.slot));
44 return g_si.slot[slot_nr].cuart;
45}
46
Harald Welte727d6752019-09-30 21:46:44 +020047static const uint8_t sysmousim_sjs1_atr[] = {
48 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,
49 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,
50 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 };
51
52static const struct ccid_pars_decoded iso_fsm_def_pars = {
53 .fi = 372,
54 .di = 1,
55 .clock_stop = CCID_CLOCK_STOP_NOTALLOWED,
56 .inverse_convention = false,
57 .t0 = {
58 .guard_time_etu = 0,
59 .waiting_integer = 0,
60 },
61 /* FIXME: T=1 */
62};
63
64static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg)
65{
66 /* do nothing; real hardware would update the slot related state here */
67}
68
Eric Wild9e622dc2019-11-27 14:43:16 +010069static void iso_fsm_slot_icc_set_insertion_status(struct ccid_slot *cs, bool present) {
70 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
71
72 if(present == cs->icc_present)
73 return;
74
75 cs->icc_present = present;
76
77 if (!present) {
78 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_CARD_REMOVAL, NULL);
79 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
80 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
81 cs->icc_powered = false;
82 cs->cmd_busy = false;
83 }
84}
85
Harald Welte727d6752019-09-30 21:46:44 +020086static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg,
87 const struct ccid_pc_to_rdr_icc_power_on *ipo)
88{
89 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
90
91 ss->seq = ipo->hdr.bSeq;
92 LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n");
93
94 /* FIXME: do this via a FSM? */
95 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
Harald Weltef54a6b22019-10-10 13:30:24 +020096 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
Harald Welte727d6752019-09-30 21:46:44 +020097 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
98 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL);
99 cs->icc_powered = true;
100 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200101 delay_us(10000);
102
Harald Welte727d6752019-09-30 21:46:44 +0200103 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200104 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
Harald Welte727d6752019-09-30 21:46:44 +0200105
106 msgb_free(msg);
107 /* continues in iso_fsm_clot_user_cb once ATR is received */
108}
109static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data)
110{
111 struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi);
112 struct ccid_slot *cs = ss->cs;
Eric Wild759a6462019-11-11 14:22:52 +0100113
114 switch (event) {
115 case ISO7816_E_ATR_DONE_IND:
116 case ISO7816_E_ATR_ERR_IND:
117 case ISO7816_E_TPDU_DONE_IND:
118 case ISO7816_E_TPDU_FAILED_IND:
119 case ISO7816_E_PPS_DONE_IND:
120 case ISO7816_E_PPS_FAILED_IND:
121 cs->event_data = data;
122 asm volatile("dmb st": : :"memory");
123 cs->event = event;
124 break;
125 default:
126 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, cause=%d, data=%p) unhandled\n",
127 __func__, event, cause, data);
128 break;
129 }
130}
131
132static int iso_handle_fsm_events(struct ccid_slot *cs, bool enable){
133 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Harald Welte727d6752019-09-30 21:46:44 +0200134 struct msgb *tpdu, *resp;
Eric Wild759a6462019-11-11 14:22:52 +0100135 volatile uint32_t event = cs->event;
136 volatile void * volatile data = cs->event_data;
137
138 if(!event)
139 return 0;
140 if(event && !data)
141 return 0;
Harald Welte727d6752019-09-30 21:46:44 +0200142
Harald Welte727d6752019-09-30 21:46:44 +0200143 switch (event) {
144 case ISO7816_E_ATR_DONE_IND:
145 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100146 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Harald Welte22dd1ff2019-10-10 15:40:53 +0200147 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200148 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0,
149 msgb_data(tpdu), msgb_length(tpdu));
150 ccid_slot_send_unbusy(cs, resp);
Harald Weltebbb50092019-10-10 14:55:25 +0200151 /* Don't free "TPDU" here, as the ATR should survive */
Eric Wild759a6462019-11-11 14:22:52 +0100152 cs->event = 0;
153 break;
154 case ISO7816_E_ATR_ERR_IND:
155 tpdu = data;
156 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
157 msgb_hexdump(tpdu));
158 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE,
159 msgb_data(tpdu), msgb_length(tpdu));
160 ccid_slot_send_unbusy(cs, resp);
161 /* Don't free "TPDU" here, as the ATR should survive */
162 cs->event = 0;
163 break;
Harald Welte727d6752019-09-30 21:46:44 +0200164 break;
165 case ISO7816_E_TPDU_DONE_IND:
166 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100167 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Harald Welte22dd1ff2019-10-10 15:40:53 +0200168 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200169 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l2(tpdu), msgb_l2len(tpdu));
170 ccid_slot_send_unbusy(cs, resp);
171 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100172 cs->event = 0;
Harald Welte727d6752019-09-30 21:46:44 +0200173 break;
Eric Wild9e622dc2019-11-27 14:43:16 +0100174 case ISO7816_E_TPDU_FAILED_IND:
175 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100176 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Eric Wild9e622dc2019-11-27 14:43:16 +0100177 msgb_hexdump(tpdu));
178 /* FIXME: other error causes than card removal?*/
179 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, msgb_l2(tpdu), 0);
180 ccid_slot_send_unbusy(cs, resp);
181 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100182 cs->event = 0;
Eric Wild9e622dc2019-11-27 14:43:16 +0100183 break;
Eric Wildad1edce2019-11-27 16:51:08 +0100184 case ISO7816_E_PPS_DONE_IND:
185 tpdu = data;
186 /* pps was successful, so we know these values are fine */
187 uint16_t F = iso7816_3_fi_table[cs->proposed_pars.fi];
188 uint8_t D = iso7816_3_di_table[cs->proposed_pars.di];
189 uint32_t fmax = iso7816_3_fmax_table[cs->proposed_pars.fi];
190
191 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK_FREQ, fmax);
192 card_uart_ctrl(ss->cuart, CUART_CTL_FD, F/D);
193 card_uart_ctrl(ss->cuart, CUART_CTL_WTIME, cs->proposed_pars.t0.waiting_integer);
194
195 cs->pars = cs->proposed_pars;
196 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_OK, 0);
197
198 ccid_slot_send_unbusy(cs, resp);
199
200 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
201 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100202 cs->event = 0;
Eric Wildad1edce2019-11-27 16:51:08 +0100203 break;
204 case ISO7816_E_PPS_FAILED_IND:
205 tpdu = data;
206 /* failed fi/di */
207 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_FAILED, 10);
208 ccid_slot_send_unbusy(cs, resp);
209 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
210 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100211 cs->event = 0;
212 break;
213 case 0:
Eric Wildad1edce2019-11-27 16:51:08 +0100214 break;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200215 default:
Eric Wild759a6462019-11-11 14:22:52 +0100216 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, data=%p) unhandled\n",
217 __func__, event, data);
Harald Welte22dd1ff2019-10-10 15:40:53 +0200218 break;
Harald Welte727d6752019-09-30 21:46:44 +0200219 }
220}
221
Eric Wild9e622dc2019-11-27 14:43:16 +0100222static int iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg,
Harald Welte727d6752019-09-30 21:46:44 +0200223 const struct ccid_pc_to_rdr_xfr_block *xfb)
224{
225 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Eric Wild759a6462019-11-11 14:22:52 +0100226
Harald Welte727d6752019-09-30 21:46:44 +0200227
Harald Welte727d6752019-09-30 21:46:44 +0200228 ss->seq = xfb->hdr.bSeq;
Harald Welte6def1cf2019-10-10 15:40:02 +0200229
230 /* must be '0' for TPDU level exchanges or for short APDU */
231 OSMO_ASSERT(xfb->wLevelParameter == 0x0000);
232 OSMO_ASSERT(msgb_length(msg) > xfb->hdr.dwLength);
233
Eric Wild759a6462019-11-11 14:22:52 +0100234 msgb_pull(msg, 10);
Harald Welte6def1cf2019-10-10 15:40:02 +0200235
Eric Wild759a6462019-11-11 14:22:52 +0100236 LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer: %s\n", msgb_hexdump(msg));
237 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, msg);
Harald Welte727d6752019-09-30 21:46:44 +0200238 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Eric Wild9e622dc2019-11-27 14:43:16 +0100239 return 0;
Harald Welte727d6752019-09-30 21:46:44 +0200240}
241
242
243static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable)
244{
245 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
246
247 if (enable) {
248 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200249 cs->icc_powered = true;
Harald Welte727d6752019-09-30 21:46:44 +0200250 } else {
251 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200252 cs->icc_powered = false;
Harald Welte727d6752019-09-30 21:46:44 +0200253 }
254}
255
256static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd)
257{
258 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
259
260 switch (cmd) {
261 case CCID_CLOCK_CMD_STOP:
262 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false);
263 break;
264 case CCID_CLOCK_CMD_RESTART:
265 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
266 break;
267 default:
268 OSMO_ASSERT(0);
269 }
270}
271
Eric Wildad1edce2019-11-27 16:51:08 +0100272static int iso_fsm_slot_set_params(struct ccid_slot *cs, uint8_t seq, enum ccid_protocol_num proto,
Harald Welte727d6752019-09-30 21:46:44 +0200273 const struct ccid_pars_decoded *pars_dec)
274{
Eric Wildad1edce2019-11-27 16:51:08 +0100275 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
276 struct msgb *tpdu;
277
278 /* see 6.1.7 for error offsets */
279 if(proto != CCID_PROTOCOL_NUM_T0)
280 return -7;
281
282 if(pars_dec->t0.guard_time_etu != 0)
283 return -12;
284
285 if(pars_dec->clock_stop != CCID_CLOCK_STOP_NOTALLOWED)
286 return -14;
287
288 ss->seq = seq;
289
Eric Wild45e930d2019-11-21 14:38:16 +0100290 /* FIXME:
291 When using D=64, the interface device shall ensure a delay
292 of at least 16 etu between the leading edge of the last
293 received character and the leading edge of the character transmitted
294 for initiating a command.
295 -> we can't really do 4 stop bits?!
296 */
297
Eric Wildad1edce2019-11-27 16:51:08 +0100298 /* Hardware does not support SPU, so no PPS2, and PPS3 is reserved anyway */
299 tpdu = msgb_alloc(6, "PPSRQ");
300 OSMO_ASSERT(tpdu);
301 msgb_put_u8(tpdu, 0xff);
302 msgb_put_u8(tpdu, (1 << 4)); /* only PPS1, T=0 */
303 msgb_put_u8(tpdu, (pars_dec->fi << 4 | pars_dec->di));
304 msgb_put_u8(tpdu, 0xff ^ (1 << 4) ^ (pars_dec->fi << 4 | pars_dec->di));
305
306
307 LOGPCS(cs, LOGL_DEBUG, "scheduling PPS transfer: %s\n", msgb_hexdump(tpdu));
308 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_PPS_CMD, tpdu);
309 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Harald Welte727d6752019-09-30 21:46:44 +0200310 return 0;
311}
312
313static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t freq_hz, uint32_t rate_bps)
314{
315 /* we always acknowledge all rates/clocks */
316 return 0;
317}
318
Harald Welte03d6ebb2019-09-28 23:19:31 +0200319extern void *g_tall_ctx;
Harald Welte727d6752019-09-30 21:46:44 +0200320static int iso_fsm_slot_init(struct ccid_slot *cs)
321{
Harald Welte03d6ebb2019-09-28 23:19:31 +0200322 void *ctx = g_tall_ctx; /* FIXME */
Harald Welte727d6752019-09-30 21:46:44 +0200323 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
324 struct card_uart *cuart = talloc_zero(ctx, struct card_uart);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200325 char id_buf[16] = "SIM0";
326 char devname[] = "foobar";
Harald Welte727d6752019-09-30 21:46:44 +0200327 int rc;
328
329 LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__);
330
Harald Welte515d5b22019-10-10 13:46:13 +0200331 /* HACK: make this in some way configurable so it works both in the firmware
332 * and on the host (functionfs) */
Harald Welte03d6ebb2019-09-28 23:19:31 +0200333// if (cs->slot_nr == 0) {
334// cs->icc_present = true;
335// devname = "/dev/ttyUSB5";
336// }
337 devname[0] = cs->slot_nr +0x30;
338 devname[1] = 0;
339 //sprintf(devname, "%d", cs->slot_nr);
Harald Welte727d6752019-09-30 21:46:44 +0200340
341 if (!cuart)
342 return -ENOMEM;
343
Harald Welte03d6ebb2019-09-28 23:19:31 +0200344 //snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr);
345 id_buf[3] = cs->slot_nr +0x30;
Harald Welte515d5b22019-10-10 13:46:13 +0200346 if (devname) {
Harald Welte03d6ebb2019-09-28 23:19:31 +0200347 rc = card_uart_open(cuart, "asf4", devname);
Harald Welte515d5b22019-10-10 13:46:13 +0200348 if (rc < 0) {
349 LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc);
350 talloc_free(cuart);
351 return rc;
352 }
Harald Welte727d6752019-09-30 21:46:44 +0200353 }
354 ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss);
355 if (!ss->fi) {
Harald Welte515d5b22019-10-10 13:46:13 +0200356 LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n");
Harald Welte727d6752019-09-30 21:46:44 +0200357 talloc_free(cuart);
358 return -1;
359 }
360
361 cs->default_pars = &iso_fsm_def_pars;
362 ss->cuart = cuart;
363 ss->cs = cs;
364
365
366 return 0;
367}
368
369const struct ccid_slot_ops iso_fsm_slot_ops = {
370 .init = iso_fsm_slot_init,
371 .pre_proc_cb = iso_fsm_slot_pre_proc_cb,
372 .icc_power_on_async = iso_fsm_slot_icc_power_on_async,
Eric Wild9e622dc2019-11-27 14:43:16 +0100373 .icc_set_insertion_status = iso_fsm_slot_icc_set_insertion_status,
Harald Welte727d6752019-09-30 21:46:44 +0200374 .xfr_block_async = iso_fsm_slot_xfr_block_async,
375 .set_power = iso_fsm_slot_set_power,
376 .set_clock = iso_fsm_slot_set_clock,
377 .set_params = iso_fsm_slot_set_params,
378 .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock,
Eric Wild759a6462019-11-11 14:22:52 +0100379 .handle_fsm_events = iso_handle_fsm_events,
Harald Welte727d6752019-09-30 21:46:44 +0200380};