blob: 59071de4819d43d48c4b7e925bcd8f3459856188 [file] [log] [blame]
Harald Welte727d6752019-09-30 21:46:44 +02001/* Code providing a ccid_slot_ops implementation based on iso7716_fsm,
2 * (which in turn sits on top of card_uart) */
3
4#include <unistd.h>
5#include <errno.h>
6
7#include <osmocom/core/msgb.h>
8#include <osmocom/core/timer.h>
9#include <osmocom/core/logging.h>
10#include <osmocom/core/fsm.h>
11
12#include "ccid_device.h"
13#include "cuart.h"
14#include "iso7816_fsm.h"
15
16struct iso_fsm_slot {
17 /* CCID slot above us */
18 struct ccid_slot *cs;
19 /* main ISO7816-3 FSM instance beneath us */
20 struct osmo_fsm_inst *fi;
21 /* UART beneath the ISO7816-3 FSM */
22 struct card_uart *cuart;
23 /* bSeq of the operation currently in progress */
24 uint8_t seq;
25};
26
27struct iso_fsm_slot_instance {
28 struct iso_fsm_slot slot[NR_SLOTS];
29};
30
31static struct iso_fsm_slot_instance g_si;
32
33struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
34{
35 OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
36 return &g_si.slot[cs->slot_nr];
37}
38
39static const uint8_t sysmousim_sjs1_atr[] = {
40 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,
41 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,
42 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 };
43
44static const struct ccid_pars_decoded iso_fsm_def_pars = {
45 .fi = 372,
46 .di = 1,
47 .clock_stop = CCID_CLOCK_STOP_NOTALLOWED,
48 .inverse_convention = false,
49 .t0 = {
50 .guard_time_etu = 0,
51 .waiting_integer = 0,
52 },
53 /* FIXME: T=1 */
54};
55
56static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg)
57{
58 /* do nothing; real hardware would update the slot related state here */
59}
60
61static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg,
62 const struct ccid_pc_to_rdr_icc_power_on *ipo)
63{
64 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
65
66 ss->seq = ipo->hdr.bSeq;
67 LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n");
68
69 /* FIXME: do this via a FSM? */
70 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
Harald Weltef54a6b22019-10-10 13:30:24 +020071 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
Harald Welte727d6752019-09-30 21:46:44 +020072 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
73 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL);
74 cs->icc_powered = true;
75 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
76 usleep(10000);
77 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
78 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
79
80 msgb_free(msg);
81 /* continues in iso_fsm_clot_user_cb once ATR is received */
82}
83static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data)
84{
85 struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi);
86 struct ccid_slot *cs = ss->cs;
87 struct msgb *tpdu, *resp;
88
89 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%p)\n", __func__, event, cause, data);
90
91 switch (event) {
92 case ISO7816_E_ATR_DONE_IND:
93 tpdu = data;
94 /* FIXME: copy response data over */
95 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0,
96 msgb_data(tpdu), msgb_length(tpdu));
97 ccid_slot_send_unbusy(cs, resp);
98 msgb_free(tpdu);
99 break;
100 case ISO7816_E_TPDU_DONE_IND:
101 tpdu = data;
102 /* FIXME: copy response data over */
103 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l2(tpdu), msgb_l2len(tpdu));
104 ccid_slot_send_unbusy(cs, resp);
105 msgb_free(tpdu);
106 break;
107 }
108}
109
110static void iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg,
111 const struct ccid_pc_to_rdr_xfr_block *xfb)
112{
113 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
114
115 LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer\n");
116 ss->seq = xfb->hdr.bSeq;
117 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, msg);
118 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
119}
120
121
122static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable)
123{
124 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
125
126 if (enable) {
127 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
128 } else {
129 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
130 }
131}
132
133static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd)
134{
135 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
136
137 switch (cmd) {
138 case CCID_CLOCK_CMD_STOP:
139 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false);
140 break;
141 case CCID_CLOCK_CMD_RESTART:
142 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
143 break;
144 default:
145 OSMO_ASSERT(0);
146 }
147}
148
149static int iso_fsm_slot_set_params(struct ccid_slot *cs, enum ccid_protocol_num proto,
150 const struct ccid_pars_decoded *pars_dec)
151{
152 /* we always acknowledge all parameters */
153 return 0;
154}
155
156static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t freq_hz, uint32_t rate_bps)
157{
158 /* we always acknowledge all rates/clocks */
159 return 0;
160}
161
162
163static int iso_fsm_slot_init(struct ccid_slot *cs)
164{
165 void *ctx = NULL; /* FIXME */
166 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
167 struct card_uart *cuart = talloc_zero(ctx, struct card_uart);
168 char id_buf[16];
Harald Welte515d5b22019-10-10 13:46:13 +0200169 char *devname = NULL;
Harald Welte727d6752019-09-30 21:46:44 +0200170 int rc;
171
172 LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__);
173
Harald Welte515d5b22019-10-10 13:46:13 +0200174 /* HACK: make this in some way configurable so it works both in the firmware
175 * and on the host (functionfs) */
Harald Welte727d6752019-09-30 21:46:44 +0200176 if (cs->slot_nr == 0) {
177 cs->icc_present = true;
178 devname = "/dev/ttyUSB5";
179 }
180
181 if (!cuart)
182 return -ENOMEM;
183
184 snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr);
Harald Welte515d5b22019-10-10 13:46:13 +0200185 if (devname) {
186 rc = card_uart_open(cuart, "tty", devname);
187 if (rc < 0) {
188 LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc);
189 talloc_free(cuart);
190 return rc;
191 }
Harald Welte727d6752019-09-30 21:46:44 +0200192 }
193 ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss);
194 if (!ss->fi) {
Harald Welte515d5b22019-10-10 13:46:13 +0200195 LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n");
Harald Welte727d6752019-09-30 21:46:44 +0200196 talloc_free(cuart);
197 return -1;
198 }
199
200 cs->default_pars = &iso_fsm_def_pars;
201 ss->cuart = cuart;
202 ss->cs = cs;
203
204
205 return 0;
206}
207
208const struct ccid_slot_ops iso_fsm_slot_ops = {
209 .init = iso_fsm_slot_init,
210 .pre_proc_cb = iso_fsm_slot_pre_proc_cb,
211 .icc_power_on_async = iso_fsm_slot_icc_power_on_async,
212 .xfr_block_async = iso_fsm_slot_xfr_block_async,
213 .set_power = iso_fsm_slot_set_power,
214 .set_clock = iso_fsm_slot_set_clock,
215 .set_params = iso_fsm_slot_set_params,
216 .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock,
217};