blob: a7ecb9f4c53611a7f3c5145535f74e88e2fd3069 [file] [log] [blame]
Harald Welte727d6752019-09-30 21:46:44 +02001/* Code providing a ccid_slot_ops implementation based on iso7716_fsm,
2 * (which in turn sits on top of card_uart) */
3
4#include <unistd.h>
5#include <errno.h>
Harald Welte6def1cf2019-10-10 15:40:02 +02006#include <string.h>
Harald Welte727d6752019-09-30 21:46:44 +02007
8#include <osmocom/core/msgb.h>
9#include <osmocom/core/timer.h>
10#include <osmocom/core/logging.h>
11#include <osmocom/core/fsm.h>
12
13#include "ccid_device.h"
14#include "cuart.h"
15#include "iso7816_fsm.h"
16
17struct iso_fsm_slot {
18 /* CCID slot above us */
19 struct ccid_slot *cs;
20 /* main ISO7816-3 FSM instance beneath us */
21 struct osmo_fsm_inst *fi;
22 /* UART beneath the ISO7816-3 FSM */
23 struct card_uart *cuart;
24 /* bSeq of the operation currently in progress */
25 uint8_t seq;
26};
27
28struct iso_fsm_slot_instance {
29 struct iso_fsm_slot slot[NR_SLOTS];
30};
31
32static struct iso_fsm_slot_instance g_si;
33
34struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
35{
36 OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
37 return &g_si.slot[cs->slot_nr];
38}
39
40static const uint8_t sysmousim_sjs1_atr[] = {
41 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,
42 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,
43 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 };
44
45static const struct ccid_pars_decoded iso_fsm_def_pars = {
46 .fi = 372,
47 .di = 1,
48 .clock_stop = CCID_CLOCK_STOP_NOTALLOWED,
49 .inverse_convention = false,
50 .t0 = {
51 .guard_time_etu = 0,
52 .waiting_integer = 0,
53 },
54 /* FIXME: T=1 */
55};
56
57static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg)
58{
59 /* do nothing; real hardware would update the slot related state here */
60}
61
62static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg,
63 const struct ccid_pc_to_rdr_icc_power_on *ipo)
64{
65 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
66
67 ss->seq = ipo->hdr.bSeq;
68 LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n");
69
70 /* FIXME: do this via a FSM? */
71 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
Harald Weltef54a6b22019-10-10 13:30:24 +020072 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
Harald Welte727d6752019-09-30 21:46:44 +020073 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
74 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL);
75 cs->icc_powered = true;
76 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
77 usleep(10000);
78 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
79 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
80
81 msgb_free(msg);
82 /* continues in iso_fsm_clot_user_cb once ATR is received */
83}
84static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data)
85{
86 struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi);
87 struct ccid_slot *cs = ss->cs;
88 struct msgb *tpdu, *resp;
89
Harald Welte727d6752019-09-30 21:46:44 +020090 switch (event) {
91 case ISO7816_E_ATR_DONE_IND:
92 tpdu = data;
Harald Welte22dd1ff2019-10-10 15:40:53 +020093 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%s)\n", __func__, event, cause,
94 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +020095 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0,
96 msgb_data(tpdu), msgb_length(tpdu));
97 ccid_slot_send_unbusy(cs, resp);
Harald Weltebbb50092019-10-10 14:55:25 +020098 /* Don't free "TPDU" here, as the ATR should survive */
Harald Welte727d6752019-09-30 21:46:44 +020099 break;
100 case ISO7816_E_TPDU_DONE_IND:
101 tpdu = data;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200102 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%s)\n", __func__, event, cause,
103 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200104 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l2(tpdu), msgb_l2len(tpdu));
105 ccid_slot_send_unbusy(cs, resp);
106 msgb_free(tpdu);
107 break;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200108 default:
109 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, cause=%d, data=%p) unhandled\n",
110 __func__, event, cause, data);
111 break;
Harald Welte727d6752019-09-30 21:46:44 +0200112 }
113}
114
115static void iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg,
116 const struct ccid_pc_to_rdr_xfr_block *xfb)
117{
118 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Harald Welte6def1cf2019-10-10 15:40:02 +0200119 struct msgb *tpdu;
Harald Welte727d6752019-09-30 21:46:44 +0200120
Harald Welte727d6752019-09-30 21:46:44 +0200121 ss->seq = xfb->hdr.bSeq;
Harald Welte6def1cf2019-10-10 15:40:02 +0200122
123 /* must be '0' for TPDU level exchanges or for short APDU */
124 OSMO_ASSERT(xfb->wLevelParameter == 0x0000);
125 OSMO_ASSERT(msgb_length(msg) > xfb->hdr.dwLength);
126
127 /* 'msg' contains the raw CCID message as received from USB. We could create
128 * a new message buffer for the ISO7816 side here or we could 'strip the CCID
129 * header off the start of the message. Let's KISS and do a copy here */
130 tpdu = msgb_alloc(512, "TPDU");
131 OSMO_ASSERT(tpdu);
132 memcpy(msgb_data(tpdu), xfb->abData, xfb->hdr.dwLength);
133 msgb_put(tpdu, xfb->hdr.dwLength);
134 msgb_free(msg);
135
136 LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer: %s\n", msgb_hexdump(tpdu));
137 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, tpdu);
Harald Welte727d6752019-09-30 21:46:44 +0200138 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
139}
140
141
142static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable)
143{
144 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
145
146 if (enable) {
147 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
148 } else {
149 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
150 }
151}
152
153static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd)
154{
155 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
156
157 switch (cmd) {
158 case CCID_CLOCK_CMD_STOP:
159 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false);
160 break;
161 case CCID_CLOCK_CMD_RESTART:
162 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
163 break;
164 default:
165 OSMO_ASSERT(0);
166 }
167}
168
169static int iso_fsm_slot_set_params(struct ccid_slot *cs, enum ccid_protocol_num proto,
170 const struct ccid_pars_decoded *pars_dec)
171{
172 /* we always acknowledge all parameters */
173 return 0;
174}
175
176static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t freq_hz, uint32_t rate_bps)
177{
178 /* we always acknowledge all rates/clocks */
179 return 0;
180}
181
182
183static int iso_fsm_slot_init(struct ccid_slot *cs)
184{
185 void *ctx = NULL; /* FIXME */
186 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
187 struct card_uart *cuart = talloc_zero(ctx, struct card_uart);
188 char id_buf[16];
Harald Welte515d5b22019-10-10 13:46:13 +0200189 char *devname = NULL;
Harald Welte727d6752019-09-30 21:46:44 +0200190 int rc;
191
192 LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__);
193
Harald Welte515d5b22019-10-10 13:46:13 +0200194 /* HACK: make this in some way configurable so it works both in the firmware
195 * and on the host (functionfs) */
Harald Welte727d6752019-09-30 21:46:44 +0200196 if (cs->slot_nr == 0) {
197 cs->icc_present = true;
198 devname = "/dev/ttyUSB5";
199 }
200
201 if (!cuart)
202 return -ENOMEM;
203
204 snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr);
Harald Welte515d5b22019-10-10 13:46:13 +0200205 if (devname) {
206 rc = card_uart_open(cuart, "tty", devname);
207 if (rc < 0) {
208 LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc);
209 talloc_free(cuart);
210 return rc;
211 }
Harald Welte727d6752019-09-30 21:46:44 +0200212 }
213 ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss);
214 if (!ss->fi) {
Harald Welte515d5b22019-10-10 13:46:13 +0200215 LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n");
Harald Welte727d6752019-09-30 21:46:44 +0200216 talloc_free(cuart);
217 return -1;
218 }
219
220 cs->default_pars = &iso_fsm_def_pars;
221 ss->cuart = cuart;
222 ss->cs = cs;
223
224
225 return 0;
226}
227
228const struct ccid_slot_ops iso_fsm_slot_ops = {
229 .init = iso_fsm_slot_init,
230 .pre_proc_cb = iso_fsm_slot_pre_proc_cb,
231 .icc_power_on_async = iso_fsm_slot_icc_power_on_async,
232 .xfr_block_async = iso_fsm_slot_xfr_block_async,
233 .set_power = iso_fsm_slot_set_power,
234 .set_clock = iso_fsm_slot_set_clock,
235 .set_params = iso_fsm_slot_set_params,
236 .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock,
237};