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Harald Welte727d6752019-09-30 21:46:44 +02001/* Code providing a ccid_slot_ops implementation based on iso7716_fsm,
2 * (which in turn sits on top of card_uart) */
3
4#include <unistd.h>
5#include <errno.h>
Harald Welte6def1cf2019-10-10 15:40:02 +02006#include <string.h>
Harald Welte727d6752019-09-30 21:46:44 +02007
8#include <osmocom/core/msgb.h>
9#include <osmocom/core/timer.h>
10#include <osmocom/core/logging.h>
11#include <osmocom/core/fsm.h>
12
13#include "ccid_device.h"
14#include "cuart.h"
15#include "iso7816_fsm.h"
Eric Wildad1edce2019-11-27 16:51:08 +010016#include "iso7816_3.h"
Harald Welte727d6752019-09-30 21:46:44 +020017
18struct iso_fsm_slot {
19 /* CCID slot above us */
20 struct ccid_slot *cs;
21 /* main ISO7816-3 FSM instance beneath us */
22 struct osmo_fsm_inst *fi;
23 /* UART beneath the ISO7816-3 FSM */
24 struct card_uart *cuart;
25 /* bSeq of the operation currently in progress */
26 uint8_t seq;
27};
28
29struct iso_fsm_slot_instance {
30 struct iso_fsm_slot slot[NR_SLOTS];
31};
32
33static struct iso_fsm_slot_instance g_si;
34
Harald Welte03d6ebb2019-09-28 23:19:31 +020035static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
Harald Welte727d6752019-09-30 21:46:44 +020036{
37 OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
38 return &g_si.slot[cs->slot_nr];
39}
40
Harald Welte03d6ebb2019-09-28 23:19:31 +020041struct card_uart *cuart4slot_nr(uint8_t slot_nr)
42{
43 OSMO_ASSERT(slot_nr < ARRAY_SIZE(g_si.slot));
44 return g_si.slot[slot_nr].cuart;
45}
46
Harald Welte727d6752019-09-30 21:46:44 +020047static const uint8_t sysmousim_sjs1_atr[] = {
48 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,
49 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,
50 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 };
51
52static const struct ccid_pars_decoded iso_fsm_def_pars = {
53 .fi = 372,
54 .di = 1,
55 .clock_stop = CCID_CLOCK_STOP_NOTALLOWED,
56 .inverse_convention = false,
57 .t0 = {
58 .guard_time_etu = 0,
59 .waiting_integer = 0,
60 },
61 /* FIXME: T=1 */
62};
63
64static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg)
65{
66 /* do nothing; real hardware would update the slot related state here */
67}
68
Eric Wild9e622dc2019-11-27 14:43:16 +010069static void iso_fsm_slot_icc_set_insertion_status(struct ccid_slot *cs, bool present) {
70 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
71
72 if(present == cs->icc_present)
73 return;
74
75 cs->icc_present = present;
76
77 if (!present) {
78 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_CARD_REMOVAL, NULL);
79 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
80 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
81 cs->icc_powered = false;
82 cs->cmd_busy = false;
83 }
84}
85
Harald Welte727d6752019-09-30 21:46:44 +020086static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg,
87 const struct ccid_pc_to_rdr_icc_power_on *ipo)
88{
89 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
90
91 ss->seq = ipo->hdr.bSeq;
92 LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n");
93
94 /* FIXME: do this via a FSM? */
95 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
Harald Weltef54a6b22019-10-10 13:30:24 +020096 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
Harald Welte727d6752019-09-30 21:46:44 +020097 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
98 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL);
99 cs->icc_powered = true;
100 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200101 delay_us(10000);
102
Harald Welte727d6752019-09-30 21:46:44 +0200103 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200104 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
Harald Welte727d6752019-09-30 21:46:44 +0200105
106 msgb_free(msg);
107 /* continues in iso_fsm_clot_user_cb once ATR is received */
108}
109static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data)
110{
111 struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi);
112 struct ccid_slot *cs = ss->cs;
113 struct msgb *tpdu, *resp;
114
Harald Welte727d6752019-09-30 21:46:44 +0200115 switch (event) {
116 case ISO7816_E_ATR_DONE_IND:
117 tpdu = data;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200118 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%s)\n", __func__, event, cause,
119 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200120 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0,
121 msgb_data(tpdu), msgb_length(tpdu));
122 ccid_slot_send_unbusy(cs, resp);
Harald Weltebbb50092019-10-10 14:55:25 +0200123 /* Don't free "TPDU" here, as the ATR should survive */
Harald Welte727d6752019-09-30 21:46:44 +0200124 break;
125 case ISO7816_E_TPDU_DONE_IND:
126 tpdu = data;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200127 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%s)\n", __func__, event, cause,
128 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200129 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l2(tpdu), msgb_l2len(tpdu));
130 ccid_slot_send_unbusy(cs, resp);
131 msgb_free(tpdu);
132 break;
Eric Wild9e622dc2019-11-27 14:43:16 +0100133 case ISO7816_E_TPDU_FAILED_IND:
134 tpdu = data;
135 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, cause=%d, data=%s)\n", __func__, event, cause,
136 msgb_hexdump(tpdu));
137 /* FIXME: other error causes than card removal?*/
138 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, msgb_l2(tpdu), 0);
139 ccid_slot_send_unbusy(cs, resp);
140 msgb_free(tpdu);
141 break;
Eric Wildad1edce2019-11-27 16:51:08 +0100142 case ISO7816_E_PPS_DONE_IND:
143 tpdu = data;
144 /* pps was successful, so we know these values are fine */
145 uint16_t F = iso7816_3_fi_table[cs->proposed_pars.fi];
146 uint8_t D = iso7816_3_di_table[cs->proposed_pars.di];
147 uint32_t fmax = iso7816_3_fmax_table[cs->proposed_pars.fi];
148
149 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK_FREQ, fmax);
150 card_uart_ctrl(ss->cuart, CUART_CTL_FD, F/D);
151 card_uart_ctrl(ss->cuart, CUART_CTL_WTIME, cs->proposed_pars.t0.waiting_integer);
152
153 cs->pars = cs->proposed_pars;
154 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_OK, 0);
155
156 ccid_slot_send_unbusy(cs, resp);
157
158 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
159 msgb_free(tpdu);
160 break;
161 case ISO7816_E_PPS_FAILED_IND:
162 tpdu = data;
163 /* failed fi/di */
164 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_FAILED, 10);
165 ccid_slot_send_unbusy(cs, resp);
166 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
167 msgb_free(tpdu);
168 break;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200169 default:
170 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, cause=%d, data=%p) unhandled\n",
171 __func__, event, cause, data);
172 break;
Harald Welte727d6752019-09-30 21:46:44 +0200173 }
174}
175
Eric Wild9e622dc2019-11-27 14:43:16 +0100176static int iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg,
Harald Welte727d6752019-09-30 21:46:44 +0200177 const struct ccid_pc_to_rdr_xfr_block *xfb)
178{
179 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Harald Welte6def1cf2019-10-10 15:40:02 +0200180 struct msgb *tpdu;
Harald Welte727d6752019-09-30 21:46:44 +0200181
Eric Wild9e622dc2019-11-27 14:43:16 +0100182 if(!cs->icc_present)
183 return -CCID_ERR_ICC_MUTE;
184
Harald Welte727d6752019-09-30 21:46:44 +0200185 ss->seq = xfb->hdr.bSeq;
Harald Welte6def1cf2019-10-10 15:40:02 +0200186
187 /* must be '0' for TPDU level exchanges or for short APDU */
188 OSMO_ASSERT(xfb->wLevelParameter == 0x0000);
189 OSMO_ASSERT(msgb_length(msg) > xfb->hdr.dwLength);
190
191 /* 'msg' contains the raw CCID message as received from USB. We could create
192 * a new message buffer for the ISO7816 side here or we could 'strip the CCID
193 * header off the start of the message. Let's KISS and do a copy here */
194 tpdu = msgb_alloc(512, "TPDU");
195 OSMO_ASSERT(tpdu);
196 memcpy(msgb_data(tpdu), xfb->abData, xfb->hdr.dwLength);
197 msgb_put(tpdu, xfb->hdr.dwLength);
198 msgb_free(msg);
199
200 LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer: %s\n", msgb_hexdump(tpdu));
201 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, tpdu);
Harald Welte727d6752019-09-30 21:46:44 +0200202 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Eric Wild9e622dc2019-11-27 14:43:16 +0100203 return 0;
Harald Welte727d6752019-09-30 21:46:44 +0200204}
205
206
207static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable)
208{
209 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
210
211 if (enable) {
212 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200213 cs->icc_powered = true;
Harald Welte727d6752019-09-30 21:46:44 +0200214 } else {
215 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200216 cs->icc_powered = false;
Harald Welte727d6752019-09-30 21:46:44 +0200217 }
218}
219
220static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd)
221{
222 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
223
224 switch (cmd) {
225 case CCID_CLOCK_CMD_STOP:
226 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false);
227 break;
228 case CCID_CLOCK_CMD_RESTART:
229 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
230 break;
231 default:
232 OSMO_ASSERT(0);
233 }
234}
235
Eric Wildad1edce2019-11-27 16:51:08 +0100236static int iso_fsm_slot_set_params(struct ccid_slot *cs, uint8_t seq, enum ccid_protocol_num proto,
Harald Welte727d6752019-09-30 21:46:44 +0200237 const struct ccid_pars_decoded *pars_dec)
238{
Eric Wildad1edce2019-11-27 16:51:08 +0100239 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
240 struct msgb *tpdu;
241
242 /* see 6.1.7 for error offsets */
243 if(proto != CCID_PROTOCOL_NUM_T0)
244 return -7;
245
246 if(pars_dec->t0.guard_time_etu != 0)
247 return -12;
248
249 if(pars_dec->clock_stop != CCID_CLOCK_STOP_NOTALLOWED)
250 return -14;
251
252 ss->seq = seq;
253
254 /* Hardware does not support SPU, so no PPS2, and PPS3 is reserved anyway */
255 tpdu = msgb_alloc(6, "PPSRQ");
256 OSMO_ASSERT(tpdu);
257 msgb_put_u8(tpdu, 0xff);
258 msgb_put_u8(tpdu, (1 << 4)); /* only PPS1, T=0 */
259 msgb_put_u8(tpdu, (pars_dec->fi << 4 | pars_dec->di));
260 msgb_put_u8(tpdu, 0xff ^ (1 << 4) ^ (pars_dec->fi << 4 | pars_dec->di));
261
262
263 LOGPCS(cs, LOGL_DEBUG, "scheduling PPS transfer: %s\n", msgb_hexdump(tpdu));
264 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_PPS_CMD, tpdu);
265 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Harald Welte727d6752019-09-30 21:46:44 +0200266 return 0;
267}
268
269static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t freq_hz, uint32_t rate_bps)
270{
271 /* we always acknowledge all rates/clocks */
272 return 0;
273}
274
Harald Welte03d6ebb2019-09-28 23:19:31 +0200275extern void *g_tall_ctx;
Harald Welte727d6752019-09-30 21:46:44 +0200276static int iso_fsm_slot_init(struct ccid_slot *cs)
277{
Harald Welte03d6ebb2019-09-28 23:19:31 +0200278 void *ctx = g_tall_ctx; /* FIXME */
Harald Welte727d6752019-09-30 21:46:44 +0200279 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
280 struct card_uart *cuart = talloc_zero(ctx, struct card_uart);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200281 char id_buf[16] = "SIM0";
282 char devname[] = "foobar";
Harald Welte727d6752019-09-30 21:46:44 +0200283 int rc;
284
285 LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__);
286
Harald Welte515d5b22019-10-10 13:46:13 +0200287 /* HACK: make this in some way configurable so it works both in the firmware
288 * and on the host (functionfs) */
Harald Welte03d6ebb2019-09-28 23:19:31 +0200289// if (cs->slot_nr == 0) {
290// cs->icc_present = true;
291// devname = "/dev/ttyUSB5";
292// }
293 devname[0] = cs->slot_nr +0x30;
294 devname[1] = 0;
295 //sprintf(devname, "%d", cs->slot_nr);
Harald Welte727d6752019-09-30 21:46:44 +0200296
297 if (!cuart)
298 return -ENOMEM;
299
Harald Welte03d6ebb2019-09-28 23:19:31 +0200300 //snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr);
301 id_buf[3] = cs->slot_nr +0x30;
Harald Welte515d5b22019-10-10 13:46:13 +0200302 if (devname) {
Harald Welte03d6ebb2019-09-28 23:19:31 +0200303 rc = card_uart_open(cuart, "asf4", devname);
Harald Welte515d5b22019-10-10 13:46:13 +0200304 if (rc < 0) {
305 LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc);
306 talloc_free(cuart);
307 return rc;
308 }
Harald Welte727d6752019-09-30 21:46:44 +0200309 }
310 ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss);
311 if (!ss->fi) {
Harald Welte515d5b22019-10-10 13:46:13 +0200312 LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n");
Harald Welte727d6752019-09-30 21:46:44 +0200313 talloc_free(cuart);
314 return -1;
315 }
316
317 cs->default_pars = &iso_fsm_def_pars;
318 ss->cuart = cuart;
319 ss->cs = cs;
320
321
322 return 0;
323}
324
325const struct ccid_slot_ops iso_fsm_slot_ops = {
326 .init = iso_fsm_slot_init,
327 .pre_proc_cb = iso_fsm_slot_pre_proc_cb,
328 .icc_power_on_async = iso_fsm_slot_icc_power_on_async,
Eric Wild9e622dc2019-11-27 14:43:16 +0100329 .icc_set_insertion_status = iso_fsm_slot_icc_set_insertion_status,
Harald Welte727d6752019-09-30 21:46:44 +0200330 .xfr_block_async = iso_fsm_slot_xfr_block_async,
331 .set_power = iso_fsm_slot_set_power,
332 .set_clock = iso_fsm_slot_set_clock,
333 .set_params = iso_fsm_slot_set_params,
334 .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock,
335};