blob: a00375e9ad0128cfbbe0029aedbee6701ad9e88c [file] [log] [blame]
Harald Welte727d6752019-09-30 21:46:44 +02001/* Code providing a ccid_slot_ops implementation based on iso7716_fsm,
2 * (which in turn sits on top of card_uart) */
3
4#include <unistd.h>
5#include <errno.h>
Harald Welte6def1cf2019-10-10 15:40:02 +02006#include <string.h>
Harald Welte727d6752019-09-30 21:46:44 +02007
8#include <osmocom/core/msgb.h>
9#include <osmocom/core/timer.h>
10#include <osmocom/core/logging.h>
11#include <osmocom/core/fsm.h>
12
13#include "ccid_device.h"
14#include "cuart.h"
15#include "iso7816_fsm.h"
Eric Wildad1edce2019-11-27 16:51:08 +010016#include "iso7816_3.h"
Harald Welte727d6752019-09-30 21:46:44 +020017
18struct iso_fsm_slot {
19 /* CCID slot above us */
20 struct ccid_slot *cs;
21 /* main ISO7816-3 FSM instance beneath us */
22 struct osmo_fsm_inst *fi;
23 /* UART beneath the ISO7816-3 FSM */
24 struct card_uart *cuart;
25 /* bSeq of the operation currently in progress */
26 uint8_t seq;
27};
28
29struct iso_fsm_slot_instance {
30 struct iso_fsm_slot slot[NR_SLOTS];
31};
32
33static struct iso_fsm_slot_instance g_si;
34
Harald Welte03d6ebb2019-09-28 23:19:31 +020035static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
Harald Welte727d6752019-09-30 21:46:44 +020036{
37 OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
38 return &g_si.slot[cs->slot_nr];
39}
40
Harald Welte03d6ebb2019-09-28 23:19:31 +020041struct card_uart *cuart4slot_nr(uint8_t slot_nr)
42{
43 OSMO_ASSERT(slot_nr < ARRAY_SIZE(g_si.slot));
44 return g_si.slot[slot_nr].cuart;
45}
46
Harald Welte727d6752019-09-30 21:46:44 +020047static const uint8_t sysmousim_sjs1_atr[] = {
48 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,
49 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,
50 0x07, 0x18, 0x00, 0x00, 0x01, 0xA5 };
51
52static const struct ccid_pars_decoded iso_fsm_def_pars = {
53 .fi = 372,
54 .di = 1,
55 .clock_stop = CCID_CLOCK_STOP_NOTALLOWED,
56 .inverse_convention = false,
57 .t0 = {
58 .guard_time_etu = 0,
59 .waiting_integer = 0,
60 },
61 /* FIXME: T=1 */
62};
63
64static void iso_fsm_slot_pre_proc_cb(struct ccid_slot *cs, struct msgb *msg)
65{
66 /* do nothing; real hardware would update the slot related state here */
67}
68
Eric Wild9e622dc2019-11-27 14:43:16 +010069static void iso_fsm_slot_icc_set_insertion_status(struct ccid_slot *cs, bool present) {
70 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
71
72 if(present == cs->icc_present)
73 return;
74
75 cs->icc_present = present;
76
77 if (!present) {
78 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_CARD_REMOVAL, NULL);
79 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
80 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
81 cs->icc_powered = false;
82 cs->cmd_busy = false;
83 }
84}
85
Harald Welte727d6752019-09-30 21:46:44 +020086static void iso_fsm_slot_icc_power_on_async(struct ccid_slot *cs, struct msgb *msg,
87 const struct ccid_pc_to_rdr_icc_power_on *ipo)
88{
89 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
90
91 ss->seq = ipo->hdr.bSeq;
92 LOGPCS(cs, LOGL_DEBUG, "scheduling power-up\n");
93
Eric Wildaed26cc2020-03-30 04:22:36 +020094 if (! cs->icc_powered) {
95 /* FIXME: do this via a FSM? */
96 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
97 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
98 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
99 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_POWER_UP_IND, NULL);
100 cs->icc_powered = true;
101 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
102 #ifdef OCTSIMFWBUILD
103 delay_us(10000);
104 #else
105 usleep(10000);
106 #endif
Harald Welte03d6ebb2019-09-28 23:19:31 +0200107
Eric Wildaed26cc2020-03-30 04:22:36 +0200108 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
109 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
110 } else { /* warm reset */
111 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
112 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_ACT_IND, NULL);
113 #ifdef OCTSIMFWBUILD
114 delay_us(10000);
115 #else
116 usleep(10000);
117 #endif
118 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_RESET_REL_IND, NULL);
119 card_uart_ctrl(ss->cuart, CUART_CTL_RST, false);
120 }
Harald Welte727d6752019-09-30 21:46:44 +0200121 msgb_free(msg);
122 /* continues in iso_fsm_clot_user_cb once ATR is received */
123}
124static void iso_fsm_clot_user_cb(struct osmo_fsm_inst *fi, int event, int cause, void *data)
125{
126 struct iso_fsm_slot *ss = iso7816_fsm_get_user_priv(fi);
127 struct ccid_slot *cs = ss->cs;
Eric Wild759a6462019-11-11 14:22:52 +0100128
129 switch (event) {
130 case ISO7816_E_ATR_DONE_IND:
131 case ISO7816_E_ATR_ERR_IND:
132 case ISO7816_E_TPDU_DONE_IND:
133 case ISO7816_E_TPDU_FAILED_IND:
134 case ISO7816_E_PPS_DONE_IND:
135 case ISO7816_E_PPS_FAILED_IND:
Eric Wild91f75ce2020-03-30 04:10:31 +0200136 case ISO7816_E_WTIME_EXP:
Eric Wild759a6462019-11-11 14:22:52 +0100137 cs->event_data = data;
Eric Wilde84a5712019-11-28 17:30:30 +0100138#ifdef OCTSIMFWBUILD
Eric Wild759a6462019-11-11 14:22:52 +0100139 asm volatile("dmb st": : :"memory");
Eric Wilde84a5712019-11-28 17:30:30 +0100140#endif
Eric Wild759a6462019-11-11 14:22:52 +0100141 cs->event = event;
142 break;
143 default:
144 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, cause=%d, data=%p) unhandled\n",
145 __func__, event, cause, data);
146 break;
147 }
148}
149
150static int iso_handle_fsm_events(struct ccid_slot *cs, bool enable){
151 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Harald Welte727d6752019-09-30 21:46:44 +0200152 struct msgb *tpdu, *resp;
Eric Wild759a6462019-11-11 14:22:52 +0100153 volatile uint32_t event = cs->event;
154 volatile void * volatile data = cs->event_data;
155
156 if(!event)
157 return 0;
Eric Wild91f75ce2020-03-30 04:10:31 +0200158// if(event && !data)
159// return 0;
Harald Welte727d6752019-09-30 21:46:44 +0200160
Harald Welte727d6752019-09-30 21:46:44 +0200161 switch (event) {
Eric Wild91f75ce2020-03-30 04:10:31 +0200162 case ISO7816_E_WTIME_EXP:
163 tpdu = data;
164 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=0)\n", __func__, event);
165
166
167 /* perform deactivation */
168 card_uart_ctrl(ss->cuart, CUART_CTL_RST, true);
169 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
170 cs->icc_powered = false;
171
172
173 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, 0, 0);
174 ccid_slot_send_unbusy(cs, resp);
175 cs->event = 0;
176 break;
Harald Welte727d6752019-09-30 21:46:44 +0200177 case ISO7816_E_ATR_DONE_IND:
178 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100179 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Harald Welte22dd1ff2019-10-10 15:40:53 +0200180 msgb_hexdump(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200181 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0,
182 msgb_data(tpdu), msgb_length(tpdu));
183 ccid_slot_send_unbusy(cs, resp);
Harald Weltebbb50092019-10-10 14:55:25 +0200184 /* Don't free "TPDU" here, as the ATR should survive */
Eric Wild759a6462019-11-11 14:22:52 +0100185 cs->event = 0;
186 break;
187 case ISO7816_E_ATR_ERR_IND:
188 tpdu = data;
189 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
190 msgb_hexdump(tpdu));
191 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE,
192 msgb_data(tpdu), msgb_length(tpdu));
193 ccid_slot_send_unbusy(cs, resp);
194 /* Don't free "TPDU" here, as the ATR should survive */
195 cs->event = 0;
196 break;
Harald Welte727d6752019-09-30 21:46:44 +0200197 break;
198 case ISO7816_E_TPDU_DONE_IND:
199 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100200 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Harald Welte22dd1ff2019-10-10 15:40:53 +0200201 msgb_hexdump(tpdu));
Harald Welte43281fe2020-07-30 20:29:02 +0200202 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_OK, 0, msgb_l4(tpdu), msgb_l4len(tpdu));
Harald Welte727d6752019-09-30 21:46:44 +0200203 ccid_slot_send_unbusy(cs, resp);
204 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100205 cs->event = 0;
Harald Welte727d6752019-09-30 21:46:44 +0200206 break;
Eric Wild9e622dc2019-11-27 14:43:16 +0100207 case ISO7816_E_TPDU_FAILED_IND:
208 tpdu = data;
Eric Wild759a6462019-11-11 14:22:52 +0100209 LOGPCS(cs, LOGL_DEBUG, "%s(event=%d, data=%s)\n", __func__, event,
Eric Wild9e622dc2019-11-27 14:43:16 +0100210 msgb_hexdump(tpdu));
211 /* FIXME: other error causes than card removal?*/
212 resp = ccid_gen_data_block(cs, ss->seq, CCID_CMD_STATUS_FAILED, CCID_ERR_ICC_MUTE, msgb_l2(tpdu), 0);
213 ccid_slot_send_unbusy(cs, resp);
214 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100215 cs->event = 0;
Eric Wild9e622dc2019-11-27 14:43:16 +0100216 break;
Eric Wildad1edce2019-11-27 16:51:08 +0100217 case ISO7816_E_PPS_DONE_IND:
218 tpdu = data;
219 /* pps was successful, so we know these values are fine */
220 uint16_t F = iso7816_3_fi_table[cs->proposed_pars.fi];
221 uint8_t D = iso7816_3_di_table[cs->proposed_pars.di];
222 uint32_t fmax = iso7816_3_fmax_table[cs->proposed_pars.fi];
223
Eric Wilda0574572019-11-21 15:28:59 +0100224 /* 7816-3 5.2.3
225 * No information shall be exchanged when switching the
226 * frequency value. Two different times are recommended
227 * for switching the frequency value, either
228 * - after ATR while card is idle
229 * - after PPS while card is idle
230 */
Eric Wild587d4fb2019-11-27 18:59:43 +0100231 card_uart_ctrl(ss->cuart, CUART_CTL_SET_CLOCK_FREQ, fmax);
232 card_uart_ctrl(ss->cuart, CUART_CTL_SET_FD, F/D);
Eric Wildad1edce2019-11-27 16:51:08 +0100233 card_uart_ctrl(ss->cuart, CUART_CTL_WTIME, cs->proposed_pars.t0.waiting_integer);
234
235 cs->pars = cs->proposed_pars;
236 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_OK, 0);
237
238 ccid_slot_send_unbusy(cs, resp);
239
240 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
241 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100242 cs->event = 0;
Eric Wildad1edce2019-11-27 16:51:08 +0100243 break;
244 case ISO7816_E_PPS_FAILED_IND:
245 tpdu = data;
246 /* failed fi/di */
247 resp = ccid_gen_parameters_t0(cs, ss->seq, CCID_CMD_STATUS_FAILED, 10);
248 ccid_slot_send_unbusy(cs, resp);
249 /* this frees the pps req from the host, pps resp buffer stays with the pps fsm */
250 msgb_free(tpdu);
Eric Wild759a6462019-11-11 14:22:52 +0100251 cs->event = 0;
252 break;
253 case 0:
Eric Wildad1edce2019-11-27 16:51:08 +0100254 break;
Harald Welte22dd1ff2019-10-10 15:40:53 +0200255 default:
Eric Wild759a6462019-11-11 14:22:52 +0100256 LOGPCS(cs, LOGL_NOTICE, "%s(event=%d, data=%p) unhandled\n",
257 __func__, event, data);
Harald Welte22dd1ff2019-10-10 15:40:53 +0200258 break;
Harald Welte727d6752019-09-30 21:46:44 +0200259 }
260}
261
Eric Wild9e622dc2019-11-27 14:43:16 +0100262static int iso_fsm_slot_xfr_block_async(struct ccid_slot *cs, struct msgb *msg,
Harald Welte727d6752019-09-30 21:46:44 +0200263 const struct ccid_pc_to_rdr_xfr_block *xfb)
264{
265 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
Eric Wild759a6462019-11-11 14:22:52 +0100266
Harald Welte727d6752019-09-30 21:46:44 +0200267
Harald Welte727d6752019-09-30 21:46:44 +0200268 ss->seq = xfb->hdr.bSeq;
Harald Welte6def1cf2019-10-10 15:40:02 +0200269
270 /* must be '0' for TPDU level exchanges or for short APDU */
271 OSMO_ASSERT(xfb->wLevelParameter == 0x0000);
272 OSMO_ASSERT(msgb_length(msg) > xfb->hdr.dwLength);
273
Eric Wild759a6462019-11-11 14:22:52 +0100274 msgb_pull(msg, 10);
Harald Welte6def1cf2019-10-10 15:40:02 +0200275
Eric Wild759a6462019-11-11 14:22:52 +0100276 LOGPCS(cs, LOGL_DEBUG, "scheduling TPDU transfer: %s\n", msgb_hexdump(msg));
277 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_TPDU_CMD, msg);
Harald Welte727d6752019-09-30 21:46:44 +0200278 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Eric Wild9e622dc2019-11-27 14:43:16 +0100279 return 0;
Harald Welte727d6752019-09-30 21:46:44 +0200280}
281
282
283static void iso_fsm_slot_set_power(struct ccid_slot *cs, bool enable)
284{
285 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
286
287 if (enable) {
288 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, true);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200289 cs->icc_powered = true;
Harald Welte727d6752019-09-30 21:46:44 +0200290 } else {
291 card_uart_ctrl(ss->cuart, CUART_CTL_POWER, false);
Harald Welte03d6ebb2019-09-28 23:19:31 +0200292 cs->icc_powered = false;
Harald Welte727d6752019-09-30 21:46:44 +0200293 }
294}
295
296static void iso_fsm_slot_set_clock(struct ccid_slot *cs, enum ccid_clock_command cmd)
297{
298 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
299
300 switch (cmd) {
301 case CCID_CLOCK_CMD_STOP:
302 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, false);
303 break;
304 case CCID_CLOCK_CMD_RESTART:
305 card_uart_ctrl(ss->cuart, CUART_CTL_CLOCK, true);
306 break;
307 default:
308 OSMO_ASSERT(0);
309 }
310}
311
Eric Wildad1edce2019-11-27 16:51:08 +0100312static int iso_fsm_slot_set_params(struct ccid_slot *cs, uint8_t seq, enum ccid_protocol_num proto,
Harald Welte727d6752019-09-30 21:46:44 +0200313 const struct ccid_pars_decoded *pars_dec)
314{
Eric Wildad1edce2019-11-27 16:51:08 +0100315 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
316 struct msgb *tpdu;
317
318 /* see 6.1.7 for error offsets */
319 if(proto != CCID_PROTOCOL_NUM_T0)
320 return -7;
321
322 if(pars_dec->t0.guard_time_etu != 0)
323 return -12;
324
325 if(pars_dec->clock_stop != CCID_CLOCK_STOP_NOTALLOWED)
326 return -14;
327
328 ss->seq = seq;
329
Eric Wild45e930d2019-11-21 14:38:16 +0100330 /* FIXME:
331 When using D=64, the interface device shall ensure a delay
332 of at least 16 etu between the leading edge of the last
333 received character and the leading edge of the character transmitted
334 for initiating a command.
335 -> we can't really do 4 stop bits?!
336 */
337
Eric Wildad1edce2019-11-27 16:51:08 +0100338 /* Hardware does not support SPU, so no PPS2, and PPS3 is reserved anyway */
339 tpdu = msgb_alloc(6, "PPSRQ");
340 OSMO_ASSERT(tpdu);
341 msgb_put_u8(tpdu, 0xff);
342 msgb_put_u8(tpdu, (1 << 4)); /* only PPS1, T=0 */
343 msgb_put_u8(tpdu, (pars_dec->fi << 4 | pars_dec->di));
344 msgb_put_u8(tpdu, 0xff ^ (1 << 4) ^ (pars_dec->fi << 4 | pars_dec->di));
345
346
347 LOGPCS(cs, LOGL_DEBUG, "scheduling PPS transfer: %s\n", msgb_hexdump(tpdu));
348 osmo_fsm_inst_dispatch(ss->fi, ISO7816_E_XCEIVE_PPS_CMD, tpdu);
349 /* continues in iso_fsm_clot_user_cb once response/error/timeout is received */
Harald Welte727d6752019-09-30 21:46:44 +0200350 return 0;
351}
352
Eric Wild56a50552020-01-28 16:07:23 +0100353static int iso_fsm_slot_set_rate_and_clock(struct ccid_slot *cs, uint32_t* freq_hz, uint32_t* rate_bps)
Harald Welte727d6752019-09-30 21:46:44 +0200354{
Eric Wild56a50552020-01-28 16:07:23 +0100355 /* we return the currently used values, since we support automatic features */
356 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
357
358 *rate_bps = card_uart_ctrl(ss->cuart, CUART_CTL_GET_BAUDRATE, false);
359 *freq_hz = card_uart_ctrl(ss->cuart, CUART_CTL_GET_CLOCK_FREQ, false)/1000;
360
Harald Welte727d6752019-09-30 21:46:44 +0200361 return 0;
362}
363
Harald Welte03d6ebb2019-09-28 23:19:31 +0200364extern void *g_tall_ctx;
Harald Welte727d6752019-09-30 21:46:44 +0200365static int iso_fsm_slot_init(struct ccid_slot *cs)
366{
Harald Welte03d6ebb2019-09-28 23:19:31 +0200367 void *ctx = g_tall_ctx; /* FIXME */
Harald Welte727d6752019-09-30 21:46:44 +0200368 struct iso_fsm_slot *ss = ccid_slot2iso_fsm_slot(cs);
369 struct card_uart *cuart = talloc_zero(ctx, struct card_uart);
Eric Wilde84a5712019-11-28 17:30:30 +0100370 char id_buf[3+3+1];
371 char devname[2+1];
372 char *devnamep = 0;
373 char *drivername = "asf4";
Harald Welte727d6752019-09-30 21:46:44 +0200374 int rc;
375
376 LOGPCS(cs, LOGL_DEBUG, "%s\n", __func__);
377
Eric Wilde84a5712019-11-28 17:30:30 +0100378 snprintf(id_buf, sizeof(id_buf), "SIM%d", cs->slot_nr);
379#ifdef OCTSIMFWBUILD
380 snprintf(devname, sizeof(devname), "%d", cs->slot_nr);
381 devnamep = devname;
382#else
383 if (cs->slot_nr == 0) {
384 cs->icc_present = true;
385 devnamep = "/dev/ttyUSB5";
386 }
387 drivername = "tty";
388#endif
Harald Welte727d6752019-09-30 21:46:44 +0200389
390 if (!cuart)
391 return -ENOMEM;
392
Eric Wilde84a5712019-11-28 17:30:30 +0100393 if (devnamep) {
394 rc = card_uart_open(cuart, drivername, devnamep);
Harald Welte515d5b22019-10-10 13:46:13 +0200395 if (rc < 0) {
396 LOGPCS(cs, LOGL_ERROR, "Cannot open UART %s: %d\n", devname, rc);
397 talloc_free(cuart);
398 return rc;
399 }
Harald Welte727d6752019-09-30 21:46:44 +0200400 }
Eric Wilde84a5712019-11-28 17:30:30 +0100401
Harald Welte727d6752019-09-30 21:46:44 +0200402 ss->fi = iso7816_fsm_alloc(ctx, LOGL_DEBUG, id_buf, cuart, iso_fsm_clot_user_cb, ss);
403 if (!ss->fi) {
Harald Welte515d5b22019-10-10 13:46:13 +0200404 LOGPCS(cs, LOGL_ERROR, "Cannot allocate ISO FSM\n");
Harald Welte727d6752019-09-30 21:46:44 +0200405 talloc_free(cuart);
406 return -1;
407 }
408
409 cs->default_pars = &iso_fsm_def_pars;
410 ss->cuart = cuart;
411 ss->cs = cs;
412
413
414 return 0;
415}
416
417const struct ccid_slot_ops iso_fsm_slot_ops = {
418 .init = iso_fsm_slot_init,
419 .pre_proc_cb = iso_fsm_slot_pre_proc_cb,
420 .icc_power_on_async = iso_fsm_slot_icc_power_on_async,
Eric Wild9e622dc2019-11-27 14:43:16 +0100421 .icc_set_insertion_status = iso_fsm_slot_icc_set_insertion_status,
Harald Welte727d6752019-09-30 21:46:44 +0200422 .xfr_block_async = iso_fsm_slot_xfr_block_async,
423 .set_power = iso_fsm_slot_set_power,
424 .set_clock = iso_fsm_slot_set_clock,
425 .set_params = iso_fsm_slot_set_params,
426 .set_rate_and_clock = iso_fsm_slot_set_rate_and_clock,
Eric Wild759a6462019-11-11 14:22:52 +0100427 .handle_fsm_events = iso_handle_fsm_events,
Harald Welte727d6752019-09-30 21:46:44 +0200428};