blob: 1cfd8cfa47664922c29d4478363ce032e5da198a [file] [log] [blame]
Kévin Redon69b92d92019-01-24 16:39:20 +01001/*
2 * Code generated from Atmel Start.
3 *
4 * This file will be overwritten when reconfiguring your Atmel Start project.
5 * Please copy examples or other code you want to keep to a separate file
6 * to avoid losing it when reconfiguring.
7 */
8
9#include "driver_init.h"
10#include <peripheral_clk_config.h>
11#include <utils.h>
12#include <hal_init.h>
13
Kévin Redonccbed0b2019-01-24 18:30:26 +010014/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010015#define SIM0_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010016
17/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010018#define SIM1_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010019
20/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010021#define SIM2_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010022
23/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010024#define SIM3_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010025
26/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010027#define SIM4_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010028
29/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010030#define SIM5_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010031
32/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010033#define SIM6_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010034
Kévin Redonba3a2fa2019-03-07 15:52:27 +010035/*! The buffer size for USART */
Eric Wild22887032019-11-27 18:10:39 +010036#ifdef ENABLE_DBG_UART7
Eric Wilde8012b62019-11-27 18:25:39 +010037#define UART_DEBUG_BUFFER_SIZE 4096
Eric Wild22887032019-11-27 18:10:39 +010038#else
39#define SIM7_BUFFER_SIZE 512
40#endif
Kévin Redonba3a2fa2019-03-07 15:52:27 +010041
Kévin Redon1f8ecef2019-01-31 13:36:12 +010042struct usart_async_descriptor SIM0;
43struct usart_async_descriptor SIM1;
44struct usart_async_descriptor SIM2;
45struct usart_async_descriptor SIM3;
46struct usart_async_descriptor SIM4;
47struct usart_async_descriptor SIM5;
48struct usart_async_descriptor SIM6;
Eric Wild22887032019-11-27 18:10:39 +010049#ifndef ENABLE_DBG_UART7
50struct usart_async_descriptor SIM7;
51#endif
Kévin Redonccbed0b2019-01-24 18:30:26 +010052
Kévin Redon1f8ecef2019-01-31 13:36:12 +010053static uint8_t SIM0_buffer[SIM0_BUFFER_SIZE];
54static uint8_t SIM1_buffer[SIM1_BUFFER_SIZE];
55static uint8_t SIM2_buffer[SIM2_BUFFER_SIZE];
56static uint8_t SIM3_buffer[SIM3_BUFFER_SIZE];
57static uint8_t SIM4_buffer[SIM4_BUFFER_SIZE];
58static uint8_t SIM5_buffer[SIM5_BUFFER_SIZE];
59static uint8_t SIM6_buffer[SIM6_BUFFER_SIZE];
Eric Wild22887032019-11-27 18:10:39 +010060#ifndef ENABLE_DBG_UART7
61static uint8_t SIM7_buffer[SIM7_BUFFER_SIZE];
62#else
Kévin Redon0c3533f2019-04-03 21:00:09 +020063struct usart_async_rings_descriptor UART_debug;
Kévin Redon0c3533f2019-04-03 21:00:09 +020064static uint8_t UART_DEBUG_buffer_rx[UART_DEBUG_BUFFER_SIZE];
65static uint8_t UART_DEBUG_buffer_tx[UART_DEBUG_BUFFER_SIZE];
Eric Wild22887032019-11-27 18:10:39 +010066#endif
67struct calendar_descriptor CALENDAR_0;
Kévin Redonccbed0b2019-01-24 18:30:26 +010068
Harald Welted1bd5c42019-05-17 16:38:30 +020069void CALENDAR_0_CLOCK_init(void)
70{
71 hri_mclk_set_APBAMASK_RTC_bit(MCLK);
72}
73
74void CALENDAR_0_init(void)
75{
76 CALENDAR_0_CLOCK_init();
77 calendar_init(&CALENDAR_0, RTC);
78}
79
Kévin Redonccbed0b2019-01-24 18:30:26 +010080/**
81 * \brief USART Clock initialization function
82 *
83 * Enables register interface and peripheral clock
84 */
Kévin Redon1f8ecef2019-01-31 13:36:12 +010085void SIM0_CLOCK_init()
86{
87
88 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
89 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
90
91 hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK);
92}
93
94/**
95 * \brief USART pinmux initialization function
96 *
97 * Set each required pin to USART functionality
98 */
99void SIM0_PORT_init()
100{
101
102 gpio_set_pin_function(SIM0_IO, PINMUX_PA04D_SERCOM0_PAD0);
103}
104
105/**
106 * \brief USART initialization function
107 *
108 * Enables USART peripheral, clocks and initializes USART driver
109 */
110void SIM0_init(void)
111{
112 SIM0_CLOCK_init();
113 usart_async_init(&SIM0, SERCOM0, SIM0_buffer, SIM0_BUFFER_SIZE, (void *)NULL);
114 SIM0_PORT_init();
115}
116
117/**
118 * \brief USART Clock initialization function
119 *
120 * Enables register interface and peripheral clock
121 */
122void SIM1_CLOCK_init()
123{
124
125 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
126 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
127
128 hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK);
129}
130
131/**
132 * \brief USART pinmux initialization function
133 *
134 * Set each required pin to USART functionality
135 */
136void SIM1_PORT_init()
137{
138
139 gpio_set_pin_function(SIM1_IO, PINMUX_PA16C_SERCOM1_PAD0);
140}
141
142/**
143 * \brief USART initialization function
144 *
145 * Enables USART peripheral, clocks and initializes USART driver
146 */
147void SIM1_init(void)
148{
149 SIM1_CLOCK_init();
150 usart_async_init(&SIM1, SERCOM1, SIM1_buffer, SIM1_BUFFER_SIZE, (void *)NULL);
151 SIM1_PORT_init();
152}
153
154/**
155 * \brief USART Clock initialization function
156 *
157 * Enables register interface and peripheral clock
158 */
159void SIM2_CLOCK_init()
160{
161
162 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_CORE, CONF_GCLK_SERCOM2_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
163 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_SLOW, CONF_GCLK_SERCOM2_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
164
165 hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK);
166}
167
168/**
169 * \brief USART pinmux initialization function
170 *
171 * Set each required pin to USART functionality
172 */
173void SIM2_PORT_init()
174{
175
176 gpio_set_pin_function(SIM2_IO, PINMUX_PA09D_SERCOM2_PAD0);
177}
178
179/**
180 * \brief USART initialization function
181 *
182 * Enables USART peripheral, clocks and initializes USART driver
183 */
184void SIM2_init(void)
185{
186 SIM2_CLOCK_init();
187 usart_async_init(&SIM2, SERCOM2, SIM2_buffer, SIM2_BUFFER_SIZE, (void *)NULL);
188 SIM2_PORT_init();
189}
190
191/**
192 * \brief USART Clock initialization function
193 *
194 * Enables register interface and peripheral clock
195 */
196void SIM3_CLOCK_init()
197{
198
199 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
200 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
201
202 hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
203}
204
205/**
206 * \brief USART pinmux initialization function
207 *
208 * Set each required pin to USART functionality
209 */
210void SIM3_PORT_init()
211{
212
213 gpio_set_pin_function(SIM3_IO, PINMUX_PB20C_SERCOM3_PAD0);
214}
215
216/**
217 * \brief USART initialization function
218 *
219 * Enables USART peripheral, clocks and initializes USART driver
220 */
221void SIM3_init(void)
222{
223 SIM3_CLOCK_init();
224 usart_async_init(&SIM3, SERCOM3, SIM3_buffer, SIM3_BUFFER_SIZE, (void *)NULL);
225 SIM3_PORT_init();
226}
227
228/**
229 * \brief USART Clock initialization function
230 *
231 * Enables register interface and peripheral clock
232 */
233void SIM4_CLOCK_init()
234{
235
236 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
237 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
238
239 hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK);
240}
241
242/**
243 * \brief USART pinmux initialization function
244 *
245 * Set each required pin to USART functionality
246 */
247void SIM4_PORT_init()
248{
249
250 gpio_set_pin_function(SIM4_IO, PINMUX_PB08D_SERCOM4_PAD0);
251}
252
253/**
254 * \brief USART initialization function
255 *
256 * Enables USART peripheral, clocks and initializes USART driver
257 */
258void SIM4_init(void)
259{
260 SIM4_CLOCK_init();
261 usart_async_init(&SIM4, SERCOM4, SIM4_buffer, SIM4_BUFFER_SIZE, (void *)NULL);
262 SIM4_PORT_init();
263}
264
265/**
266 * \brief USART Clock initialization function
267 *
268 * Enables register interface and peripheral clock
269 */
270void SIM5_CLOCK_init()
271{
272
273 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_CORE, CONF_GCLK_SERCOM5_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
274 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_SLOW, CONF_GCLK_SERCOM5_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
275
276 hri_mclk_set_APBDMASK_SERCOM5_bit(MCLK);
277}
278
279/**
280 * \brief USART pinmux initialization function
281 *
282 * Set each required pin to USART functionality
283 */
284void SIM5_PORT_init()
285{
286
287 gpio_set_pin_function(SIM5_IO, PINMUX_PB16C_SERCOM5_PAD0);
288}
289
290/**
291 * \brief USART initialization function
292 *
293 * Enables USART peripheral, clocks and initializes USART driver
294 */
295void SIM5_init(void)
296{
297 SIM5_CLOCK_init();
298 usart_async_init(&SIM5, SERCOM5, SIM5_buffer, SIM5_BUFFER_SIZE, (void *)NULL);
299 SIM5_PORT_init();
300}
301
302/**
303 * \brief USART Clock initialization function
304 *
305 * Enables register interface and peripheral clock
306 */
307void SIM6_CLOCK_init()
308{
309
310 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_CORE, CONF_GCLK_SERCOM6_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
311 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_SLOW, CONF_GCLK_SERCOM6_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
312
313 hri_mclk_set_APBDMASK_SERCOM6_bit(MCLK);
314}
315
316/**
317 * \brief USART pinmux initialization function
318 *
319 * Set each required pin to USART functionality
320 */
321void SIM6_PORT_init()
322{
323
324 gpio_set_pin_function(SIM6_IO, PINMUX_PC16C_SERCOM6_PAD0);
325}
326
327/**
328 * \brief USART initialization function
329 *
330 * Enables USART peripheral, clocks and initializes USART driver
331 */
332void SIM6_init(void)
333{
334 SIM6_CLOCK_init();
335 usart_async_init(&SIM6, SERCOM6, SIM6_buffer, SIM6_BUFFER_SIZE, (void *)NULL);
336 SIM6_PORT_init();
337}
338
Eric Wild22887032019-11-27 18:10:39 +0100339#ifdef ENABLE_DBG_UART7
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100340/**
341 * \brief USART Clock initialization function
342 *
343 * Enables register interface and peripheral clock
344 */
345void UART_debug_CLOCK_init()
346{
347
348 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
349 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
350
351 hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
352}
353
354/**
355 * \brief USART pinmux initialization function
356 *
357 * Set each required pin to USART functionality
358 */
359void UART_debug_PORT_init()
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100360{
361
Kévin Redon4e39b012019-01-30 15:55:58 +0100362 gpio_set_pin_function(UART_TX, PINMUX_PB30C_SERCOM7_PAD0);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100363
Kévin Redon4e39b012019-01-30 15:55:58 +0100364 gpio_set_pin_function(UART_RX, PINMUX_PB31C_SERCOM7_PAD1);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100365}
366
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100367/**
368 * \brief USART initialization function
369 *
370 * Enables USART peripheral, clocks and initializes USART driver
371 */
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100372void UART_debug_init(void)
373{
374 UART_debug_CLOCK_init();
Kévin Redon0c3533f2019-04-03 21:00:09 +0200375 usart_async_rings_init(&UART_debug, SERCOM7, UART_DEBUG_buffer_rx, UART_DEBUG_BUFFER_SIZE, UART_DEBUG_buffer_tx, UART_DEBUG_BUFFER_SIZE, (void *)NULL);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100376 UART_debug_PORT_init();
377}
Eric Wild22887032019-11-27 18:10:39 +0100378#else
379/**
380 * \brief USART Clock initialization function
381 *
382 * Enables register interface and peripheral clock
383 */
384void SIM7_CLOCK_init()
385{
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100386
Eric Wild22887032019-11-27 18:10:39 +0100387 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
388 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
389
390 hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
391}
392
393/**
394 * \brief USART pinmux initialization function
395 *
396 * Set each required pin to USART functionality
397 */
398void SIM7_PORT_init()
399{
400
401 gpio_set_pin_function(SIM7_IO, PINMUX_PB21D_SERCOM7_PAD0);
402}
403
404/**
405 * \brief USART initialization function
406 *
407 * Enables USART peripheral, clocks and initializes USART driver
408 */
409void SIM7_init(void)
410{
411 SIM7_CLOCK_init();
412 usart_async_init(&SIM7, SERCOM7, SIM7_buffer, SIM7_BUFFER_SIZE, (void *)NULL);
413 SIM7_PORT_init();
414}
415#endif
Kévin Redon69b92d92019-01-24 16:39:20 +0100416void USB_DEVICE_INSTANCE_PORT_init(void)
417{
418
Kévin Redon4e39b012019-01-30 15:55:58 +0100419 gpio_set_pin_direction(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100420 // <y> Pin direction
421 // <id> pad_direction
422 // <GPIO_DIRECTION_OFF"> Off
423 // <GPIO_DIRECTION_IN"> In
424 // <GPIO_DIRECTION_OUT"> Out
425 GPIO_DIRECTION_OUT);
426
Kévin Redon4e39b012019-01-30 15:55:58 +0100427 gpio_set_pin_level(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100428 // <y> Initial level
429 // <id> pad_initial_level
430 // <false"> Low
431 // <true"> High
432 false);
433
Kévin Redon4e39b012019-01-30 15:55:58 +0100434 gpio_set_pin_pull_mode(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100435 // <y> Pull configuration
436 // <id> pad_pull_config
437 // <GPIO_PULL_OFF"> Off
438 // <GPIO_PULL_UP"> Pull-up
439 // <GPIO_PULL_DOWN"> Pull-down
440 GPIO_PULL_OFF);
441
Kévin Redon4e39b012019-01-30 15:55:58 +0100442 gpio_set_pin_function(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100443 // <y> Pin function
444 // <id> pad_function
445 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
446 // <PINMUX_PA24H_USB_DM"> Auto
447 // <GPIO_PIN_FUNCTION_OFF"> Off
448 // <GPIO_PIN_FUNCTION_A"> A
449 // <GPIO_PIN_FUNCTION_B"> B
450 // <GPIO_PIN_FUNCTION_C"> C
451 // <GPIO_PIN_FUNCTION_D"> D
452 // <GPIO_PIN_FUNCTION_E"> E
453 // <GPIO_PIN_FUNCTION_F"> F
454 // <GPIO_PIN_FUNCTION_G"> G
455 // <GPIO_PIN_FUNCTION_H"> H
456 // <GPIO_PIN_FUNCTION_I"> I
457 // <GPIO_PIN_FUNCTION_J"> J
458 // <GPIO_PIN_FUNCTION_K"> K
459 // <GPIO_PIN_FUNCTION_L"> L
460 // <GPIO_PIN_FUNCTION_M"> M
461 // <GPIO_PIN_FUNCTION_N"> N
462 PINMUX_PA24H_USB_DM);
463
Kévin Redon4e39b012019-01-30 15:55:58 +0100464 gpio_set_pin_direction(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100465 // <y> Pin direction
466 // <id> pad_direction
467 // <GPIO_DIRECTION_OFF"> Off
468 // <GPIO_DIRECTION_IN"> In
469 // <GPIO_DIRECTION_OUT"> Out
470 GPIO_DIRECTION_OUT);
471
Kévin Redon4e39b012019-01-30 15:55:58 +0100472 gpio_set_pin_level(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100473 // <y> Initial level
474 // <id> pad_initial_level
475 // <false"> Low
476 // <true"> High
477 false);
478
Kévin Redon4e39b012019-01-30 15:55:58 +0100479 gpio_set_pin_pull_mode(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100480 // <y> Pull configuration
481 // <id> pad_pull_config
482 // <GPIO_PULL_OFF"> Off
483 // <GPIO_PULL_UP"> Pull-up
484 // <GPIO_PULL_DOWN"> Pull-down
485 GPIO_PULL_OFF);
486
Kévin Redon4e39b012019-01-30 15:55:58 +0100487 gpio_set_pin_function(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100488 // <y> Pin function
489 // <id> pad_function
490 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
491 // <PINMUX_PA25H_USB_DP"> Auto
492 // <GPIO_PIN_FUNCTION_OFF"> Off
493 // <GPIO_PIN_FUNCTION_A"> A
494 // <GPIO_PIN_FUNCTION_B"> B
495 // <GPIO_PIN_FUNCTION_C"> C
496 // <GPIO_PIN_FUNCTION_D"> D
497 // <GPIO_PIN_FUNCTION_E"> E
498 // <GPIO_PIN_FUNCTION_F"> F
499 // <GPIO_PIN_FUNCTION_G"> G
500 // <GPIO_PIN_FUNCTION_H"> H
501 // <GPIO_PIN_FUNCTION_I"> I
502 // <GPIO_PIN_FUNCTION_J"> J
503 // <GPIO_PIN_FUNCTION_K"> K
504 // <GPIO_PIN_FUNCTION_L"> L
505 // <GPIO_PIN_FUNCTION_M"> M
506 // <GPIO_PIN_FUNCTION_N"> N
507 PINMUX_PA25H_USB_DP);
508}
509
510/* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
511 * for low speed and full speed operation. */
512#if (CONF_GCLK_USB_FREQUENCY > (48000000 + 48000000 / 400)) || (CONF_GCLK_USB_FREQUENCY < (48000000 - 48000000 / 400))
513#warning USB clock should be 48MHz ~ 0.25% clock, check your configuration!
514#endif
515
516void USB_DEVICE_INSTANCE_CLOCK_init(void)
517{
518
519 hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN);
520 hri_mclk_set_AHBMASK_USB_bit(MCLK);
521 hri_mclk_set_APBBMASK_USB_bit(MCLK);
522}
523
524void USB_DEVICE_INSTANCE_init(void)
525{
526 USB_DEVICE_INSTANCE_CLOCK_init();
527 usb_d_init();
528 USB_DEVICE_INSTANCE_PORT_init();
529}
530
531void system_init(void)
532{
533 init_mcu();
534
Harald Welte092494e2019-02-24 10:33:40 +0100535 // GPIO on PA02
536
537 // Set pin direction to input
538 gpio_set_pin_direction(SIM4_INT, GPIO_DIRECTION_IN);
539
540 gpio_set_pin_pull_mode(SIM4_INT,
541 // <y> Pull configuration
542 // <id> pad_pull_config
543 // <GPIO_PULL_OFF"> Off
544 // <GPIO_PULL_UP"> Pull-up
545 // <GPIO_PULL_DOWN"> Pull-down
546 GPIO_PULL_OFF);
547
548 gpio_set_pin_function(SIM4_INT, GPIO_PIN_FUNCTION_OFF);
549
550 // GPIO on PA03
551
552 // Set pin direction to input
553 gpio_set_pin_direction(SIM5_INT, GPIO_DIRECTION_IN);
554
555 gpio_set_pin_pull_mode(SIM5_INT,
556 // <y> Pull configuration
557 // <id> pad_pull_config
558 // <GPIO_PULL_OFF"> Off
559 // <GPIO_PULL_UP"> Pull-up
560 // <GPIO_PULL_DOWN"> Pull-down
561 GPIO_PULL_OFF);
562
563 gpio_set_pin_function(SIM5_INT, GPIO_PIN_FUNCTION_OFF);
564
Kévin Redonf53d3662019-04-25 13:55:06 +0200565 // GPIO on PA10
566
567 gpio_set_pin_direction(RMII_CLOCK,
568 // <y> Pin direction
569 // <id> pad_direction
570 // <GPIO_DIRECTION_OFF"> Off
571 // <GPIO_DIRECTION_IN"> In
572 // <GPIO_DIRECTION_OUT"> Out
573 GPIO_DIRECTION_OUT);
574
575 gpio_set_pin_level(RMII_CLOCK,
576 // <y> Initial level
577 // <id> pad_initial_level
578 // <false"> Low
579 // <true"> High
580 false);
581
582 gpio_set_pin_pull_mode(RMII_CLOCK,
583 // <y> Pull configuration
584 // <id> pad_pull_config
585 // <GPIO_PULL_OFF"> Off
586 // <GPIO_PULL_UP"> Pull-up
587 // <GPIO_PULL_DOWN"> Pull-down
588 GPIO_PULL_OFF);
589
590 gpio_set_pin_function(RMII_CLOCK,
591 // <y> Pin function
592 // <id> pad_function
593 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
594 // <GPIO_PIN_FUNCTION_OFF"> Auto
595 // <GPIO_PIN_FUNCTION_OFF"> Off
596 // <GPIO_PIN_FUNCTION_A"> A
597 // <GPIO_PIN_FUNCTION_B"> B
598 // <GPIO_PIN_FUNCTION_C"> C
599 // <GPIO_PIN_FUNCTION_D"> D
600 // <GPIO_PIN_FUNCTION_E"> E
601 // <GPIO_PIN_FUNCTION_F"> F
602 // <GPIO_PIN_FUNCTION_G"> G
603 // <GPIO_PIN_FUNCTION_H"> H
604 // <GPIO_PIN_FUNCTION_I"> I
605 // <GPIO_PIN_FUNCTION_J"> J
606 // <GPIO_PIN_FUNCTION_K"> K
607 // <GPIO_PIN_FUNCTION_L"> L
608 // <GPIO_PIN_FUNCTION_M"> M
609 // <GPIO_PIN_FUNCTION_N"> N
610 GPIO_PIN_FUNCTION_M);
611
Kévin Redon6a8295c2019-01-30 18:58:44 +0100612 // GPIO on PA11
613
614 gpio_set_pin_direction(SIMCLK_20MHZ,
615 // <y> Pin direction
616 // <id> pad_direction
617 // <GPIO_DIRECTION_OFF"> Off
618 // <GPIO_DIRECTION_IN"> In
619 // <GPIO_DIRECTION_OUT"> Out
620 GPIO_DIRECTION_OUT);
621
622 gpio_set_pin_level(SIMCLK_20MHZ,
623 // <y> Initial level
624 // <id> pad_initial_level
625 // <false"> Low
626 // <true"> High
627 false);
628
629 gpio_set_pin_pull_mode(SIMCLK_20MHZ,
630 // <y> Pull configuration
631 // <id> pad_pull_config
632 // <GPIO_PULL_OFF"> Off
633 // <GPIO_PULL_UP"> Pull-up
634 // <GPIO_PULL_DOWN"> Pull-down
635 GPIO_PULL_OFF);
636
637 gpio_set_pin_function(SIMCLK_20MHZ,
638 // <y> Pin function
639 // <id> pad_function
640 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
641 // <GPIO_PIN_FUNCTION_OFF"> Auto
642 // <GPIO_PIN_FUNCTION_OFF"> Off
643 // <GPIO_PIN_FUNCTION_A"> A
644 // <GPIO_PIN_FUNCTION_B"> B
645 // <GPIO_PIN_FUNCTION_C"> C
646 // <GPIO_PIN_FUNCTION_D"> D
647 // <GPIO_PIN_FUNCTION_E"> E
648 // <GPIO_PIN_FUNCTION_F"> F
649 // <GPIO_PIN_FUNCTION_G"> G
650 // <GPIO_PIN_FUNCTION_H"> H
651 // <GPIO_PIN_FUNCTION_I"> I
652 // <GPIO_PIN_FUNCTION_J"> J
653 // <GPIO_PIN_FUNCTION_K"> K
654 // <GPIO_PIN_FUNCTION_L"> L
655 // <GPIO_PIN_FUNCTION_M"> M
656 // <GPIO_PIN_FUNCTION_N"> N
657 GPIO_PIN_FUNCTION_M);
658
659 // GPIO on PA20
660
661 // Set pin direction to input
662 gpio_set_pin_direction(VB0, GPIO_DIRECTION_IN);
663
664 gpio_set_pin_pull_mode(VB0,
665 // <y> Pull configuration
666 // <id> pad_pull_config
667 // <GPIO_PULL_OFF"> Off
668 // <GPIO_PULL_UP"> Pull-up
669 // <GPIO_PULL_DOWN"> Pull-down
670 GPIO_PULL_OFF);
671
672 gpio_set_pin_function(VB0, GPIO_PIN_FUNCTION_OFF);
673
674 // GPIO on PA21
675
676 // Set pin direction to input
677 gpio_set_pin_direction(VB1, GPIO_DIRECTION_IN);
678
679 gpio_set_pin_pull_mode(VB1,
680 // <y> Pull configuration
681 // <id> pad_pull_config
682 // <GPIO_PULL_OFF"> Off
683 // <GPIO_PULL_UP"> Pull-up
684 // <GPIO_PULL_DOWN"> Pull-down
685 GPIO_PULL_OFF);
686
687 gpio_set_pin_function(VB1, GPIO_PIN_FUNCTION_OFF);
688
689 // GPIO on PA22
690
691 // Set pin direction to input
692 gpio_set_pin_direction(VB2, GPIO_DIRECTION_IN);
693
694 gpio_set_pin_pull_mode(VB2,
695 // <y> Pull configuration
696 // <id> pad_pull_config
697 // <GPIO_PULL_OFF"> Off
698 // <GPIO_PULL_UP"> Pull-up
699 // <GPIO_PULL_DOWN"> Pull-down
700 GPIO_PULL_OFF);
701
702 gpio_set_pin_function(VB2, GPIO_PIN_FUNCTION_OFF);
703
704 // GPIO on PA23
705
706 // Set pin direction to input
707 gpio_set_pin_direction(VB3, GPIO_DIRECTION_IN);
708
709 gpio_set_pin_pull_mode(VB3,
710 // <y> Pull configuration
711 // <id> pad_pull_config
712 // <GPIO_PULL_OFF"> Off
713 // <GPIO_PULL_UP"> Pull-up
714 // <GPIO_PULL_DOWN"> Pull-down
715 GPIO_PULL_OFF);
716
717 gpio_set_pin_function(VB3, GPIO_PIN_FUNCTION_OFF);
718
Harald Welte092494e2019-02-24 10:33:40 +0100719 // GPIO on PB02
720
721 gpio_set_pin_level(SCL2,
722 // <y> Initial level
723 // <id> pad_initial_level
724 // <false"> Low
725 // <true"> High
726 false);
727
728 // Set pin direction to output
729 gpio_set_pin_direction(SCL2, GPIO_DIRECTION_OUT);
730
731 gpio_set_pin_function(SCL2, GPIO_PIN_FUNCTION_OFF);
732
733 // GPIO on PB03
734
735 gpio_set_pin_level(SDA2,
736 // <y> Initial level
737 // <id> pad_initial_level
738 // <false"> Low
739 // <true"> High
740 false);
741
742 // Set pin direction to output
743 gpio_set_pin_direction(SDA2, GPIO_DIRECTION_OUT);
744
745 gpio_set_pin_function(SDA2, GPIO_PIN_FUNCTION_OFF);
746
747 // GPIO on PB04
748
749 // Set pin direction to input
750 gpio_set_pin_direction(SIM6_INT, GPIO_DIRECTION_IN);
751
752 gpio_set_pin_pull_mode(SIM6_INT,
753 // <y> Pull configuration
754 // <id> pad_pull_config
755 // <GPIO_PULL_OFF"> Off
756 // <GPIO_PULL_UP"> Pull-up
757 // <GPIO_PULL_DOWN"> Pull-down
758 GPIO_PULL_OFF);
759
760 gpio_set_pin_function(SIM6_INT, GPIO_PIN_FUNCTION_OFF);
761
762 // GPIO on PB05
763
764 // Set pin direction to input
765 gpio_set_pin_direction(SIM7_INT, GPIO_DIRECTION_IN);
766
767 gpio_set_pin_pull_mode(SIM7_INT,
768 // <y> Pull configuration
769 // <id> pad_pull_config
770 // <GPIO_PULL_OFF"> Off
771 // <GPIO_PULL_UP"> Pull-up
772 // <GPIO_PULL_DOWN"> Pull-down
773 GPIO_PULL_OFF);
774
775 gpio_set_pin_function(SIM7_INT, GPIO_PIN_FUNCTION_OFF);
776
777 // GPIO on PB06
778
779 gpio_set_pin_level(SCL3,
780 // <y> Initial level
781 // <id> pad_initial_level
782 // <false"> Low
783 // <true"> High
784 false);
785
786 // Set pin direction to output
787 gpio_set_pin_direction(SCL3, GPIO_DIRECTION_OUT);
788
789 gpio_set_pin_function(SCL3, GPIO_PIN_FUNCTION_OFF);
790
791 // GPIO on PB07
792
793 gpio_set_pin_level(SDA3,
794 // <y> Initial level
795 // <id> pad_initial_level
796 // <false"> Low
797 // <true"> High
798 false);
799
800 // Set pin direction to output
801 gpio_set_pin_direction(SDA3, GPIO_DIRECTION_OUT);
802
803 gpio_set_pin_function(SDA3, GPIO_PIN_FUNCTION_OFF);
804
805 // GPIO on PB14
806
807 gpio_set_pin_level(SCL1,
808 // <y> Initial level
809 // <id> pad_initial_level
810 // <false"> Low
811 // <true"> High
812 false);
813
814 // Set pin direction to output
815 gpio_set_pin_direction(SCL1, GPIO_DIRECTION_OUT);
816
817 gpio_set_pin_function(SCL1, GPIO_PIN_FUNCTION_OFF);
818
819 // GPIO on PB15
820
821 gpio_set_pin_level(SDA1,
822 // <y> Initial level
823 // <id> pad_initial_level
824 // <false"> Low
825 // <true"> High
826 false);
827
828 // Set pin direction to output
829 gpio_set_pin_direction(SDA1, GPIO_DIRECTION_OUT);
830
831 gpio_set_pin_function(SDA1, GPIO_PIN_FUNCTION_OFF);
832
833 // GPIO on PC00
834
835 // Set pin direction to input
836 gpio_set_pin_direction(SIM0_INT, GPIO_DIRECTION_IN);
837
838 gpio_set_pin_pull_mode(SIM0_INT,
839 // <y> Pull configuration
840 // <id> pad_pull_config
841 // <GPIO_PULL_OFF"> Off
842 // <GPIO_PULL_UP"> Pull-up
843 // <GPIO_PULL_DOWN"> Pull-down
844 GPIO_PULL_OFF);
845
846 gpio_set_pin_function(SIM0_INT, GPIO_PIN_FUNCTION_OFF);
847
848 // GPIO on PC01
849
850 // Set pin direction to input
851 gpio_set_pin_direction(SIM1_INT, GPIO_DIRECTION_IN);
852
853 gpio_set_pin_pull_mode(SIM1_INT,
854 // <y> Pull configuration
855 // <id> pad_pull_config
856 // <GPIO_PULL_OFF"> Off
857 // <GPIO_PULL_UP"> Pull-up
858 // <GPIO_PULL_DOWN"> Pull-down
859 GPIO_PULL_OFF);
860
861 gpio_set_pin_function(SIM1_INT, GPIO_PIN_FUNCTION_OFF);
862
863 // GPIO on PC02
864
865 // Set pin direction to input
866 gpio_set_pin_direction(SIM2_INT, GPIO_DIRECTION_IN);
867
868 gpio_set_pin_pull_mode(SIM2_INT,
869 // <y> Pull configuration
870 // <id> pad_pull_config
871 // <GPIO_PULL_OFF"> Off
872 // <GPIO_PULL_UP"> Pull-up
873 // <GPIO_PULL_DOWN"> Pull-down
874 GPIO_PULL_OFF);
875
876 gpio_set_pin_function(SIM2_INT, GPIO_PIN_FUNCTION_OFF);
877
878 // GPIO on PC03
879
880 // Set pin direction to input
881 gpio_set_pin_direction(SIM3_INT, GPIO_DIRECTION_IN);
882
883 gpio_set_pin_pull_mode(SIM3_INT,
884 // <y> Pull configuration
885 // <id> pad_pull_config
886 // <GPIO_PULL_OFF"> Off
887 // <GPIO_PULL_UP"> Pull-up
888 // <GPIO_PULL_DOWN"> Pull-down
889 GPIO_PULL_OFF);
890
891 gpio_set_pin_function(SIM3_INT, GPIO_PIN_FUNCTION_OFF);
892
Kévin Redon6a8295c2019-01-30 18:58:44 +0100893 // GPIO on PC14
894
895 // Set pin direction to input
896 gpio_set_pin_direction(SWITCH, GPIO_DIRECTION_IN);
897
898 gpio_set_pin_pull_mode(SWITCH,
899 // <y> Pull configuration
900 // <id> pad_pull_config
901 // <GPIO_PULL_OFF"> Off
902 // <GPIO_PULL_UP"> Pull-up
903 // <GPIO_PULL_DOWN"> Pull-down
904 GPIO_PULL_OFF);
905
906 gpio_set_pin_function(SWITCH, GPIO_PIN_FUNCTION_OFF);
907
Harald Welte092494e2019-02-24 10:33:40 +0100908 // GPIO on PC15
909
910 // Set pin direction to input
Kévin Redon3c045b22019-02-26 19:52:02 +0100911 gpio_set_pin_direction(MUX_STAT, GPIO_DIRECTION_IN);
Harald Welte092494e2019-02-24 10:33:40 +0100912
Kévin Redon3c045b22019-02-26 19:52:02 +0100913 gpio_set_pin_pull_mode(MUX_STAT,
Harald Welte092494e2019-02-24 10:33:40 +0100914 // <y> Pull configuration
915 // <id> pad_pull_config
916 // <GPIO_PULL_OFF"> Off
917 // <GPIO_PULL_UP"> Pull-up
918 // <GPIO_PULL_DOWN"> Pull-down
919 GPIO_PULL_OFF);
920
Kévin Redon3c045b22019-02-26 19:52:02 +0100921 gpio_set_pin_function(MUX_STAT, GPIO_PIN_FUNCTION_OFF);
Harald Welte092494e2019-02-24 10:33:40 +0100922
Kévin Redon4e39b012019-01-30 15:55:58 +0100923 // GPIO on PC26
Kévin Redon5908a5c2019-01-24 18:45:23 +0100924
Kévin Redon6a8295c2019-01-30 18:58:44 +0100925 gpio_set_pin_level(USER_LED,
Kévin Redon5908a5c2019-01-24 18:45:23 +0100926 // <y> Initial level
927 // <id> pad_initial_level
928 // <false"> Low
929 // <true"> High
Kévin Redon4e39b012019-01-30 15:55:58 +0100930 false);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100931
932 // Set pin direction to output
Kévin Redon6a8295c2019-01-30 18:58:44 +0100933 gpio_set_pin_direction(USER_LED, GPIO_DIRECTION_OUT);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100934
Kévin Redon6a8295c2019-01-30 18:58:44 +0100935 gpio_set_pin_function(USER_LED, GPIO_PIN_FUNCTION_OFF);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100936
Harald Welte092494e2019-02-24 10:33:40 +0100937 // GPIO on PC27
938
939 gpio_set_pin_level(SCL4,
940 // <y> Initial level
941 // <id> pad_initial_level
942 // <false"> Low
943 // <true"> High
944 false);
945
946 // Set pin direction to output
947 gpio_set_pin_direction(SCL4, GPIO_DIRECTION_OUT);
948
949 gpio_set_pin_function(SCL4, GPIO_PIN_FUNCTION_OFF);
950
951 // GPIO on PC28
952
953 gpio_set_pin_level(SDA4,
954 // <y> Initial level
955 // <id> pad_initial_level
956 // <false"> Low
957 // <true"> High
958 false);
959
960 // Set pin direction to output
961 gpio_set_pin_direction(SDA4, GPIO_DIRECTION_OUT);
962
963 gpio_set_pin_function(SDA4, GPIO_PIN_FUNCTION_OFF);
964
Harald Welted1bd5c42019-05-17 16:38:30 +0200965 CALENDAR_0_init();
Kévin Redon1f8ecef2019-01-31 13:36:12 +0100966 SIM0_init();
967 SIM1_init();
968 SIM2_init();
969 SIM3_init();
970 SIM4_init();
971 SIM5_init();
972 SIM6_init();
Eric Wild22887032019-11-27 18:10:39 +0100973#ifndef ENABLE_DBG_UART7
974 SIM7_init();
975#else
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100976 UART_debug_init();
Eric Wild22887032019-11-27 18:10:39 +0100977#endif
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100978
Kévin Redon69b92d92019-01-24 16:39:20 +0100979 USB_DEVICE_INSTANCE_init();
980}