blob: c373dc29b06214e48f29ef39be6f30d0fffcde19 [file] [log] [blame]
Kévin Redon69b92d92019-01-24 16:39:20 +01001/*
2 * Code generated from Atmel Start.
3 *
4 * This file will be overwritten when reconfiguring your Atmel Start project.
5 * Please copy examples or other code you want to keep to a separate file
6 * to avoid losing it when reconfiguring.
7 */
8
9#include "driver_init.h"
10#include <peripheral_clk_config.h>
11#include <utils.h>
12#include <hal_init.h>
13
Kévin Redonccbed0b2019-01-24 18:30:26 +010014/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010015#define SIM0_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010016
17/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010018#define SIM1_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010019
20/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010021#define SIM2_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010022
23/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010024#define SIM3_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010025
26/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010027#define SIM4_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010028
29/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010030#define SIM5_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010031
32/*! The buffer size for USART */
Eric Wilde4f90fe2019-11-27 15:01:51 +010033#define SIM6_BUFFER_SIZE 512
Kévin Redon1f8ecef2019-01-31 13:36:12 +010034
Kévin Redonba3a2fa2019-03-07 15:52:27 +010035/*! The buffer size for USART */
Kévin Redon0c3533f2019-04-03 21:00:09 +020036#define UART_DEBUG_BUFFER_SIZE 256
Kévin Redonba3a2fa2019-03-07 15:52:27 +010037
Kévin Redon1f8ecef2019-01-31 13:36:12 +010038struct usart_async_descriptor SIM0;
39struct usart_async_descriptor SIM1;
40struct usart_async_descriptor SIM2;
41struct usart_async_descriptor SIM3;
42struct usart_async_descriptor SIM4;
43struct usart_async_descriptor SIM5;
44struct usart_async_descriptor SIM6;
Kévin Redonccbed0b2019-01-24 18:30:26 +010045
Kévin Redon1f8ecef2019-01-31 13:36:12 +010046static uint8_t SIM0_buffer[SIM0_BUFFER_SIZE];
47static uint8_t SIM1_buffer[SIM1_BUFFER_SIZE];
48static uint8_t SIM2_buffer[SIM2_BUFFER_SIZE];
49static uint8_t SIM3_buffer[SIM3_BUFFER_SIZE];
50static uint8_t SIM4_buffer[SIM4_BUFFER_SIZE];
51static uint8_t SIM5_buffer[SIM5_BUFFER_SIZE];
52static uint8_t SIM6_buffer[SIM6_BUFFER_SIZE];
Harald Welte361ed202019-02-24 21:15:39 +010053
Kévin Redon0c3533f2019-04-03 21:00:09 +020054struct usart_async_rings_descriptor UART_debug;
Harald Welted1bd5c42019-05-17 16:38:30 +020055struct calendar_descriptor CALENDAR_0;
Kévin Redonba3a2fa2019-03-07 15:52:27 +010056
Kévin Redon0c3533f2019-04-03 21:00:09 +020057static uint8_t UART_DEBUG_buffer_rx[UART_DEBUG_BUFFER_SIZE];
58static uint8_t UART_DEBUG_buffer_tx[UART_DEBUG_BUFFER_SIZE];
Kévin Redonccbed0b2019-01-24 18:30:26 +010059
Harald Welted1bd5c42019-05-17 16:38:30 +020060void CALENDAR_0_CLOCK_init(void)
61{
62 hri_mclk_set_APBAMASK_RTC_bit(MCLK);
63}
64
65void CALENDAR_0_init(void)
66{
67 CALENDAR_0_CLOCK_init();
68 calendar_init(&CALENDAR_0, RTC);
69}
70
Kévin Redonccbed0b2019-01-24 18:30:26 +010071/**
72 * \brief USART Clock initialization function
73 *
74 * Enables register interface and peripheral clock
75 */
Kévin Redon1f8ecef2019-01-31 13:36:12 +010076void SIM0_CLOCK_init()
77{
78
79 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
80 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
81
82 hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK);
83}
84
85/**
86 * \brief USART pinmux initialization function
87 *
88 * Set each required pin to USART functionality
89 */
90void SIM0_PORT_init()
91{
92
93 gpio_set_pin_function(SIM0_IO, PINMUX_PA04D_SERCOM0_PAD0);
94}
95
96/**
97 * \brief USART initialization function
98 *
99 * Enables USART peripheral, clocks and initializes USART driver
100 */
101void SIM0_init(void)
102{
103 SIM0_CLOCK_init();
104 usart_async_init(&SIM0, SERCOM0, SIM0_buffer, SIM0_BUFFER_SIZE, (void *)NULL);
105 SIM0_PORT_init();
106}
107
108/**
109 * \brief USART Clock initialization function
110 *
111 * Enables register interface and peripheral clock
112 */
113void SIM1_CLOCK_init()
114{
115
116 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
117 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
118
119 hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK);
120}
121
122/**
123 * \brief USART pinmux initialization function
124 *
125 * Set each required pin to USART functionality
126 */
127void SIM1_PORT_init()
128{
129
130 gpio_set_pin_function(SIM1_IO, PINMUX_PA16C_SERCOM1_PAD0);
131}
132
133/**
134 * \brief USART initialization function
135 *
136 * Enables USART peripheral, clocks and initializes USART driver
137 */
138void SIM1_init(void)
139{
140 SIM1_CLOCK_init();
141 usart_async_init(&SIM1, SERCOM1, SIM1_buffer, SIM1_BUFFER_SIZE, (void *)NULL);
142 SIM1_PORT_init();
143}
144
145/**
146 * \brief USART Clock initialization function
147 *
148 * Enables register interface and peripheral clock
149 */
150void SIM2_CLOCK_init()
151{
152
153 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_CORE, CONF_GCLK_SERCOM2_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
154 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_SLOW, CONF_GCLK_SERCOM2_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
155
156 hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK);
157}
158
159/**
160 * \brief USART pinmux initialization function
161 *
162 * Set each required pin to USART functionality
163 */
164void SIM2_PORT_init()
165{
166
167 gpio_set_pin_function(SIM2_IO, PINMUX_PA09D_SERCOM2_PAD0);
168}
169
170/**
171 * \brief USART initialization function
172 *
173 * Enables USART peripheral, clocks and initializes USART driver
174 */
175void SIM2_init(void)
176{
177 SIM2_CLOCK_init();
178 usart_async_init(&SIM2, SERCOM2, SIM2_buffer, SIM2_BUFFER_SIZE, (void *)NULL);
179 SIM2_PORT_init();
180}
181
182/**
183 * \brief USART Clock initialization function
184 *
185 * Enables register interface and peripheral clock
186 */
187void SIM3_CLOCK_init()
188{
189
190 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
191 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
192
193 hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
194}
195
196/**
197 * \brief USART pinmux initialization function
198 *
199 * Set each required pin to USART functionality
200 */
201void SIM3_PORT_init()
202{
203
204 gpio_set_pin_function(SIM3_IO, PINMUX_PB20C_SERCOM3_PAD0);
205}
206
207/**
208 * \brief USART initialization function
209 *
210 * Enables USART peripheral, clocks and initializes USART driver
211 */
212void SIM3_init(void)
213{
214 SIM3_CLOCK_init();
215 usart_async_init(&SIM3, SERCOM3, SIM3_buffer, SIM3_BUFFER_SIZE, (void *)NULL);
216 SIM3_PORT_init();
217}
218
219/**
220 * \brief USART Clock initialization function
221 *
222 * Enables register interface and peripheral clock
223 */
224void SIM4_CLOCK_init()
225{
226
227 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
228 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
229
230 hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK);
231}
232
233/**
234 * \brief USART pinmux initialization function
235 *
236 * Set each required pin to USART functionality
237 */
238void SIM4_PORT_init()
239{
240
241 gpio_set_pin_function(SIM4_IO, PINMUX_PB08D_SERCOM4_PAD0);
242}
243
244/**
245 * \brief USART initialization function
246 *
247 * Enables USART peripheral, clocks and initializes USART driver
248 */
249void SIM4_init(void)
250{
251 SIM4_CLOCK_init();
252 usart_async_init(&SIM4, SERCOM4, SIM4_buffer, SIM4_BUFFER_SIZE, (void *)NULL);
253 SIM4_PORT_init();
254}
255
256/**
257 * \brief USART Clock initialization function
258 *
259 * Enables register interface and peripheral clock
260 */
261void SIM5_CLOCK_init()
262{
263
264 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_CORE, CONF_GCLK_SERCOM5_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
265 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_SLOW, CONF_GCLK_SERCOM5_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
266
267 hri_mclk_set_APBDMASK_SERCOM5_bit(MCLK);
268}
269
270/**
271 * \brief USART pinmux initialization function
272 *
273 * Set each required pin to USART functionality
274 */
275void SIM5_PORT_init()
276{
277
278 gpio_set_pin_function(SIM5_IO, PINMUX_PB16C_SERCOM5_PAD0);
279}
280
281/**
282 * \brief USART initialization function
283 *
284 * Enables USART peripheral, clocks and initializes USART driver
285 */
286void SIM5_init(void)
287{
288 SIM5_CLOCK_init();
289 usart_async_init(&SIM5, SERCOM5, SIM5_buffer, SIM5_BUFFER_SIZE, (void *)NULL);
290 SIM5_PORT_init();
291}
292
293/**
294 * \brief USART Clock initialization function
295 *
296 * Enables register interface and peripheral clock
297 */
298void SIM6_CLOCK_init()
299{
300
301 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_CORE, CONF_GCLK_SERCOM6_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
302 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_SLOW, CONF_GCLK_SERCOM6_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
303
304 hri_mclk_set_APBDMASK_SERCOM6_bit(MCLK);
305}
306
307/**
308 * \brief USART pinmux initialization function
309 *
310 * Set each required pin to USART functionality
311 */
312void SIM6_PORT_init()
313{
314
315 gpio_set_pin_function(SIM6_IO, PINMUX_PC16C_SERCOM6_PAD0);
316}
317
318/**
319 * \brief USART initialization function
320 *
321 * Enables USART peripheral, clocks and initializes USART driver
322 */
323void SIM6_init(void)
324{
325 SIM6_CLOCK_init();
326 usart_async_init(&SIM6, SERCOM6, SIM6_buffer, SIM6_BUFFER_SIZE, (void *)NULL);
327 SIM6_PORT_init();
328}
329
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100330/**
331 * \brief USART Clock initialization function
332 *
333 * Enables register interface and peripheral clock
334 */
335void UART_debug_CLOCK_init()
336{
337
338 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
339 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
340
341 hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
342}
343
344/**
345 * \brief USART pinmux initialization function
346 *
347 * Set each required pin to USART functionality
348 */
349void UART_debug_PORT_init()
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100350{
351
Kévin Redon4e39b012019-01-30 15:55:58 +0100352 gpio_set_pin_function(UART_TX, PINMUX_PB30C_SERCOM7_PAD0);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100353
Kévin Redon4e39b012019-01-30 15:55:58 +0100354 gpio_set_pin_function(UART_RX, PINMUX_PB31C_SERCOM7_PAD1);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100355}
356
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100357/**
358 * \brief USART initialization function
359 *
360 * Enables USART peripheral, clocks and initializes USART driver
361 */
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100362void UART_debug_init(void)
363{
364 UART_debug_CLOCK_init();
Kévin Redon0c3533f2019-04-03 21:00:09 +0200365 usart_async_rings_init(&UART_debug, SERCOM7, UART_DEBUG_buffer_rx, UART_DEBUG_BUFFER_SIZE, UART_DEBUG_buffer_tx, UART_DEBUG_BUFFER_SIZE, (void *)NULL);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100366 UART_debug_PORT_init();
367}
368
Kévin Redon69b92d92019-01-24 16:39:20 +0100369void USB_DEVICE_INSTANCE_PORT_init(void)
370{
371
Kévin Redon4e39b012019-01-30 15:55:58 +0100372 gpio_set_pin_direction(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100373 // <y> Pin direction
374 // <id> pad_direction
375 // <GPIO_DIRECTION_OFF"> Off
376 // <GPIO_DIRECTION_IN"> In
377 // <GPIO_DIRECTION_OUT"> Out
378 GPIO_DIRECTION_OUT);
379
Kévin Redon4e39b012019-01-30 15:55:58 +0100380 gpio_set_pin_level(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100381 // <y> Initial level
382 // <id> pad_initial_level
383 // <false"> Low
384 // <true"> High
385 false);
386
Kévin Redon4e39b012019-01-30 15:55:58 +0100387 gpio_set_pin_pull_mode(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100388 // <y> Pull configuration
389 // <id> pad_pull_config
390 // <GPIO_PULL_OFF"> Off
391 // <GPIO_PULL_UP"> Pull-up
392 // <GPIO_PULL_DOWN"> Pull-down
393 GPIO_PULL_OFF);
394
Kévin Redon4e39b012019-01-30 15:55:58 +0100395 gpio_set_pin_function(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100396 // <y> Pin function
397 // <id> pad_function
398 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
399 // <PINMUX_PA24H_USB_DM"> Auto
400 // <GPIO_PIN_FUNCTION_OFF"> Off
401 // <GPIO_PIN_FUNCTION_A"> A
402 // <GPIO_PIN_FUNCTION_B"> B
403 // <GPIO_PIN_FUNCTION_C"> C
404 // <GPIO_PIN_FUNCTION_D"> D
405 // <GPIO_PIN_FUNCTION_E"> E
406 // <GPIO_PIN_FUNCTION_F"> F
407 // <GPIO_PIN_FUNCTION_G"> G
408 // <GPIO_PIN_FUNCTION_H"> H
409 // <GPIO_PIN_FUNCTION_I"> I
410 // <GPIO_PIN_FUNCTION_J"> J
411 // <GPIO_PIN_FUNCTION_K"> K
412 // <GPIO_PIN_FUNCTION_L"> L
413 // <GPIO_PIN_FUNCTION_M"> M
414 // <GPIO_PIN_FUNCTION_N"> N
415 PINMUX_PA24H_USB_DM);
416
Kévin Redon4e39b012019-01-30 15:55:58 +0100417 gpio_set_pin_direction(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100418 // <y> Pin direction
419 // <id> pad_direction
420 // <GPIO_DIRECTION_OFF"> Off
421 // <GPIO_DIRECTION_IN"> In
422 // <GPIO_DIRECTION_OUT"> Out
423 GPIO_DIRECTION_OUT);
424
Kévin Redon4e39b012019-01-30 15:55:58 +0100425 gpio_set_pin_level(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100426 // <y> Initial level
427 // <id> pad_initial_level
428 // <false"> Low
429 // <true"> High
430 false);
431
Kévin Redon4e39b012019-01-30 15:55:58 +0100432 gpio_set_pin_pull_mode(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100433 // <y> Pull configuration
434 // <id> pad_pull_config
435 // <GPIO_PULL_OFF"> Off
436 // <GPIO_PULL_UP"> Pull-up
437 // <GPIO_PULL_DOWN"> Pull-down
438 GPIO_PULL_OFF);
439
Kévin Redon4e39b012019-01-30 15:55:58 +0100440 gpio_set_pin_function(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100441 // <y> Pin function
442 // <id> pad_function
443 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
444 // <PINMUX_PA25H_USB_DP"> Auto
445 // <GPIO_PIN_FUNCTION_OFF"> Off
446 // <GPIO_PIN_FUNCTION_A"> A
447 // <GPIO_PIN_FUNCTION_B"> B
448 // <GPIO_PIN_FUNCTION_C"> C
449 // <GPIO_PIN_FUNCTION_D"> D
450 // <GPIO_PIN_FUNCTION_E"> E
451 // <GPIO_PIN_FUNCTION_F"> F
452 // <GPIO_PIN_FUNCTION_G"> G
453 // <GPIO_PIN_FUNCTION_H"> H
454 // <GPIO_PIN_FUNCTION_I"> I
455 // <GPIO_PIN_FUNCTION_J"> J
456 // <GPIO_PIN_FUNCTION_K"> K
457 // <GPIO_PIN_FUNCTION_L"> L
458 // <GPIO_PIN_FUNCTION_M"> M
459 // <GPIO_PIN_FUNCTION_N"> N
460 PINMUX_PA25H_USB_DP);
461}
462
463/* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
464 * for low speed and full speed operation. */
465#if (CONF_GCLK_USB_FREQUENCY > (48000000 + 48000000 / 400)) || (CONF_GCLK_USB_FREQUENCY < (48000000 - 48000000 / 400))
466#warning USB clock should be 48MHz ~ 0.25% clock, check your configuration!
467#endif
468
469void USB_DEVICE_INSTANCE_CLOCK_init(void)
470{
471
472 hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN);
473 hri_mclk_set_AHBMASK_USB_bit(MCLK);
474 hri_mclk_set_APBBMASK_USB_bit(MCLK);
475}
476
477void USB_DEVICE_INSTANCE_init(void)
478{
479 USB_DEVICE_INSTANCE_CLOCK_init();
480 usb_d_init();
481 USB_DEVICE_INSTANCE_PORT_init();
482}
483
484void system_init(void)
485{
486 init_mcu();
487
Harald Welte092494e2019-02-24 10:33:40 +0100488 // GPIO on PA02
489
490 // Set pin direction to input
491 gpio_set_pin_direction(SIM4_INT, GPIO_DIRECTION_IN);
492
493 gpio_set_pin_pull_mode(SIM4_INT,
494 // <y> Pull configuration
495 // <id> pad_pull_config
496 // <GPIO_PULL_OFF"> Off
497 // <GPIO_PULL_UP"> Pull-up
498 // <GPIO_PULL_DOWN"> Pull-down
499 GPIO_PULL_OFF);
500
501 gpio_set_pin_function(SIM4_INT, GPIO_PIN_FUNCTION_OFF);
502
503 // GPIO on PA03
504
505 // Set pin direction to input
506 gpio_set_pin_direction(SIM5_INT, GPIO_DIRECTION_IN);
507
508 gpio_set_pin_pull_mode(SIM5_INT,
509 // <y> Pull configuration
510 // <id> pad_pull_config
511 // <GPIO_PULL_OFF"> Off
512 // <GPIO_PULL_UP"> Pull-up
513 // <GPIO_PULL_DOWN"> Pull-down
514 GPIO_PULL_OFF);
515
516 gpio_set_pin_function(SIM5_INT, GPIO_PIN_FUNCTION_OFF);
517
Kévin Redonf53d3662019-04-25 13:55:06 +0200518 // GPIO on PA10
519
520 gpio_set_pin_direction(RMII_CLOCK,
521 // <y> Pin direction
522 // <id> pad_direction
523 // <GPIO_DIRECTION_OFF"> Off
524 // <GPIO_DIRECTION_IN"> In
525 // <GPIO_DIRECTION_OUT"> Out
526 GPIO_DIRECTION_OUT);
527
528 gpio_set_pin_level(RMII_CLOCK,
529 // <y> Initial level
530 // <id> pad_initial_level
531 // <false"> Low
532 // <true"> High
533 false);
534
535 gpio_set_pin_pull_mode(RMII_CLOCK,
536 // <y> Pull configuration
537 // <id> pad_pull_config
538 // <GPIO_PULL_OFF"> Off
539 // <GPIO_PULL_UP"> Pull-up
540 // <GPIO_PULL_DOWN"> Pull-down
541 GPIO_PULL_OFF);
542
543 gpio_set_pin_function(RMII_CLOCK,
544 // <y> Pin function
545 // <id> pad_function
546 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
547 // <GPIO_PIN_FUNCTION_OFF"> Auto
548 // <GPIO_PIN_FUNCTION_OFF"> Off
549 // <GPIO_PIN_FUNCTION_A"> A
550 // <GPIO_PIN_FUNCTION_B"> B
551 // <GPIO_PIN_FUNCTION_C"> C
552 // <GPIO_PIN_FUNCTION_D"> D
553 // <GPIO_PIN_FUNCTION_E"> E
554 // <GPIO_PIN_FUNCTION_F"> F
555 // <GPIO_PIN_FUNCTION_G"> G
556 // <GPIO_PIN_FUNCTION_H"> H
557 // <GPIO_PIN_FUNCTION_I"> I
558 // <GPIO_PIN_FUNCTION_J"> J
559 // <GPIO_PIN_FUNCTION_K"> K
560 // <GPIO_PIN_FUNCTION_L"> L
561 // <GPIO_PIN_FUNCTION_M"> M
562 // <GPIO_PIN_FUNCTION_N"> N
563 GPIO_PIN_FUNCTION_M);
564
Kévin Redon6a8295c2019-01-30 18:58:44 +0100565 // GPIO on PA11
566
567 gpio_set_pin_direction(SIMCLK_20MHZ,
568 // <y> Pin direction
569 // <id> pad_direction
570 // <GPIO_DIRECTION_OFF"> Off
571 // <GPIO_DIRECTION_IN"> In
572 // <GPIO_DIRECTION_OUT"> Out
573 GPIO_DIRECTION_OUT);
574
575 gpio_set_pin_level(SIMCLK_20MHZ,
576 // <y> Initial level
577 // <id> pad_initial_level
578 // <false"> Low
579 // <true"> High
580 false);
581
582 gpio_set_pin_pull_mode(SIMCLK_20MHZ,
583 // <y> Pull configuration
584 // <id> pad_pull_config
585 // <GPIO_PULL_OFF"> Off
586 // <GPIO_PULL_UP"> Pull-up
587 // <GPIO_PULL_DOWN"> Pull-down
588 GPIO_PULL_OFF);
589
590 gpio_set_pin_function(SIMCLK_20MHZ,
591 // <y> Pin function
592 // <id> pad_function
593 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
594 // <GPIO_PIN_FUNCTION_OFF"> Auto
595 // <GPIO_PIN_FUNCTION_OFF"> Off
596 // <GPIO_PIN_FUNCTION_A"> A
597 // <GPIO_PIN_FUNCTION_B"> B
598 // <GPIO_PIN_FUNCTION_C"> C
599 // <GPIO_PIN_FUNCTION_D"> D
600 // <GPIO_PIN_FUNCTION_E"> E
601 // <GPIO_PIN_FUNCTION_F"> F
602 // <GPIO_PIN_FUNCTION_G"> G
603 // <GPIO_PIN_FUNCTION_H"> H
604 // <GPIO_PIN_FUNCTION_I"> I
605 // <GPIO_PIN_FUNCTION_J"> J
606 // <GPIO_PIN_FUNCTION_K"> K
607 // <GPIO_PIN_FUNCTION_L"> L
608 // <GPIO_PIN_FUNCTION_M"> M
609 // <GPIO_PIN_FUNCTION_N"> N
610 GPIO_PIN_FUNCTION_M);
611
612 // GPIO on PA20
613
614 // Set pin direction to input
615 gpio_set_pin_direction(VB0, GPIO_DIRECTION_IN);
616
617 gpio_set_pin_pull_mode(VB0,
618 // <y> Pull configuration
619 // <id> pad_pull_config
620 // <GPIO_PULL_OFF"> Off
621 // <GPIO_PULL_UP"> Pull-up
622 // <GPIO_PULL_DOWN"> Pull-down
623 GPIO_PULL_OFF);
624
625 gpio_set_pin_function(VB0, GPIO_PIN_FUNCTION_OFF);
626
627 // GPIO on PA21
628
629 // Set pin direction to input
630 gpio_set_pin_direction(VB1, GPIO_DIRECTION_IN);
631
632 gpio_set_pin_pull_mode(VB1,
633 // <y> Pull configuration
634 // <id> pad_pull_config
635 // <GPIO_PULL_OFF"> Off
636 // <GPIO_PULL_UP"> Pull-up
637 // <GPIO_PULL_DOWN"> Pull-down
638 GPIO_PULL_OFF);
639
640 gpio_set_pin_function(VB1, GPIO_PIN_FUNCTION_OFF);
641
642 // GPIO on PA22
643
644 // Set pin direction to input
645 gpio_set_pin_direction(VB2, GPIO_DIRECTION_IN);
646
647 gpio_set_pin_pull_mode(VB2,
648 // <y> Pull configuration
649 // <id> pad_pull_config
650 // <GPIO_PULL_OFF"> Off
651 // <GPIO_PULL_UP"> Pull-up
652 // <GPIO_PULL_DOWN"> Pull-down
653 GPIO_PULL_OFF);
654
655 gpio_set_pin_function(VB2, GPIO_PIN_FUNCTION_OFF);
656
657 // GPIO on PA23
658
659 // Set pin direction to input
660 gpio_set_pin_direction(VB3, GPIO_DIRECTION_IN);
661
662 gpio_set_pin_pull_mode(VB3,
663 // <y> Pull configuration
664 // <id> pad_pull_config
665 // <GPIO_PULL_OFF"> Off
666 // <GPIO_PULL_UP"> Pull-up
667 // <GPIO_PULL_DOWN"> Pull-down
668 GPIO_PULL_OFF);
669
670 gpio_set_pin_function(VB3, GPIO_PIN_FUNCTION_OFF);
671
Harald Welte092494e2019-02-24 10:33:40 +0100672 // GPIO on PB02
673
674 gpio_set_pin_level(SCL2,
675 // <y> Initial level
676 // <id> pad_initial_level
677 // <false"> Low
678 // <true"> High
679 false);
680
681 // Set pin direction to output
682 gpio_set_pin_direction(SCL2, GPIO_DIRECTION_OUT);
683
684 gpio_set_pin_function(SCL2, GPIO_PIN_FUNCTION_OFF);
685
686 // GPIO on PB03
687
688 gpio_set_pin_level(SDA2,
689 // <y> Initial level
690 // <id> pad_initial_level
691 // <false"> Low
692 // <true"> High
693 false);
694
695 // Set pin direction to output
696 gpio_set_pin_direction(SDA2, GPIO_DIRECTION_OUT);
697
698 gpio_set_pin_function(SDA2, GPIO_PIN_FUNCTION_OFF);
699
700 // GPIO on PB04
701
702 // Set pin direction to input
703 gpio_set_pin_direction(SIM6_INT, GPIO_DIRECTION_IN);
704
705 gpio_set_pin_pull_mode(SIM6_INT,
706 // <y> Pull configuration
707 // <id> pad_pull_config
708 // <GPIO_PULL_OFF"> Off
709 // <GPIO_PULL_UP"> Pull-up
710 // <GPIO_PULL_DOWN"> Pull-down
711 GPIO_PULL_OFF);
712
713 gpio_set_pin_function(SIM6_INT, GPIO_PIN_FUNCTION_OFF);
714
715 // GPIO on PB05
716
717 // Set pin direction to input
718 gpio_set_pin_direction(SIM7_INT, GPIO_DIRECTION_IN);
719
720 gpio_set_pin_pull_mode(SIM7_INT,
721 // <y> Pull configuration
722 // <id> pad_pull_config
723 // <GPIO_PULL_OFF"> Off
724 // <GPIO_PULL_UP"> Pull-up
725 // <GPIO_PULL_DOWN"> Pull-down
726 GPIO_PULL_OFF);
727
728 gpio_set_pin_function(SIM7_INT, GPIO_PIN_FUNCTION_OFF);
729
730 // GPIO on PB06
731
732 gpio_set_pin_level(SCL3,
733 // <y> Initial level
734 // <id> pad_initial_level
735 // <false"> Low
736 // <true"> High
737 false);
738
739 // Set pin direction to output
740 gpio_set_pin_direction(SCL3, GPIO_DIRECTION_OUT);
741
742 gpio_set_pin_function(SCL3, GPIO_PIN_FUNCTION_OFF);
743
744 // GPIO on PB07
745
746 gpio_set_pin_level(SDA3,
747 // <y> Initial level
748 // <id> pad_initial_level
749 // <false"> Low
750 // <true"> High
751 false);
752
753 // Set pin direction to output
754 gpio_set_pin_direction(SDA3, GPIO_DIRECTION_OUT);
755
756 gpio_set_pin_function(SDA3, GPIO_PIN_FUNCTION_OFF);
757
758 // GPIO on PB14
759
760 gpio_set_pin_level(SCL1,
761 // <y> Initial level
762 // <id> pad_initial_level
763 // <false"> Low
764 // <true"> High
765 false);
766
767 // Set pin direction to output
768 gpio_set_pin_direction(SCL1, GPIO_DIRECTION_OUT);
769
770 gpio_set_pin_function(SCL1, GPIO_PIN_FUNCTION_OFF);
771
772 // GPIO on PB15
773
774 gpio_set_pin_level(SDA1,
775 // <y> Initial level
776 // <id> pad_initial_level
777 // <false"> Low
778 // <true"> High
779 false);
780
781 // Set pin direction to output
782 gpio_set_pin_direction(SDA1, GPIO_DIRECTION_OUT);
783
784 gpio_set_pin_function(SDA1, GPIO_PIN_FUNCTION_OFF);
785
786 // GPIO on PC00
787
788 // Set pin direction to input
789 gpio_set_pin_direction(SIM0_INT, GPIO_DIRECTION_IN);
790
791 gpio_set_pin_pull_mode(SIM0_INT,
792 // <y> Pull configuration
793 // <id> pad_pull_config
794 // <GPIO_PULL_OFF"> Off
795 // <GPIO_PULL_UP"> Pull-up
796 // <GPIO_PULL_DOWN"> Pull-down
797 GPIO_PULL_OFF);
798
799 gpio_set_pin_function(SIM0_INT, GPIO_PIN_FUNCTION_OFF);
800
801 // GPIO on PC01
802
803 // Set pin direction to input
804 gpio_set_pin_direction(SIM1_INT, GPIO_DIRECTION_IN);
805
806 gpio_set_pin_pull_mode(SIM1_INT,
807 // <y> Pull configuration
808 // <id> pad_pull_config
809 // <GPIO_PULL_OFF"> Off
810 // <GPIO_PULL_UP"> Pull-up
811 // <GPIO_PULL_DOWN"> Pull-down
812 GPIO_PULL_OFF);
813
814 gpio_set_pin_function(SIM1_INT, GPIO_PIN_FUNCTION_OFF);
815
816 // GPIO on PC02
817
818 // Set pin direction to input
819 gpio_set_pin_direction(SIM2_INT, GPIO_DIRECTION_IN);
820
821 gpio_set_pin_pull_mode(SIM2_INT,
822 // <y> Pull configuration
823 // <id> pad_pull_config
824 // <GPIO_PULL_OFF"> Off
825 // <GPIO_PULL_UP"> Pull-up
826 // <GPIO_PULL_DOWN"> Pull-down
827 GPIO_PULL_OFF);
828
829 gpio_set_pin_function(SIM2_INT, GPIO_PIN_FUNCTION_OFF);
830
831 // GPIO on PC03
832
833 // Set pin direction to input
834 gpio_set_pin_direction(SIM3_INT, GPIO_DIRECTION_IN);
835
836 gpio_set_pin_pull_mode(SIM3_INT,
837 // <y> Pull configuration
838 // <id> pad_pull_config
839 // <GPIO_PULL_OFF"> Off
840 // <GPIO_PULL_UP"> Pull-up
841 // <GPIO_PULL_DOWN"> Pull-down
842 GPIO_PULL_OFF);
843
844 gpio_set_pin_function(SIM3_INT, GPIO_PIN_FUNCTION_OFF);
845
Kévin Redon6a8295c2019-01-30 18:58:44 +0100846 // GPIO on PC14
847
848 // Set pin direction to input
849 gpio_set_pin_direction(SWITCH, GPIO_DIRECTION_IN);
850
851 gpio_set_pin_pull_mode(SWITCH,
852 // <y> Pull configuration
853 // <id> pad_pull_config
854 // <GPIO_PULL_OFF"> Off
855 // <GPIO_PULL_UP"> Pull-up
856 // <GPIO_PULL_DOWN"> Pull-down
857 GPIO_PULL_OFF);
858
859 gpio_set_pin_function(SWITCH, GPIO_PIN_FUNCTION_OFF);
860
Harald Welte092494e2019-02-24 10:33:40 +0100861 // GPIO on PC15
862
863 // Set pin direction to input
Kévin Redon3c045b22019-02-26 19:52:02 +0100864 gpio_set_pin_direction(MUX_STAT, GPIO_DIRECTION_IN);
Harald Welte092494e2019-02-24 10:33:40 +0100865
Kévin Redon3c045b22019-02-26 19:52:02 +0100866 gpio_set_pin_pull_mode(MUX_STAT,
Harald Welte092494e2019-02-24 10:33:40 +0100867 // <y> Pull configuration
868 // <id> pad_pull_config
869 // <GPIO_PULL_OFF"> Off
870 // <GPIO_PULL_UP"> Pull-up
871 // <GPIO_PULL_DOWN"> Pull-down
872 GPIO_PULL_OFF);
873
Kévin Redon3c045b22019-02-26 19:52:02 +0100874 gpio_set_pin_function(MUX_STAT, GPIO_PIN_FUNCTION_OFF);
Harald Welte092494e2019-02-24 10:33:40 +0100875
Kévin Redon4e39b012019-01-30 15:55:58 +0100876 // GPIO on PC26
Kévin Redon5908a5c2019-01-24 18:45:23 +0100877
Kévin Redon6a8295c2019-01-30 18:58:44 +0100878 gpio_set_pin_level(USER_LED,
Kévin Redon5908a5c2019-01-24 18:45:23 +0100879 // <y> Initial level
880 // <id> pad_initial_level
881 // <false"> Low
882 // <true"> High
Kévin Redon4e39b012019-01-30 15:55:58 +0100883 false);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100884
885 // Set pin direction to output
Kévin Redon6a8295c2019-01-30 18:58:44 +0100886 gpio_set_pin_direction(USER_LED, GPIO_DIRECTION_OUT);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100887
Kévin Redon6a8295c2019-01-30 18:58:44 +0100888 gpio_set_pin_function(USER_LED, GPIO_PIN_FUNCTION_OFF);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100889
Harald Welte092494e2019-02-24 10:33:40 +0100890 // GPIO on PC27
891
892 gpio_set_pin_level(SCL4,
893 // <y> Initial level
894 // <id> pad_initial_level
895 // <false"> Low
896 // <true"> High
897 false);
898
899 // Set pin direction to output
900 gpio_set_pin_direction(SCL4, GPIO_DIRECTION_OUT);
901
902 gpio_set_pin_function(SCL4, GPIO_PIN_FUNCTION_OFF);
903
904 // GPIO on PC28
905
906 gpio_set_pin_level(SDA4,
907 // <y> Initial level
908 // <id> pad_initial_level
909 // <false"> Low
910 // <true"> High
911 false);
912
913 // Set pin direction to output
914 gpio_set_pin_direction(SDA4, GPIO_DIRECTION_OUT);
915
916 gpio_set_pin_function(SDA4, GPIO_PIN_FUNCTION_OFF);
917
Harald Welted1bd5c42019-05-17 16:38:30 +0200918 CALENDAR_0_init();
Kévin Redon1f8ecef2019-01-31 13:36:12 +0100919 SIM0_init();
920 SIM1_init();
921 SIM2_init();
922 SIM3_init();
923 SIM4_init();
924 SIM5_init();
925 SIM6_init();
Harald Welte361ed202019-02-24 21:15:39 +0100926
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100927 UART_debug_init();
928
Kévin Redon69b92d92019-01-24 16:39:20 +0100929 USB_DEVICE_INSTANCE_init();
930}