| commit | e4f90fe4efa6ba026847c8e1e539867ed90e3691 | [log] [tgz] |
|---|---|---|
| author | Eric Wild <ewild@sysmocom.de> | Wed Nov 27 15:01:51 2019 +0100 |
| committer | Eric Wild <ewild@sysmocom.de> | Thu Nov 28 13:42:16 2019 +0100 |
| tree | 189b87b54943eaa75c03dc4b4db70167540182f7 | |
| parent | 03d6ebbd9a79e19d005f0320aafd86fa73b8d2f6 [diff] |
increase the uart ring buffer size must be be a power of 2, and should be at least as large as the largest transfer that we might be waiting for - revisit this, is 256 enough? Change-Id: Id4b4691dd32d465f627ba42c0ba3d509dcf8f42c