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Harald Welte9d3e3822015-11-09 00:50:54 +01001/* ISO7816-3 state machine for the card side */
2/* (C) 2010-2015 by Harald Welte <hwelte@hmw-consulting.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19
Harald Welte4c473da2015-11-14 13:31:11 +010020#include <assert.h>
Harald Welte9d3e3822015-11-09 00:50:54 +010021#include <errno.h>
22#include <string.h>
23#include <stdint.h>
24#include <sys/types.h>
25
26#include "utils.h"
27#include "trace.h"
28#include "iso7816_fidi.h"
29#include "tc_etu.h"
30#include "card_emu.h"
31#include "req_ctx.h"
32#include "cardemu_prot.h"
Harald Welte54cb3d02016-02-29 14:12:40 +010033#include "linuxlist.h"
Harald Welte9d3e3822015-11-09 00:50:54 +010034
35
36#define NUM_SLOTS 2
37
38#define ISO7816_3_INIT_WTIME 9600
39#define ISO7816_3_DEFAULT_WI 10
40#define ISO7816_3_ATR_LEN_MAX (1+32) /* TS plus 32 chars */
41
42#define ISO7816_3_PB_NULL 0x60
43
44enum iso7816_3_card_state {
45 ISO_S_WAIT_POWER, /* waiting for power being applied */
46 ISO_S_WAIT_CLK, /* waiting for clock being applied */
47 ISO_S_WAIT_RST, /* waiting for reset being released */
48 ISO_S_WAIT_ATR, /* waiting for start of ATR */
49 ISO_S_IN_ATR, /* transmitting ATR to reader */
50 ISO_S_IN_PTS, /* transmitting ATR to reader */
51 ISO_S_WAIT_TPDU, /* waiting for data from reader */
52 ISO_S_IN_TPDU, /* inside a TPDU */
53};
54
55/* detailed sub-states of ISO_S_IN_PTS */
56enum pts_state {
57 PTS_S_WAIT_REQ_PTSS,
58 PTS_S_WAIT_REQ_PTS0,
59 PTS_S_WAIT_REQ_PTS1,
60 PTS_S_WAIT_REQ_PTS2,
61 PTS_S_WAIT_REQ_PTS3,
62 PTS_S_WAIT_REQ_PCK,
63 PTS_S_WAIT_RESP_PTSS = PTS_S_WAIT_REQ_PTSS | 0x10,
64 PTS_S_WAIT_RESP_PTS0 = PTS_S_WAIT_REQ_PTS0 | 0x10,
65 PTS_S_WAIT_RESP_PTS1 = PTS_S_WAIT_REQ_PTS1 | 0x10,
66 PTS_S_WAIT_RESP_PTS2 = PTS_S_WAIT_REQ_PTS2 | 0x10,
67 PTS_S_WAIT_RESP_PTS3 = PTS_S_WAIT_REQ_PTS3 | 0x10,
68 PTS_S_WAIT_RESP_PCK = PTS_S_WAIT_REQ_PCK | 0x10,
69};
70
71#define _PTSS 0
72#define _PTS0 1
73#define _PTS1 2
74#define _PTS2 3
75#define _PTS3 4
76#define _PCK 5
77
Harald Welte16cf4082015-11-11 19:02:48 +010078/* T-PDU state machine states */
Harald Welte9d3e3822015-11-09 00:50:54 +010079enum tpdu_state {
Harald Welte16cf4082015-11-11 19:02:48 +010080 TPDU_S_WAIT_CLA, /* waiting for CLA byte from reader */
81 TPDU_S_WAIT_INS, /* waiting for INS byte from reader */
82 TPDU_S_WAIT_P1, /* waiting for P1 byte from reader */
83 TPDU_S_WAIT_P2, /* waiting for P2 byte from reader */
84 TPDU_S_WAIT_P3, /* waiting for P3 byte from reader */
Harald Welte9d3e3822015-11-09 00:50:54 +010085 TPDU_S_WAIT_PB, /* waiting for Tx of procedure byte */
86 TPDU_S_WAIT_RX, /* waiitng for more data from reader */
87 TPDU_S_WAIT_TX, /* waiting for more data to reader */
88};
89
90#define _CLA 0
91#define _INS 1
92#define _P1 2
93#define _P2 3
94#define _P3 4
95
96struct card_handle {
97 enum iso7816_3_card_state state;
98
99 /* signal levels */
100 uint8_t vcc_active; /* 1 = on, 0 = off */
101 uint8_t in_reset; /* 1 = RST low, 0 = RST high */
102 uint8_t clocked; /* 1 = active, 0 = inactive */
103
Harald Welte16cf4082015-11-11 19:02:48 +0100104 /* timing parameters, from PTS */
Harald Welte9d3e3822015-11-09 00:50:54 +0100105 uint8_t fi;
106 uint8_t di;
107 uint8_t wi;
108
109 uint8_t tc_chan; /* TC channel number */
110 uint8_t uart_chan; /* UART channel */
111
112 uint32_t waiting_time; /* in clocks */
113
114 /* ATR state machine */
115 struct {
116 uint8_t idx;
117 uint8_t len;
118 //uint8_t hist_len;
119 //uint8_t last_td;
120 uint8_t atr[ISO7816_3_ATR_LEN_MAX];
121 } atr;
122
123 /* PPS / PTS support */
124 struct {
125 enum pts_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100126 uint8_t req[6]; /* request bytes */
127 uint8_t resp[6]; /* response bytes */
Harald Welte9d3e3822015-11-09 00:50:54 +0100128 } pts;
129
130 /* TPDU */
131 struct {
132 enum tpdu_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100133 uint8_t hdr[5]; /* CLA INS P1 P2 P3 */
Harald Welte9d3e3822015-11-09 00:50:54 +0100134 } tpdu;
135
Harald Welte16cf4082015-11-11 19:02:48 +0100136 struct req_ctx *uart_rx_ctx; /* UART RX -> USB TX */
137 struct req_ctx *uart_tx_ctx; /* USB RX -> UART TX */
Harald Welte9d3e3822015-11-09 00:50:54 +0100138
Harald Welte54cb3d02016-02-29 14:12:40 +0100139 struct llist_head usb_tx_queue;
140 struct llist_head uart_tx_queue;
141
Harald Welte9d3e3822015-11-09 00:50:54 +0100142 struct {
143 uint32_t tx_bytes;
144 uint32_t rx_bytes;
145 uint32_t pps;
146 } stats;
147};
148
Harald Welte54cb3d02016-02-29 14:12:40 +0100149struct llist_head *card_emu_get_usb_tx_queue(struct card_handle *ch)
150{
151 return &ch->usb_tx_queue;
152}
153
154struct llist_head *card_emu_get_uart_tx_queue(struct card_handle *ch)
155{
156 return &ch->uart_tx_queue;
157}
158
Harald Welte2935b3c2015-11-14 20:00:14 +0100159static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts);
Harald Weltee7194ab2015-11-14 21:03:25 +0100160static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss);
Harald Welte2935b3c2015-11-14 20:00:14 +0100161
Harald Welteb5288e82015-11-14 21:15:52 +0100162static void flush_rx_buffer(struct card_handle *ch)
163{
164 struct req_ctx *rctx;
165 struct cardemu_usb_msg_rx_data *rd;
166
167 rctx = ch->uart_rx_ctx;
168 if (!rctx)
169 return;
170
Harald Welte54cb3d02016-02-29 14:12:40 +0100171 ch->uart_rx_ctx = NULL;
Harald Welteb5288e82015-11-14 21:15:52 +0100172
173 /* store length of data payload fild in header */
Harald Weltefcdd6602016-03-02 10:33:58 +0100174 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
Harald Welteb5288e82015-11-14 21:15:52 +0100175 rd->hdr.data_len = rctx->idx;
Harald Welte54cb3d02016-02-29 14:12:40 +0100176
177 llist_add_tail(&rctx->list, &ch->usb_tx_queue);
Harald Welteb5288e82015-11-14 21:15:52 +0100178 req_ctx_set_state(rctx, RCTX_S_USB_TX_PENDING);
Harald Welteb5288e82015-11-14 21:15:52 +0100179
180 /* FIXME: call into USB code to see if this buffer can
181 * be transmitted now */
182}
183
Harald Welte4ba66d02016-02-25 19:38:56 +0100184/* convert a non-contiguous PTS request/responsei into a contiguous
185 * buffer, returning the number of bytes used in the buffer */
186static int serialize_pts(uint8_t *out, const uint8_t *in)
187{
188 int i = 0;
189
190 out[i++] = in[_PTSS];
191 out[i++] = in[_PTS0];
192 if (in[_PTS0] & (1 << 4))
193 out[i++] = in[_PTS1];
194 if (in[_PTS0] & (1 << 5))
195 out[i++] = in[_PTS2];
196 if (in[_PTS0] & (1 << 6))
197 out[i++] = in[_PTS3];
198 out[i++] = in[_PCK];
199
200 return i;
201}
202
Harald Welte17db2f12016-02-26 09:48:57 +0100203static uint8_t csum_pts(const uint8_t *in)
204{
205 uint8_t out[6];
206 int len = serialize_pts(out, in);
207 uint8_t csum = 0;
208 int i;
209
210 /* we don't include the PCK byte in the checksumming process */
211 len -= 1;
212
213 for (i = 0; i < len; i++)
214 csum = csum ^ out[i];
215
216 return csum;
217}
218
Harald Welte4ba66d02016-02-25 19:38:56 +0100219static void flush_pts(struct card_handle *ch)
220{
221 struct req_ctx *rctx;
222 struct cardemu_usb_msg_pts_info *ptsi;
223
224 rctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
225 if (!rctx)
226 return;
227
228 ptsi = (struct cardemu_usb_msg_pts_info *) rctx->data;
229 ptsi->hdr.msg_type = CEMU_USB_MSGT_DO_PTS;
230 ptsi->hdr.data_len = serialize_pts(ptsi->req, ch->pts.req);
231 serialize_pts(ptsi->resp, ch->pts.resp);
232
Harald Welte54cb3d02016-02-29 14:12:40 +0100233 llist_add_tail(&rctx->list, &ch->usb_tx_queue);
Harald Welte4ba66d02016-02-25 19:38:56 +0100234 req_ctx_set_state(rctx, RCTX_S_USB_TX_PENDING);
235
236 /* FIXME: call into USB code to see if this buffer can
237 * be transmitted now */
238}
239
Harald Welte8c496362016-02-27 16:24:09 +0100240static void emu_update_fidi(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100241{
242 int rc;
243
244 rc = compute_fidi_ratio(ch->fi, ch->di);
245 if (rc > 0 && rc < 0x400) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100246 TRACE_DEBUG("computed Fi(%u) Di(%u) ratio: %d\r\n",
Harald Welte9d3e3822015-11-09 00:50:54 +0100247 ch->fi, ch->di, rc);
248 /* make sure UART uses new F/D ratio */
249 card_emu_uart_update_fidi(ch->uart_chan, rc);
250 /* notify ETU timer about this */
251 tc_etu_set_etu(ch->tc_chan, rc);
252 } else
Harald Welte22bf67f2016-02-29 10:18:48 +0100253 TRACE_DEBUG("computed FiDi ration %d unsupported\r\n", rc);
Harald Welte9d3e3822015-11-09 00:50:54 +0100254}
255
256/* Update the ISO 7816-3 TPDU receiver state */
257static void card_set_state(struct card_handle *ch,
258 enum iso7816_3_card_state new_state)
259{
260 switch (new_state) {
261 case ISO_S_WAIT_POWER:
262 case ISO_S_WAIT_CLK:
263 case ISO_S_WAIT_RST:
264 /* disable Rx and Tx of UART */
265 card_emu_uart_enable(ch->uart_chan, 0);
266 break;
267 case ISO_S_WAIT_ATR:
Harald Weltee7194ab2015-11-14 21:03:25 +0100268 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
Harald Welte9d3e3822015-11-09 00:50:54 +0100269 /* Reset to initial Fi / Di ratio */
270 ch->fi = 1;
271 ch->di = 1;
Harald Welte8c496362016-02-27 16:24:09 +0100272 emu_update_fidi(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100273 /* initialize todefault WI, this will be overwritten if we
274 * receive TC2, and it will be programmed into hardware after
275 * ATR is finished */
276 ch->wi = ISO7816_3_DEFAULT_WI;
277 /* update waiting time to initial waiting time */
278 ch->waiting_time = ISO7816_3_INIT_WTIME;
279 tc_etu_set_wtime(ch->tc_chan, ch->waiting_time);
280 /* Set ATR sub-state to initial state */
281 ch->atr.idx = 0;
282 //set_atr_state(ch, ATR_S_WAIT_TS);
283 /* Notice that we are just coming out of reset */
284 //ch->sh.flags |= SIMTRACE_FLAG_ATR;
285 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
286 break;
287 break;
288 case ISO_S_WAIT_TPDU:
289 /* enable the receiver, disable transmitter */
Harald Welte2935b3c2015-11-14 20:00:14 +0100290 set_tpdu_state(ch, TPDU_S_WAIT_CLA);
Harald Welte9d3e3822015-11-09 00:50:54 +0100291 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
292 break;
293 case ISO_S_IN_ATR:
294 case ISO_S_IN_PTS:
295 case ISO_S_IN_TPDU:
296 /* do nothing */
297 break;
298 }
299
300 if (ch->state == new_state)
301 return;
302
Harald Welte22bf67f2016-02-29 10:18:48 +0100303 TRACE_DEBUG("7816 card state %u -> %u\r\n", ch->state, new_state);
Harald Welte9d3e3822015-11-09 00:50:54 +0100304 ch->state = new_state;
305}
306
307
308/**********************************************************************
309 * PTS / PPS handling
310 **********************************************************************/
311
312/* Update the ATR sub-state */
313static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss)
314{
Harald Welte22bf67f2016-02-29 10:18:48 +0100315 TRACE_DEBUG("7816 PTS state %u -> %u\r\n", ch->pts.state, new_ptss);
Harald Welte9d3e3822015-11-09 00:50:54 +0100316 ch->pts.state = new_ptss;
317}
318
319/* Determine the next PTS state */
320static enum pts_state next_pts_state(struct card_handle *ch)
321{
322 uint8_t is_resp = ch->pts.state & 0x10;
323 uint8_t sstate = ch->pts.state & 0x0f;
324 uint8_t *pts_ptr;
325
326 if (!is_resp)
327 pts_ptr = ch->pts.req;
328 else
329 pts_ptr = ch->pts.resp;
330
331 switch (sstate) {
332 case PTS_S_WAIT_REQ_PTSS:
333 goto from_ptss;
334 case PTS_S_WAIT_REQ_PTS0:
335 goto from_pts0;
336 case PTS_S_WAIT_REQ_PTS1:
337 goto from_pts1;
338 case PTS_S_WAIT_REQ_PTS2:
339 goto from_pts2;
340 case PTS_S_WAIT_REQ_PTS3:
341 goto from_pts3;
342 }
343
344 if (ch->pts.state == PTS_S_WAIT_REQ_PCK)
345 return PTS_S_WAIT_RESP_PTSS;
346
347from_ptss:
348 return PTS_S_WAIT_REQ_PTS0 | is_resp;
349from_pts0:
350 if (pts_ptr[_PTS0] & (1 << 4))
351 return PTS_S_WAIT_REQ_PTS1 | is_resp;
352from_pts1:
353 if (pts_ptr[_PTS0] & (1 << 5))
354 return PTS_S_WAIT_REQ_PTS2 | is_resp;
355from_pts2:
356 if (pts_ptr[_PTS0] & (1 << 6))
357 return PTS_S_WAIT_REQ_PTS3 | is_resp;
358from_pts3:
359 return PTS_S_WAIT_REQ_PCK | is_resp;
360}
361
362
363static enum iso7816_3_card_state
364process_byte_pts(struct card_handle *ch, uint8_t byte)
365{
366 switch (ch->pts.state) {
367 case PTS_S_WAIT_REQ_PTSS:
368 ch->pts.req[_PTSS] = byte;
369 break;
370 case PTS_S_WAIT_REQ_PTS0:
371 ch->pts.req[_PTS0] = byte;
372 break;
373 case PTS_S_WAIT_REQ_PTS1:
374 ch->pts.req[_PTS1] = byte;
375 break;
376 case PTS_S_WAIT_REQ_PTS2:
377 ch->pts.req[_PTS2] = byte;
378 break;
379 case PTS_S_WAIT_REQ_PTS3:
380 ch->pts.req[_PTS3] = byte;
381 break;
382 case PTS_S_WAIT_REQ_PCK:
383 ch->pts.req[_PCK] = byte;
Harald Welte17db2f12016-02-26 09:48:57 +0100384 if (ch->pts.req[_PCK] != csum_pts(ch->pts.req)) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100385 TRACE_DEBUG("Error in PTS Checksum!\r\n");
Harald Welte17db2f12016-02-26 09:48:57 +0100386 /* Wait for the next TPDU */
387 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
388 return ISO_S_WAIT_TPDU;
389 }
Harald Welte4ba66d02016-02-25 19:38:56 +0100390 /* FIXME: check if proposal matches capabilities in ATR */
Harald Welte9d3e3822015-11-09 00:50:54 +0100391 memcpy(ch->pts.resp, ch->pts.req, sizeof(ch->pts.resp));
392 break;
Harald Welte4c473da2015-11-14 13:31:11 +0100393 default:
Harald Welte22bf67f2016-02-29 10:18:48 +0100394 TRACE_DEBUG("process_byte_pts() in invalid state %u\r\n",
Harald Welte4c473da2015-11-14 13:31:11 +0100395 ch->pts.state);
396 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100397 }
398 /* calculate the next state and set it */
399 set_pts_state(ch, next_pts_state(ch));
400
Harald Welte4ba66d02016-02-25 19:38:56 +0100401 if (ch->pts.state == PTS_S_WAIT_RESP_PTSS) {
402 flush_pts(ch);
403 /* activate UART TX to transmit PTS response */
404 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
405 }
406
Harald Welte9d3e3822015-11-09 00:50:54 +0100407 return ISO_S_IN_PTS;
408}
409
410/* return a single byte to be transmitted to the reader */
Harald Welte855ba9e2016-02-24 21:00:46 +0100411static int tx_byte_pts(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100412{
Harald Welte855ba9e2016-02-24 21:00:46 +0100413 uint8_t byte;
414
415 /* 1: Determine the next transmit byte */
Harald Welte9d3e3822015-11-09 00:50:54 +0100416 switch (ch->pts.state) {
417 case PTS_S_WAIT_RESP_PTSS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100418 byte = ch->pts.resp[_PTSS];
Harald Welte9d3e3822015-11-09 00:50:54 +0100419 break;
420 case PTS_S_WAIT_RESP_PTS0:
Harald Welte855ba9e2016-02-24 21:00:46 +0100421 byte = ch->pts.resp[_PTS0];
Harald Welte9d3e3822015-11-09 00:50:54 +0100422 break;
423 case PTS_S_WAIT_RESP_PTS1:
Harald Welte855ba9e2016-02-24 21:00:46 +0100424 byte = ch->pts.resp[_PTS1];
Harald Welte9d3e3822015-11-09 00:50:54 +0100425 /* This must be TA1 */
Harald Welte855ba9e2016-02-24 21:00:46 +0100426 ch->fi = byte >> 4;
427 ch->di = byte & 0xf;
Harald Welte22bf67f2016-02-29 10:18:48 +0100428 TRACE_DEBUG("found Fi=%u Di=%u\r\n", ch->fi, ch->di);
Harald Welte9d3e3822015-11-09 00:50:54 +0100429 break;
430 case PTS_S_WAIT_RESP_PTS2:
Harald Welte855ba9e2016-02-24 21:00:46 +0100431 byte = ch->pts.resp[_PTS2];
Harald Welte9d3e3822015-11-09 00:50:54 +0100432 break;
433 case PTS_S_WAIT_RESP_PTS3:
Harald Welte855ba9e2016-02-24 21:00:46 +0100434 byte = ch->pts.resp[_PTS3];
Harald Welte9d3e3822015-11-09 00:50:54 +0100435 break;
436 case PTS_S_WAIT_RESP_PCK:
Harald Welte855ba9e2016-02-24 21:00:46 +0100437 byte = ch->pts.resp[_PCK];
Harald Welte9d3e3822015-11-09 00:50:54 +0100438 /* update baud rate generator with Fi/Di */
Harald Welte8c496362016-02-27 16:24:09 +0100439 emu_update_fidi(ch);
Harald Welte855ba9e2016-02-24 21:00:46 +0100440 break;
Harald Welted79dc4f2015-11-14 13:32:21 +0100441 default:
Harald Welte22bf67f2016-02-29 10:18:48 +0100442 TRACE_DEBUG("get_byte_pts() in invalid state %u\r\n",
Harald Welted79dc4f2015-11-14 13:32:21 +0100443 ch->pts.state);
Harald Welte855ba9e2016-02-24 21:00:46 +0100444 return 0;
445 }
446
447 /* 2: Transmit the byte */
448 card_emu_uart_tx(ch->uart_chan, byte);
449
450 /* 3: Update the state */
451
452 switch (ch->pts.state) {
453 case PTS_S_WAIT_RESP_PCK:
454 /* Wait for the next TPDU */
455 card_set_state(ch, ISO_S_WAIT_TPDU);
456 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
457 break;
458 default:
459 /* calculate the next state and set it */
460 set_pts_state(ch, next_pts_state(ch));
Harald Welted79dc4f2015-11-14 13:32:21 +0100461 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100462 }
Harald Welted79dc4f2015-11-14 13:32:21 +0100463
Harald Welte855ba9e2016-02-24 21:00:46 +0100464 /* return number of bytes transmitted */
465 return 1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100466}
467
468
469/**********************************************************************
470 * TPDU handling
471 **********************************************************************/
472
Harald Welte4d804672015-11-14 23:02:38 +0100473
474/* compute number of data bytes according to Chapter 10.3.2 of 7816-3 */
475static unsigned int t0_num_data_bytes(uint8_t p3, int reader_to_card)
476{
477 if (reader_to_card) {
478 return p3;
479 } else {
480 if (p3 == 0)
481 return 256;
482 else
483 return p3;
484 }
485}
486
Harald Welte9d3e3822015-11-09 00:50:54 +0100487/* add a just-received TPDU byte (from reader) to USB buffer */
Harald Welte61bb30e2015-11-14 23:44:14 +0100488static void add_tpdu_byte(struct card_handle *ch, uint8_t byte)
Harald Welte9d3e3822015-11-09 00:50:54 +0100489{
490 struct req_ctx *rctx;
491 struct cardemu_usb_msg_rx_data *rd;
Harald Welte4d804672015-11-14 23:02:38 +0100492 unsigned int num_data_bytes = t0_num_data_bytes(ch->tpdu.hdr[_P3], 0);
Harald Welte9d3e3822015-11-09 00:50:54 +0100493
494 /* ensure we have a buffer */
495 if (!ch->uart_rx_ctx) {
Harald Welte4d804672015-11-14 23:02:38 +0100496 rctx = ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
497 if (!ch->uart_rx_ctx) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100498 TRACE_DEBUG("Received UART byte but unable to allocate Rx Buf\r\n");
Harald Welte9d3e3822015-11-09 00:50:54 +0100499 return;
Harald Welte4d804672015-11-14 23:02:38 +0100500 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100501 rd = (struct cardemu_usb_msg_rx_data *) ch->uart_rx_ctx->data;
502 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
503 rctx->tot_len = sizeof(*rd);
504 rctx->idx = 0;
505 } else
506 rctx = ch->uart_rx_ctx;
507
508 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
509
510 rd->data[rctx->idx++] = byte;
511 rctx->tot_len++;
512
513 /* check if the buffer is full. If so, send it */
Harald Welte4d804672015-11-14 23:02:38 +0100514 if (rctx->tot_len >= sizeof(*rd) + num_data_bytes) {
515 rd->flags |= CEMU_DATA_F_FINAL;
Harald Welteb5288e82015-11-14 21:15:52 +0100516 flush_rx_buffer(ch);
Harald Welte61bb30e2015-11-14 23:44:14 +0100517 /* We need to transmit the SW now, */
518 set_tpdu_state(ch, TPDU_S_WAIT_TX);
Harald Welte4d804672015-11-14 23:02:38 +0100519 } else if (rctx->tot_len >= rctx->size)
520 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100521}
522
523static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts)
524{
Harald Welte05b41c62015-11-14 20:58:48 +0100525 if (ch->tpdu.state == new_ts)
526 return;
527
Harald Welte22bf67f2016-02-29 10:18:48 +0100528 TRACE_DEBUG("7816 TPDU state %u -> %u\r\n", ch->tpdu.state, new_ts);
Harald Welte05b41c62015-11-14 20:58:48 +0100529
Harald Welte9d3e3822015-11-09 00:50:54 +0100530 switch (new_ts) {
531 case TPDU_S_WAIT_CLA:
Harald Welte05b41c62015-11-14 20:58:48 +0100532 case TPDU_S_WAIT_RX:
Harald Welte9d3e3822015-11-09 00:50:54 +0100533 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
534 break;
535 case TPDU_S_WAIT_PB:
536 /* we just completed the TPDU header from reader to card
537 * and now need to disable the receiver, enable the
538 * transmitter and transmit the procedure byte */
539 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
540 break;
Harald Weltead434402016-03-02 11:18:29 +0100541 default:
542 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100543 }
Harald Welte05b41c62015-11-14 20:58:48 +0100544
Harald Welte9d3e3822015-11-09 00:50:54 +0100545 ch->tpdu.state = new_ts;
546}
547
548static enum tpdu_state next_tpdu_state(struct card_handle *ch)
549{
550 switch (ch->tpdu.state) {
551 case TPDU_S_WAIT_CLA:
552 return TPDU_S_WAIT_INS;
553 case TPDU_S_WAIT_INS:
554 return TPDU_S_WAIT_P1;
555 case TPDU_S_WAIT_P1:
556 return TPDU_S_WAIT_P2;
557 case TPDU_S_WAIT_P2:
558 return TPDU_S_WAIT_P3;
559 case TPDU_S_WAIT_P3:
560 return TPDU_S_WAIT_PB;
561 /* simply stay in Rx or Tx by default */
562 case TPDU_S_WAIT_PB:
563 return TPDU_S_WAIT_PB;
564 case TPDU_S_WAIT_RX:
565 return TPDU_S_WAIT_RX;
566 case TPDU_S_WAIT_TX:
567 return TPDU_S_WAIT_TX;
568 }
Harald Welte4c473da2015-11-14 13:31:11 +0100569 /* we should never reach here */
570 assert(0);
571 return -1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100572}
573
574static void send_tpdu_header(struct card_handle *ch)
575{
576 struct req_ctx *rctx;
577 struct cardemu_usb_msg_rx_data *rd;
578
Harald Welte43f79492016-02-29 10:06:54 +0100579 TRACE_DEBUG("%s: %02x %02x %02x %02x %02x\r\n", __func__,
580 ch->tpdu.hdr[0], ch->tpdu.hdr[1],
581 ch->tpdu.hdr[2], ch->tpdu.hdr[3],
582 ch->tpdu.hdr[4]);
583
Harald Welte9d3e3822015-11-09 00:50:54 +0100584 /* if we already/still have a context, send it off */
Harald Weltef1697e22016-03-02 10:28:54 +0100585 if (ch->uart_rx_ctx) {
586 TRACE_DEBUG("have old buffer\r\n");
587 if (ch->uart_rx_ctx->idx) {
588 TRACE_DEBUG("flushing old buffer\r\n");
589 flush_rx_buffer(ch);
590 }
591 } else {
592 TRACE_DEBUG("allocating new buffer\r\n");
593 /* ensure we have a new buffer */
594 ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
595 if (!ch->uart_rx_ctx) {
596 TRACE_ERROR("%s: ENOMEM\r\n", __func__);
597 return;
598 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100599 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100600 rctx = ch->uart_rx_ctx;
601 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
602
603 /* initializ header */
604 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
605 rd->flags = CEMU_DATA_F_TPDU_HDR;
606 rctx->tot_len = sizeof(*rd) + sizeof(ch->tpdu.hdr);
Harald Welte0ef96d52016-02-25 00:09:17 +0100607 rctx->idx = sizeof(ch->tpdu.hdr);
Harald Welte9d3e3822015-11-09 00:50:54 +0100608
609 /* copy TPDU header to data field */
610 memcpy(rd->data, ch->tpdu.hdr, sizeof(ch->tpdu.hdr));
Harald Welteb5288e82015-11-14 21:15:52 +0100611 /* rd->data_len is set in flush_rx_buffer() */
Harald Welte9d3e3822015-11-09 00:50:54 +0100612
Harald Welteb5288e82015-11-14 21:15:52 +0100613 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100614}
615
616static enum iso7816_3_card_state
617process_byte_tpdu(struct card_handle *ch, uint8_t byte)
618{
619 switch (ch->tpdu.state) {
620 case TPDU_S_WAIT_CLA:
621 ch->tpdu.hdr[_CLA] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100622 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100623 break;
624 case TPDU_S_WAIT_INS:
625 ch->tpdu.hdr[_INS] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100626 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100627 break;
628 case TPDU_S_WAIT_P1:
629 ch->tpdu.hdr[_P1] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100630 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100631 break;
632 case TPDU_S_WAIT_P2:
633 ch->tpdu.hdr[_P2] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100634 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100635 break;
636 case TPDU_S_WAIT_P3:
637 ch->tpdu.hdr[_P3] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100638 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100639 /* FIXME: start timer to transmit further 0x60 */
640 /* send the TPDU header as part of a procedure byte
641 * request to the USB host */
642 send_tpdu_header(ch);
643 break;
644 case TPDU_S_WAIT_RX:
Harald Welte61bb30e2015-11-14 23:44:14 +0100645 add_tpdu_byte(ch, byte);
646 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100647 default:
Harald Welte22bf67f2016-02-29 10:18:48 +0100648 TRACE_DEBUG("process_byte_tpdu() in invalid state %u\r\n",
Harald Welte9d3e3822015-11-09 00:50:54 +0100649 ch->tpdu.state);
650 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100651
652 /* ensure we stay in TPDU ISO state */
653 return ISO_S_IN_TPDU;
654}
655
Harald Welte855ba9e2016-02-24 21:00:46 +0100656/* tx a single byte to be transmitted to the reader */
657static int tx_byte_tpdu(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100658{
659 struct req_ctx *rctx;
660 struct cardemu_usb_msg_tx_data *td;
Harald Welte855ba9e2016-02-24 21:00:46 +0100661 uint8_t byte;
Harald Welte9d3e3822015-11-09 00:50:54 +0100662
663 /* ensure we are aware of any data that might be pending for
664 * transmit */
665 if (!ch->uart_tx_ctx) {
Harald Welte54cb3d02016-02-29 14:12:40 +0100666 if (llist_empty(&ch->uart_tx_queue))
Harald Welte9d3e3822015-11-09 00:50:54 +0100667 return 0;
668
Harald Welte54cb3d02016-02-29 14:12:40 +0100669 /* dequeue first at head */
670 ch->uart_tx_ctx = llist_entry(ch->uart_tx_queue.next,
671 struct req_ctx, list);
672 llist_del(&ch->uart_tx_ctx->list);
673 req_ctx_set_state(ch->uart_tx_ctx, RCTX_S_UART_TX_BUSY);
674
Harald Welte9d3e3822015-11-09 00:50:54 +0100675 /* start with index zero */
676 ch->uart_tx_ctx->idx = 0;
677
678 }
679 rctx = ch->uart_tx_ctx;
680 td = (struct cardemu_usb_msg_tx_data *) rctx->data;
681
Harald Welte9d3e3822015-11-09 00:50:54 +0100682 /* take the next pending byte out of the rctx */
Harald Welte855ba9e2016-02-24 21:00:46 +0100683 byte = td->data[rctx->idx++];
684
685 card_emu_uart_tx(ch->uart_chan, byte);
Harald Welte9d3e3822015-11-09 00:50:54 +0100686
Harald Weltef16b6182016-02-24 22:18:46 +0100687 /* this must happen _after_ the byte has been transmittd */
688 switch (ch->tpdu.state) {
689 case TPDU_S_WAIT_PB:
690 /* if we just transmitted the procedure byte, we need to decide
691 * if we want to continue to receive or transmit */
692 if (td->flags & CEMU_DATA_F_PB_AND_TX)
693 set_tpdu_state(ch, TPDU_S_WAIT_TX);
694 else if (td->flags & CEMU_DATA_F_PB_AND_RX)
695 set_tpdu_state(ch, TPDU_S_WAIT_RX);
696 break;
Harald Weltead434402016-03-02 11:18:29 +0100697 default:
698 break;
Harald Weltef16b6182016-02-24 22:18:46 +0100699 }
700
Harald Welte9d3e3822015-11-09 00:50:54 +0100701 /* check if the buffer has now been fully transmitted */
702 if ((rctx->idx >= td->hdr.data_len) ||
Harald Weltef16b6182016-02-24 22:18:46 +0100703 (td->data + rctx->idx >= rctx->data + rctx->tot_len)) {
Harald Welte52922ff2015-11-14 20:59:56 +0100704 if (td->flags & CEMU_DATA_F_PB_AND_RX) {
705 /* we have just sent the procedure byte and now
706 * need to continue receiving */
707 set_tpdu_state(ch, TPDU_S_WAIT_RX);
Harald Welte2935b3c2015-11-14 20:00:14 +0100708 } else {
Harald Welte52922ff2015-11-14 20:59:56 +0100709 /* we have transmitted all bytes */
710 if (td->flags & CEMU_DATA_F_FINAL) {
711 /* this was the final part of the APDU, go
712 * back to state one*/
713 card_set_state(ch, ISO_S_WAIT_TPDU);
714 } else {
715 /* FIXME: call into USB code to chec if we need
716 * to submit a free buffer to accept
717 * further data on bulk out endpoint */
718 }
Harald Welte2935b3c2015-11-14 20:00:14 +0100719 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100720 req_ctx_set_state(rctx, RCTX_S_FREE);
721 ch->uart_tx_ctx = NULL;
Harald Welte9d3e3822015-11-09 00:50:54 +0100722 }
723
724 return 1;
725}
726
727/**********************************************************************
728 * Public API
729 **********************************************************************/
730
731/* process a single byte received from the reader */
732void card_emu_process_rx_byte(struct card_handle *ch, uint8_t byte)
733{
734 int new_state = -1;
735
736 ch->stats.rx_bytes++;
737
738 switch (ch->state) {
739 case ISO_S_WAIT_POWER:
740 case ISO_S_WAIT_CLK:
741 case ISO_S_WAIT_RST:
742 case ISO_S_WAIT_ATR:
Harald Welte22bf67f2016-02-29 10:18:48 +0100743 TRACE_DEBUG("Received UART char in 7816 state %u\r\n",
Harald Welte4d804672015-11-14 23:02:38 +0100744 ch->state);
Harald Welte9d3e3822015-11-09 00:50:54 +0100745 /* we shouldn't receive any data from the reader yet! */
746 break;
747 case ISO_S_WAIT_TPDU:
748 if (byte == 0xff) {
749 new_state = process_byte_pts(ch, byte);
750 ch->stats.pps++;
751 goto out_silent;
752 }
753 /* fall-through */
754 case ISO_S_IN_TPDU:
755 new_state = process_byte_tpdu(ch, byte);
756 break;
757 case ISO_S_IN_PTS:
758 new_state = process_byte_pts(ch, byte);
759 goto out_silent;
760 }
761
762out_silent:
763 if (new_state != -1)
764 card_set_state(ch, new_state);
765}
766
Harald Welte855ba9e2016-02-24 21:00:46 +0100767/* transmit a single byte to the reader */
768int card_emu_tx_byte(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100769{
770 int rc = 0;
771
772 switch (ch->state) {
773 case ISO_S_IN_ATR:
774 if (ch->atr.idx < ch->atr.len) {
Harald Welte855ba9e2016-02-24 21:00:46 +0100775 uint8_t byte;
776 byte = ch->atr.atr[ch->atr.idx++];
Harald Welte9d3e3822015-11-09 00:50:54 +0100777 rc = 1;
Harald Welte855ba9e2016-02-24 21:00:46 +0100778
779 card_emu_uart_tx(ch->uart_chan, byte);
780
Harald Welte9d3e3822015-11-09 00:50:54 +0100781 /* detect end of ATR */
782 if (ch->atr.idx >= ch->atr.len)
783 card_set_state(ch, ISO_S_WAIT_TPDU);
784 }
785 break;
786 case ISO_S_IN_PTS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100787 rc = tx_byte_pts(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100788 break;
789 case ISO_S_IN_TPDU:
Harald Welte855ba9e2016-02-24 21:00:46 +0100790 rc = tx_byte_tpdu(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100791 break;
Harald Weltead434402016-03-02 11:18:29 +0100792 default:
793 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100794 }
795
796 if (rc)
797 ch->stats.tx_bytes++;
798
Harald Welte4d804672015-11-14 23:02:38 +0100799 /* if we return 0 here, the UART needs to disable transmit-ready
800 * interrupts */
Harald Welte9d3e3822015-11-09 00:50:54 +0100801 return rc;
802}
803
Harald Welteacae4122016-03-02 10:27:58 +0100804void card_emu_have_new_uart_tx(struct card_handle *ch)
805{
806 switch (ch->state) {
807 case ISO_S_IN_TPDU:
808 switch (ch->tpdu.state) {
809 case TPDU_S_WAIT_TX:
810 case TPDU_S_WAIT_PB:
811 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
812 break;
813 default:
814 break;
815 }
816 default:
817 break;
818 }
819}
820
Harald Welte9d3e3822015-11-09 00:50:54 +0100821/* hardware driver informs us that a card I/O signal has changed */
822void card_emu_io_statechg(struct card_handle *ch, enum card_io io, int active)
823{
824 switch (io) {
825 case CARD_IO_VCC:
Harald Welte47ee2832016-02-29 10:09:46 +0100826 if (active == 0 && ch->vcc_active == 1) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100827 TRACE_DEBUG("VCC deactivated\r\n");
Harald Welte22cdf2a2016-02-24 22:18:11 +0100828 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100829 card_set_state(ch, ISO_S_WAIT_POWER);
Harald Welte47ee2832016-02-29 10:09:46 +0100830 } else if (active == 1 && ch->vcc_active == 0) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100831 TRACE_DEBUG("VCC activated\r\n");
Harald Welte9d3e3822015-11-09 00:50:54 +0100832 card_set_state(ch, ISO_S_WAIT_CLK);
Harald Welte47ee2832016-02-29 10:09:46 +0100833 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100834 ch->vcc_active = active;
835 break;
836 case CARD_IO_CLK:
Harald Welte47ee2832016-02-29 10:09:46 +0100837 if (active == 1 && ch->clocked == 0) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100838 TRACE_DEBUG("CLK activated\r\n");
Harald Welte47ee2832016-02-29 10:09:46 +0100839 if (ch->state == ISO_S_WAIT_CLK)
840 card_set_state(ch, ISO_S_WAIT_RST);
841 } else if (active == 0 && ch->clocked == 1) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100842 TRACE_DEBUG("CLK deactivated\r\n");
Harald Welte47ee2832016-02-29 10:09:46 +0100843 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100844 ch->clocked = active;
845 break;
846 case CARD_IO_RST:
Harald Welte47ee2832016-02-29 10:09:46 +0100847 if (active == 0 && ch->in_reset) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100848 TRACE_DEBUG("RST released\r\n");
Harald Welte47ee2832016-02-29 10:09:46 +0100849 if (ch->vcc_active && ch->clocked) {
850 /* enable the TC/ETU counter once reset has been released */
851 tc_etu_enable(ch->tc_chan);
852 card_set_state(ch, ISO_S_WAIT_ATR);
853 /* FIXME: wait 400 to 40k clock cycles before sending ATR */
854 card_set_state(ch, ISO_S_IN_ATR);
855 }
856 } else if (active && !ch->in_reset) {
Harald Welte22bf67f2016-02-29 10:18:48 +0100857 TRACE_DEBUG("RST asserted\r\n");
Harald Welte22cdf2a2016-02-24 22:18:11 +0100858 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100859 }
860 ch->in_reset = active;
861 break;
862 }
863}
864
865/* User sets a new ATR to be returned during next card reset */
866int card_emu_set_atr(struct card_handle *ch, const uint8_t *atr, uint8_t len)
867{
868 if (len > sizeof(ch->atr.atr))
869 return -1;
870
871 memcpy(ch->atr.atr, atr, len);
872 ch->atr.len = len;
873 ch->atr.idx = 0;
874
875 /* FIXME: race condition with trasmitting ATR to reader? */
876
877 return 0;
878}
879
880/* hardware driver informs us that one (more) ETU has expired */
881void tc_etu_wtime_half_expired(void *handle)
882{
883 struct card_handle *ch = handle;
884 /* transmit NULL procedure byte well before waiting time expires */
Harald Weltedda73552016-03-02 10:29:55 +0100885 switch (ch->state) {
886 case ISO_S_IN_TPDU:
887 switch (ch->tpdu.state) {
888 case TPDU_S_WAIT_PB:
889 case TPDU_S_WAIT_TX:
890 putchar('N');
891 card_emu_uart_tx(ch->uart_chan, ISO7816_3_PB_NULL);
892 break;
893 default:
894 break;
895 }
896 break;
897 default:
898 break;
899 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100900}
901
902/* hardware driver informs us that one (more) ETU has expired */
903void tc_etu_wtime_expired(void *handle)
904{
905}
906
907/* shortest ATR found in smartcard_list.txt */
908static const uint8_t default_atr[] = { 0x3B, 0x02, 0x14, 0x50 };
909
910static struct card_handle card_handles[NUM_SLOTS];
911
912struct card_handle *card_emu_init(uint8_t slot_num, uint8_t tc_chan, uint8_t uart_chan)
913{
914 struct card_handle *ch;
915
916 if (slot_num >= ARRAY_SIZE(card_handles))
917 return NULL;
918
919 ch = &card_handles[slot_num];
920
921 memset(ch, 0, sizeof(*ch));
922
Harald Welte54cb3d02016-02-29 14:12:40 +0100923 INIT_LLIST_HEAD(&ch->usb_tx_queue);
924 INIT_LLIST_HEAD(&ch->uart_tx_queue);
925
Harald Welte9d3e3822015-11-09 00:50:54 +0100926 /* initialize the card_handle with reasonabe defaults */
927 ch->state = ISO_S_WAIT_POWER;
928 ch->vcc_active = 0;
929 ch->in_reset = 1;
930 ch->clocked = 0;
931
932 ch->fi = 0;
933 ch->di = 1;
934 ch->wi = ISO7816_3_DEFAULT_WI;
935
936 ch->tc_chan = tc_chan;
937 ch->uart_chan = uart_chan;
938 ch->waiting_time = ISO7816_3_INIT_WTIME;
939
940 ch->atr.idx = 0;
941 ch->atr.len = sizeof(default_atr);
942 memcpy(ch->atr.atr, default_atr, ch->atr.len);
943
944 ch->pts.state = PTS_S_WAIT_REQ_PTSS;
945 ch->tpdu.state = TPDU_S_WAIT_CLA;
946
947 tc_etu_init(ch->tc_chan, ch);
948
949 return ch;
950}