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Harald Welte9d3e3822015-11-09 00:50:54 +01001/* ISO7816-3 state machine for the card side */
2/* (C) 2010-2015 by Harald Welte <hwelte@hmw-consulting.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19
Harald Welte4c473da2015-11-14 13:31:11 +010020#include <assert.h>
Harald Welte9d3e3822015-11-09 00:50:54 +010021#include <errno.h>
22#include <string.h>
23#include <stdint.h>
24#include <sys/types.h>
25
26#include "utils.h"
27#include "trace.h"
28#include "iso7816_fidi.h"
29#include "tc_etu.h"
30#include "card_emu.h"
31#include "req_ctx.h"
32#include "cardemu_prot.h"
33
34
35#define NUM_SLOTS 2
36
37#define ISO7816_3_INIT_WTIME 9600
38#define ISO7816_3_DEFAULT_WI 10
39#define ISO7816_3_ATR_LEN_MAX (1+32) /* TS plus 32 chars */
40
41#define ISO7816_3_PB_NULL 0x60
42
43enum iso7816_3_card_state {
44 ISO_S_WAIT_POWER, /* waiting for power being applied */
45 ISO_S_WAIT_CLK, /* waiting for clock being applied */
46 ISO_S_WAIT_RST, /* waiting for reset being released */
47 ISO_S_WAIT_ATR, /* waiting for start of ATR */
48 ISO_S_IN_ATR, /* transmitting ATR to reader */
49 ISO_S_IN_PTS, /* transmitting ATR to reader */
50 ISO_S_WAIT_TPDU, /* waiting for data from reader */
51 ISO_S_IN_TPDU, /* inside a TPDU */
52};
53
54/* detailed sub-states of ISO_S_IN_PTS */
55enum pts_state {
56 PTS_S_WAIT_REQ_PTSS,
57 PTS_S_WAIT_REQ_PTS0,
58 PTS_S_WAIT_REQ_PTS1,
59 PTS_S_WAIT_REQ_PTS2,
60 PTS_S_WAIT_REQ_PTS3,
61 PTS_S_WAIT_REQ_PCK,
62 PTS_S_WAIT_RESP_PTSS = PTS_S_WAIT_REQ_PTSS | 0x10,
63 PTS_S_WAIT_RESP_PTS0 = PTS_S_WAIT_REQ_PTS0 | 0x10,
64 PTS_S_WAIT_RESP_PTS1 = PTS_S_WAIT_REQ_PTS1 | 0x10,
65 PTS_S_WAIT_RESP_PTS2 = PTS_S_WAIT_REQ_PTS2 | 0x10,
66 PTS_S_WAIT_RESP_PTS3 = PTS_S_WAIT_REQ_PTS3 | 0x10,
67 PTS_S_WAIT_RESP_PCK = PTS_S_WAIT_REQ_PCK | 0x10,
68};
69
70#define _PTSS 0
71#define _PTS0 1
72#define _PTS1 2
73#define _PTS2 3
74#define _PTS3 4
75#define _PCK 5
76
Harald Welte16cf4082015-11-11 19:02:48 +010077/* T-PDU state machine states */
Harald Welte9d3e3822015-11-09 00:50:54 +010078enum tpdu_state {
Harald Welte16cf4082015-11-11 19:02:48 +010079 TPDU_S_WAIT_CLA, /* waiting for CLA byte from reader */
80 TPDU_S_WAIT_INS, /* waiting for INS byte from reader */
81 TPDU_S_WAIT_P1, /* waiting for P1 byte from reader */
82 TPDU_S_WAIT_P2, /* waiting for P2 byte from reader */
83 TPDU_S_WAIT_P3, /* waiting for P3 byte from reader */
Harald Welte9d3e3822015-11-09 00:50:54 +010084 TPDU_S_WAIT_PB, /* waiting for Tx of procedure byte */
85 TPDU_S_WAIT_RX, /* waiitng for more data from reader */
86 TPDU_S_WAIT_TX, /* waiting for more data to reader */
87};
88
89#define _CLA 0
90#define _INS 1
91#define _P1 2
92#define _P2 3
93#define _P3 4
94
95struct card_handle {
96 enum iso7816_3_card_state state;
97
98 /* signal levels */
99 uint8_t vcc_active; /* 1 = on, 0 = off */
100 uint8_t in_reset; /* 1 = RST low, 0 = RST high */
101 uint8_t clocked; /* 1 = active, 0 = inactive */
102
Harald Welte16cf4082015-11-11 19:02:48 +0100103 /* timing parameters, from PTS */
Harald Welte9d3e3822015-11-09 00:50:54 +0100104 uint8_t fi;
105 uint8_t di;
106 uint8_t wi;
107
108 uint8_t tc_chan; /* TC channel number */
109 uint8_t uart_chan; /* UART channel */
110
111 uint32_t waiting_time; /* in clocks */
112
113 /* ATR state machine */
114 struct {
115 uint8_t idx;
116 uint8_t len;
117 //uint8_t hist_len;
118 //uint8_t last_td;
119 uint8_t atr[ISO7816_3_ATR_LEN_MAX];
120 } atr;
121
122 /* PPS / PTS support */
123 struct {
124 enum pts_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100125 uint8_t req[6]; /* request bytes */
126 uint8_t resp[6]; /* response bytes */
Harald Welte9d3e3822015-11-09 00:50:54 +0100127 } pts;
128
129 /* TPDU */
130 struct {
131 enum tpdu_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100132 uint8_t hdr[5]; /* CLA INS P1 P2 P3 */
Harald Welte9d3e3822015-11-09 00:50:54 +0100133 } tpdu;
134
Harald Welte16cf4082015-11-11 19:02:48 +0100135 struct req_ctx *uart_rx_ctx; /* UART RX -> USB TX */
136 struct req_ctx *uart_tx_ctx; /* USB RX -> UART TX */
Harald Welte9d3e3822015-11-09 00:50:54 +0100137
138 struct {
139 uint32_t tx_bytes;
140 uint32_t rx_bytes;
141 uint32_t pps;
142 } stats;
143};
144
Harald Welte2935b3c2015-11-14 20:00:14 +0100145static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts);
Harald Weltee7194ab2015-11-14 21:03:25 +0100146static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss);
Harald Welte2935b3c2015-11-14 20:00:14 +0100147
Harald Welteb5288e82015-11-14 21:15:52 +0100148static void flush_rx_buffer(struct card_handle *ch)
149{
150 struct req_ctx *rctx;
151 struct cardemu_usb_msg_rx_data *rd;
152
153 rctx = ch->uart_rx_ctx;
154 if (!rctx)
155 return;
156
157 rd = (struct cardemu_usb_msg_rx_data *) ch->uart_rx_ctx->data;
158
159 /* store length of data payload fild in header */
160 rd->hdr.data_len = rctx->idx;
161 req_ctx_set_state(rctx, RCTX_S_USB_TX_PENDING);
162 ch->uart_rx_ctx = NULL;
163
164 /* FIXME: call into USB code to see if this buffer can
165 * be transmitted now */
166}
167
Harald Welte612d65a2015-11-14 13:30:43 +0100168static void update_fidi(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100169{
170 int rc;
171
172 rc = compute_fidi_ratio(ch->fi, ch->di);
173 if (rc > 0 && rc < 0x400) {
174 TRACE_DEBUG("computed Fi(%u) Di(%u) ratio: %d\n",
175 ch->fi, ch->di, rc);
176 /* make sure UART uses new F/D ratio */
177 card_emu_uart_update_fidi(ch->uart_chan, rc);
178 /* notify ETU timer about this */
179 tc_etu_set_etu(ch->tc_chan, rc);
180 } else
181 TRACE_DEBUG("computed FiDi ration %d unsupported\n", rc);
182}
183
184/* Update the ISO 7816-3 TPDU receiver state */
185static void card_set_state(struct card_handle *ch,
186 enum iso7816_3_card_state new_state)
187{
188 switch (new_state) {
189 case ISO_S_WAIT_POWER:
190 case ISO_S_WAIT_CLK:
191 case ISO_S_WAIT_RST:
192 /* disable Rx and Tx of UART */
193 card_emu_uart_enable(ch->uart_chan, 0);
194 break;
195 case ISO_S_WAIT_ATR:
Harald Weltee7194ab2015-11-14 21:03:25 +0100196 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
Harald Welte9d3e3822015-11-09 00:50:54 +0100197 /* Reset to initial Fi / Di ratio */
198 ch->fi = 1;
199 ch->di = 1;
200 update_fidi(ch);
201 /* initialize todefault WI, this will be overwritten if we
202 * receive TC2, and it will be programmed into hardware after
203 * ATR is finished */
204 ch->wi = ISO7816_3_DEFAULT_WI;
205 /* update waiting time to initial waiting time */
206 ch->waiting_time = ISO7816_3_INIT_WTIME;
207 tc_etu_set_wtime(ch->tc_chan, ch->waiting_time);
208 /* Set ATR sub-state to initial state */
209 ch->atr.idx = 0;
210 //set_atr_state(ch, ATR_S_WAIT_TS);
211 /* Notice that we are just coming out of reset */
212 //ch->sh.flags |= SIMTRACE_FLAG_ATR;
213 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
214 break;
215 break;
216 case ISO_S_WAIT_TPDU:
217 /* enable the receiver, disable transmitter */
Harald Welte2935b3c2015-11-14 20:00:14 +0100218 set_tpdu_state(ch, TPDU_S_WAIT_CLA);
Harald Welte9d3e3822015-11-09 00:50:54 +0100219 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
220 break;
221 case ISO_S_IN_ATR:
222 case ISO_S_IN_PTS:
223 case ISO_S_IN_TPDU:
224 /* do nothing */
225 break;
226 }
227
228 if (ch->state == new_state)
229 return;
230
231 TRACE_DEBUG("7816 card state %u -> %u\n", ch->state, new_state);
232 ch->state = new_state;
233}
234
235
236/**********************************************************************
237 * PTS / PPS handling
238 **********************************************************************/
239
240/* Update the ATR sub-state */
241static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss)
242{
243 TRACE_DEBUG("7816 PTS state %u -> %u\n", ch->pts.state, new_ptss);
244 ch->pts.state = new_ptss;
245}
246
247/* Determine the next PTS state */
248static enum pts_state next_pts_state(struct card_handle *ch)
249{
250 uint8_t is_resp = ch->pts.state & 0x10;
251 uint8_t sstate = ch->pts.state & 0x0f;
252 uint8_t *pts_ptr;
253
254 if (!is_resp)
255 pts_ptr = ch->pts.req;
256 else
257 pts_ptr = ch->pts.resp;
258
259 switch (sstate) {
260 case PTS_S_WAIT_REQ_PTSS:
261 goto from_ptss;
262 case PTS_S_WAIT_REQ_PTS0:
263 goto from_pts0;
264 case PTS_S_WAIT_REQ_PTS1:
265 goto from_pts1;
266 case PTS_S_WAIT_REQ_PTS2:
267 goto from_pts2;
268 case PTS_S_WAIT_REQ_PTS3:
269 goto from_pts3;
270 }
271
272 if (ch->pts.state == PTS_S_WAIT_REQ_PCK)
273 return PTS_S_WAIT_RESP_PTSS;
274
275from_ptss:
276 return PTS_S_WAIT_REQ_PTS0 | is_resp;
277from_pts0:
278 if (pts_ptr[_PTS0] & (1 << 4))
279 return PTS_S_WAIT_REQ_PTS1 | is_resp;
280from_pts1:
281 if (pts_ptr[_PTS0] & (1 << 5))
282 return PTS_S_WAIT_REQ_PTS2 | is_resp;
283from_pts2:
284 if (pts_ptr[_PTS0] & (1 << 6))
285 return PTS_S_WAIT_REQ_PTS3 | is_resp;
286from_pts3:
287 return PTS_S_WAIT_REQ_PCK | is_resp;
288}
289
290
291static enum iso7816_3_card_state
292process_byte_pts(struct card_handle *ch, uint8_t byte)
293{
294 switch (ch->pts.state) {
295 case PTS_S_WAIT_REQ_PTSS:
296 ch->pts.req[_PTSS] = byte;
297 break;
298 case PTS_S_WAIT_REQ_PTS0:
299 ch->pts.req[_PTS0] = byte;
300 break;
301 case PTS_S_WAIT_REQ_PTS1:
302 ch->pts.req[_PTS1] = byte;
303 break;
304 case PTS_S_WAIT_REQ_PTS2:
305 ch->pts.req[_PTS2] = byte;
306 break;
307 case PTS_S_WAIT_REQ_PTS3:
308 ch->pts.req[_PTS3] = byte;
309 break;
310 case PTS_S_WAIT_REQ_PCK:
311 ch->pts.req[_PCK] = byte;
312 /* FIXME: check PCK */
313 memcpy(ch->pts.resp, ch->pts.req, sizeof(ch->pts.resp));
314 break;
Harald Welte4c473da2015-11-14 13:31:11 +0100315 default:
316 TRACE_DEBUG("process_byte_pts() in invalid state %u\n",
317 ch->pts.state);
318 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100319 }
320 /* calculate the next state and set it */
321 set_pts_state(ch, next_pts_state(ch));
322
323 return ISO_S_IN_PTS;
324}
325
326/* return a single byte to be transmitted to the reader */
Harald Welte855ba9e2016-02-24 21:00:46 +0100327static int tx_byte_pts(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100328{
Harald Welte855ba9e2016-02-24 21:00:46 +0100329 uint8_t byte;
330
331 /* 1: Determine the next transmit byte */
Harald Welte9d3e3822015-11-09 00:50:54 +0100332 switch (ch->pts.state) {
333 case PTS_S_WAIT_RESP_PTSS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100334 byte = ch->pts.resp[_PTSS];
Harald Welte9d3e3822015-11-09 00:50:54 +0100335 break;
336 case PTS_S_WAIT_RESP_PTS0:
Harald Welte855ba9e2016-02-24 21:00:46 +0100337 byte = ch->pts.resp[_PTS0];
Harald Welte9d3e3822015-11-09 00:50:54 +0100338 break;
339 case PTS_S_WAIT_RESP_PTS1:
Harald Welte855ba9e2016-02-24 21:00:46 +0100340 byte = ch->pts.resp[_PTS1];
Harald Welte9d3e3822015-11-09 00:50:54 +0100341 /* This must be TA1 */
Harald Welte855ba9e2016-02-24 21:00:46 +0100342 ch->fi = byte >> 4;
343 ch->di = byte & 0xf;
Harald Welte9d3e3822015-11-09 00:50:54 +0100344 TRACE_DEBUG("found Fi=%u Di=%u\n", ch->fi, ch->di);
Harald Welte9d3e3822015-11-09 00:50:54 +0100345 break;
346 case PTS_S_WAIT_RESP_PTS2:
Harald Welte855ba9e2016-02-24 21:00:46 +0100347 byte = ch->pts.resp[_PTS2];
Harald Welte9d3e3822015-11-09 00:50:54 +0100348 break;
349 case PTS_S_WAIT_RESP_PTS3:
Harald Welte855ba9e2016-02-24 21:00:46 +0100350 byte = ch->pts.resp[_PTS3];
Harald Welte9d3e3822015-11-09 00:50:54 +0100351 break;
352 case PTS_S_WAIT_RESP_PCK:
Harald Welte855ba9e2016-02-24 21:00:46 +0100353 byte = ch->pts.resp[_PCK];
Harald Welte9d3e3822015-11-09 00:50:54 +0100354 /* update baud rate generator with Fi/Di */
355 update_fidi(ch);
Harald Welte855ba9e2016-02-24 21:00:46 +0100356 break;
Harald Welted79dc4f2015-11-14 13:32:21 +0100357 default:
358 TRACE_DEBUG("get_byte_pts() in invalid state %u\n",
359 ch->pts.state);
Harald Welte855ba9e2016-02-24 21:00:46 +0100360 return 0;
361 }
362
363 /* 2: Transmit the byte */
364 card_emu_uart_tx(ch->uart_chan, byte);
365
366 /* 3: Update the state */
367
368 switch (ch->pts.state) {
369 case PTS_S_WAIT_RESP_PCK:
370 /* Wait for the next TPDU */
371 card_set_state(ch, ISO_S_WAIT_TPDU);
372 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
373 break;
374 default:
375 /* calculate the next state and set it */
376 set_pts_state(ch, next_pts_state(ch));
Harald Welted79dc4f2015-11-14 13:32:21 +0100377 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100378 }
Harald Welted79dc4f2015-11-14 13:32:21 +0100379
Harald Welte855ba9e2016-02-24 21:00:46 +0100380 /* return number of bytes transmitted */
381 return 1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100382}
383
384
385/**********************************************************************
386 * TPDU handling
387 **********************************************************************/
388
Harald Welte4d804672015-11-14 23:02:38 +0100389
390/* compute number of data bytes according to Chapter 10.3.2 of 7816-3 */
391static unsigned int t0_num_data_bytes(uint8_t p3, int reader_to_card)
392{
393 if (reader_to_card) {
394 return p3;
395 } else {
396 if (p3 == 0)
397 return 256;
398 else
399 return p3;
400 }
401}
402
Harald Welte9d3e3822015-11-09 00:50:54 +0100403/* add a just-received TPDU byte (from reader) to USB buffer */
Harald Welte61bb30e2015-11-14 23:44:14 +0100404static void add_tpdu_byte(struct card_handle *ch, uint8_t byte)
Harald Welte9d3e3822015-11-09 00:50:54 +0100405{
406 struct req_ctx *rctx;
407 struct cardemu_usb_msg_rx_data *rd;
Harald Welte4d804672015-11-14 23:02:38 +0100408 unsigned int num_data_bytes = t0_num_data_bytes(ch->tpdu.hdr[_P3], 0);
Harald Welte9d3e3822015-11-09 00:50:54 +0100409
410 /* ensure we have a buffer */
411 if (!ch->uart_rx_ctx) {
Harald Welte4d804672015-11-14 23:02:38 +0100412 rctx = ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
413 if (!ch->uart_rx_ctx) {
414 TRACE_DEBUG("Received UART byte but unable to allocate Rx Buf\n");
Harald Welte9d3e3822015-11-09 00:50:54 +0100415 return;
Harald Welte4d804672015-11-14 23:02:38 +0100416 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100417 rd = (struct cardemu_usb_msg_rx_data *) ch->uart_rx_ctx->data;
418 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
419 rctx->tot_len = sizeof(*rd);
420 rctx->idx = 0;
421 } else
422 rctx = ch->uart_rx_ctx;
423
424 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
425
426 rd->data[rctx->idx++] = byte;
427 rctx->tot_len++;
428
429 /* check if the buffer is full. If so, send it */
Harald Welte4d804672015-11-14 23:02:38 +0100430 if (rctx->tot_len >= sizeof(*rd) + num_data_bytes) {
431 rd->flags |= CEMU_DATA_F_FINAL;
Harald Welteb5288e82015-11-14 21:15:52 +0100432 flush_rx_buffer(ch);
Harald Welte61bb30e2015-11-14 23:44:14 +0100433 /* We need to transmit the SW now, */
434 set_tpdu_state(ch, TPDU_S_WAIT_TX);
Harald Welte4d804672015-11-14 23:02:38 +0100435 } else if (rctx->tot_len >= rctx->size)
436 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100437}
438
439static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts)
440{
Harald Welte05b41c62015-11-14 20:58:48 +0100441 if (ch->tpdu.state == new_ts)
442 return;
443
Harald Welte9d3e3822015-11-09 00:50:54 +0100444 TRACE_DEBUG("7816 TPDU state %u -> %u\n", ch->tpdu.state, new_ts);
Harald Welte05b41c62015-11-14 20:58:48 +0100445
Harald Welte9d3e3822015-11-09 00:50:54 +0100446 switch (new_ts) {
447 case TPDU_S_WAIT_CLA:
Harald Welte05b41c62015-11-14 20:58:48 +0100448 case TPDU_S_WAIT_RX:
Harald Welte9d3e3822015-11-09 00:50:54 +0100449 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
450 break;
451 case TPDU_S_WAIT_PB:
452 /* we just completed the TPDU header from reader to card
453 * and now need to disable the receiver, enable the
454 * transmitter and transmit the procedure byte */
455 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
456 break;
457 }
Harald Welte05b41c62015-11-14 20:58:48 +0100458
Harald Welte9d3e3822015-11-09 00:50:54 +0100459 ch->tpdu.state = new_ts;
460}
461
462static enum tpdu_state next_tpdu_state(struct card_handle *ch)
463{
464 switch (ch->tpdu.state) {
465 case TPDU_S_WAIT_CLA:
466 return TPDU_S_WAIT_INS;
467 case TPDU_S_WAIT_INS:
468 return TPDU_S_WAIT_P1;
469 case TPDU_S_WAIT_P1:
470 return TPDU_S_WAIT_P2;
471 case TPDU_S_WAIT_P2:
472 return TPDU_S_WAIT_P3;
473 case TPDU_S_WAIT_P3:
474 return TPDU_S_WAIT_PB;
475 /* simply stay in Rx or Tx by default */
476 case TPDU_S_WAIT_PB:
477 return TPDU_S_WAIT_PB;
478 case TPDU_S_WAIT_RX:
479 return TPDU_S_WAIT_RX;
480 case TPDU_S_WAIT_TX:
481 return TPDU_S_WAIT_TX;
482 }
Harald Welte4c473da2015-11-14 13:31:11 +0100483 /* we should never reach here */
484 assert(0);
485 return -1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100486}
487
488static void send_tpdu_header(struct card_handle *ch)
489{
490 struct req_ctx *rctx;
491 struct cardemu_usb_msg_rx_data *rd;
492
493 /* if we already/still have a context, send it off */
Harald Welte2935b3c2015-11-14 20:00:14 +0100494 if (ch->uart_rx_ctx && ch->uart_rx_ctx->idx) {
Harald Welteb5288e82015-11-14 21:15:52 +0100495 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100496 }
497
498 /* ensure we have a new buffer */
Harald Welte4d804672015-11-14 23:02:38 +0100499 ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
Harald Welte9d3e3822015-11-09 00:50:54 +0100500 if (!ch->uart_rx_ctx)
501 return;
502 rctx = ch->uart_rx_ctx;
503 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
504
505 /* initializ header */
506 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
507 rd->flags = CEMU_DATA_F_TPDU_HDR;
508 rctx->tot_len = sizeof(*rd) + sizeof(ch->tpdu.hdr);
Harald Welte0ef96d52016-02-25 00:09:17 +0100509 rctx->idx = sizeof(ch->tpdu.hdr);
Harald Welte9d3e3822015-11-09 00:50:54 +0100510
511 /* copy TPDU header to data field */
512 memcpy(rd->data, ch->tpdu.hdr, sizeof(ch->tpdu.hdr));
Harald Welteb5288e82015-11-14 21:15:52 +0100513 /* rd->data_len is set in flush_rx_buffer() */
Harald Welte9d3e3822015-11-09 00:50:54 +0100514
Harald Welteb5288e82015-11-14 21:15:52 +0100515 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100516}
517
518static enum iso7816_3_card_state
519process_byte_tpdu(struct card_handle *ch, uint8_t byte)
520{
521 switch (ch->tpdu.state) {
522 case TPDU_S_WAIT_CLA:
523 ch->tpdu.hdr[_CLA] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100524 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100525 break;
526 case TPDU_S_WAIT_INS:
527 ch->tpdu.hdr[_INS] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100528 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100529 break;
530 case TPDU_S_WAIT_P1:
531 ch->tpdu.hdr[_P1] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100532 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100533 break;
534 case TPDU_S_WAIT_P2:
535 ch->tpdu.hdr[_P2] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100536 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100537 break;
538 case TPDU_S_WAIT_P3:
539 ch->tpdu.hdr[_P3] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100540 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100541 /* FIXME: start timer to transmit further 0x60 */
542 /* send the TPDU header as part of a procedure byte
543 * request to the USB host */
544 send_tpdu_header(ch);
545 break;
546 case TPDU_S_WAIT_RX:
Harald Welte61bb30e2015-11-14 23:44:14 +0100547 add_tpdu_byte(ch, byte);
548 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100549 default:
550 TRACE_DEBUG("process_byte_tpdu() in invalid state %u\n",
551 ch->tpdu.state);
552 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100553
554 /* ensure we stay in TPDU ISO state */
555 return ISO_S_IN_TPDU;
556}
557
Harald Welte855ba9e2016-02-24 21:00:46 +0100558/* tx a single byte to be transmitted to the reader */
559static int tx_byte_tpdu(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100560{
561 struct req_ctx *rctx;
562 struct cardemu_usb_msg_tx_data *td;
Harald Welte855ba9e2016-02-24 21:00:46 +0100563 uint8_t byte;
Harald Welte9d3e3822015-11-09 00:50:54 +0100564
565 /* ensure we are aware of any data that might be pending for
566 * transmit */
567 if (!ch->uart_tx_ctx) {
Harald Welte4d804672015-11-14 23:02:38 +0100568 ch->uart_tx_ctx = req_ctx_find_get(0, RCTX_S_UART_TX_PENDING,
Harald Welte9d3e3822015-11-09 00:50:54 +0100569 RCTX_S_UART_TX_BUSY);
570 if (!ch->uart_tx_ctx)
571 return 0;
572
573 /* start with index zero */
574 ch->uart_tx_ctx->idx = 0;
575
576 }
577 rctx = ch->uart_tx_ctx;
578 td = (struct cardemu_usb_msg_tx_data *) rctx->data;
579
Harald Welte9d3e3822015-11-09 00:50:54 +0100580 /* take the next pending byte out of the rctx */
Harald Welte855ba9e2016-02-24 21:00:46 +0100581 byte = td->data[rctx->idx++];
582
583 card_emu_uart_tx(ch->uart_chan, byte);
Harald Welte9d3e3822015-11-09 00:50:54 +0100584
Harald Weltef16b6182016-02-24 22:18:46 +0100585 /* this must happen _after_ the byte has been transmittd */
586 switch (ch->tpdu.state) {
587 case TPDU_S_WAIT_PB:
588 /* if we just transmitted the procedure byte, we need to decide
589 * if we want to continue to receive or transmit */
590 if (td->flags & CEMU_DATA_F_PB_AND_TX)
591 set_tpdu_state(ch, TPDU_S_WAIT_TX);
592 else if (td->flags & CEMU_DATA_F_PB_AND_RX)
593 set_tpdu_state(ch, TPDU_S_WAIT_RX);
594 break;
595 }
596
Harald Welte9d3e3822015-11-09 00:50:54 +0100597 /* check if the buffer has now been fully transmitted */
598 if ((rctx->idx >= td->hdr.data_len) ||
Harald Weltef16b6182016-02-24 22:18:46 +0100599 (td->data + rctx->idx >= rctx->data + rctx->tot_len)) {
Harald Welte52922ff2015-11-14 20:59:56 +0100600 if (td->flags & CEMU_DATA_F_PB_AND_RX) {
601 /* we have just sent the procedure byte and now
602 * need to continue receiving */
603 set_tpdu_state(ch, TPDU_S_WAIT_RX);
Harald Welte2935b3c2015-11-14 20:00:14 +0100604 } else {
Harald Welte52922ff2015-11-14 20:59:56 +0100605 /* we have transmitted all bytes */
606 if (td->flags & CEMU_DATA_F_FINAL) {
607 /* this was the final part of the APDU, go
608 * back to state one*/
609 card_set_state(ch, ISO_S_WAIT_TPDU);
610 } else {
611 /* FIXME: call into USB code to chec if we need
612 * to submit a free buffer to accept
613 * further data on bulk out endpoint */
614 }
Harald Welte2935b3c2015-11-14 20:00:14 +0100615 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100616 req_ctx_set_state(rctx, RCTX_S_FREE);
617 ch->uart_tx_ctx = NULL;
Harald Welte9d3e3822015-11-09 00:50:54 +0100618 }
619
620 return 1;
621}
622
623/**********************************************************************
624 * Public API
625 **********************************************************************/
626
627/* process a single byte received from the reader */
628void card_emu_process_rx_byte(struct card_handle *ch, uint8_t byte)
629{
630 int new_state = -1;
631
632 ch->stats.rx_bytes++;
633
634 switch (ch->state) {
635 case ISO_S_WAIT_POWER:
636 case ISO_S_WAIT_CLK:
637 case ISO_S_WAIT_RST:
638 case ISO_S_WAIT_ATR:
Harald Welte4d804672015-11-14 23:02:38 +0100639 TRACE_DEBUG("Received UART char in 7816 state %u\n",
640 ch->state);
Harald Welte9d3e3822015-11-09 00:50:54 +0100641 /* we shouldn't receive any data from the reader yet! */
642 break;
643 case ISO_S_WAIT_TPDU:
644 if (byte == 0xff) {
645 new_state = process_byte_pts(ch, byte);
646 ch->stats.pps++;
647 goto out_silent;
648 }
649 /* fall-through */
650 case ISO_S_IN_TPDU:
651 new_state = process_byte_tpdu(ch, byte);
652 break;
653 case ISO_S_IN_PTS:
654 new_state = process_byte_pts(ch, byte);
655 goto out_silent;
656 }
657
658out_silent:
659 if (new_state != -1)
660 card_set_state(ch, new_state);
661}
662
Harald Welte855ba9e2016-02-24 21:00:46 +0100663/* transmit a single byte to the reader */
664int card_emu_tx_byte(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100665{
666 int rc = 0;
667
668 switch (ch->state) {
669 case ISO_S_IN_ATR:
670 if (ch->atr.idx < ch->atr.len) {
Harald Welte855ba9e2016-02-24 21:00:46 +0100671 uint8_t byte;
672 byte = ch->atr.atr[ch->atr.idx++];
Harald Welte9d3e3822015-11-09 00:50:54 +0100673 rc = 1;
Harald Welte855ba9e2016-02-24 21:00:46 +0100674
675 card_emu_uart_tx(ch->uart_chan, byte);
676
Harald Welte9d3e3822015-11-09 00:50:54 +0100677 /* detect end of ATR */
678 if (ch->atr.idx >= ch->atr.len)
679 card_set_state(ch, ISO_S_WAIT_TPDU);
680 }
681 break;
682 case ISO_S_IN_PTS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100683 rc = tx_byte_pts(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100684 break;
685 case ISO_S_IN_TPDU:
Harald Welte855ba9e2016-02-24 21:00:46 +0100686 rc = tx_byte_tpdu(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100687 break;
688 }
689
690 if (rc)
691 ch->stats.tx_bytes++;
692
Harald Welte4d804672015-11-14 23:02:38 +0100693 /* if we return 0 here, the UART needs to disable transmit-ready
694 * interrupts */
Harald Welte9d3e3822015-11-09 00:50:54 +0100695 return rc;
696}
697
698/* hardware driver informs us that a card I/O signal has changed */
699void card_emu_io_statechg(struct card_handle *ch, enum card_io io, int active)
700{
701 switch (io) {
702 case CARD_IO_VCC:
Harald Welte855ba9e2016-02-24 21:00:46 +0100703 if (active == 0) {
Harald Welte22cdf2a2016-02-24 22:18:11 +0100704 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100705 card_set_state(ch, ISO_S_WAIT_POWER);
Harald Welte855ba9e2016-02-24 21:00:46 +0100706 } else if (active == 1 && ch->vcc_active == 0)
Harald Welte9d3e3822015-11-09 00:50:54 +0100707 card_set_state(ch, ISO_S_WAIT_CLK);
708 ch->vcc_active = active;
709 break;
710 case CARD_IO_CLK:
711 if (active == 1 && ch->state == ISO_S_WAIT_CLK)
712 card_set_state(ch, ISO_S_WAIT_RST);
713 ch->clocked = active;
714 break;
715 case CARD_IO_RST:
716 if (active == 0 && ch->in_reset &&
717 ch->vcc_active && ch->clocked) {
Harald Welte855ba9e2016-02-24 21:00:46 +0100718 /* enable the TC/ETU counter once reset has been released */
Harald Welte22cdf2a2016-02-24 22:18:11 +0100719 tc_etu_enable(ch->tc_chan);
Harald Weltee7194ab2015-11-14 21:03:25 +0100720 card_set_state(ch, ISO_S_WAIT_ATR);
Harald Welte855ba9e2016-02-24 21:00:46 +0100721 /* FIXME: wait 400 to 40k clock cycles before sending ATR */
Harald Welte9d3e3822015-11-09 00:50:54 +0100722 card_set_state(ch, ISO_S_IN_ATR);
Harald Welte855ba9e2016-02-24 21:00:46 +0100723 } else if (active) {
Harald Welte22cdf2a2016-02-24 22:18:11 +0100724 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100725 }
726 ch->in_reset = active;
727 break;
728 }
729}
730
731/* User sets a new ATR to be returned during next card reset */
732int card_emu_set_atr(struct card_handle *ch, const uint8_t *atr, uint8_t len)
733{
734 if (len > sizeof(ch->atr.atr))
735 return -1;
736
737 memcpy(ch->atr.atr, atr, len);
738 ch->atr.len = len;
739 ch->atr.idx = 0;
740
741 /* FIXME: race condition with trasmitting ATR to reader? */
742
743 return 0;
744}
745
746/* hardware driver informs us that one (more) ETU has expired */
747void tc_etu_wtime_half_expired(void *handle)
748{
749 struct card_handle *ch = handle;
750 /* transmit NULL procedure byte well before waiting time expires */
751 card_emu_uart_tx(ch->uart_chan, ISO7816_3_PB_NULL);
752}
753
754/* hardware driver informs us that one (more) ETU has expired */
755void tc_etu_wtime_expired(void *handle)
756{
757}
758
759/* shortest ATR found in smartcard_list.txt */
760static const uint8_t default_atr[] = { 0x3B, 0x02, 0x14, 0x50 };
761
762static struct card_handle card_handles[NUM_SLOTS];
763
764struct card_handle *card_emu_init(uint8_t slot_num, uint8_t tc_chan, uint8_t uart_chan)
765{
766 struct card_handle *ch;
767
768 if (slot_num >= ARRAY_SIZE(card_handles))
769 return NULL;
770
771 ch = &card_handles[slot_num];
772
773 memset(ch, 0, sizeof(*ch));
774
775 /* initialize the card_handle with reasonabe defaults */
776 ch->state = ISO_S_WAIT_POWER;
777 ch->vcc_active = 0;
778 ch->in_reset = 1;
779 ch->clocked = 0;
780
781 ch->fi = 0;
782 ch->di = 1;
783 ch->wi = ISO7816_3_DEFAULT_WI;
784
785 ch->tc_chan = tc_chan;
786 ch->uart_chan = uart_chan;
787 ch->waiting_time = ISO7816_3_INIT_WTIME;
788
789 ch->atr.idx = 0;
790 ch->atr.len = sizeof(default_atr);
791 memcpy(ch->atr.atr, default_atr, ch->atr.len);
792
793 ch->pts.state = PTS_S_WAIT_REQ_PTSS;
794 ch->tpdu.state = TPDU_S_WAIT_CLA;
795
796 tc_etu_init(ch->tc_chan, ch);
797
798 return ch;
799}