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Harald Welte9d3e3822015-11-09 00:50:54 +01001/* ISO7816-3 state machine for the card side */
2/* (C) 2010-2015 by Harald Welte <hwelte@hmw-consulting.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19
Harald Welte4c473da2015-11-14 13:31:11 +010020#include <assert.h>
Harald Welte9d3e3822015-11-09 00:50:54 +010021#include <errno.h>
22#include <string.h>
23#include <stdint.h>
24#include <sys/types.h>
25
26#include "utils.h"
27#include "trace.h"
28#include "iso7816_fidi.h"
29#include "tc_etu.h"
30#include "card_emu.h"
31#include "req_ctx.h"
32#include "cardemu_prot.h"
33
34
35#define NUM_SLOTS 2
36
37#define ISO7816_3_INIT_WTIME 9600
38#define ISO7816_3_DEFAULT_WI 10
39#define ISO7816_3_ATR_LEN_MAX (1+32) /* TS plus 32 chars */
40
41#define ISO7816_3_PB_NULL 0x60
42
43enum iso7816_3_card_state {
44 ISO_S_WAIT_POWER, /* waiting for power being applied */
45 ISO_S_WAIT_CLK, /* waiting for clock being applied */
46 ISO_S_WAIT_RST, /* waiting for reset being released */
47 ISO_S_WAIT_ATR, /* waiting for start of ATR */
48 ISO_S_IN_ATR, /* transmitting ATR to reader */
49 ISO_S_IN_PTS, /* transmitting ATR to reader */
50 ISO_S_WAIT_TPDU, /* waiting for data from reader */
51 ISO_S_IN_TPDU, /* inside a TPDU */
52};
53
54/* detailed sub-states of ISO_S_IN_PTS */
55enum pts_state {
56 PTS_S_WAIT_REQ_PTSS,
57 PTS_S_WAIT_REQ_PTS0,
58 PTS_S_WAIT_REQ_PTS1,
59 PTS_S_WAIT_REQ_PTS2,
60 PTS_S_WAIT_REQ_PTS3,
61 PTS_S_WAIT_REQ_PCK,
62 PTS_S_WAIT_RESP_PTSS = PTS_S_WAIT_REQ_PTSS | 0x10,
63 PTS_S_WAIT_RESP_PTS0 = PTS_S_WAIT_REQ_PTS0 | 0x10,
64 PTS_S_WAIT_RESP_PTS1 = PTS_S_WAIT_REQ_PTS1 | 0x10,
65 PTS_S_WAIT_RESP_PTS2 = PTS_S_WAIT_REQ_PTS2 | 0x10,
66 PTS_S_WAIT_RESP_PTS3 = PTS_S_WAIT_REQ_PTS3 | 0x10,
67 PTS_S_WAIT_RESP_PCK = PTS_S_WAIT_REQ_PCK | 0x10,
68};
69
70#define _PTSS 0
71#define _PTS0 1
72#define _PTS1 2
73#define _PTS2 3
74#define _PTS3 4
75#define _PCK 5
76
Harald Welte16cf4082015-11-11 19:02:48 +010077/* T-PDU state machine states */
Harald Welte9d3e3822015-11-09 00:50:54 +010078enum tpdu_state {
Harald Welte16cf4082015-11-11 19:02:48 +010079 TPDU_S_WAIT_CLA, /* waiting for CLA byte from reader */
80 TPDU_S_WAIT_INS, /* waiting for INS byte from reader */
81 TPDU_S_WAIT_P1, /* waiting for P1 byte from reader */
82 TPDU_S_WAIT_P2, /* waiting for P2 byte from reader */
83 TPDU_S_WAIT_P3, /* waiting for P3 byte from reader */
Harald Welte9d3e3822015-11-09 00:50:54 +010084 TPDU_S_WAIT_PB, /* waiting for Tx of procedure byte */
85 TPDU_S_WAIT_RX, /* waiitng for more data from reader */
86 TPDU_S_WAIT_TX, /* waiting for more data to reader */
87};
88
89#define _CLA 0
90#define _INS 1
91#define _P1 2
92#define _P2 3
93#define _P3 4
94
95struct card_handle {
96 enum iso7816_3_card_state state;
97
98 /* signal levels */
99 uint8_t vcc_active; /* 1 = on, 0 = off */
100 uint8_t in_reset; /* 1 = RST low, 0 = RST high */
101 uint8_t clocked; /* 1 = active, 0 = inactive */
102
Harald Welte16cf4082015-11-11 19:02:48 +0100103 /* timing parameters, from PTS */
Harald Welte9d3e3822015-11-09 00:50:54 +0100104 uint8_t fi;
105 uint8_t di;
106 uint8_t wi;
107
108 uint8_t tc_chan; /* TC channel number */
109 uint8_t uart_chan; /* UART channel */
110
111 uint32_t waiting_time; /* in clocks */
112
113 /* ATR state machine */
114 struct {
115 uint8_t idx;
116 uint8_t len;
117 //uint8_t hist_len;
118 //uint8_t last_td;
119 uint8_t atr[ISO7816_3_ATR_LEN_MAX];
120 } atr;
121
122 /* PPS / PTS support */
123 struct {
124 enum pts_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100125 uint8_t req[6]; /* request bytes */
126 uint8_t resp[6]; /* response bytes */
Harald Welte9d3e3822015-11-09 00:50:54 +0100127 } pts;
128
129 /* TPDU */
130 struct {
131 enum tpdu_state state;
Harald Welte16cf4082015-11-11 19:02:48 +0100132 uint8_t hdr[5]; /* CLA INS P1 P2 P3 */
Harald Welte9d3e3822015-11-09 00:50:54 +0100133 } tpdu;
134
Harald Welte16cf4082015-11-11 19:02:48 +0100135 struct req_ctx *uart_rx_ctx; /* UART RX -> USB TX */
136 struct req_ctx *uart_tx_ctx; /* USB RX -> UART TX */
Harald Welte9d3e3822015-11-09 00:50:54 +0100137
138 struct {
139 uint32_t tx_bytes;
140 uint32_t rx_bytes;
141 uint32_t pps;
142 } stats;
143};
144
Harald Welte2935b3c2015-11-14 20:00:14 +0100145static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts);
Harald Weltee7194ab2015-11-14 21:03:25 +0100146static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss);
Harald Welte2935b3c2015-11-14 20:00:14 +0100147
Harald Welteb5288e82015-11-14 21:15:52 +0100148static void flush_rx_buffer(struct card_handle *ch)
149{
150 struct req_ctx *rctx;
151 struct cardemu_usb_msg_rx_data *rd;
152
153 rctx = ch->uart_rx_ctx;
154 if (!rctx)
155 return;
156
157 rd = (struct cardemu_usb_msg_rx_data *) ch->uart_rx_ctx->data;
158
159 /* store length of data payload fild in header */
160 rd->hdr.data_len = rctx->idx;
161 req_ctx_set_state(rctx, RCTX_S_USB_TX_PENDING);
162 ch->uart_rx_ctx = NULL;
163
164 /* FIXME: call into USB code to see if this buffer can
165 * be transmitted now */
166}
167
Harald Welte4ba66d02016-02-25 19:38:56 +0100168/* convert a non-contiguous PTS request/responsei into a contiguous
169 * buffer, returning the number of bytes used in the buffer */
170static int serialize_pts(uint8_t *out, const uint8_t *in)
171{
172 int i = 0;
173
174 out[i++] = in[_PTSS];
175 out[i++] = in[_PTS0];
176 if (in[_PTS0] & (1 << 4))
177 out[i++] = in[_PTS1];
178 if (in[_PTS0] & (1 << 5))
179 out[i++] = in[_PTS2];
180 if (in[_PTS0] & (1 << 6))
181 out[i++] = in[_PTS3];
182 out[i++] = in[_PCK];
183
184 return i;
185}
186
187static void flush_pts(struct card_handle *ch)
188{
189 struct req_ctx *rctx;
190 struct cardemu_usb_msg_pts_info *ptsi;
191
192 rctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
193 if (!rctx)
194 return;
195
196 ptsi = (struct cardemu_usb_msg_pts_info *) rctx->data;
197 ptsi->hdr.msg_type = CEMU_USB_MSGT_DO_PTS;
198 ptsi->hdr.data_len = serialize_pts(ptsi->req, ch->pts.req);
199 serialize_pts(ptsi->resp, ch->pts.resp);
200
201 req_ctx_set_state(rctx, RCTX_S_USB_TX_PENDING);
202
203 /* FIXME: call into USB code to see if this buffer can
204 * be transmitted now */
205}
206
Harald Welte612d65a2015-11-14 13:30:43 +0100207static void update_fidi(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100208{
209 int rc;
210
211 rc = compute_fidi_ratio(ch->fi, ch->di);
212 if (rc > 0 && rc < 0x400) {
213 TRACE_DEBUG("computed Fi(%u) Di(%u) ratio: %d\n",
214 ch->fi, ch->di, rc);
215 /* make sure UART uses new F/D ratio */
216 card_emu_uart_update_fidi(ch->uart_chan, rc);
217 /* notify ETU timer about this */
218 tc_etu_set_etu(ch->tc_chan, rc);
219 } else
220 TRACE_DEBUG("computed FiDi ration %d unsupported\n", rc);
221}
222
223/* Update the ISO 7816-3 TPDU receiver state */
224static void card_set_state(struct card_handle *ch,
225 enum iso7816_3_card_state new_state)
226{
227 switch (new_state) {
228 case ISO_S_WAIT_POWER:
229 case ISO_S_WAIT_CLK:
230 case ISO_S_WAIT_RST:
231 /* disable Rx and Tx of UART */
232 card_emu_uart_enable(ch->uart_chan, 0);
233 break;
234 case ISO_S_WAIT_ATR:
Harald Weltee7194ab2015-11-14 21:03:25 +0100235 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
Harald Welte9d3e3822015-11-09 00:50:54 +0100236 /* Reset to initial Fi / Di ratio */
237 ch->fi = 1;
238 ch->di = 1;
239 update_fidi(ch);
240 /* initialize todefault WI, this will be overwritten if we
241 * receive TC2, and it will be programmed into hardware after
242 * ATR is finished */
243 ch->wi = ISO7816_3_DEFAULT_WI;
244 /* update waiting time to initial waiting time */
245 ch->waiting_time = ISO7816_3_INIT_WTIME;
246 tc_etu_set_wtime(ch->tc_chan, ch->waiting_time);
247 /* Set ATR sub-state to initial state */
248 ch->atr.idx = 0;
249 //set_atr_state(ch, ATR_S_WAIT_TS);
250 /* Notice that we are just coming out of reset */
251 //ch->sh.flags |= SIMTRACE_FLAG_ATR;
252 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
253 break;
254 break;
255 case ISO_S_WAIT_TPDU:
256 /* enable the receiver, disable transmitter */
Harald Welte2935b3c2015-11-14 20:00:14 +0100257 set_tpdu_state(ch, TPDU_S_WAIT_CLA);
Harald Welte9d3e3822015-11-09 00:50:54 +0100258 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
259 break;
260 case ISO_S_IN_ATR:
261 case ISO_S_IN_PTS:
262 case ISO_S_IN_TPDU:
263 /* do nothing */
264 break;
265 }
266
267 if (ch->state == new_state)
268 return;
269
270 TRACE_DEBUG("7816 card state %u -> %u\n", ch->state, new_state);
271 ch->state = new_state;
272}
273
274
275/**********************************************************************
276 * PTS / PPS handling
277 **********************************************************************/
278
279/* Update the ATR sub-state */
280static void set_pts_state(struct card_handle *ch, enum pts_state new_ptss)
281{
282 TRACE_DEBUG("7816 PTS state %u -> %u\n", ch->pts.state, new_ptss);
283 ch->pts.state = new_ptss;
284}
285
286/* Determine the next PTS state */
287static enum pts_state next_pts_state(struct card_handle *ch)
288{
289 uint8_t is_resp = ch->pts.state & 0x10;
290 uint8_t sstate = ch->pts.state & 0x0f;
291 uint8_t *pts_ptr;
292
293 if (!is_resp)
294 pts_ptr = ch->pts.req;
295 else
296 pts_ptr = ch->pts.resp;
297
298 switch (sstate) {
299 case PTS_S_WAIT_REQ_PTSS:
300 goto from_ptss;
301 case PTS_S_WAIT_REQ_PTS0:
302 goto from_pts0;
303 case PTS_S_WAIT_REQ_PTS1:
304 goto from_pts1;
305 case PTS_S_WAIT_REQ_PTS2:
306 goto from_pts2;
307 case PTS_S_WAIT_REQ_PTS3:
308 goto from_pts3;
309 }
310
311 if (ch->pts.state == PTS_S_WAIT_REQ_PCK)
312 return PTS_S_WAIT_RESP_PTSS;
313
314from_ptss:
315 return PTS_S_WAIT_REQ_PTS0 | is_resp;
316from_pts0:
317 if (pts_ptr[_PTS0] & (1 << 4))
318 return PTS_S_WAIT_REQ_PTS1 | is_resp;
319from_pts1:
320 if (pts_ptr[_PTS0] & (1 << 5))
321 return PTS_S_WAIT_REQ_PTS2 | is_resp;
322from_pts2:
323 if (pts_ptr[_PTS0] & (1 << 6))
324 return PTS_S_WAIT_REQ_PTS3 | is_resp;
325from_pts3:
326 return PTS_S_WAIT_REQ_PCK | is_resp;
327}
328
329
330static enum iso7816_3_card_state
331process_byte_pts(struct card_handle *ch, uint8_t byte)
332{
333 switch (ch->pts.state) {
334 case PTS_S_WAIT_REQ_PTSS:
335 ch->pts.req[_PTSS] = byte;
336 break;
337 case PTS_S_WAIT_REQ_PTS0:
338 ch->pts.req[_PTS0] = byte;
339 break;
340 case PTS_S_WAIT_REQ_PTS1:
341 ch->pts.req[_PTS1] = byte;
342 break;
343 case PTS_S_WAIT_REQ_PTS2:
344 ch->pts.req[_PTS2] = byte;
345 break;
346 case PTS_S_WAIT_REQ_PTS3:
347 ch->pts.req[_PTS3] = byte;
348 break;
349 case PTS_S_WAIT_REQ_PCK:
350 ch->pts.req[_PCK] = byte;
351 /* FIXME: check PCK */
Harald Welte4ba66d02016-02-25 19:38:56 +0100352 /* FIXME: check if proposal matches capabilities in ATR */
Harald Welte9d3e3822015-11-09 00:50:54 +0100353 memcpy(ch->pts.resp, ch->pts.req, sizeof(ch->pts.resp));
354 break;
Harald Welte4c473da2015-11-14 13:31:11 +0100355 default:
356 TRACE_DEBUG("process_byte_pts() in invalid state %u\n",
357 ch->pts.state);
358 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100359 }
360 /* calculate the next state and set it */
361 set_pts_state(ch, next_pts_state(ch));
362
Harald Welte4ba66d02016-02-25 19:38:56 +0100363 if (ch->pts.state == PTS_S_WAIT_RESP_PTSS) {
364 flush_pts(ch);
365 /* activate UART TX to transmit PTS response */
366 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
367 }
368
Harald Welte9d3e3822015-11-09 00:50:54 +0100369 return ISO_S_IN_PTS;
370}
371
372/* return a single byte to be transmitted to the reader */
Harald Welte855ba9e2016-02-24 21:00:46 +0100373static int tx_byte_pts(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100374{
Harald Welte855ba9e2016-02-24 21:00:46 +0100375 uint8_t byte;
376
377 /* 1: Determine the next transmit byte */
Harald Welte9d3e3822015-11-09 00:50:54 +0100378 switch (ch->pts.state) {
379 case PTS_S_WAIT_RESP_PTSS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100380 byte = ch->pts.resp[_PTSS];
Harald Welte9d3e3822015-11-09 00:50:54 +0100381 break;
382 case PTS_S_WAIT_RESP_PTS0:
Harald Welte855ba9e2016-02-24 21:00:46 +0100383 byte = ch->pts.resp[_PTS0];
Harald Welte9d3e3822015-11-09 00:50:54 +0100384 break;
385 case PTS_S_WAIT_RESP_PTS1:
Harald Welte855ba9e2016-02-24 21:00:46 +0100386 byte = ch->pts.resp[_PTS1];
Harald Welte9d3e3822015-11-09 00:50:54 +0100387 /* This must be TA1 */
Harald Welte855ba9e2016-02-24 21:00:46 +0100388 ch->fi = byte >> 4;
389 ch->di = byte & 0xf;
Harald Welte9d3e3822015-11-09 00:50:54 +0100390 TRACE_DEBUG("found Fi=%u Di=%u\n", ch->fi, ch->di);
Harald Welte9d3e3822015-11-09 00:50:54 +0100391 break;
392 case PTS_S_WAIT_RESP_PTS2:
Harald Welte855ba9e2016-02-24 21:00:46 +0100393 byte = ch->pts.resp[_PTS2];
Harald Welte9d3e3822015-11-09 00:50:54 +0100394 break;
395 case PTS_S_WAIT_RESP_PTS3:
Harald Welte855ba9e2016-02-24 21:00:46 +0100396 byte = ch->pts.resp[_PTS3];
Harald Welte9d3e3822015-11-09 00:50:54 +0100397 break;
398 case PTS_S_WAIT_RESP_PCK:
Harald Welte855ba9e2016-02-24 21:00:46 +0100399 byte = ch->pts.resp[_PCK];
Harald Welte9d3e3822015-11-09 00:50:54 +0100400 /* update baud rate generator with Fi/Di */
401 update_fidi(ch);
Harald Welte855ba9e2016-02-24 21:00:46 +0100402 break;
Harald Welted79dc4f2015-11-14 13:32:21 +0100403 default:
404 TRACE_DEBUG("get_byte_pts() in invalid state %u\n",
405 ch->pts.state);
Harald Welte855ba9e2016-02-24 21:00:46 +0100406 return 0;
407 }
408
409 /* 2: Transmit the byte */
410 card_emu_uart_tx(ch->uart_chan, byte);
411
412 /* 3: Update the state */
413
414 switch (ch->pts.state) {
415 case PTS_S_WAIT_RESP_PCK:
416 /* Wait for the next TPDU */
417 card_set_state(ch, ISO_S_WAIT_TPDU);
418 set_pts_state(ch, PTS_S_WAIT_REQ_PTSS);
419 break;
420 default:
421 /* calculate the next state and set it */
422 set_pts_state(ch, next_pts_state(ch));
Harald Welted79dc4f2015-11-14 13:32:21 +0100423 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100424 }
Harald Welted79dc4f2015-11-14 13:32:21 +0100425
Harald Welte855ba9e2016-02-24 21:00:46 +0100426 /* return number of bytes transmitted */
427 return 1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100428}
429
430
431/**********************************************************************
432 * TPDU handling
433 **********************************************************************/
434
Harald Welte4d804672015-11-14 23:02:38 +0100435
436/* compute number of data bytes according to Chapter 10.3.2 of 7816-3 */
437static unsigned int t0_num_data_bytes(uint8_t p3, int reader_to_card)
438{
439 if (reader_to_card) {
440 return p3;
441 } else {
442 if (p3 == 0)
443 return 256;
444 else
445 return p3;
446 }
447}
448
Harald Welte9d3e3822015-11-09 00:50:54 +0100449/* add a just-received TPDU byte (from reader) to USB buffer */
Harald Welte61bb30e2015-11-14 23:44:14 +0100450static void add_tpdu_byte(struct card_handle *ch, uint8_t byte)
Harald Welte9d3e3822015-11-09 00:50:54 +0100451{
452 struct req_ctx *rctx;
453 struct cardemu_usb_msg_rx_data *rd;
Harald Welte4d804672015-11-14 23:02:38 +0100454 unsigned int num_data_bytes = t0_num_data_bytes(ch->tpdu.hdr[_P3], 0);
Harald Welte9d3e3822015-11-09 00:50:54 +0100455
456 /* ensure we have a buffer */
457 if (!ch->uart_rx_ctx) {
Harald Welte4d804672015-11-14 23:02:38 +0100458 rctx = ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
459 if (!ch->uart_rx_ctx) {
460 TRACE_DEBUG("Received UART byte but unable to allocate Rx Buf\n");
Harald Welte9d3e3822015-11-09 00:50:54 +0100461 return;
Harald Welte4d804672015-11-14 23:02:38 +0100462 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100463 rd = (struct cardemu_usb_msg_rx_data *) ch->uart_rx_ctx->data;
464 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
465 rctx->tot_len = sizeof(*rd);
466 rctx->idx = 0;
467 } else
468 rctx = ch->uart_rx_ctx;
469
470 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
471
472 rd->data[rctx->idx++] = byte;
473 rctx->tot_len++;
474
475 /* check if the buffer is full. If so, send it */
Harald Welte4d804672015-11-14 23:02:38 +0100476 if (rctx->tot_len >= sizeof(*rd) + num_data_bytes) {
477 rd->flags |= CEMU_DATA_F_FINAL;
Harald Welteb5288e82015-11-14 21:15:52 +0100478 flush_rx_buffer(ch);
Harald Welte61bb30e2015-11-14 23:44:14 +0100479 /* We need to transmit the SW now, */
480 set_tpdu_state(ch, TPDU_S_WAIT_TX);
Harald Welte4d804672015-11-14 23:02:38 +0100481 } else if (rctx->tot_len >= rctx->size)
482 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100483}
484
485static void set_tpdu_state(struct card_handle *ch, enum tpdu_state new_ts)
486{
Harald Welte05b41c62015-11-14 20:58:48 +0100487 if (ch->tpdu.state == new_ts)
488 return;
489
Harald Welte9d3e3822015-11-09 00:50:54 +0100490 TRACE_DEBUG("7816 TPDU state %u -> %u\n", ch->tpdu.state, new_ts);
Harald Welte05b41c62015-11-14 20:58:48 +0100491
Harald Welte9d3e3822015-11-09 00:50:54 +0100492 switch (new_ts) {
493 case TPDU_S_WAIT_CLA:
Harald Welte05b41c62015-11-14 20:58:48 +0100494 case TPDU_S_WAIT_RX:
Harald Welte9d3e3822015-11-09 00:50:54 +0100495 card_emu_uart_enable(ch->uart_chan, ENABLE_RX);
496 break;
497 case TPDU_S_WAIT_PB:
498 /* we just completed the TPDU header from reader to card
499 * and now need to disable the receiver, enable the
500 * transmitter and transmit the procedure byte */
501 card_emu_uart_enable(ch->uart_chan, ENABLE_TX);
502 break;
503 }
Harald Welte05b41c62015-11-14 20:58:48 +0100504
Harald Welte9d3e3822015-11-09 00:50:54 +0100505 ch->tpdu.state = new_ts;
506}
507
508static enum tpdu_state next_tpdu_state(struct card_handle *ch)
509{
510 switch (ch->tpdu.state) {
511 case TPDU_S_WAIT_CLA:
512 return TPDU_S_WAIT_INS;
513 case TPDU_S_WAIT_INS:
514 return TPDU_S_WAIT_P1;
515 case TPDU_S_WAIT_P1:
516 return TPDU_S_WAIT_P2;
517 case TPDU_S_WAIT_P2:
518 return TPDU_S_WAIT_P3;
519 case TPDU_S_WAIT_P3:
520 return TPDU_S_WAIT_PB;
521 /* simply stay in Rx or Tx by default */
522 case TPDU_S_WAIT_PB:
523 return TPDU_S_WAIT_PB;
524 case TPDU_S_WAIT_RX:
525 return TPDU_S_WAIT_RX;
526 case TPDU_S_WAIT_TX:
527 return TPDU_S_WAIT_TX;
528 }
Harald Welte4c473da2015-11-14 13:31:11 +0100529 /* we should never reach here */
530 assert(0);
531 return -1;
Harald Welte9d3e3822015-11-09 00:50:54 +0100532}
533
534static void send_tpdu_header(struct card_handle *ch)
535{
536 struct req_ctx *rctx;
537 struct cardemu_usb_msg_rx_data *rd;
538
539 /* if we already/still have a context, send it off */
Harald Welte2935b3c2015-11-14 20:00:14 +0100540 if (ch->uart_rx_ctx && ch->uart_rx_ctx->idx) {
Harald Welteb5288e82015-11-14 21:15:52 +0100541 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100542 }
543
544 /* ensure we have a new buffer */
Harald Welte4d804672015-11-14 23:02:38 +0100545 ch->uart_rx_ctx = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_UART_RX_BUSY);
Harald Welte9d3e3822015-11-09 00:50:54 +0100546 if (!ch->uart_rx_ctx)
547 return;
548 rctx = ch->uart_rx_ctx;
549 rd = (struct cardemu_usb_msg_rx_data *) rctx->data;
550
551 /* initializ header */
552 cardemu_hdr_set(&rd->hdr, CEMU_USB_MSGT_DO_RX_DATA);
553 rd->flags = CEMU_DATA_F_TPDU_HDR;
554 rctx->tot_len = sizeof(*rd) + sizeof(ch->tpdu.hdr);
Harald Welte0ef96d52016-02-25 00:09:17 +0100555 rctx->idx = sizeof(ch->tpdu.hdr);
Harald Welte9d3e3822015-11-09 00:50:54 +0100556
557 /* copy TPDU header to data field */
558 memcpy(rd->data, ch->tpdu.hdr, sizeof(ch->tpdu.hdr));
Harald Welteb5288e82015-11-14 21:15:52 +0100559 /* rd->data_len is set in flush_rx_buffer() */
Harald Welte9d3e3822015-11-09 00:50:54 +0100560
Harald Welteb5288e82015-11-14 21:15:52 +0100561 flush_rx_buffer(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100562}
563
564static enum iso7816_3_card_state
565process_byte_tpdu(struct card_handle *ch, uint8_t byte)
566{
567 switch (ch->tpdu.state) {
568 case TPDU_S_WAIT_CLA:
569 ch->tpdu.hdr[_CLA] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100570 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100571 break;
572 case TPDU_S_WAIT_INS:
573 ch->tpdu.hdr[_INS] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100574 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100575 break;
576 case TPDU_S_WAIT_P1:
577 ch->tpdu.hdr[_P1] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100578 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100579 break;
580 case TPDU_S_WAIT_P2:
581 ch->tpdu.hdr[_P2] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100582 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100583 break;
584 case TPDU_S_WAIT_P3:
585 ch->tpdu.hdr[_P3] = byte;
Harald Welte4d804672015-11-14 23:02:38 +0100586 set_tpdu_state(ch, next_tpdu_state(ch));
Harald Welte9d3e3822015-11-09 00:50:54 +0100587 /* FIXME: start timer to transmit further 0x60 */
588 /* send the TPDU header as part of a procedure byte
589 * request to the USB host */
590 send_tpdu_header(ch);
591 break;
592 case TPDU_S_WAIT_RX:
Harald Welte61bb30e2015-11-14 23:44:14 +0100593 add_tpdu_byte(ch, byte);
594 break;
Harald Welte9d3e3822015-11-09 00:50:54 +0100595 default:
596 TRACE_DEBUG("process_byte_tpdu() in invalid state %u\n",
597 ch->tpdu.state);
598 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100599
600 /* ensure we stay in TPDU ISO state */
601 return ISO_S_IN_TPDU;
602}
603
Harald Welte855ba9e2016-02-24 21:00:46 +0100604/* tx a single byte to be transmitted to the reader */
605static int tx_byte_tpdu(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100606{
607 struct req_ctx *rctx;
608 struct cardemu_usb_msg_tx_data *td;
Harald Welte855ba9e2016-02-24 21:00:46 +0100609 uint8_t byte;
Harald Welte9d3e3822015-11-09 00:50:54 +0100610
611 /* ensure we are aware of any data that might be pending for
612 * transmit */
613 if (!ch->uart_tx_ctx) {
Harald Welte4d804672015-11-14 23:02:38 +0100614 ch->uart_tx_ctx = req_ctx_find_get(0, RCTX_S_UART_TX_PENDING,
Harald Welte9d3e3822015-11-09 00:50:54 +0100615 RCTX_S_UART_TX_BUSY);
616 if (!ch->uart_tx_ctx)
617 return 0;
618
619 /* start with index zero */
620 ch->uart_tx_ctx->idx = 0;
621
622 }
623 rctx = ch->uart_tx_ctx;
624 td = (struct cardemu_usb_msg_tx_data *) rctx->data;
625
Harald Welte9d3e3822015-11-09 00:50:54 +0100626 /* take the next pending byte out of the rctx */
Harald Welte855ba9e2016-02-24 21:00:46 +0100627 byte = td->data[rctx->idx++];
628
629 card_emu_uart_tx(ch->uart_chan, byte);
Harald Welte9d3e3822015-11-09 00:50:54 +0100630
Harald Weltef16b6182016-02-24 22:18:46 +0100631 /* this must happen _after_ the byte has been transmittd */
632 switch (ch->tpdu.state) {
633 case TPDU_S_WAIT_PB:
634 /* if we just transmitted the procedure byte, we need to decide
635 * if we want to continue to receive or transmit */
636 if (td->flags & CEMU_DATA_F_PB_AND_TX)
637 set_tpdu_state(ch, TPDU_S_WAIT_TX);
638 else if (td->flags & CEMU_DATA_F_PB_AND_RX)
639 set_tpdu_state(ch, TPDU_S_WAIT_RX);
640 break;
641 }
642
Harald Welte9d3e3822015-11-09 00:50:54 +0100643 /* check if the buffer has now been fully transmitted */
644 if ((rctx->idx >= td->hdr.data_len) ||
Harald Weltef16b6182016-02-24 22:18:46 +0100645 (td->data + rctx->idx >= rctx->data + rctx->tot_len)) {
Harald Welte52922ff2015-11-14 20:59:56 +0100646 if (td->flags & CEMU_DATA_F_PB_AND_RX) {
647 /* we have just sent the procedure byte and now
648 * need to continue receiving */
649 set_tpdu_state(ch, TPDU_S_WAIT_RX);
Harald Welte2935b3c2015-11-14 20:00:14 +0100650 } else {
Harald Welte52922ff2015-11-14 20:59:56 +0100651 /* we have transmitted all bytes */
652 if (td->flags & CEMU_DATA_F_FINAL) {
653 /* this was the final part of the APDU, go
654 * back to state one*/
655 card_set_state(ch, ISO_S_WAIT_TPDU);
656 } else {
657 /* FIXME: call into USB code to chec if we need
658 * to submit a free buffer to accept
659 * further data on bulk out endpoint */
660 }
Harald Welte2935b3c2015-11-14 20:00:14 +0100661 }
Harald Welte9d3e3822015-11-09 00:50:54 +0100662 req_ctx_set_state(rctx, RCTX_S_FREE);
663 ch->uart_tx_ctx = NULL;
Harald Welte9d3e3822015-11-09 00:50:54 +0100664 }
665
666 return 1;
667}
668
669/**********************************************************************
670 * Public API
671 **********************************************************************/
672
673/* process a single byte received from the reader */
674void card_emu_process_rx_byte(struct card_handle *ch, uint8_t byte)
675{
676 int new_state = -1;
677
678 ch->stats.rx_bytes++;
679
680 switch (ch->state) {
681 case ISO_S_WAIT_POWER:
682 case ISO_S_WAIT_CLK:
683 case ISO_S_WAIT_RST:
684 case ISO_S_WAIT_ATR:
Harald Welte4d804672015-11-14 23:02:38 +0100685 TRACE_DEBUG("Received UART char in 7816 state %u\n",
686 ch->state);
Harald Welte9d3e3822015-11-09 00:50:54 +0100687 /* we shouldn't receive any data from the reader yet! */
688 break;
689 case ISO_S_WAIT_TPDU:
690 if (byte == 0xff) {
691 new_state = process_byte_pts(ch, byte);
692 ch->stats.pps++;
693 goto out_silent;
694 }
695 /* fall-through */
696 case ISO_S_IN_TPDU:
697 new_state = process_byte_tpdu(ch, byte);
698 break;
699 case ISO_S_IN_PTS:
700 new_state = process_byte_pts(ch, byte);
701 goto out_silent;
702 }
703
704out_silent:
705 if (new_state != -1)
706 card_set_state(ch, new_state);
707}
708
Harald Welte855ba9e2016-02-24 21:00:46 +0100709/* transmit a single byte to the reader */
710int card_emu_tx_byte(struct card_handle *ch)
Harald Welte9d3e3822015-11-09 00:50:54 +0100711{
712 int rc = 0;
713
714 switch (ch->state) {
715 case ISO_S_IN_ATR:
716 if (ch->atr.idx < ch->atr.len) {
Harald Welte855ba9e2016-02-24 21:00:46 +0100717 uint8_t byte;
718 byte = ch->atr.atr[ch->atr.idx++];
Harald Welte9d3e3822015-11-09 00:50:54 +0100719 rc = 1;
Harald Welte855ba9e2016-02-24 21:00:46 +0100720
721 card_emu_uart_tx(ch->uart_chan, byte);
722
Harald Welte9d3e3822015-11-09 00:50:54 +0100723 /* detect end of ATR */
724 if (ch->atr.idx >= ch->atr.len)
725 card_set_state(ch, ISO_S_WAIT_TPDU);
726 }
727 break;
728 case ISO_S_IN_PTS:
Harald Welte855ba9e2016-02-24 21:00:46 +0100729 rc = tx_byte_pts(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100730 break;
731 case ISO_S_IN_TPDU:
Harald Welte855ba9e2016-02-24 21:00:46 +0100732 rc = tx_byte_tpdu(ch);
Harald Welte9d3e3822015-11-09 00:50:54 +0100733 break;
734 }
735
736 if (rc)
737 ch->stats.tx_bytes++;
738
Harald Welte4d804672015-11-14 23:02:38 +0100739 /* if we return 0 here, the UART needs to disable transmit-ready
740 * interrupts */
Harald Welte9d3e3822015-11-09 00:50:54 +0100741 return rc;
742}
743
744/* hardware driver informs us that a card I/O signal has changed */
745void card_emu_io_statechg(struct card_handle *ch, enum card_io io, int active)
746{
747 switch (io) {
748 case CARD_IO_VCC:
Harald Welte855ba9e2016-02-24 21:00:46 +0100749 if (active == 0) {
Harald Welte22cdf2a2016-02-24 22:18:11 +0100750 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100751 card_set_state(ch, ISO_S_WAIT_POWER);
Harald Welte855ba9e2016-02-24 21:00:46 +0100752 } else if (active == 1 && ch->vcc_active == 0)
Harald Welte9d3e3822015-11-09 00:50:54 +0100753 card_set_state(ch, ISO_S_WAIT_CLK);
754 ch->vcc_active = active;
755 break;
756 case CARD_IO_CLK:
757 if (active == 1 && ch->state == ISO_S_WAIT_CLK)
758 card_set_state(ch, ISO_S_WAIT_RST);
759 ch->clocked = active;
760 break;
761 case CARD_IO_RST:
762 if (active == 0 && ch->in_reset &&
763 ch->vcc_active && ch->clocked) {
Harald Welte855ba9e2016-02-24 21:00:46 +0100764 /* enable the TC/ETU counter once reset has been released */
Harald Welte22cdf2a2016-02-24 22:18:11 +0100765 tc_etu_enable(ch->tc_chan);
Harald Weltee7194ab2015-11-14 21:03:25 +0100766 card_set_state(ch, ISO_S_WAIT_ATR);
Harald Welte855ba9e2016-02-24 21:00:46 +0100767 /* FIXME: wait 400 to 40k clock cycles before sending ATR */
Harald Welte9d3e3822015-11-09 00:50:54 +0100768 card_set_state(ch, ISO_S_IN_ATR);
Harald Welte855ba9e2016-02-24 21:00:46 +0100769 } else if (active) {
Harald Welte22cdf2a2016-02-24 22:18:11 +0100770 tc_etu_disable(ch->tc_chan);
Harald Welte9d3e3822015-11-09 00:50:54 +0100771 }
772 ch->in_reset = active;
773 break;
774 }
775}
776
777/* User sets a new ATR to be returned during next card reset */
778int card_emu_set_atr(struct card_handle *ch, const uint8_t *atr, uint8_t len)
779{
780 if (len > sizeof(ch->atr.atr))
781 return -1;
782
783 memcpy(ch->atr.atr, atr, len);
784 ch->atr.len = len;
785 ch->atr.idx = 0;
786
787 /* FIXME: race condition with trasmitting ATR to reader? */
788
789 return 0;
790}
791
792/* hardware driver informs us that one (more) ETU has expired */
793void tc_etu_wtime_half_expired(void *handle)
794{
795 struct card_handle *ch = handle;
796 /* transmit NULL procedure byte well before waiting time expires */
797 card_emu_uart_tx(ch->uart_chan, ISO7816_3_PB_NULL);
798}
799
800/* hardware driver informs us that one (more) ETU has expired */
801void tc_etu_wtime_expired(void *handle)
802{
803}
804
805/* shortest ATR found in smartcard_list.txt */
806static const uint8_t default_atr[] = { 0x3B, 0x02, 0x14, 0x50 };
807
808static struct card_handle card_handles[NUM_SLOTS];
809
810struct card_handle *card_emu_init(uint8_t slot_num, uint8_t tc_chan, uint8_t uart_chan)
811{
812 struct card_handle *ch;
813
814 if (slot_num >= ARRAY_SIZE(card_handles))
815 return NULL;
816
817 ch = &card_handles[slot_num];
818
819 memset(ch, 0, sizeof(*ch));
820
821 /* initialize the card_handle with reasonabe defaults */
822 ch->state = ISO_S_WAIT_POWER;
823 ch->vcc_active = 0;
824 ch->in_reset = 1;
825 ch->clocked = 0;
826
827 ch->fi = 0;
828 ch->di = 1;
829 ch->wi = ISO7816_3_DEFAULT_WI;
830
831 ch->tc_chan = tc_chan;
832 ch->uart_chan = uart_chan;
833 ch->waiting_time = ISO7816_3_INIT_WTIME;
834
835 ch->atr.idx = 0;
836 ch->atr.len = sizeof(default_atr);
837 memcpy(ch->atr.atr, default_atr, ch->atr.len);
838
839 ch->pts.state = PTS_S_WAIT_REQ_PTSS;
840 ch->tpdu.state = TPDU_S_WAIT_CLA;
841
842 tc_etu_init(ch->tc_chan, ch);
843
844 return ch;
845}