blob: ecb5497323623257ff31f6ed0fa140f411a32d5d [file] [log] [blame]
Harald Welte70767382018-02-21 12:16:40 +01001module BTS_Tests {
2
3import from General_Types all;
4import from GSM_Types all;
5import from GSM_RR_Types all;
6import from Osmocom_Types all;
7import from GSM_Types all;
8import from GSM_RR_Types all;
Harald Welte82ccef72018-02-25 16:17:33 +01009import from GSM_SystemInformation all;
Harald Welte70767382018-02-21 12:16:40 +010010import from L1CTL_PortType all;
11import from L1CTL_Types all;
12import from LAPDm_Types all;
13import from Osmocom_CTRL_Adapter all;
14
15import from RSL_Types all;
Harald Welte7484fc42018-02-24 14:09:45 +010016import from IPA_Types all;
Harald Welte70767382018-02-21 12:16:40 +010017import from IPA_Emulation all;
18import from RSL_Emulation all;
19
20import from IPL4asp_Types all;
21import from TRXC_Types all;
22import from TRXC_CodecPort all;
23import from TRXC_CodecPort_CtrlFunct all;
24
Harald Welte883340c2018-02-28 18:59:29 +010025import from PCUIF_Types all;
26import from PCUIF_CodecPort all;
27
Harald Welte7484fc42018-02-24 14:09:45 +010028import from MobileL3_CommonIE_Types all;
Harald Welte68e495b2018-02-25 00:05:57 +010029import from MobileL3_RRM_Types all;
30import from MobileL3_Types all;
31import from L3_Templates all;
Harald Welte7484fc42018-02-24 14:09:45 +010032
Harald Welte8da48242018-02-27 20:41:32 +010033import from Osmocom_VTY_Functions all;
34import from TELNETasp_PortType all;
35
Harald Welte70767382018-02-21 12:16:40 +010036/* The tests assume a BTS with the following timeslot configuration:
37 * TS0 : Combined CCCH + SDCCH/4
38 * TS1 .. TS 4: TCH/F
39 * TS5 : TCH/H
40 * TS6 : SDCCH/8
41 * TS7 : PDCH
42 */
43
44modulepar {
45 charstring mp_rsl_ip := "127.0.0.2";
46 integer mp_rsl_port := 3003;
47 integer mp_trx0_arfcn := 871;
Harald Weltea4d8f352018-03-01 15:47:20 +010048 charstring mp_bb_trxc_ip := "127.0.0.1";
Harald Welteef3e1c92018-02-28 23:40:14 +010049 integer mp_bb_trxc_port := 6701;
Harald Welte883340c2018-02-28 18:59:29 +010050 charstring mp_pcu_socket := PCU_SOCK_DEFAULT;
Harald Welted5684392018-03-10 18:22:04 +010051 integer mp_tolerance_rxqual := 1;
52 integer mp_tolerance_rxlev := 3;
Harald Welte70767382018-02-21 12:16:40 +010053}
54
Harald Welte629cc6b2018-03-11 17:19:05 +010055type record of RslChannelNr ChannelNrs;
56
Harald Welte70767382018-02-21 12:16:40 +010057type component test_CT extends CTRL_Adapter_CT {
Harald Welte68e495b2018-02-25 00:05:57 +010058 /* IPA Emulation component underneath RSL */
Harald Welte70767382018-02-21 12:16:40 +010059 var IPA_Emulation_CT vc_IPA;
Harald Welte68e495b2018-02-25 00:05:57 +010060 /* RSL Emulation component (for ConnHdlr tests) */
Harald Welte70767382018-02-21 12:16:40 +010061 var RSL_Emulation_CT vc_RSL;
Harald Welte68e495b2018-02-25 00:05:57 +010062 /* Direct RSL_CCHAN_PT */
Harald Welte70767382018-02-21 12:16:40 +010063 port RSL_CCHAN_PT RSL_CCHAN;
Harald Welte68e495b2018-02-25 00:05:57 +010064
65 /* L1CTL port (for classic tests) */
66 port L1CTL_PT L1CTL;
Harald Welte48494ca2018-02-25 16:59:50 +010067
Harald Welte54a2a2d2018-02-26 09:14:05 +010068 /* TRXC port (for classic tests) */
69 port TRXC_CODEC_PT BB_TRXC;
70 var integer g_bb_trxc_conn_id;
71
Harald Welte8da48242018-02-27 20:41:32 +010072 port TELNETasp_PT BTSVTY;
73
Harald Welte883340c2018-02-28 18:59:29 +010074 /* PCU Interface of BTS */
75 port PCUIF_CODEC_PT PCU;
76 var integer g_pcu_conn_id;
77 /* Last PCU INFO IND we received */
78 var PCUIF_Message g_pcu_last_info;
79
Harald Welte48494ca2018-02-25 16:59:50 +010080 /* SI configuration */
81 var SystemInformationConfig si_cfg := {
82 bcch_extended := false,
83 si1_present := false,
84 si2bis_present := false,
85 si2ter_present := false,
86 si2quater_present := false,
87 si7_present := false,
88 si8_present := false,
89 si9_present := false,
90 si13_present := false,
91 si13alt_present := false,
92 si15_present := false,
93 si16_present := false,
94 si17_present := false,
95 si2n_present := false,
96 si21_present := false,
97 si22_present := false
98 };
Harald Welte629cc6b2018-03-11 17:19:05 +010099
100 /* all logical channels available on the BTS */
101 var ChannelNrs g_AllChannels;
Harald Welte70767382018-02-21 12:16:40 +0100102}
103
104/* an individual call / channel */
105type component ConnHdlr extends RSL_DchanHdlr {
106 port L1CTL_PT L1CTL;
107
108 port TRXC_CODEC_PT BB_TRXC;
109 var integer g_bb_trxc_conn_id;
110
111 timer g_Tguard;
112 timer g_Tmeas_exp := 2.0; /* >= 103 SACCH multiframe ~ 500ms */
113
114 var ConnHdlrPars g_pars;
115 var uint8_t g_next_meas_res_nr := 0;
Harald Weltefa45e9e2018-03-10 18:59:03 +0100116 var boolean g_first_meas_res := true;
Harald Welte70767382018-02-21 12:16:40 +0100117}
118
119function f_init_rsl(charstring id) runs on test_CT {
120 vc_IPA := IPA_Emulation_CT.create(id & "-RSL-IPA");
121 vc_RSL := RSL_Emulation_CT.create(id & "-RSL");
122
123 map(vc_IPA:IPA_PORT, system:IPA_CODEC_PT);
124 connect(vc_IPA:IPA_RSL_PORT, vc_RSL:IPA_PT);
125 connect(self:RSL_CCHAN, vc_RSL:CCHAN_PT);
126
127 vc_IPA.start(IPA_Emulation.main_server(mp_rsl_ip, mp_rsl_port));
128 vc_RSL.start(RSL_Emulation.main(false));
129}
130
131type record ConnHdlrPars {
132 RslChannelNr chan_nr,
133 RSL_IE_ChannelMode chan_mode,
134 float t_guard,
135 ConnL1Pars l1_pars
136}
137
Harald Welte82ccef72018-02-25 16:17:33 +0100138template (value) RachControlParameters ts_RachCtrl_default := {
Harald Welte0fd1fb02018-03-10 17:19:50 +0100139 max_retrans := RACH_MAX_RETRANS_7,
140 tx_integer := '1001'B, /* 12 slots */
Harald Welte82ccef72018-02-25 16:17:33 +0100141 cell_barr_access := false,
142 re_not_allowed := true,
Harald Welteb9585f82018-03-10 17:18:47 +0100143 acc := '0000010000000000'B
Harald Welte82ccef72018-02-25 16:17:33 +0100144};
145
Harald Weltef10153f2018-02-25 16:34:05 +0100146template (value) CellSelectionParameters ts_CellSelPar_default := {
Harald Welte0fd1fb02018-03-10 17:19:50 +0100147 cell_resel_hyst_2dB := 2,
148 ms_txpwr_max_cch := 7,
Harald Weltef10153f2018-02-25 16:34:05 +0100149 acs := '0'B,
150 neci := true,
151 rxlev_access_min := 0
152}
153
154template (value) LocationAreaIdentification ts_LAI_default := {
155 mcc_mnc := '262F42'H,
156 lac := 42
157}
158
Harald Welte7484fc42018-02-24 14:09:45 +0100159/* Default SYSTEM INFORMATION 3 */
Harald Weltef8df4cb2018-03-10 15:15:08 +0100160template (value) SystemInformation ts_SI3_default := {
161 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_3, 18),
Harald Welte7484fc42018-02-24 14:09:45 +0100162 payload := {
163 si3 := {
164 cell_id := 23,
Harald Weltef10153f2018-02-25 16:34:05 +0100165 lai := ts_LAI_default,
Harald Welte7484fc42018-02-24 14:09:45 +0100166 ctrl_chan_desc := {
167 msc_r99 := true,
168 att := true,
169 bs_ag_blks_res := 1,
170 ccch_conf := CCHAN_DESC_1CCCH_COMBINED,
Harald Welte82ccef72018-02-25 16:17:33 +0100171 si22ind := false,
Harald Welte7484fc42018-02-24 14:09:45 +0100172 cbq3 := CBQ3_IU_MODE_NOT_SUPPORTED,
173 spare := '00'B,
174 bs_pa_mfrms := 0, /* 2 multiframes */
175 t3212 := 1 /* 6 minutes */
176 },
Harald Welte82ccef72018-02-25 16:17:33 +0100177 cell_options := {
Harald Welte7484fc42018-02-24 14:09:45 +0100178 dn_ind := false,
179 pwrc := false,
180 dtx := MS_MAY_USE_UL_DTX,
Harald Welte0fd1fb02018-03-10 17:19:50 +0100181 radio_link_tout_div4 := (32/4)-1
Harald Welte7484fc42018-02-24 14:09:45 +0100182 },
Harald Weltef10153f2018-02-25 16:34:05 +0100183 cell_sel_par := ts_CellSelPar_default,
Harald Welte82ccef72018-02-25 16:17:33 +0100184 rach_control := ts_RachCtrl_default,
Harald Welte3778acc2018-03-09 19:32:31 +0100185 rest_octets := '2B2B2B2B'O
Harald Welte7484fc42018-02-24 14:09:45 +0100186 }
187 }
188}
Harald Welte70767382018-02-21 12:16:40 +0100189
Harald Weltef8df4cb2018-03-10 15:15:08 +0100190template (value) SystemInformation ts_SI2_default := {
191 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_2, 22),
Harald Weltef10153f2018-02-25 16:34:05 +0100192 payload := {
193 si2 := {
194 bcch_freq_list := '00000000000000000000000000000000'O,
195 ncc_permitted := '11111111'B,
196 rach_control := ts_RachCtrl_default
197 }
198 }
199}
200
Harald Weltef8df4cb2018-03-10 15:15:08 +0100201template (value) SystemInformation ts_SI4_default := {
202 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_4, 12), /* no CBCH / restoct */
Harald Weltef10153f2018-02-25 16:34:05 +0100203 payload := {
204 si4 := {
205 lai := ts_LAI_default,
206 cell_sel_par := ts_CellSelPar_default,
207 rach_control := ts_RachCtrl_default,
208 cbch_chan_desc := omit,
209 cbch_mobile_alloc := omit,
210 rest_octets := ''O
211 }
212 }
213}
214
215function f_rsl_bcch_fill_raw(RSL_IE_SysinfoType rsl_si_type, octetstring si_enc)
216runs on test_CT {
217 log("Setting ", rsl_si_type, ": ", si_enc);
218 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_BCCH_INFO(rsl_si_type, si_enc)));
219}
220
221function f_rsl_bcch_fill(RSL_IE_SysinfoType rsl_si_type, template (value) SystemInformation si_dec)
222runs on test_CT {
223 var octetstring si_enc := enc_SystemInformation(valueof(si_dec));
224 log("Setting ", rsl_si_type, ": ", si_dec);
225 f_rsl_bcch_fill_raw(rsl_si_type, si_enc);
226}
227
Harald Welte8da48242018-02-27 20:41:32 +0100228private function f_init_vty(charstring id) runs on test_CT {
229 map(self:BTSVTY, system:BTSVTY);
230 f_vty_set_prompts(BTSVTY);
231 f_vty_transceive(BTSVTY, "enable");
232}
233
Harald Welte883340c2018-02-28 18:59:29 +0100234/* PCU socket may at any time receive a new INFO.ind */
235private altstep as_pcu_info_ind() runs on test_CT {
236 var PCUIF_send_data sd;
Harald Welted378a252018-03-13 17:02:14 +0100237 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_INFO_IND(0, ?))) -> value sd {
Harald Welte883340c2018-02-28 18:59:29 +0100238 g_pcu_last_info := sd.data;
Harald Welted378a252018-03-13 17:02:14 +0100239 }
240 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_INFO_IND(?, ?, ?))) -> value sd {
241 setverdict(fail, "Invalid PCU Version/BTS Number received");
242 self.stop;
Harald Welte883340c2018-02-28 18:59:29 +0100243 }
244}
245
246private function f_init_pcu(charstring id) runs on test_CT {
247 timer T := 2.0;
248 var PCUIF_send_data sd;
249 map(self:PCU, system:PCU);
Harald Welte84271622018-03-10 17:21:03 +0100250 if (mp_pcu_socket == "") {
251 g_pcu_conn_id := -1;
252 return;
253 }
Harald Welte883340c2018-02-28 18:59:29 +0100254 g_pcu_conn_id := f_pcuif_connect(PCU, mp_pcu_socket);
255
256 T.start;
257 alt {
Harald Welted378a252018-03-13 17:02:14 +0100258 [] as_pcu_info_ind();
Harald Welte883340c2018-02-28 18:59:29 +0100259 [] T.timeout {
260 setverdict(fail, "Timeout waiting for PCU INFO_IND");
261 self.stop;
262 }
263 }
264}
265
Harald Welte70767382018-02-21 12:16:40 +0100266/* global init function */
Harald Welte68e495b2018-02-25 00:05:57 +0100267function f_init(charstring id := "BTS-Test") runs on test_CT {
Harald Welte629cc6b2018-03-11 17:19:05 +0100268 g_AllChannels := {
269 /* TS 1..4: TCH/F */
270 valueof(ts_RslChanNr_Bm(1)), valueof(ts_RslChanNr_Bm(2)),
271 valueof(ts_RslChanNr_Bm(3)), valueof(ts_RslChanNr_Bm(4)),
272 /* TS 5: TCH/H */
273 valueof(ts_RslChanNr_Lm(5,0)), valueof(ts_RslChanNr_Lm(5,1)),
274 /* TS 0: SDCCH/4 */
275 valueof(ts_RslChanNr_SDCCH4(0,0)), valueof(ts_RslChanNr_SDCCH4(0,1)),
276 valueof(ts_RslChanNr_SDCCH4(0,2)), valueof(ts_RslChanNr_SDCCH4(0,3)),
277 /* TS 6: SDCCH/8 */
278 valueof(ts_RslChanNr_SDCCH8(6,0)), valueof(ts_RslChanNr_SDCCH8(6,1)),
279 valueof(ts_RslChanNr_SDCCH8(6,2)), valueof(ts_RslChanNr_SDCCH8(6,3)),
280 valueof(ts_RslChanNr_SDCCH8(6,4)), valueof(ts_RslChanNr_SDCCH8(6,5)),
281 valueof(ts_RslChanNr_SDCCH8(6,6)), valueof(ts_RslChanNr_SDCCH8(6,7))
282 };
283
Harald Welte70767382018-02-21 12:16:40 +0100284 f_init_rsl(id);
285 RSL_CCHAN.receive(ASP_IPA_Event:{up_down := ASP_IPA_EVENT_UP});
Harald Welte2d142592018-02-25 13:19:44 +0100286 f_sleep(0.5); /* workaround for OS#3000 */
Harald Welte8da48242018-02-27 20:41:32 +0100287 f_init_vty(id);
Harald Welte7484fc42018-02-24 14:09:45 +0100288
289 /* Send SI3 to the BTS, it is needed for various computations */
Harald Weltef10153f2018-02-25 16:34:05 +0100290 f_rsl_bcch_fill(RSL_SYSTEM_INFO_3, ts_SI3_default);
291 /* SI2 + SI4 are required for SI testing as they are mandatory defaults */
292 f_rsl_bcch_fill(RSL_SYSTEM_INFO_2, ts_SI2_default);
293 f_rsl_bcch_fill(RSL_SYSTEM_INFO_4, ts_SI4_default);
Harald Welte57fe8232018-02-26 17:52:50 +0100294
Harald Welte883340c2018-02-28 18:59:29 +0100295 f_init_pcu(id);
296
Harald Welte84271622018-03-10 17:21:03 +0100297 if (mp_bb_trxc_port != -1) {
298 var TrxcMessage ret;
299 /* start with a default moderate timing offset equalling TA=2 */
300 f_main_trxc_connect();
301 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(2*256)));
302 }
Harald Welte70767382018-02-21 12:16:40 +0100303}
304
Harald Welte294b0a22018-03-10 23:26:48 +0100305function f_shutdown() runs on test_CT {
306 /* shut down all "externally interfaced" components first to avoid unclean shutdown */
307 vc_IPA.stop;
308 vc_RSL.stop;
309}
310
Harald Welte68e495b2018-02-25 00:05:57 +0100311/* Attach L1CTL to master test_CT (classic tests, non-handler mode) */
312function f_init_l1ctl() runs on test_CT {
313 map(self:L1CTL, system:L1CTL);
314 f_connect_reset(L1CTL);
315}
316
Harald Welte70767382018-02-21 12:16:40 +0100317type function void_fn(charstring id) runs on ConnHdlr;
318
319/* create a new test component */
320function f_start_handler(void_fn fn, ConnHdlrPars pars)
321runs on test_CT return ConnHdlr {
322 var charstring id := testcasename();
323 var ConnHdlr vc_conn;
324
325 vc_conn := ConnHdlr.create(id);
326 /* connect to RSL Emulation main component */
327 connect(vc_conn:RSL, vc_RSL:CLIENT_PT);
328 connect(vc_conn:RSL_PROC, vc_RSL:RSL_PROC);
329
330 vc_conn.start(f_handler_init(fn, id, pars));
331 return vc_conn;
332}
333
Harald Welte7484fc42018-02-24 14:09:45 +0100334template ASP_RSL_Unitdata ts_RSL_UD(template RSL_Message rsl, IpaStreamId sid := IPAC_PROTO_RSL_TRX0) := {
335 streamId := sid,
336 rsl := rsl
337}
338
339template ASP_RSL_Unitdata tr_RSL_UD(template RSL_Message rsl,
340 template IpaStreamId sid := IPAC_PROTO_RSL_TRX0) := {
341 streamId := sid,
342 rsl := rsl
343}
344
Harald Welte70767382018-02-21 12:16:40 +0100345private altstep as_Tguard() runs on ConnHdlr {
346 [] g_Tguard.timeout {
347 setverdict(fail, "Tguard timeout");
348 self.stop;
349 }
350}
351
Harald Welte68e495b2018-02-25 00:05:57 +0100352private function f_l1_tune(L1CTL_PT L1CTL) {
Harald Welte70767382018-02-21 12:16:40 +0100353 f_L1CTL_FBSB(L1CTL, { false, mp_trx0_arfcn }, CCCH_MODE_COMBINED);
354}
355
356private function f_trxc_connect() runs on ConnHdlr {
357 map(self:BB_TRXC, system:BB_TRXC);
358 var Result res;
Harald Weltea4d8f352018-03-01 15:47:20 +0100359 res := TRXC_CodecPort_CtrlFunct.f_IPL4_connect(BB_TRXC, mp_bb_trxc_ip, mp_bb_trxc_port,
360 "", -1, -1, {udp:={}}, {});
Harald Welte70767382018-02-21 12:16:40 +0100361 g_bb_trxc_conn_id := res.connId;
362}
363
364private function f_trxc_fake_rssi(uint8_t rssi) runs on ConnHdlr {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100365 var TrxcMessage ret;
366 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_RSSI(rssi)));
Harald Welte70767382018-02-21 12:16:40 +0100367}
368
369private function f_trx_fake_toffs256(int16_t toffs256) runs on ConnHdlr {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100370 var TrxcMessage ret;
371 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(toffs256)));
Harald Welte70767382018-02-21 12:16:40 +0100372}
373
374/* first function started in ConnHdlr component */
375private function f_handler_init(void_fn fn, charstring id, ConnHdlrPars pars)
376runs on ConnHdlr {
377 g_pars := pars;
378 g_chan_nr := pars.chan_nr;
379
380 map(self:L1CTL, system:L1CTL);
381 f_connect_reset(L1CTL);
382
Harald Welte84271622018-03-10 17:21:03 +0100383 if (mp_bb_trxc_port != -1) {
384 f_trxc_connect();
385 }
Harald Welte70767382018-02-21 12:16:40 +0100386
387 g_Tguard.start(pars.t_guard);
388 activate(as_Tguard());
389
390 f_rslem_register(0, pars.chan_nr);
391
392 /* call the user-supplied test case function */
393 fn.apply(id);
394}
395
Harald Welte21240e62018-03-11 21:43:35 +0100396function f_rsl_transceive(template RSL_Message tx, template RSL_Message exp_rx, charstring id,
397 boolean ignore_other := false)
Harald Welte1eba3742018-02-25 12:48:14 +0100398runs on ConnHdlr {
399 timer T := 3.0;
400 RSL.send(tx);
401 T.start;
Harald Welte70767382018-02-21 12:16:40 +0100402 alt {
Harald Welte1eba3742018-02-25 12:48:14 +0100403 [] RSL.receive(exp_rx) {
404 T.stop;
405 setverdict(pass);
Harald Welte70767382018-02-21 12:16:40 +0100406 }
Harald Welte1eba3742018-02-25 12:48:14 +0100407 [] T.timeout {
408 setverdict(fail, "Timeout expecting " & id);
409 self.stop;
410 }
Harald Welte21240e62018-03-11 21:43:35 +0100411 [not ignore_other] as_l1_sacch();
412 [not ignore_other] as_meas_res();
413 [not ignore_other] as_l1_dcch();
414 [not ignore_other] RSL.receive {
Harald Welte1eba3742018-02-25 12:48:14 +0100415 setverdict(fail, "Unexpected RSL message received");
Harald Welte70767382018-02-21 12:16:40 +0100416 }
Harald Welte21240e62018-03-11 21:43:35 +0100417 [ignore_other] RSL.receive { repeat; }
Harald Welte70767382018-02-21 12:16:40 +0100418 }
419}
420
Harald Welte1eba3742018-02-25 12:48:14 +0100421function f_rsl_chan_act(RSL_IE_ChannelMode mode) runs on ConnHdlr {
422 f_rsl_transceive(ts_RSL_CHAN_ACT(g_chan_nr, mode), tr_RSL_CHAN_ACT_ACK(g_chan_nr),
423 "RSL CHAN ACT");
424}
425
Harald Welte70767382018-02-21 12:16:40 +0100426function f_rsl_chan_deact() runs on ConnHdlr {
Harald Welte1eba3742018-02-25 12:48:14 +0100427 f_rsl_transceive(ts_RSL_RF_CHAN_REL(g_chan_nr), tr_RSL_RF_CHAN_REL_ACK(g_chan_nr),
Harald Welte21240e62018-03-11 21:43:35 +0100428 "RF CHAN REL", true);
Harald Welte70767382018-02-21 12:16:40 +0100429}
430
Harald Welte70767382018-02-21 12:16:40 +0100431private template ConnHdlrPars t_Pars(template RslChannelNr chan_nr,
432 template RSL_IE_ChannelMode chan_mode,
433 float t_guard := 20.0) := {
434 chan_nr := valueof(chan_nr),
435 chan_mode := valueof(chan_mode),
436 t_guard := t_guard,
437 l1_pars := {
438 dtx_enabled := false,
Harald Welte685d5982018-02-27 20:42:05 +0100439 toa256_enabled := false,
Harald Welte70767382018-02-21 12:16:40 +0100440 meas_ul := {
441 full := {
442 rxlev := dbm2rxlev(-53),
443 rxqual := 0
444 },
445 sub := {
446 rxlev := dbm2rxlev(-53),
447 rxqual := 0
448 }
449 },
450 timing_offset_256syms := 0,
451 bs_power_level := 0,
452 ms_power_level := 0,
453 ms_actual_ta := 0
454 }
455}
456
Harald Welte93640c62018-02-25 16:59:33 +0100457/***********************************************************************
458 * Channel Activation / Deactivation
459 ***********************************************************************/
460
Harald Welte70767382018-02-21 12:16:40 +0100461/* Stress test: Do 500 channel activations/deactivations in rapid succession */
462function f_TC_chan_act_stress(charstring id) runs on ConnHdlr {
463 for (var integer i := 0; i < 500; i := i+1) {
464 f_rsl_chan_act(g_pars.chan_mode);
465 f_rsl_chan_deact();
466 }
467 setverdict(pass);
468}
469testcase TC_chan_act_stress() runs on test_CT {
470 var ConnHdlr vc_conn;
471 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
472 f_init(testcasename());
473 vc_conn := f_start_handler(refers(f_TC_chan_act_stress), pars);
474 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100475 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100476}
477
478/* Test if re-activation of an already active channel fails as expected */
479function f_TC_chan_act_react(charstring id) runs on ConnHdlr {
480 f_rsl_chan_act(g_pars.chan_mode);
481 /* attempt to activate the same lchan again -> expect reject */
482 RSL.send(ts_RSL_CHAN_ACT(g_chan_nr, g_pars.chan_mode));
483 alt {
484 [] RSL.receive(tr_RSL_CHAN_ACT_ACK(g_chan_nr)) {
485 setverdict(fail, "Unexpected CHAN ACT ACK on double activation");
486 }
487 [] RSL.receive(tr_RSL_CHAN_ACT_NACK(g_chan_nr)) {
488 setverdict(pass);
489 }
490 }
491 f_rsl_chan_deact();
492}
493testcase TC_chan_act_react() runs on test_CT {
494 var ConnHdlr vc_conn;
495 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
Harald Welte294b0a22018-03-10 23:26:48 +0100496 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100497 vc_conn := f_start_handler(refers(f_TC_chan_act_react), pars);
498 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100499 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100500}
501
502/* Attempt to de-activate a channel that's not active */
503function f_TC_chan_deact_not_active(charstring id) runs on ConnHdlr {
504 timer T := 3.0;
505 RSL.send(ts_RSL_RF_CHAN_REL(g_chan_nr));
506 T.start;
507 alt {
508 [] RSL.receive(tr_RSL_RF_CHAN_REL_ACK(g_chan_nr)) {
509 setverdict(pass);
510 }
511 [] T.timeout {
512 setverdict(fail, "Timeout expecting RF_CHAN_REL_ACK");
513 }
514 }
515}
516testcase TC_chan_deact_not_active() runs on test_CT {
517 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
Harald Welte294b0a22018-03-10 23:26:48 +0100518 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100519 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_chan_deact_not_active), pars);
520 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100521 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100522}
523
524/* attempt to activate channel with wrong RSL Channel Nr IE; expect NACK */
525function f_TC_chan_act_wrong_nr(charstring id) runs on ConnHdlr {
526 RSL.send(ts_RSL_CHAN_ACT(g_chan_nr, g_pars.chan_mode));
527 alt {
528 [] RSL.receive(tr_RSL_CHAN_ACT_ACK(g_chan_nr)) {
529 setverdict(fail, "Unexpected CHAN ACT ACK");
530 }
531 [] RSL.receive(tr_RSL_CHAN_ACT_NACK(g_chan_nr)) {
532 setverdict(pass);
533 }
534 }
535}
536private type record WrongChanNrCase {
537 RslChannelNr chan_nr,
538 charstring description
539}
540private type record of WrongChanNrCase WrongChanNrCases;
541private template WrongChanNrCase t_WCN(template RslChannelNr chan_nr, charstring desc) := {
542 chan_nr := chan_nr,
543 description := desc
544}
545
546testcase TC_chan_act_wrong_nr() runs on test_CT {
547 var ConnHdlr vc_conn;
548 var ConnHdlrPars pars;
549
Harald Welte294b0a22018-03-10 23:26:48 +0100550 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100551
552 var WrongChanNrCases wrong := {
553 valueof(t_WCN(t_RslChanNr_RACH(0), "RACH is not a dedicated channel")),
554 valueof(t_WCN(t_RslChanNr_RACH(1), "RACH doesn't exist on timeslot")),
555 valueof(t_WCN(t_RslChanNr_BCCH(0), "BCCH is not a dedicated channel")),
556 valueof(t_WCN(t_RslChanNr_PCH_AGCH(0), "PCH/AGCH is not a dedicated channel")),
557 valueof(t_WCN(t_RslChanNr_Bm(0), "TS0 cannot be TCH/F")),
558 valueof(t_WCN(t_RslChanNr_Lm(0, 0), "TS0 cannot be TCH/H")),
559 valueof(t_WCN(t_RslChanNr_Lm(0, 1), "TS0 cannot be TCH/H")),
560 valueof(t_WCN(t_RslChanNr_PDCH(0), "TS0 cannot be PDCH")),
561 valueof(t_WCN(t_RslChanNr_SDCCH8(0, 0), "TS0 cannot be SDCCH/8")),
562 valueof(t_WCN(t_RslChanNr_SDCCH8(0, 7), "TS0 cannot be SDCCH/8")),
563 valueof(t_WCN(t_RslChanNr_SDCCH4(7, 0), "TS7 cannot be SDCCH/4")),
564 valueof(t_WCN(t_RslChanNr_SDCCH4(7, 3), "TS7 cannot be SDCCH/4")),
565 valueof(t_WCN(t_RslChanNr_Lm(1, 0), "TS1 cannot be TCH/H"))
566 };
567
568 for (var integer i := 0; i < sizeof(wrong); i := i+1) {
569 pars := valueof(t_Pars(wrong[i].chan_nr, ts_RSL_ChanMode_SIGN));
570 vc_conn := f_start_handler(refers(f_TC_chan_act_wrong_nr), pars);
571 vc_conn.done;
572 }
Harald Welte294b0a22018-03-10 23:26:48 +0100573 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100574}
575
Harald Welte93640c62018-02-25 16:59:33 +0100576/***********************************************************************
Harald Welte629cc6b2018-03-11 17:19:05 +0100577 * SACCH handling
578 ***********************************************************************/
579
580private function f_exp_sacch(boolean exp) runs on ConnHdlr {
581 timer T_sacch := 3.0;
582 T_sacch.start;
583 alt {
584 [not exp] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) {
585 setverdict(fail, "Received SACCH when not expecting it");
586 }
587 [not exp] T_sacch.timeout {
588 setverdict(pass);
589 }
590 [exp] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) {
591 setverdict(pass);
592 }
593 [exp] T_sacch.timeout {
594 setverdict(fail, "Timeout waiting for SACCH on ", g_chan_nr);
595 }
596 [] L1CTL.receive { repeat; }
597 [] RSL.receive { repeat; }
598 }
599}
600
601/* Test if DEACTIVATE SACCH actualy deactivates its transmission (TS 48.058 4.6) */
602private function f_TC_deact_sacch(charstring id) runs on ConnHdlr {
603 f_l1_tune(L1CTL);
604 RSL.clear;
605
606 /* activate the logical channel */
607 f_est_dchan();
608 L1CTL.clear;
609
610 /* check that SACCH actually are received as expected */
611 f_exp_sacch(true);
612
613 /* deactivate SACCH on the logical channel */
614 RSL.send(ts_RSL_DEACT_SACCH(g_chan_nr));
615 f_sleep(1.0);
616 L1CTL.clear;
617
618 /* check that no SACCH are received anymore */
619 f_exp_sacch(false);
620
621 /* release the channel */
622 f_rsl_chan_deact();
623 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
624}
625testcase TC_deact_sacch() runs on test_CT {
626 var ConnHdlr vc_conn;
627 var ConnHdlrPars pars;
628 f_init();
629 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
630 //for (var integer i := 0; i < 1; i := i+1) {
631 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
632 log(testcasename(), ": Starting for ", g_AllChannels[i]);
633 vc_conn := f_start_handler(refers(f_TC_deact_sacch), pars);
634 vc_conn.done;
635 }
636 /* TODO: do the above in parallel, rather than sequentially? */
637 f_shutdown();
638}
639
Harald Welte55700662018-03-12 13:15:43 +0100640/* verify that given SACCH payload is present */
Harald Welteea17b912018-03-11 22:29:31 +0100641private function f_sacch_present(template octetstring l3_exp) runs on ConnHdlr {
642 var L1ctlDlMessage dl;
643 /* check that the specified SI5 value is actually sent */
644 timer T_sacch := 3.0;
645 L1CTL.clear;
646 T_sacch.start;
647 alt {
648 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) -> value dl {
649 var octetstring l3 := substr(dl.payload.data_ind.payload, 4, 19);
650 if (match(l3, l3_exp)) {
651 setverdict(pass);
652 } else {
653 repeat;
654 }
655 }
656 [] L1CTL.receive { repeat; }
657 [] T_sacch.timeout {
658 setverdict(fail, "Timeout waiting for SACCH ", l3_exp);
659 self.stop;
660 }
661 }
662}
663
Harald Welte55700662018-03-12 13:15:43 +0100664/* verify that given SACCH payload is not present */
665private function f_sacch_missing(template octetstring l3_exp) runs on ConnHdlr {
666 var L1ctlDlMessage dl;
667 /* check that the specified SI5 value is actually sent */
668 timer T_sacch := 3.0;
669 L1CTL.clear;
670 T_sacch.start;
671 alt {
672 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) -> value dl {
673 var octetstring l3 := substr(dl.payload.data_ind.payload, 4, 19);
674 if (match(l3, l3_exp)) {
675 setverdict(fail, "Received unexpected SACCH ", dl);
676 self.stop;
677 } else {
678 repeat;
679 }
680 }
681 [] L1CTL.receive { repeat; }
682 [] T_sacch.timeout {
683 setverdict(pass);
684 }
685 }
686}
687
Harald Welte629cc6b2018-03-11 17:19:05 +0100688/* Test for default SACCH FILL transmitted in DL SACCH (all channel types) */
Harald Welteea17b912018-03-11 22:29:31 +0100689private function f_TC_sacch_filling(charstring id) runs on ConnHdlr {
690 /* Set a known default SACCH filling for SI5 */
691 var octetstring si5 := f_rnd_octstring(19);
692 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
693
694 f_l1_tune(L1CTL);
695 RSL.clear;
696
697 /* activate the logical channel */
698 f_est_dchan();
699
700 /* check that the specified SI5 value is actually sent */
701 f_sacch_present(si5);
702
703 /* release the channel */
704 RSL.clear;
705 f_rsl_chan_deact();
706 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
707}
708testcase TC_sacch_filling() runs on test_CT {
709 var ConnHdlr vc_conn;
710 var ConnHdlrPars pars;
711 f_init();
712 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
713 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
714 log(testcasename(), ": Starting for ", g_AllChannels[i]);
715 vc_conn := f_start_handler(refers(f_TC_sacch_filling), pars);
716 vc_conn.done;
717 }
718 /* TODO: do the above in parallel, rather than sequentially? */
719 f_shutdown();
720}
721
Harald Welte629cc6b2018-03-11 17:19:05 +0100722/* Test for lchan-specific SACCH INFO MODIFY (TS 48.058 4.12) */
Harald Welteea17b912018-03-11 22:29:31 +0100723private function f_TC_sacch_info_mod(charstring id) runs on ConnHdlr {
724 /* Set a known default SACCH filling for SI5 */
725 var octetstring si5 := f_rnd_octstring(19);
726 var octetstring si5_diff := f_rnd_octstring(19);
727 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
728
729 f_l1_tune(L1CTL);
730 RSL.clear;
731
732 log("Activating channel, expecting standard SI5");
733 /* activate the logical channel */
734 f_est_dchan();
735 /* check that the specified SI5 value is actually sent */
736 f_sacch_present(si5);
737
738 /* set channel-specific different SI5 */
739 log("Setting channel specific SACCH INFO, expecting it");
740 RSL.send(ts_RSL_SACCH_INF_MOD(g_chan_nr, RSL_SYSTEM_INFO_5, si5_diff))
741 /* check that the specified lchan-specific value is now used */
742 f_sacch_present(si5_diff);
743
744 /* deactivate the channel and re-activate it, this should result in default SI5 */
745 log("De-activating and re-activating channel, expecting standard SI5");
746 f_rsl_chan_deact();
747 f_rsl_chan_act(valueof(ts_RSL_ChanMode_SIGN));
748 /* Verify that the TRX-wide default SACCH filling is present again */
749 f_sacch_present(si5);
750
751 /* release the channel */
752 RSL.clear;
753 f_rsl_chan_deact();
754 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
755}
756testcase TC_sacch_info_mod() runs on test_CT {
757 var ConnHdlr vc_conn;
758 var ConnHdlrPars pars;
759 f_init();
760 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
761 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
762 log(testcasename(), ": Starting for ", g_AllChannels[i]);
763 vc_conn := f_start_handler(refers(f_TC_sacch_info_mod), pars);
764 vc_conn.done;
765 }
766 /* TODO: do the above in parallel, rather than sequentially? */
767 f_shutdown();
768}
769
Harald Welte075d84c2018-03-12 13:07:24 +0100770/* Test SACCH scheduling of multiple different SI message types */
771private function f_TC_sacch_multi(charstring id) runs on ConnHdlr {
772 var octetstring si5 := f_rnd_octstring(19);
773 var octetstring si5bis := f_rnd_octstring(19);
774 var octetstring si5ter := f_rnd_octstring(19);
775 var octetstring si6 := f_rnd_octstring(19);
776
777 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
778 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5bis, si5bis));
779 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5ter, si5ter));
780 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_6, si6));
781
782 f_l1_tune(L1CTL);
783 RSL.clear;
784
785 /* activate the logical channel */
786 f_est_dchan();
787 L1CTL.clear;
788
789 /* check that SACCH actually are received as expected */
790 f_sacch_present(si5);
791 f_sacch_present(si5bis);
792 f_sacch_present(si5ter);
793 f_sacch_present(si6);
794
795 /* release the channel */
796 f_rsl_chan_deact();
797 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
798}
799testcase TC_sacch_multi() runs on test_CT {
800 var ConnHdlr vc_conn;
801 var ConnHdlrPars pars;
802 f_init();
803 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
804 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
805 log(testcasename(), ": Starting for ", g_AllChannels[i]);
806 vc_conn := f_start_handler(refers(f_TC_sacch_multi), pars);
807 vc_conn.done;
808 }
809 /* TODO: do the above in parallel, rather than sequentially? */
810 f_shutdown();
811}
812
Harald Welte55700662018-03-12 13:15:43 +0100813/* Test if SACH information is modified as expected */
814private function f_TC_sacch_multi_chg(charstring id) runs on ConnHdlr {
815 var octetstring si5 := f_rnd_octstring(19);
816 var octetstring si6 := f_rnd_octstring(19);
817
818 /* First, configure both SI5 and SI6 to be transmitted */
819 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
820 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_6, si6));
821
822 f_l1_tune(L1CTL);
823 RSL.clear;
824
825 /* activate the logical channel */
826 f_est_dchan();
827 L1CTL.clear;
828
829 /* check that SACCH actually are received as expected */
830 f_sacch_present(si5);
831 f_sacch_present(si6);
832
833 /* disable SI6 */
834 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_6, ''O));
835
836 /* check that SI5 is still transmitted */
837 f_sacch_present(si5);
838 /* check if SI6 is now gone */
839 f_sacch_missing(si6);
840
841 /* release the channel */
842 f_rsl_chan_deact();
843 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
844}
845testcase TC_sacch_multi_chg() runs on test_CT {
846 var ConnHdlr vc_conn;
847 var ConnHdlrPars pars;
848 f_init();
849 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
850 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
851 log(testcasename(), ": Starting for ", g_AllChannels[i]);
852 vc_conn := f_start_handler(refers(f_TC_sacch_multi_chg), pars);
853 vc_conn.done;
854 }
855 /* TODO: do the above in parallel, rather than sequentially? */
856 f_shutdown();
857}
858
Harald Welte075d84c2018-03-12 13:07:24 +0100859/* TODO: Test for SACCH information present in RSL CHAN ACT (overrides FILLING) */
860/* TODO: Test for SACCH transmission rules in the context of special CHAN ACT (HO) */
Harald Welte629cc6b2018-03-11 17:19:05 +0100861
862
863/***********************************************************************
Harald Welte93640c62018-02-25 16:59:33 +0100864 * RACH Handling
865 ***********************************************************************/
866
Harald Welte8c24c2b2018-02-26 08:31:31 +0100867/* like L1SAP_IS_PACKET_RACH */
868private function ra_is_ps(OCT1 ra) return boolean {
Harald Welte56c05802018-02-28 21:39:35 +0100869 if ((ra and4b 'F0'O == '70'O) and (ra and4b '0F'O != '0F'O)) {
Harald Welte8c24c2b2018-02-26 08:31:31 +0100870 return true;
871 }
872 return false;
873}
874
875/* generate a random RACH for circuit-switched */
876private function f_rnd_ra_cs() return OCT1 {
877 var OCT1 ra;
878 do {
879 ra := f_rnd_octstring(1);
880 } while (ra_is_ps(ra));
881 return ra;
882}
883
Harald Welte883340c2018-02-28 18:59:29 +0100884/* generate a random RACH for packet-switched */
885private function f_rnd_ra_ps() return OCT1 {
886 var OCT1 ra;
887 do {
888 ra := f_rnd_octstring(1);
889 } while (not ra_is_ps(ra));
890 return ra;
891}
892
Harald Welte8c24c2b2018-02-26 08:31:31 +0100893/* Send 1000 RACH requests and check their RA+FN on the RSL side */
894testcase TC_rach_content() runs on test_CT {
895 f_init(testcasename());
896 f_init_l1ctl();
Harald Welte68e495b2018-02-25 00:05:57 +0100897 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +0100898
Harald Welte8c24c2b2018-02-26 08:31:31 +0100899 var GsmFrameNumber fn_last := 0;
900 for (var integer i := 0; i < 1000; i := i+1) {
901 var OCT1 ra := f_rnd_ra_cs();
902 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
903 if (fn == fn_last) {
904 setverdict(fail, "Two RACH in same FN?!?");
905 self.stop;
906 }
907 fn_last := fn;
908
909 timer T := 5.0;
Harald Welte56c05802018-02-28 21:39:35 +0100910 T.start;
Harald Welte8c24c2b2018-02-26 08:31:31 +0100911 alt {
912 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn, ?))) {
913 T.stop;
914 }
915 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(?, ?, ?))) {
916 setverdict(fail, "Unexpected CHAN RQD");
917 self.stop;
918 }
919 [] RSL_CCHAN.receive { repeat; }
920 [] T.timeout {
921 setverdict(fail, "Timeout waiting for CHAN RQD");
922 self.stop;
923 }
924 }
925 }
926 setverdict(pass);
Harald Welte294b0a22018-03-10 23:26:48 +0100927 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100928}
Harald Welte8c24c2b2018-02-26 08:31:31 +0100929
930/* Send 1000 RACH Requests (flood ~ 89/s) and count if count(Abis) == count(Um) */
931testcase TC_rach_count() runs on test_CT {
Harald Welte294b0a22018-03-10 23:26:48 +0100932 f_init();
Harald Welte8c24c2b2018-02-26 08:31:31 +0100933 f_init_l1ctl();
Harald Welte294b0a22018-03-10 23:26:48 +0100934 f_sleep(1.0);
Harald Welte8c24c2b2018-02-26 08:31:31 +0100935 f_l1_tune(L1CTL);
936
937 var GsmFrameNumber fn_last := 0;
938 for (var integer i := 0; i < 1000; i := i+1) {
939 var OCT1 ra := f_rnd_ra_cs();
940 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
941 if (fn == fn_last) {
942 setverdict(fail, "Two RACH in same FN?!?");
943 self.stop;
944 }
945 fn_last := fn;
946 }
947 var integer rsl_chrqd := 0;
948 timer T := 3.0;
Harald Welte56c05802018-02-28 21:39:35 +0100949 T.start;
Harald Welte8c24c2b2018-02-26 08:31:31 +0100950 alt {
951 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(?,?))) {
952 rsl_chrqd := rsl_chrqd + 1;
Harald Weltec3a3f452018-02-26 17:37:47 +0100953 f_timer_safe_restart(T);
Harald Welte8c24c2b2018-02-26 08:31:31 +0100954 repeat;
955 }
956 [] RSL_CCHAN.receive { repeat; }
957 [] T.timeout { }
958 }
959 if (rsl_chrqd == 1000) {
960 setverdict(pass);
961 } else {
962 setverdict(fail, "Received only ", rsl_chrqd, " out of 1000 RACH");
963 }
Harald Welte294b0a22018-03-10 23:26:48 +0100964 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100965}
966
Harald Welte54a2a2d2018-02-26 09:14:05 +0100967private function f_main_trxc_connect() runs on test_CT {
968 map(self:BB_TRXC, system:BB_TRXC);
969 var Result res;
Harald Welted3a88a62018-03-01 16:04:52 +0100970 res := TRXC_CodecPort_CtrlFunct.f_IPL4_connect(BB_TRXC, mp_bb_trxc_ip, mp_bb_trxc_port,
971 "", -1, -1, {udp:={}}, {});
Harald Welte54a2a2d2018-02-26 09:14:05 +0100972 g_bb_trxc_conn_id := res.connId;
973}
974
975private function f_rach_toffs(int16_t toffs256, boolean expect_pass) runs on test_CT {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100976 var TrxcMessage ret;
Harald Welte54a2a2d2018-02-26 09:14:05 +0100977 /* tell fake_trx to use a given timing offset for all bursts */
Harald Weltef8df4cb2018-03-10 15:15:08 +0100978 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(toffs256)));
Harald Welte54a2a2d2018-02-26 09:14:05 +0100979 f_sleep(0.5);
980
981 /* Transmit RACH request + wait for confirmation */
982 var OCT1 ra := f_rnd_ra_cs();
983 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
984
985 /* Check for expected result */
986 timer T := 1.5;
987 T.start;
988 alt {
989 [expect_pass] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn))) {
990 setverdict(pass);
991 }
992 [not expect_pass] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn))) {
Harald Welteb3e30942018-03-02 10:33:42 +0100993 setverdict(fail, "RACH passed but was expected to be dropped: ", toffs256);
Harald Welte54a2a2d2018-02-26 09:14:05 +0100994 }
995 [] RSL_CCHAN.receive { repeat; }
996 [not expect_pass] T.timeout {
997 setverdict(pass);
998 }
999 [expect_pass] T.timeout {
1000 setverdict(fail, "Timeout waiting for CHAN RQD");
1001 }
1002 }
1003}
1004
1005/* Test if dropping of RACH Based on NM_ATT_MAX_TA works */
1006testcase TC_rach_max_ta() runs on test_CT {
1007 f_init(testcasename());
1008 f_init_l1ctl();
1009 f_l1_tune(L1CTL);
Harald Welte54a2a2d2018-02-26 09:14:05 +01001010 f_sleep(1.0);
1011
1012 /* default max-ta is 63 (full range of GSM timing advance */
1013
Vadim Yanitskiyc81d6e42018-03-05 22:39:01 +07001014 /* We allow early arrival up to 2 symbols */
1015 f_rach_toffs(-1*256, true);
1016 f_rach_toffs(-2*256, true);
Harald Welte54a2a2d2018-02-26 09:14:05 +01001017 f_rach_toffs(-10*256, false);
1018
1019 /* 0 / 32 / 63 bits is legal / permitted */
1020 f_rach_toffs(0, true);
1021 f_rach_toffs(32*256, true);
1022 f_rach_toffs(63*256, true);
1023
1024 /* more than 63 bits is not legal / permitted */
1025 f_rach_toffs(64*256, false);
1026 f_rach_toffs(127*256, false);
Harald Welte294b0a22018-03-10 23:26:48 +01001027 f_shutdown();
Harald Welte54a2a2d2018-02-26 09:14:05 +01001028}
Harald Welte8c24c2b2018-02-26 08:31:31 +01001029
Harald Welte93640c62018-02-25 16:59:33 +01001030/***********************************************************************
1031 * Measurement Processing / Reporting
1032 ***********************************************************************/
1033
Harald Welte70767382018-02-21 12:16:40 +01001034template LapdmAddressField ts_LapdmAddr(LapdmSapi sapi, boolean c_r) := {
1035 spare := '0'B,
1036 lpd := 0,
1037 sapi := sapi,
1038 c_r := c_r,
1039 ea := true
1040}
1041
1042template LapdmFrameB ts_LAPDm_B(LapdmSapi sapi, boolean c_r, boolean p, octetstring pl) := {
1043 addr := ts_LapdmAddr(sapi, c_r),
1044 ctrl := t_LapdmCtrlUI(p),
1045 len := 0, /* overwritten */
1046 m := false,
1047 el := 1,
1048 payload := pl
1049}
1050
1051/* handle incoming downlink SACCH and respond with uplink SACCH (meas res) */
1052altstep as_l1_sacch() runs on ConnHdlr {
1053 var L1ctlDlMessage l1_dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +01001054 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(?))) -> value l1_dl {
Harald Welte70767382018-02-21 12:16:40 +01001055 log("SACCH received: ", l1_dl.payload.data_ind.payload);
1056 var GsmRrL3Message meas_rep := valueof(ts_MEAS_REP(true, 23, 23, 0, 0, omit));
1057 var LapdmFrameB lb := valueof(ts_LAPDm_B(0, false, false, enc_GsmRrL3Message(meas_rep)));
1058 log("LAPDm: ", lb);
1059 var octetstring pl := '0000'O & enc_LapdmFrameB(lb);
Harald Weltef8df4cb2018-03-10 15:15:08 +01001060 L1CTL.send(ts_L1CTL_DATA_REQ(g_chan_nr, ts_RslLinkID_SACCH(0), pl));
Harald Welte70767382018-02-21 12:16:40 +01001061 repeat;
1062 }
1063}
1064
1065altstep as_l1_dcch() runs on ConnHdlr {
1066 var L1ctlDlMessage l1_dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +01001067 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_DCCH(?))) -> value l1_dl {
Harald Welte70767382018-02-21 12:16:40 +01001068 log("DCCH received: ", l1_dl.payload.data_ind.payload);
1069 var octetstring pl := '010301'O;
Harald Weltef8df4cb2018-03-10 15:15:08 +01001070 L1CTL.send(ts_L1CTL_DATA_REQ(g_chan_nr, ts_RslLinkID_DCCH(0), pl));
Harald Welte70767382018-02-21 12:16:40 +01001071 repeat;
1072 }
1073}
1074
1075type record MeasElem {
1076 uint6_t rxlev,
1077 uint3_t rxqual
1078}
1079
1080type record MeasElemFS {
1081 MeasElem full,
1082 MeasElem sub
1083}
1084
1085type record ConnL1Pars {
1086 boolean dtx_enabled,
Harald Welte685d5982018-02-27 20:42:05 +01001087 boolean toa256_enabled,
Harald Welte70767382018-02-21 12:16:40 +01001088 MeasElemFS meas_ul,
1089 int16_t timing_offset_256syms,
1090 uint5_t bs_power_level,
1091 uint5_t ms_power_level,
1092 uint8_t ms_actual_ta
1093}
1094
1095/* Convert tiing offset from 1/256th symbol to RSL Timing Offset */
1096private function toffs256s_to_rsl(int16_t toffs256s) return uint8_t {
1097 return 63 + (toffs256s/256);
1098}
1099
Harald Welted5684392018-03-10 18:22:04 +01001100private function f_max(integer a, integer b) return integer {
1101 if (a > b) {
1102 return a;
1103 } else {
1104 return b;
1105 }
1106}
1107
1108private function f_min(integer a, integer b) return integer {
1109 if (a < b) {
1110 return a;
1111 } else {
1112 return b;
1113 }
1114}
1115
1116/* compute negative tolerance val-tolerance, ensure >= min */
1117private function f_tolerance_neg(integer val, integer min, integer tolerance) return integer {
1118 val := val - tolerance;
1119 return f_max(val, min);
1120}
1121
1122/* compute positive tolerance val+tolerance, ensure <= max */
1123private function f_tolerance_pos(integer val, integer max, integer tolerance) return integer {
1124 val := val + tolerance;
1125 return f_min(val, max);
1126}
1127
1128/* return a template of (val-tolerance .. val+tolerance) ensuring it is within (min .. max) */
1129private function f_tolerance(integer val, integer min, integer max, integer tolerance)
1130return template integer {
1131 var template integer ret;
1132 ret := (f_tolerance_neg(val, min, tolerance) .. f_tolerance_pos(val, max, tolerance));
1133 return ret;
1134}
1135
1136
Harald Welte70767382018-02-21 12:16:40 +01001137/* build a template for matching measurement results against */
1138private function f_build_meas_res_tmpl() runs on ConnHdlr return template RSL_Message {
1139 var ConnL1Pars l1p := g_pars.l1_pars;
1140 var template RSL_IE_UplinkMeas ul_meas := {
1141 len := 3,
1142 rfu := '0'B,
1143 dtx_d := l1p.dtx_enabled,
Harald Welted5684392018-03-10 18:22:04 +01001144 rxlev_f_u := f_tolerance(l1p.meas_ul.full.rxlev, 0, 63, mp_tolerance_rxlev),
Harald Welte70767382018-02-21 12:16:40 +01001145 reserved1 := '00'B,
Harald Welted5684392018-03-10 18:22:04 +01001146 rxlev_s_u := f_tolerance(l1p.meas_ul.sub.rxlev, 0, 63, mp_tolerance_rxlev),
Harald Welte70767382018-02-21 12:16:40 +01001147 reserved2 := '00'B,
Harald Welted5684392018-03-10 18:22:04 +01001148 rxq_f_u := f_tolerance(l1p.meas_ul.full.rxqual, 0, 7, mp_tolerance_rxqual),
1149 rxq_s_u := f_tolerance(l1p.meas_ul.sub.rxqual, 0, 7, mp_tolerance_rxqual),
Harald Welte70767382018-02-21 12:16:40 +01001150 supp_meas_info := omit
1151 };
Harald Welte685d5982018-02-27 20:42:05 +01001152 if (l1p.toa256_enabled) {
1153 ul_meas.len := 5;
1154 ul_meas.supp_meas_info := int2oct(l1p.timing_offset_256syms, 2);
1155 }
Harald Welte70767382018-02-21 12:16:40 +01001156 /* HACK HACK HACK FIXME HACK HACK HACK see https://osmocom.org/issues/2988 */
1157 ul_meas.rxlev_f_u := ?;
1158 ul_meas.rxlev_s_u := ?;
1159 ul_meas.rxq_f_u := ?;
1160 ul_meas.rxq_s_u := ?;
1161 var template RSL_IE_BS_Power bs_power := {
1162 reserved := 0,
1163 epc := false,
1164 fpc := false,
1165 power_level := l1p.bs_power_level
1166 };
1167 var template RSL_IE_L1Info l1_info := {
1168 ms_power_lvl := l1p.ms_power_level,
1169 fpc := false,
1170 reserved := 0,
1171 actual_ta := l1p.ms_actual_ta
1172 };
1173 var uint8_t offs := toffs256s_to_rsl(l1p.timing_offset_256syms);
1174 var template uint8_t t_toffs := (offs-1 .. offs+1); /* some tolerance */
1175 return tr_RSL_MEAS_RES_OSMO(g_chan_nr, g_next_meas_res_nr, ul_meas, bs_power, l1_info,
1176 ?, t_toffs);
1177}
1178
1179/* verify we regularly receive measurement reports with incrementing numbers */
1180altstep as_meas_res() runs on ConnHdlr {
1181 var RSL_Message rsl;
1182 [] RSL.receive(f_build_meas_res_tmpl()) -> value rsl {
1183 /* increment counter of next to-be-expected meas rep */
1184 g_next_meas_res_nr := (g_next_meas_res_nr + 1) mod 256;
1185 /* Re-start the timer expecting the next MEAS RES */
Harald Weltec3a3f452018-02-26 17:37:47 +01001186 f_timer_safe_restart(g_Tmeas_exp);
Harald Welte70767382018-02-21 12:16:40 +01001187 repeat;
1188 }
1189 [] RSL.receive(tr_RSL_MEAS_RES(g_chan_nr, g_next_meas_res_nr)) -> value rsl {
Harald Weltefa45e9e2018-03-10 18:59:03 +01001190 /* increment counter of next to-be-expected meas rep */
1191 g_next_meas_res_nr := (g_next_meas_res_nr + 1) mod 256;
1192 if (g_first_meas_res) {
1193 g_first_meas_res := false;
1194 repeat;
1195 } else {
1196 setverdict(fail, "Received unspecific MEAS RES ", rsl);
1197 self.stop;
1198 }
Harald Welte70767382018-02-21 12:16:40 +01001199 }
1200 [] RSL.receive(tr_RSL_MEAS_RES(?)) -> value rsl {
1201 setverdict(fail, "Received unexpected MEAS RES ", rsl);
1202 self.stop;
1203 }
1204 [] g_Tmeas_exp.timeout {
1205 setverdict(fail, "Didn't receive expected measurement result")
1206 self.stop;
1207 }
1208}
1209
1210/* Establish dedicated channel: L1CTL + RSL side */
1211private function f_est_dchan() runs on ConnHdlr {
1212 var GsmFrameNumber fn;
1213 var ImmediateAssignment imm_ass;
1214 var integer ra := 23;
1215
1216 fn := f_L1CTL_RACH(L1CTL, ra);
1217 /* This arrives on CCHAN, so we cannot test for receiving CHAN RQDhere */
1218 //RSL.receive(tr_RSL_CHAN_RQD(int2oct(23,1)));
1219
1220 /* Activate channel on BTS side */
1221 f_rsl_chan_act(g_pars.chan_mode);
1222
1223 /* Send IMM.ASS via CCHAN */
1224 var ChannelDescription ch_desc := {
1225 chan_nr := g_pars.chan_nr,
1226 tsc := 7,
1227 h := false,
1228 arfcn := mp_trx0_arfcn,
1229 maio_hsn := omit
1230 };
1231 var MobileAllocation ma := {
1232 len := 0,
1233 ma := ''B
1234 };
1235 var GsmRrMessage rr_msg := valueof(ts_IMM_ASS(ra, fn, 0, ch_desc, ma));
1236 RSL.send(ts_RSL_IMM_ASSIGN(enc_GsmRrMessage(rr_msg)));
1237
1238 /* receive IMM.ASS on MS side */
1239 var ImmediateAssignment ia_um;
1240 ia_um := f_L1CTL_WAIT_IMM_ASS(L1CTL, ra, fn);
1241 /* enable dedicated mode */
1242 f_L1CTL_DM_EST_REQ_IA(L1CTL, ia_um);
Harald Weltefa45e9e2018-03-10 18:59:03 +01001243
1244 g_first_meas_res := true;
Harald Welte70767382018-02-21 12:16:40 +01001245}
1246
1247/* establish DChan, verify existance + contents of measurement reports */
1248function f_TC_meas_res_periodic(charstring id) runs on ConnHdlr {
Harald Welte68e495b2018-02-25 00:05:57 +01001249 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +01001250 RSL.clear;
1251
Harald Welte5398d5e2018-03-10 19:00:24 +01001252 if (mp_bb_trxc_port != -1) {
1253 g_pars.l1_pars.meas_ul.full.rxlev := dbm2rxlev(-100);
1254 f_trxc_fake_rssi(100);
Harald Welte70767382018-02-21 12:16:40 +01001255
Harald Welte5398d5e2018-03-10 19:00:24 +01001256 g_pars.l1_pars.timing_offset_256syms := 512; /* 2 symbols */
1257 f_trx_fake_toffs256(g_pars.l1_pars.timing_offset_256syms);
1258 } else {
1259 g_pars.l1_pars.timing_offset_256syms := 0; /* FIXME */
1260 g_pars.l1_pars.meas_ul.full.rxlev := dbm2rxlev(-55); /* FIXME */
1261 }
1262 g_pars.l1_pars.meas_ul.sub.rxlev := g_pars.l1_pars.meas_ul.full.rxlev;
Harald Welte70767382018-02-21 12:16:40 +01001263
1264 f_est_dchan();
1265
1266 /* run for a number of seconds, send SACCH + FACCH from MS side and verify
1267 * RSL measurement reports on Abis side */
1268 timer T := 8.0;
1269 T.start;
1270 alt {
1271 [] as_l1_sacch();
1272 [] as_meas_res();
1273 [] as_l1_dcch();
1274 [] L1CTL.receive { repeat; }
1275 [g_Tmeas_exp.running] T.timeout {
1276 /* as_meas_res() would have done setverdict(fail) / self.stop in case
1277 * of any earlier errors, so if we reach this timeout, we're good */
1278 setverdict(pass);
1279 }
1280 [] T.timeout {
1281 setverdict(fail, "No MEAS RES received at all");
1282 }
1283 }
1284 f_rsl_chan_deact();
Harald Welte3dc20462018-03-10 23:03:38 +01001285 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
Harald Welte70767382018-02-21 12:16:40 +01001286}
1287testcase TC_meas_res_sign_tchf() runs on test_CT {
1288 var ConnHdlr vc_conn;
1289 var ConnHdlrPars pars;
1290 f_init(testcasename());
1291 for (var integer tn := 1; tn <= 4; tn := tn+1) {
1292 pars := valueof(t_Pars(t_RslChanNr_Bm(tn), ts_RSL_ChanMode_SIGN));
1293 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1294 vc_conn.done;
1295 }
Harald Welte294b0a22018-03-10 23:26:48 +01001296 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001297}
1298testcase TC_meas_res_sign_tchh() runs on test_CT {
1299 var ConnHdlr vc_conn;
1300 var ConnHdlrPars pars;
1301 f_init(testcasename());
1302 for (var integer ss := 0; ss <= 1; ss := ss+1) {
1303 pars := valueof(t_Pars(t_RslChanNr_Lm(5, ss), ts_RSL_ChanMode_SIGN));
1304 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1305 vc_conn.done;
1306 }
Harald Welte294b0a22018-03-10 23:26:48 +01001307 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001308}
1309testcase TC_meas_res_sign_sdcch4() runs on test_CT {
1310 var ConnHdlr vc_conn;
1311 var ConnHdlrPars pars;
1312 f_init(testcasename());
1313 for (var integer ss := 0; ss <= 3; ss := ss+1) {
1314 pars := valueof(t_Pars(t_RslChanNr_SDCCH4(0, ss), ts_RSL_ChanMode_SIGN));
1315 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1316 vc_conn.done;
1317 }
Harald Welte294b0a22018-03-10 23:26:48 +01001318 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001319}
1320testcase TC_meas_res_sign_sdcch8() runs on test_CT {
1321 var ConnHdlr vc_conn;
1322 var ConnHdlrPars pars;
1323 f_init(testcasename());
1324 for (var integer ss := 0; ss <= 7; ss := ss+1) {
1325 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6, ss), ts_RSL_ChanMode_SIGN));
1326 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1327 vc_conn.done;
1328 }
Harald Welte294b0a22018-03-10 23:26:48 +01001329 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001330}
Harald Welte685d5982018-02-27 20:42:05 +01001331testcase TC_meas_res_sign_tchh_toa256() runs on test_CT {
1332 var ConnHdlr vc_conn;
1333 var ConnHdlrPars pars;
1334 f_init(testcasename());
1335 f_vty_config(BTSVTY, "bts 0", "supp-meas-info toa256");
1336 for (var integer ss := 0; ss <= 1; ss := ss+1) {
1337 pars := valueof(t_Pars(t_RslChanNr_Lm(5, ss), ts_RSL_ChanMode_SIGN));
1338 pars.l1_pars.toa256_enabled := true;
1339 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1340 vc_conn.done;
1341 }
Harald Welte294b0a22018-03-10 23:26:48 +01001342 f_shutdown();
Harald Welte685d5982018-02-27 20:42:05 +01001343}
1344
Harald Welte70767382018-02-21 12:16:40 +01001345
1346/* Test if a channel without valid uplink bursts generates RSL CONN FAIL IND */
1347private function f_TC_conn_fail_crit(charstring id) runs on ConnHdlr {
Harald Welte68e495b2018-02-25 00:05:57 +01001348 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +01001349 RSL.clear;
1350
1351 f_est_dchan();
1352 f_sleep(2.0);
Harald Weltef8df4cb2018-03-10 15:15:08 +01001353 L1CTL.send(ts_L1CTL_DM_REL_REQ(g_chan_nr));
Harald Welte70767382018-02-21 12:16:40 +01001354
1355 timer T := 40.0;
1356 T.start;
1357 alt {
1358 [] RSL.receive(tr_RSL_CONN_FAIL_IND(g_chan_nr, ?)) {
1359 setverdict(pass)
1360 }
1361 [] RSL.receive { repeat };
1362 [] T.timeout {
1363 setverdict(fail, "No CONN FAIL IND received");
1364 }
1365 }
1366 f_rsl_chan_deact();
1367}
1368testcase TC_conn_fail_crit() runs on test_CT {
1369 var ConnHdlr vc_conn;
1370 var ConnHdlrPars pars;
1371 f_init(testcasename());
1372 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6, 3), ts_RSL_ChanMode_SIGN));
1373 pars.t_guard := 60.0;
1374 vc_conn := f_start_handler(refers(f_TC_conn_fail_crit), pars);
1375 vc_conn.done;
1376}
1377
Harald Welte93640c62018-02-25 16:59:33 +01001378/***********************************************************************
1379 * Paging
1380 ***********************************************************************/
1381
Harald Welte68e495b2018-02-25 00:05:57 +01001382function tmsi_is_dummy(TMSIP_TMSI_V tmsi) return boolean {
1383 if (tmsi == 'FFFFFFFF'O) {
1384 return true;
1385 } else {
1386 return false;
1387 }
1388}
Harald Welte70767382018-02-21 12:16:40 +01001389
Harald Welte68e495b2018-02-25 00:05:57 +01001390altstep as_l1_count_paging(inout integer num_paging_rcv_msgs, inout integer num_paging_rcv_ids)
1391runs on test_CT {
1392 var L1ctlDlMessage dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +01001393 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, c_DummyUI)) {
Harald Welte68e495b2018-02-25 00:05:57 +01001394 repeat;
1395 }
Harald Weltef8df4cb2018-03-10 15:15:08 +01001396 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0))) -> value dl {
Harald Welte68e495b2018-02-25 00:05:57 +01001397 var octetstring without_plen :=
1398 substr(dl.payload.data_ind.payload, 1, lengthof(dl.payload.data_ind.payload)-1);
1399 var PDU_ML3_NW_MS rr := dec_PDU_ML3_NW_MS(without_plen);
1400 if (match(rr, tr_PAGING_REQ1)) {
1401 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1402 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1403 if (isvalue(rr.msgs.rrm.pagingReq_Type1.mobileIdentity2)) {
1404 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1405 }
1406 } else if (match(rr, tr_PAGING_REQ2)) {
1407 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1408 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type2.mobileIdentity1)) {
1409 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1410 }
1411 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type2.mobileIdentity2)) {
1412 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1413 }
1414 if (isvalue(rr.msgs.rrm.pagingReq_Type2.mobileIdentity3)) {
1415 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1416 }
1417 } else if (match(rr, tr_PAGING_REQ3)) {
1418 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1419 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity1)) {
1420 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1421 }
1422 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity2)) {
1423 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1424 }
1425 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity3)) {
1426 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1427 }
1428 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity4)) {
1429 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1430 }
1431 }
1432 repeat;
1433 }
1434}
1435
1436type record PagingTestCfg {
1437 boolean combined_ccch,
1438 integer bs_ag_blks_res,
1439 float load_factor,
1440 boolean exp_load_ind,
1441 boolean exp_overload,
1442 boolean use_tmsi
1443}
1444
1445type record PagingTestState {
1446 integer num_paging_sent,
1447 integer num_paging_rcv_msgs,
1448 integer num_paging_rcv_ids,
1449 integer num_overload
1450}
1451
1452/* receive + ignore RSL RF RES IND */
1453altstep as_rsl_res_ind() runs on test_CT {
1454 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_RF_RES_IND)) {
1455 repeat;
1456 }
1457}
1458
1459/* Helper function for paging related testing */
1460private function f_TC_paging(PagingTestCfg cfg) runs on test_CT return PagingTestState {
1461 f_init(testcasename());
1462 f_init_l1ctl();
1463 f_l1_tune(L1CTL);
1464
1465 var PagingTestState st := {
1466 num_paging_sent := 0,
1467 num_paging_rcv_msgs := 0,
1468 num_paging_rcv_ids := 0,
1469 num_overload := 0
1470 };
1471
1472 var float max_pch_blocks_per_sec := f_pch_block_rate_est(cfg.combined_ccch, cfg.bs_ag_blks_res);
1473 var float max_pch_imsi_per_sec;
1474 if (cfg.use_tmsi) {
1475 max_pch_imsi_per_sec := max_pch_blocks_per_sec * 4.0; /* Type 3 */
1476 } else {
1477 max_pch_imsi_per_sec := max_pch_blocks_per_sec * 2.0; /* Type 1 */
1478 }
1479 var float pch_blocks_per_sec := max_pch_imsi_per_sec * cfg.load_factor;
1480 var float interval := 1.0 / pch_blocks_per_sec;
1481 log("pch_blocks_per_sec=", pch_blocks_per_sec, " interval=", interval);
1482
1483 for (var integer i := 0; i < float2int(20.0/interval); i := i+1) {
1484 /* build mobile Identity */
1485 var MobileL3_CommonIE_Types.MobileIdentityLV mi;
1486 if (cfg.use_tmsi) {
1487 mi := valueof(ts_MI_TMSI_LV(f_rnd_octstring(4)));
1488 } else {
1489 mi := valueof(ts_MI_IMSI_LV(f_gen_imsi(i)));
1490 }
1491 var octetstring mi_enc_lv := enc_MobileIdentityLV(mi);
1492 var octetstring mi_enc := substr(mi_enc_lv, 1, lengthof(mi_enc_lv)-1);
1493
1494 /* Send RSL PAGING COMMAND */
1495 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_PAGING_CMD(mi_enc, i mod 4)));
1496 st.num_paging_sent := st.num_paging_sent + 1;
1497
1498 /* Wait for interval to next PAGING COMMAND */
1499 timer T_itv := interval;
1500 T_itv.start;
1501 alt {
1502 /* check for presence of CCCH LOAD IND (paging load) */
1503 [cfg.exp_overload] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(0))) {
1504 st.num_overload := st.num_overload + 1;
1505 repeat;
1506 }
1507 [not cfg.exp_overload] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(0))) {
1508 setverdict(fail, "Unexpected PCH Overload");
1509 }
1510 [cfg.exp_load_ind] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND)) {
1511 log("Rx LOAD_IND");
1512 /* FIXME: analyze/verify interval + contents */
1513 repeat;
1514 }
1515 /* check if paging requests arrive on Um side */
1516 [] as_l1_count_paging(st.num_paging_rcv_msgs, st.num_paging_rcv_ids);
1517 [] L1CTL.receive { repeat; }
1518 [] T_itv.timeout { }
1519 [] as_rsl_res_ind();
1520 }
1521 }
1522
1523 /* wait for max 18s for paging queue to drain (size: 200, ~ 13 per s -> 15s) */
1524 timer T_wait := 18.0;
1525 T_wait.start;
1526 alt {
1527 [] as_l1_count_paging(st.num_paging_rcv_msgs, st.num_paging_rcv_ids);
1528 [] L1CTL.receive { repeat; }
1529 /* 65535 == empty paging queue, we can terminate*/
1530 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(65535))) { }
1531 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND)) { repeat; }
1532 [] T_wait.timeout {
1533 setverdict(fail, "Waiting for empty paging queue");
1534 }
1535 [] as_rsl_res_ind();
1536 }
1537
Harald Welte294b0a22018-03-10 23:26:48 +01001538 f_shutdown();
1539
Harald Welte68e495b2018-02-25 00:05:57 +01001540 log("num_paging_sent=", st.num_paging_sent, " rcvd_msgs=", st.num_paging_rcv_msgs,
1541 " rcvd_ids=", st.num_paging_rcv_ids);
1542 return st;
1543}
1544
1545/* Create ~ 80% paging load (IMSI only) sustained for about 20s, verifying that
1546 * - the number of Mobile Identities on Um PCH match the number of pages on RSL
1547 * - that CCCH LOAD IND (PCH) are being generated
1548 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1549testcase TC_paging_imsi_80percent() runs on test_CT {
1550 var PagingTestCfg cfg := {
1551 combined_ccch := true,
1552 bs_ag_blks_res := 1,
1553 load_factor := 0.8,
1554 exp_load_ind := true,
1555 exp_overload := false,
1556 use_tmsi := false
1557 };
1558 var PagingTestState st := f_TC_paging(cfg);
1559 if (st.num_paging_sent != st.num_paging_rcv_ids) {
1560 setverdict(fail, "Expected ", st.num_paging_sent, " pagings but have ",
1561 st.num_paging_rcv_ids);
1562 } else {
1563 setverdict(pass);
1564 }
1565}
1566
1567/* Create ~ 80% paging load (TMSI only) sustained for about 20s, verifying that
1568 * - the number of Mobile Identities on Um PCH match the number of pages on RSL
1569 * - that CCCH LOAD IND (PCH) are being generated
1570 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1571testcase TC_paging_tmsi_80percent() runs on test_CT {
1572 var PagingTestCfg cfg := {
1573 combined_ccch := true,
1574 bs_ag_blks_res := 1,
1575 load_factor := 0.8,
1576 exp_load_ind := true,
1577 exp_overload := false,
1578 use_tmsi := true
1579 };
1580 var PagingTestState st := f_TC_paging(cfg);
1581 if (st.num_paging_sent != st.num_paging_rcv_ids) {
1582 setverdict(fail, "Expected ", st.num_paging_sent, " pagings but have ",
1583 st.num_paging_rcv_ids);
1584 } else {
1585 setverdict(pass);
1586 }
1587}
1588
1589/* Create ~ 200% paging load (IMSI only) sustained for about 20s, verifying that
1590 * - the number of Mobile Identities on Um PCH are ~ 82% of the number of pages on RSL
1591 * - that CCCH LOAD IND (PCH) are being generated and reach 0 at some point
1592 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1593testcase TC_paging_imsi_200percent() runs on test_CT {
1594 var PagingTestCfg cfg := {
1595 combined_ccch := true,
1596 bs_ag_blks_res := 1,
1597 load_factor := 2.0,
1598 exp_load_ind := true,
1599 exp_overload := true,
1600 use_tmsi := false
1601 };
1602 var PagingTestState st := f_TC_paging(cfg);
1603 /* We expect about 80-85% to pass, given that we can fill the paging buffer of 200
1604 * slots and will fully drain that buffer before returning */
1605 var template integer tpl := (st.num_paging_sent*80/100 .. st.num_paging_sent *85/100);
1606 if (not match(st.num_paging_rcv_ids, tpl)) {
1607 setverdict(fail, "Expected ", tpl, " pagings but have ", st.num_paging_rcv_ids);
1608 } else {
1609 setverdict(pass);
1610 }
1611}
1612
1613/* Create ~ 200% paging load (TMSI only) sustained for about 20s, verifying that
1614 * - the number of Mobile Identities on Um PCH are ~ 82% of the number of pages on RSL
1615 * - that CCCH LOAD IND (PCH) are being generated and reach 0 at some point
1616 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1617testcase TC_paging_tmsi_200percent() runs on test_CT {
1618 var PagingTestCfg cfg := {
1619 combined_ccch := true,
1620 bs_ag_blks_res := 1,
1621 load_factor := 2.0,
1622 exp_load_ind := true,
1623 exp_overload := true,
1624 use_tmsi := true
1625 };
1626 var PagingTestState st := f_TC_paging(cfg);
1627 /* We expect about 70% to pass, given that we can fill the paging buffer of 200
1628 * slots and will fully drain that buffer before returning */
1629 var template integer tpl := (st.num_paging_sent*68/100 .. st.num_paging_sent *72/100);
1630 if (not match(st.num_paging_rcv_ids, tpl)) {
1631 setverdict(fail, "Expected ", tpl, " pagings but have ", st.num_paging_rcv_ids);
1632 } else {
1633 setverdict(pass);
1634 }
1635}
1636
1637
Harald Welte93640c62018-02-25 16:59:33 +01001638/***********************************************************************
1639 * Immediate Assignment / AGCH
1640 ***********************************************************************/
1641
Harald Welte68e495b2018-02-25 00:05:57 +01001642testcase TC_imm_ass() runs on test_CT {
1643 f_init(testcasename());
1644 for (var integer i := 0; i < 1000; i := i+1) {
1645 var octetstring ia_enc := f_rnd_octstring(8);
1646 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_IMM_ASSIGN(ia_enc, 0)));
1647 f_sleep(0.02);
1648 }
1649 /* FIXME: check if imm.ass arrive on Um side */
1650 /* FIXME: check for DELETE INDICATION */
1651 f_sleep(100.0);
Harald Welte294b0a22018-03-10 23:26:48 +01001652 f_shutdown();
Harald Welte68e495b2018-02-25 00:05:57 +01001653}
1654
Harald Welte48494ca2018-02-25 16:59:50 +01001655/***********************************************************************
1656 * BCCH
1657 ***********************************************************************/
1658
1659/* tuple of Frame Number + decoded SI */
1660type record SystemInformationFn {
1661 GsmFrameNumber frame_number,
1662 SystemInformation si
1663}
1664
1665/* an arbitrary-length vector of decoded SI + gsmtap header */
1666type record of SystemInformationFn SystemInformationVector;
1667
1668/* an array of SI-vectors indexed by TC value */
1669type SystemInformationVector SystemInformationVectorPerTc[8];
1670
1671/* determine if a given SI vector contains given SI type at least once */
1672function f_si_vecslot_contains(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false) return boolean {
1673 for (var integer i:= 0; i< sizeof(arr); i := i + 1) {
1674 var integer fn_mod51 := arr[i].frame_number mod 51;
1675 if (not bcch_ext and fn_mod51 == 2 or
1676 bcch_ext and fn_mod51 == 6) {
1677 if (arr[i].si.header.message_type == key) {
1678 return true;
1679 }
1680 }
1681 }
1682 return false;
1683}
1684
1685/* ensure a given TC slot of the SI vector contains given SI type at least once at TC */
1686function f_ensure_si_vec_contains(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false) {
1687 if (not f_si_vecslot_contains(arr[tc], key, ext_bcch)) {
1688 setverdict(fail, "No ", key, " in TC=", tc, "!");
1689 }
1690}
1691
1692/* check if a given SI vector contains given SI type at least once on any TC */
1693function f_si_vec_contains(SystemInformationVectorPerTc arr, RrMessageType key) return boolean {
1694 for (var integer tc:= 0; tc < sizeof(arr); tc := tc + 1) {
1695 if (f_si_vecslot_contains(arr[tc], key) or
1696 f_si_vecslot_contains(arr[tc], key, true)) {
1697 return true;
1698 }
1699 }
1700 return false;
1701}
1702
1703/* determine if a given SI vector contains given SI type at least N of M times */
1704function f_si_vecslot_contains_n_of_m(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false, integer n := 1, integer m := 4) return boolean {
1705 var integer count := 0;
1706 if (sizeof(arr) < m) {
1707 setverdict(fail, "Error: Insufficient SI in array");
1708 self.stop;
1709 }
1710 for (var integer i:= 0; i < m; i := i + 1) {
1711 var integer fn_mod51 := arr[i].frame_number mod 51;
1712 if (not bcch_ext and fn_mod51 == 2 or
1713 bcch_ext and fn_mod51 == 6) {
1714 if (arr[i].si.header.message_type == key) {
1715 count := count + 1;
1716 }
1717 }
1718 }
1719 if (count >= n) {
1720 return true;
1721 } else {
1722 return false;
1723 }
1724}
1725
1726/* ensure a given TC slot of the SI vector contains given SI type at least N out of M times at TC */
1727function f_ensure_si_vec_contains_n_of_m(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false, integer n, integer m) {
1728 if (not f_si_vecslot_contains_n_of_m(arr[tc], key, ext_bcch, n, m)) {
1729 setverdict(fail, "Not ", n, "/", m, " of ", key, " in TC=", tc, "!");
1730 }
1731}
1732
1733/* determine if a given SI vector contains given SI type at least once */
1734function f_si_vecslot_contains_only(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false) return boolean {
1735 for (var integer i:= 0; i< sizeof(arr); i := i + 1) {
1736 var integer fn_mod51 := arr[i].frame_number mod 51;
1737 if (not bcch_ext and fn_mod51 == 2 or
1738 bcch_ext and fn_mod51 == 6) {
1739 if (arr[i].si.header.message_type != key) {
1740 return false;
1741 }
1742 }
1743 }
1744 return true;
1745}
1746
1747/* ensure a given TC slot of the SI vector contains only given SI type */
1748function f_ensure_si_vec_contains_only(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false) {
1749 if (not f_si_vecslot_contains_only(arr[tc], key, ext_bcch)) {
1750 setverdict(fail, "Not all ", key, " in TC=", tc, "!");
1751 }
1752}
1753
1754/* SI configuration of cell, against which we validate actual SI messages */
1755type set SystemInformationConfig {
1756 boolean bcch_extended,
1757 boolean si1_present,
1758 boolean si2bis_present,
1759 boolean si2ter_present,
1760 boolean si2quater_present,
1761 boolean si7_present,
1762 boolean si8_present,
1763 boolean si9_present,
1764 boolean si13_present,
1765 boolean si13alt_present,
1766 boolean si15_present,
1767 boolean si16_present,
1768 boolean si17_present,
1769 boolean si2n_present,
1770 boolean si21_present,
1771 boolean si22_present
1772}
1773
1774/* validate the SI scheduling according to TS 45.002 version 14.1.0 Release 14, Section 6.3.1.3 */
1775function f_validate_si_scheduling(SystemInformationConfig cfg, SystemInformationVectorPerTc si_per_tc) {
1776 var integer i;
1777 for (i := 0; i < sizeof(si_per_tc); i := i + 1) {
1778 if (sizeof(si_per_tc[i]) == 0) {
Harald Welte544565a2018-03-02 10:34:08 +01001779 setverdict(fail, "No SI messages for TC=", i);
Harald Welte48494ca2018-02-25 16:59:50 +01001780 }
1781 }
1782 if (cfg.si1_present) {
1783 /* ii) System Information Type 1 needs to be sent if frequency hopping is in use or
1784 * when the NCH is present in a cell. If the MS finds another message on BCCH Norm
1785 * when TC = 0, it can assume that System Information Type 1 is not in use. */
1786 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_1);
1787 /* make sure *ALL* contain SI1 */
1788 f_ensure_si_vec_contains_only(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_1);
1789 }
1790 f_ensure_si_vec_contains(si_per_tc, 1, SYSTEM_INFORMATION_TYPE_2);
1791 /* iii) A SI 2 message will be sent at least every time TC = 1 */
1792 f_ensure_si_vec_contains(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_3);
1793 f_ensure_si_vec_contains(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_3);
1794 f_ensure_si_vec_contains(si_per_tc, 3, SYSTEM_INFORMATION_TYPE_4);
1795 f_ensure_si_vec_contains(si_per_tc, 7, SYSTEM_INFORMATION_TYPE_4);
1796
1797 /* iii) System information type 2 bis or 2 ter messages are sent if needed, as determined by the
1798 * system operator. If only one of them is needed, it is sent when TC = 5. If both are
1799 * needed, 2bis is sent when TC = 5 and 2ter is sent at least once within any of 4
1800 * consecutive occurrences of TC = 4. */
1801 if (cfg.si2bis_present and not cfg.si2ter_present) {
1802 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2bis);
1803 } else if (cfg.si2ter_present and not cfg.si2bis_present) {
1804 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2ter);
1805 } else if (cfg.si2ter_present and cfg.si2bis_present) {
1806 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2bis);
1807 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2ter, false, 1, 4);
1808 }
1809
1810 if (cfg.si7_present or cfg.si8_present) {
1811 /* vi) Use of System Information type 7 and 8 is not always necessary. It is necessary
1812 * if System Information type 4 does not contain all information needed for cell
1813 * selection and reselection. */
1814 if (not cfg.bcch_extended) {
1815 testcase.stop("Error: SI7/SI8 require BCCH Extd.");
1816 }
1817 if (cfg.si7_present) {
1818 f_ensure_si_vec_contains(si_per_tc, 7, SYSTEM_INFORMATION_TYPE_7, true);
1819 }
1820 if (cfg.si8_present) {
1821 f_ensure_si_vec_contains(si_per_tc, 3, SYSTEM_INFORMATION_TYPE_8, true);
1822 }
1823 }
1824
1825 if (cfg.si2quater_present) {
1826 /* iii) System information type 2 quater is sent if needed, as determined by the system
1827 * operator. If sent on BCCH Norm, it shall be sent when TC = 5 if neither of 2bis
1828 * and 2ter are used, otherwise it shall be sent at least once within any of 4
1829 * consecutive occurrences of TC = 4. If sent on BCCH Ext, it is sent at least once
1830 * within any of 4 consecutive occurrences of TC = 5. */
1831 if (not (cfg.bcch_extended)) {
1832 if (not (cfg.si2bis_present or cfg.si2ter_present)) {
1833 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2quater);
1834 } else {
1835 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2quater, false, 1, 4);
1836 }
1837 } else {
1838 f_ensure_si_vec_contains_n_of_m(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2quater, true, 1, 4);
1839 }
1840 }
1841 if (cfg.si9_present) {
1842 /* vi) System Information type 9 is sent in those blocks with TC = 4 which are specified
1843 * in system information type 3 as defined in 3GPP TS 44.018. */
1844 f_ensure_si_vec_contains(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_9); // FIXME SI3
1845 }
1846 if (cfg.si13_present) {
1847 /* vii) System Information type 13 is only related to the GPRS service. System Information
1848 * Type 13 need only be sent if GPRS support is indicated in one or more of System
1849 * Information Type 3 or 4 or 7 or 8 messages. These messages also indicate if the
1850 * message is sent on the BCCH Norm or if the message is transmitted on the BCCH Ext.
1851 * In the case that the message is sent on the BCCH Norm, it is sent at least once
1852 * within any of 4 consecutive occurrences of TC=4. */
1853 if (not cfg.bcch_extended) {
1854 log("not-bccch-extended");
1855 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_13, false, 1, 4);
1856 } else {
1857 log("bccch-extended");
1858 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_13, true);
1859 }
1860 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_13alt)) {
1861 setverdict(fail, "Cannot have SI13alt and SI13");
1862 }
1863 }
1864 if (cfg.si16_present or cfg.si17_present) {
1865 /* viii) System Information type 16 and 17 are only related to the SoLSA service. They
1866 * should not be sent in a cell where network sharing is used (see rule xv). */
1867 if (cfg.si22_present) {
1868 testcase.stop("Error: Cannot have SI16/SI17 and SI22!");
1869 }
1870 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_22)) {
1871 setverdict(fail, "Cannot have SI16/SI17 and SI22!");
1872 }
1873 if (not cfg.bcch_extended) {
1874 testcase.stop("Error: SI16/SI17 requires BCCH Extd!");
1875 }
1876 if (cfg.si16_present) {
1877 f_ensure_si_vec_contains(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_16, true);
1878 }
1879 if (cfg.si17_present) {
1880 f_ensure_si_vec_contains(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_17, true);
1881 }
1882 }
1883
1884 /* ix) System Information type 18 and 20 are sent in order to transmit non-GSM
1885 * broadcast information. The frequency with which they are sent is determined by the
1886 * system operator. System Information type 9 identifies the scheduling of System
1887 * Information type 18 and 20 messages. */
1888
1889 /* x) System Information Type 19 is sent if COMPACT neighbours exist. If System
1890 * Information Type 19 is present, then its scheduling shall be indicated in System
1891 * Information Type 9. */
1892
1893 if (cfg.si15_present) {
1894 /* xi) System Information Type 15 is broadcast if dynamic ARFCN mapping is used in the
1895 * PLMN. If sent on BCCH Norm, it is sent at least once within any of 4 consecutive
1896 * occurrences of TC = 4. If sent on BCCH Ext, it is sent at least once within any of
1897 * 4 consecutive occurrences of TC = 1. */
1898 if (not cfg.bcch_extended) {
1899 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_15, false, 1, 4);
1900 } else {
1901 f_ensure_si_vec_contains_n_of_m(si_per_tc, 1, SYSTEM_INFORMATION_TYPE_15, true, 1, 4);
1902 }
1903 }
1904 if (cfg.si13alt_present) {
1905 /* xii) System Information type 13 alt is only related to the GERAN Iu mode. System
1906 * Information Type 13 alt need only be sent if GERAN Iu mode support is indicated in
1907 * one or more of System Information Type 3 or 4 or 7 or 8 messages and SI 13 is not
1908 * broadcast. These messages also indicate if the message is sent on the BCCH Norm or
1909 * if the message is transmitted on the BCCH Ext. In the case that the message is sent
1910 * on the BCCH Norm, it is sent at least once within any of 4 consecutive occurrences
1911 * of TC = 4. */
1912 if (cfg.si13_present) {
1913 testcase.stop("Error: Cannot have SI13alt and SI13");
1914 }
1915 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_13)) {
1916 setverdict(fail, "Cannot have SI13alt and SI13");
1917 }
1918 if (not cfg.bcch_extended) {
1919 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_13alt, false, 1, 4);
1920 } else {
1921 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_13alt, true);
1922 }
1923 }
1924 if (cfg.si2n_present) {
1925 /* xiii) System Information Type 2n is optionally sent on BCCH Norm or BCCH Ext if needed,
1926 * as determined by the system operator. In the case that the message is sent on the
1927 * BCCH Norm, it is sent at least once within any of 4 consecutive occurrences of TC =
1928 * 4. If the message is sent on BCCH Ext, it is sent at least once within any of 2
1929 * consecutive occurrences of TC = 4. */
1930 if (not cfg.bcch_extended) {
1931 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2n, false, 1, 4);
1932 } else {
1933 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2n, true, 2, 4);
1934 }
1935 }
1936 if (cfg.si21_present) {
1937 /* xiv) System Information Type 21 is optionally sent on BCCH Norm or BCCH Ext, as
1938 * determined by the system operator. If Extended Access Barring is in use in the cell
1939 * then this message is sent at least once within any of 4 consecutive occurrences of
1940 * TC = 4 regardless if it is sent on BCCH Norm or BCCH Ext. If BCCH Ext is used in a
1941 * cell then this message shall only be sent on BCCH Ext. */
1942 if (not cfg.bcch_extended) {
1943 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_21, false, 1, 4);
1944 } else {
1945 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_21, true, 1, 4);
1946 if (f_si_vecslot_contains(si_per_tc[4], SYSTEM_INFORMATION_TYPE_21)) {
1947 setverdict(fail, "Cannot have SI21 on BCCH Norm if BCCH Extd enabled!");
1948 }
1949 }
1950 }
1951 if (cfg.si22_present) {
1952 /* xv) System Information Type 22 is sent if network sharing is in use in the cell. It
1953 * should not be sent in a cell where SoLSA is used (see rule viii). System
1954 * Information Type 22 instances shall be sent on BCCH Ext within any occurrence of TC
1955 * =2 and TC=6. */
1956 if (cfg.si16_present or cfg.si17_present) {
1957 testcase.stop("Error: Cannot have SI16/SI17 and SI22!");
1958 }
1959 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_16) or
1960 f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_17)) {
1961 setverdict(fail, "Cannot have SI16/SI17 and SI22!");
1962 }
1963 if (not cfg.bcch_extended) {
1964 testcase.stop("Error: SI22 requires BCCH Extd!");
1965 } else {
1966 f_ensure_si_vec_contains_only(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_22, true);
1967 f_ensure_si_vec_contains_only(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_22, true);
1968 }
1969 }
1970}
1971
1972/* sample Systme Information for specified duration via L1CTL */
1973function f_l1_sample_si(L1CTL_PT pt, float duration := 8.0) return SystemInformationVectorPerTc {
1974 timer T := duration;
1975 var SystemInformationVectorPerTc si_per_tc;
1976 var L1ctlDlMessage l1_dl;
1977
1978 /* initialize all per-TC vectors empty */
1979 for (var integer i:= 0; i < sizeof(si_per_tc); i := i+1) {
1980 si_per_tc[i] := {};
1981 }
1982
1983 /* flush all previous L1 queued msgs */
1984 pt.clear;
1985
1986 T.start;
1987 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01001988 [] pt.receive(tr_L1CTL_DATA_IND(t_RslChanNr_BCCH(0), ?)) -> value l1_dl {
Harald Welte48494ca2018-02-25 16:59:50 +01001989 /* somehow dec_SystemInformation will try to decode even non-RR as SI */
1990 if (not (l1_dl.payload.data_ind.payload[1] == '06'O)) {
1991 log("Ignoring non-RR SI ", l1_dl);
1992 repeat;
1993 }
1994 var SystemInformationFn sig := {
1995 frame_number := l1_dl.dl_info.frame_nr,
1996 si := dec_SystemInformation(l1_dl.payload.data_ind.payload)
1997 }
1998 var integer tc := f_gsm_compute_tc(sig.frame_number);
1999 log("SI received at TC=", tc, ": ", sig.si);
2000 /* append to the per-TC bucket */
2001 si_per_tc[tc] := si_per_tc[tc] & { sig };
2002 repeat;
2003 }
2004 [] pt.receive { repeat; }
2005 [] T.timeout { }
2006 }
2007
2008 for (var integer i:= 0; i < sizeof(si_per_tc); i := i+1) {
2009 log(testcasename(), ": TC=", i, " has #of SI=", sizeof(si_per_tc[i]));
2010 }
2011 log("si_per_tc=", si_per_tc);
2012 return si_per_tc;
2013}
2014
2015/* helper function: Set given SI via RSL + validate scheduling.
2016 * CALLER MUST MAKE SURE TO CHANGE GLOBAL si_cfg! */
2017function f_TC_si_sched() runs on test_CT {
2018 var SystemInformationVectorPerTc si_per_tc;
2019 f_init_l1ctl();
2020 f_l1_tune(L1CTL);
2021
2022 /* Sample + Validate Scheduling */
2023 si_per_tc := f_l1_sample_si(L1CTL);
2024 f_validate_si_scheduling(si_cfg, si_per_tc);
2025
2026 setverdict(pass);
2027}
2028
2029testcase TC_si_sched_default() runs on test_CT {
2030 f_init();
Harald Welte0cae4552018-03-09 22:20:26 +01002031 /* 2+3+4 are mandatory and set in f_init() */
2032 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002033 f_shutdown();
Harald Welte0cae4552018-03-09 22:20:26 +01002034}
2035
2036testcase TC_si_sched_1() runs on test_CT {
2037 f_init();
2038 si_cfg.si1_present := true;
2039 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_1, '5506198fb38000000000000000000000000000e504002b'O);
Harald Welte48494ca2018-02-25 16:59:50 +01002040 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002041 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002042}
2043
2044testcase TC_si_sched_2bis() runs on test_CT {
2045 f_init();
2046 si_cfg.si2bis_present := true;
2047 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
2048 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002049 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002050}
2051
2052testcase TC_si_sched_2ter() runs on test_CT {
2053 f_init();
2054 si_cfg.si2ter_present := true;
2055 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
2056 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002057 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002058}
2059
2060testcase TC_si_sched_2ter_2bis() runs on test_CT {
2061 f_init();
2062 si_cfg.si2bis_present := true;
2063 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
2064 si_cfg.si2ter_present := true;
2065 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
2066 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002067 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002068}
2069
2070testcase TC_si_sched_2quater() runs on test_CT {
2071 f_init();
2072 si_cfg.si2quater_present := true;
2073 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2quater, '050607a8a0364aa698d72ff424feee0506d5e7fff02043'O);
2074 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002075 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002076}
2077
2078testcase TC_si_sched_13() runs on test_CT {
2079 f_init();
2080 si_cfg.si13_present := true;
2081 //f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, fixme);
2082 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002083 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002084}
2085
2086testcase TC_si_sched_13_2bis_2ter_2quater() runs on test_CT {
2087 f_init();
2088 si_cfg.si2bis_present := true;
2089 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
2090 si_cfg.si2ter_present := true;
2091 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
2092 si_cfg.si2quater_present := true;
2093 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2quater, '050607a8a0364aa698d72ff424feee0506d5e7fff02043'O);
2094 si_cfg.si13_present := true;
2095 //f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, fixme);
2096 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01002097 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01002098}
2099
2100
Harald Welte68e495b2018-02-25 00:05:57 +01002101testcase TC_bcch_info() runs on test_CT {
2102 f_init(testcasename());
2103 /* FIXME: enable / disable individual BCCH info */
2104 //ts_RSL_BCCH_INFO(si_type, info);
2105 /* expect no ERROR REPORT after either of them *
2106 /* negative test: ensure ERROR REPORT on unsupported types */
Harald Welte294b0a22018-03-10 23:26:48 +01002107 f_shutdown();
Harald Welte68e495b2018-02-25 00:05:57 +01002108}
2109
Harald Welte93640c62018-02-25 16:59:33 +01002110/***********************************************************************
2111 * Low-Level Protocol Errors / ERROR REPORT
2112 ***********************************************************************/
2113
Harald Welte01d982c2018-02-25 01:31:40 +01002114private function f_exp_err_rep(template RSL_Cause cause) runs on test_CT {
2115 timer T := 5.0;
2116 T.start;
2117 alt {
2118 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_ERROR_REPORT(cause))) {
2119 setverdict(pass);
2120 }
2121 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_ERROR_REPORT(?))) {
2122 setverdict(fail, "Wrong cause in RSL ERR REP");
2123 }
2124 [] RSL_CCHAN.receive {
2125 repeat;
2126 }
2127 [] T.timeout {
2128 setverdict(fail, "Timeout waiting for RSL ERR REP");
2129 }
2130 }
2131}
2132
2133/* Provoke a protocol error (message too short) and match on ERROR REPORT */
2134testcase TC_rsl_protocol_error() runs on test_CT {
2135 f_init(testcasename());
2136 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2137 rsl.ies := omit;
2138 RSL_CCHAN.send(ts_RSL_UD(rsl));
2139
2140 f_exp_err_rep(RSL_ERR_PROTO);
2141}
2142
2143/* Provoke a mandatory IE error and match on ERROR REPORT */
2144testcase TC_rsl_mand_ie_error() runs on test_CT {
2145 f_init(testcasename());
2146
2147 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2148 rsl.ies := { rsl.ies[0] };
2149 RSL_CCHAN.send(ts_RSL_UD(rsl));
2150
2151 f_exp_err_rep(RSL_ERR_MAND_IE_ERROR);
2152}
2153
2154/* Provoke an IE content error and match on ERROR REPORT */
2155testcase TC_rsl_ie_content_error() runs on test_CT {
2156 f_init(testcasename());
2157 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2158 rsl.ies[1].body.sysinfo_type := RSL_SYSTEM_INFO_5;
2159 RSL_CCHAN.send(ts_RSL_UD(rsl));
2160
2161 f_exp_err_rep(RSL_ERR_IE_CONTENT);
2162}
2163
Harald Welte93640c62018-02-25 16:59:33 +01002164/***********************************************************************
2165 * IPA CRCX/MDCX/DLCS media stream handling
2166 ***********************************************************************/
2167
Harald Weltea871a382018-02-25 02:03:14 +01002168/* Send IPA DLCX to inactive lchan */
2169function f_TC_ipa_dlcx_not_active(charstring id) runs on ConnHdlr {
Harald Welte1eba3742018-02-25 12:48:14 +01002170 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, 0), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2171 "IPA DLCX ACK");
Harald Weltea871a382018-02-25 02:03:14 +01002172}
2173testcase TC_ipa_dlcx_not_active() runs on test_CT {
2174 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2175 f_init(testcasename());
2176 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_dlcx_not_active), pars);
2177 vc_conn.done;
2178}
Harald Welte68e495b2018-02-25 00:05:57 +01002179
Harald Weltea3f1df92018-02-25 12:49:55 +01002180/* Send IPA CRCX twice to inactive lchan */
2181function f_TC_ipa_crcx_twice_not_active(charstring id) runs on ConnHdlr {
2182 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2183 "IPA CRCX ACK");
2184 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_NACK(g_chan_nr, RSL_ERR_RES_UNAVAIL),
2185 "IPA CRCX NACK");
2186}
2187testcase TC_ipa_crcx_twice_not_active() runs on test_CT {
2188 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2189 f_init(testcasename());
2190 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_twice_not_active), pars);
2191 vc_conn.done;
2192}
2193
2194/* Regular sequence of CRCX/MDCX/DLCX */
2195function f_TC_ipa_crcx_mdcx_dlcx_not_active(charstring id) runs on ConnHdlr {
2196 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2197 "IPA CRCX ACK");
2198 var uint32_t remote_ip := f_rnd_int(c_UINT32_MAX);
2199 var uint16_t remote_port := f_rnd_int(c_UINT16_MAX);
2200 var uint7_t rtp_pt2 := f_rnd_int(127);
2201 var uint16_t fake_conn_id := 23; /* we're too lazy to read it out from the CRCX ACK above */
2202 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2203 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2204 "IPA MDCX ACK");
2205 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, fake_conn_id), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2206 "IPA DLCX ACK");
2207}
2208testcase TC_ipa_crcx_mdcx_dlcx_not_active() runs on test_CT {
2209 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2210 f_init(testcasename());
2211 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_mdcx_dlcx_not_active), pars);
2212 vc_conn.done;
2213}
2214
Harald Welte3ae11da2018-02-25 13:36:06 +01002215/* Sequence of CRCX, 2x MDCX, DLCX */
2216function f_TC_ipa_crcx_mdcx_mdcx_dlcx_not_active(charstring id) runs on ConnHdlr {
2217 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2218 "IPA CRCX ACK");
2219 var uint32_t remote_ip := f_rnd_int(c_UINT32_MAX);
2220 var uint16_t remote_port := f_rnd_int(c_UINT16_MAX);
2221 var uint7_t rtp_pt2 := f_rnd_int(127);
2222 var uint16_t fake_conn_id := 23; /* we're too lazy to read it out from the CRCX ACK above */
2223 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2224 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2225 "IPA MDCX ACK");
2226 /* Second MDCX */
2227 remote_ip := f_rnd_int(c_UINT32_MAX);
2228 remote_port := f_rnd_int(c_UINT16_MAX);
2229 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2230 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2231 "IPA MDCX ACK");
2232 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, fake_conn_id), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2233 "IPA DLCX ACK");
2234}
2235testcase TC_ipa_crcx_mdcx_mdcx_dlcx_not_active() runs on test_CT {
2236 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2237 f_init(testcasename());
2238 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_mdcx_mdcx_dlcx_not_active), pars);
2239 vc_conn.done;
2240}
2241
Harald Welte9912eb52018-02-25 13:30:15 +01002242/* IPA CRCX on SDCCH/4 and SDCCH/8 (doesn't make sense) */
2243function f_TC_ipa_crcx_sdcch_not_active(charstring id) runs on ConnHdlr {
2244 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_NACK(g_chan_nr, ?),
2245 "IPA CRCX NACK");
2246}
2247testcase TC_ipa_crcx_sdcch_not_active() runs on test_CT {
2248 var ConnHdlrPars pars;
2249 var ConnHdlr vc_conn;
2250 f_init(testcasename());
2251
2252 pars := valueof(t_Pars(t_RslChanNr_SDCCH4(0,1), ts_RSL_ChanMode_SIGN));
2253 vc_conn := f_start_handler(refers(f_TC_ipa_crcx_sdcch_not_active), pars);
2254 vc_conn.done;
2255
2256 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6,5), ts_RSL_ChanMode_SIGN));
2257 vc_conn := f_start_handler(refers(f_TC_ipa_crcx_sdcch_not_active), pars);
2258 vc_conn.done;
2259}
2260
Harald Weltea3f1df92018-02-25 12:49:55 +01002261
Harald Welte883340c2018-02-28 18:59:29 +01002262/***********************************************************************
2263 * PCU Socket related tests
2264 ***********************************************************************/
2265
2266private function f_TC_pcu_act_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr, boolean exp_success)
2267runs on test_CT {
2268 timer T := 3.0;
2269
2270 /* we don't expect any RTS.req before PDCH are active */
2271 T.start;
2272 alt {
2273 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr))) {
2274 setverdict(fail, "PCU RTS.req before PDCH active?");
2275 self.stop;
2276 }
2277 [] PCU.receive { repeat; }
2278 [] T.timeout { }
2279 }
2280
2281 /* Send PDCH activate request for known PDCH timeslot */
2282 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_ACT_REQ(bts_nr, trx_nr, ts_nr)));
2283
2284 /* we now expect RTS.req for this timeslot (only) */
2285 T.start;
2286 alt {
2287 [exp_success] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2288 setverdict(pass);
2289 }
2290 [not exp_success] PCU.receive(t_SD_PCUIF(g_pcu_conn_id,
2291 tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2292 setverdict(fail, "Unexpected RTS.req for supposedly failing activation");
2293 self.stop;
2294 }
2295 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ)) {
2296 setverdict(fail, "RTS.req for wrong TRX/TS");
2297 self.stop;
2298 }
2299 [] PCU.receive { repeat; }
2300 [exp_success] T.timeout {
2301 setverdict(fail, "Timeout waiting for PCU RTS.req");
2302 }
2303 [not exp_success] T.timeout {
2304 setverdict(pass);
2305 }
2306 }
2307}
2308
2309private function f_TC_pcu_deact_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr)
2310runs on test_CT {
2311 timer T := 3.0;
2312
2313 /* Send PDCH activate request for known PDCH timeslot */
2314 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_DEACT_REQ(bts_nr, trx_nr, ts_nr)));
2315
2316 PCU.clear;
2317 /* we now expect no RTS.req for this timeslot */
2318 T.start;
2319 alt {
2320 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2321 setverdict(fail, "Received unexpected PCU RTS.req");
2322 self.stop;
2323 }
2324 [] PCU.receive { repeat; }
2325 [] T.timeout {
2326 setverdict(pass);
2327 }
2328 }
2329}
2330
2331/* PDCH activation via PCU socket; check for presence of RTS.req */
2332testcase TC_pcu_act_req() runs on test_CT {
2333 f_init();
2334 f_TC_pcu_act_req(0, 0, 7, true);
2335}
2336
2337/* PDCH activation via PCU socket on non-PDCU timeslot */
2338testcase TC_pcu_act_req_wrong_ts() runs on test_CT {
2339 f_init();
2340 f_TC_pcu_act_req(0, 0, 1, false);
2341}
2342
2343/* PDCH activation via PCU socket on wrong BTS */
2344testcase TC_pcu_act_req_wrong_bts() runs on test_CT {
2345 f_init();
2346 f_TC_pcu_act_req(23, 0, 7, false);
2347}
2348
2349/* PDCH activation via PCU socket on wrong TRX */
2350testcase TC_pcu_act_req_wrong_trx() runs on test_CT {
2351 f_init();
2352 f_TC_pcu_act_req(0, 23, 7, false);
2353}
2354
2355/* PDCH deactivation via PCU socket; check for absence of RTS.req */
2356testcase TC_pcu_deact_req() runs on test_CT {
2357 f_init();
2358 /* Activate PDCH */
2359 f_TC_pcu_act_req(0, 0, 7, true);
2360 f_sleep(1.0);
2361 /* and De-Activate again */
2362 f_TC_pcu_deact_req(0, 0, 7);
2363}
2364
2365/* Attempt to deactivate a PDCH on a non-PDCH timeslot */
2366testcase TC_pcu_deact_req_wrong_ts() runs on test_CT {
2367 f_init();
2368 f_TC_pcu_deact_req(0, 0, 1);
2369}
2370
2371/* Test the PCU->BTS Version and BTS->PCU SI13 handshake */
2372testcase TC_pcu_ver_si13() runs on test_CT {
2373 const octetstring si13 := '00010203040506070909'O;
2374 var PCUIF_send_data sd;
2375 timer T:= 3.0;
2376 f_init();
2377
2378 /* Set SI13 via RSL */
2379 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, si13);
2380 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_TXT_IND(0, PCU_VERSION, "BTS_Test v23")));
2381 T.start;
2382 alt {
2383 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_DATA_IND(0, 0, 0, ?, PCU_IF_SAPI_BCCH))) -> value sd {
2384 if (substr(sd.data.u.data_ind.data, 0, lengthof(si13)) == si13) {
2385 setverdict(pass);
2386 } else {
2387 repeat;
2388 }
2389 }
2390 [] PCU.receive { repeat; }
2391 [] T.timeout {
2392 setverdict(fail, "Timeout waiting for SI13");
2393 self.stop;
2394 }
2395 }
2396}
2397
2398private const octetstring c_PCU_DATA := '000102030405060708090a0b0c0d0e0f10111213141516'O;
2399
2400/* helper function to send a PCU DATA.req */
2401private function f_pcu_data_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr,
2402 uint8_t block_nr, uint32_t fn, PCUIF_Sapi sapi, octetstring data)
2403runs on test_CT
2404{
2405 PCU.send(t_SD_PCUIF(g_pcu_conn_id,
2406 ts_PCUIF_DATA_REQ(bts_nr, trx_nr, ts_nr, block_nr, fn, sapi, data)));
2407}
2408
2409/* helper function to wait for RTS.ind for given SAPI on given BTS/TRX/TS and then send */
2410private function f_pcu_wait_rts_and_data_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr,
2411 PCUIF_Sapi sapi, octetstring data)
2412runs on test_CT
2413{
2414 var PCUIF_send_data sd;
2415
2416 timer T := 3.0;
2417 T.start;
2418 alt {
2419 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id,
2420 tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr, sapi))) -> value sd {
2421 f_pcu_data_req(bts_nr, trx_nr, ts_nr, sd.data.u.rts_req.block_nr,
2422 sd.data.u.rts_req.fn, sapi, data);
2423 }
2424 [] PCU.receive { repeat; }
2425 [] T.timeout {
2426 setverdict(fail, "Timeout waiting for RTS.ind");
2427 }
2428 }
2429}
2430
2431/* Send DATA.req on invalid BTS */
2432testcase TC_pcu_data_req_wrong_bts() runs on test_CT {
2433 f_init();
2434 f_TC_pcu_act_req(0, 0, 7, true);
2435 f_pcu_data_req(23, 0, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2436 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2437 f_sleep(10.0);
2438}
2439
2440/* Send DATA.req on invalid TRX */
2441testcase TC_pcu_data_req_wrong_trx() runs on test_CT {
2442 f_init();
2443 f_TC_pcu_act_req(0, 0, 7, true);
2444 f_pcu_data_req(0, 100, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2445 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2446 f_sleep(10.0);
2447}
2448
2449/* Send DATA.req on invalid timeslot */
2450testcase TC_pcu_data_req_wrong_ts() runs on test_CT {
2451 f_init();
2452 f_TC_pcu_act_req(0, 0, 7, true);
2453 f_pcu_data_req(0, 0, 70, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2454 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2455 f_sleep(10.0);
2456}
2457
2458/* Send DATA.req on timeslot that hasn't been activated */
2459testcase TC_pcu_data_req_ts_inactive() runs on test_CT {
2460 f_init();
2461 f_pcu_data_req(0, 0, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2462 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2463 f_sleep(2.0);
2464}
2465
2466testcase TC_pcu_data_req_pdtch() runs on test_CT {
2467 f_init();
2468 f_TC_pcu_act_req(0, 0, 7, true);
2469 f_pcu_wait_rts_and_data_req(0, 0, 7, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2470 /* FIXME: how to check this was actually sent */
2471 f_sleep(2.0);
2472}
2473
2474testcase TC_pcu_data_req_ptcch() runs on test_CT {
2475 f_init();
2476 f_TC_pcu_act_req(0, 0, 7, true);
2477 f_pcu_wait_rts_and_data_req(0, 0, 7, PCU_IF_SAPI_PTCCH, c_PCU_DATA);
2478 /* FIXME: how to check this was actually sent */
2479 f_sleep(2.0);
2480}
2481
2482/* Send AGCH from PCU; check it appears on Um side */
2483testcase TC_pcu_data_req_agch() runs on test_CT {
2484 timer T := 3.0;
2485 f_init();
2486 f_init_l1ctl();
2487 f_l1_tune(L1CTL);
2488
2489 f_TC_pcu_act_req(0, 0, 7, true);
2490 f_pcu_data_req(0, 0, 7, 0, 0, PCU_IF_SAPI_AGCH, c_PCU_DATA);
2491
2492 T.start;
2493 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01002494 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, c_PCU_DATA)) {
Harald Welte883340c2018-02-28 18:59:29 +01002495 setverdict(pass);
2496 }
2497 [] L1CTL.receive { repeat; }
2498 [] T.timeout {
2499 setverdict(fail, "Timeout waiting for PCU-originated AGCH block on Um");
2500 }
2501 }
2502}
2503
2504/* Send IMM.ASS from PCU for PCH; check it appears on Um side */
2505testcase TC_pcu_data_req_imm_ass_pch() runs on test_CT {
2506 var octetstring imm_ass := f_rnd_octstring(23);
2507 f_init();
2508 f_init_l1ctl();
2509 f_l1_tune(L1CTL);
2510
2511 /* append 3 last imsi digits so BTS can compute pagng group */
2512 var uint32_t fn := f_PCUIF_tx_imm_ass_pch(PCU, g_pcu_conn_id, imm_ass, '123459987'H);
2513
2514 timer T := 0.5;
2515 T.start;
2516 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01002517 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, imm_ass)) {
Harald Welte883340c2018-02-28 18:59:29 +01002518 /* TODO: verify paging group */
2519 setverdict(pass);
2520 }
2521 [] L1CTL.receive { repeat; }
2522 [] T.timeout {
2523 setverdict(fail, "Timeout waiting for PCU-originated AGCH block on Um");
2524 }
2525 }
2526}
2527
2528/* Send RACH from Um side, expect it to show up on PCU socket */
2529testcase TC_pcu_rach_content() runs on test_CT {
2530 f_init();
2531 f_init_l1ctl();
2532 f_l1_tune(L1CTL);
2533
2534 var GsmFrameNumber fn_last := 0;
2535 for (var integer i := 0; i < 1000; i := i+1) {
2536 var OCT1 ra := f_rnd_ra_ps();
2537 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
2538 if (fn == fn_last) {
2539 setverdict(fail, "Two RACH in same FN?!?");
2540 self.stop;
2541 }
2542 fn_last := fn;
2543
2544 timer T := 2.0;
2545 T.start;
2546 alt {
2547 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RACH_IND(0, oct2int(ra), 0, ?, fn))) {
2548 T.stop;
2549 }
2550 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RACH_IND)) {
2551 setverdict(fail, "Unexpected RACH IND");
2552 self.stop;
2553 }
2554 [] PCU.receive { repeat; }
2555 [] T.timeout {
2556 setverdict(fail, "Timeout waiting for RACH IND");
2557 self.stop;
2558 }
2559 }
2560 }
2561 setverdict(pass);
2562}
2563
2564private function f_pad_oct(octetstring str, integer len, OCT1 pad) return octetstring {
2565 var integer strlen := lengthof(str);
2566 for (var integer i := 0; i < len-strlen; i := i+1) {
2567 str := str & pad;
2568 }
2569 return str;
2570}
2571
2572/* Send PAGING via RSL, expect it to shw up on PCU socket */
2573testcase TC_pcu_paging_from_rsl() runs on test_CT {
2574 f_init();
2575
2576 for (var integer i := 0; i < 100; i := i+1) {
2577 var MobileL3_CommonIE_Types.MobileIdentityLV mi;
2578 timer T := 3.0;
2579 if (i < 50) {
2580 mi := valueof(ts_MI_TMSI_LV(f_rnd_octstring(4)));
2581 } else {
2582 mi := valueof(ts_MI_IMSI_LV(f_gen_imsi(i)));
2583 }
2584 var octetstring mi_enc_lv := enc_MobileIdentityLV(mi);
2585 var octetstring mi_enc := substr(mi_enc_lv, 1, lengthof(mi_enc_lv)-1);
2586 var octetstring t_mi_lv := f_pad_oct(mi_enc_lv, 9, '00'O);
2587
2588 /* Send RSL PAGING COMMAND */
2589 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_PAGING_CMD(mi_enc, i mod 4)));
2590 T.start;
2591 alt {
2592 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_PAG_REQ(0, t_mi_lv))) {
2593 }
2594 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_PAG_REQ)) {
2595 setverdict(fail, "Unexpected PAGING REQ");
2596 self.stop;
2597 }
2598 [] PCU.receive { repeat; }
2599 [] T.timeout {
2600 setverdict(fail, "Timeout waiting for PAGING REQ");
2601 self.stop;
2602 }
2603 }
2604 }
2605 setverdict(pass);
2606}
2607
2608
Harald Welte68e495b2018-02-25 00:05:57 +01002609/* TODO Areas:
2610
2611* channel activation
2612** with BS_Power / MS_Power, bypassing power control loop
2613** on primary vs. secondary TRX
2614** with encryption from initial activation on
2615** with timing advance from initial activation on
2616* mode modify
2617** encryption
2618** multirate
2619* check DEACTIVATE SACCH
2620* encryption command / intricate logic about tx-only/tx+rx/...
2621** unsupported algorithm
2622* handover detection
2623* MS Power Control
2624* BS Power Control
2625* Physical Context
2626* SACCH info modify
Harald Welte68e495b2018-02-25 00:05:57 +01002627* CCCH Load Indication for PCH and RACH
2628* Delete Indication on AGCH overflow
2629* SMS Broadcast Req / Cmd / CBCH LOad Ind
2630* RF resource ind
Harald Welte68e495b2018-02-25 00:05:57 +01002631* error handling
2632* discriminator error
2633** type error
2634** sequence error
2635** IE duplicated?
Harald Welte883340c2018-02-28 18:59:29 +01002636* PCU interface
2637** TIME_IND from BTS->PCU
2638** DATA_IND from BTS->PCU
2639** verification of PCU-originated DATA_REQ arrival on Um/MS side
Harald Welte68e495b2018-02-25 00:05:57 +01002640
2641*/
Harald Welte70767382018-02-21 12:16:40 +01002642
2643control {
2644 execute( TC_chan_act_stress() );
2645 execute( TC_chan_act_react() );
2646 execute( TC_chan_deact_not_active() );
2647 execute( TC_chan_act_wrong_nr() );
Harald Welte629cc6b2018-03-11 17:19:05 +01002648 execute( TC_deact_sacch() );
Harald Welteea17b912018-03-11 22:29:31 +01002649 execute( TC_sacch_filling() );
2650 execute( TC_sacch_info_mod() );
Harald Welte075d84c2018-03-12 13:07:24 +01002651 execute( TC_sacch_multi() );
Harald Welte55700662018-03-12 13:15:43 +01002652 execute( TC_sacch_multi_chg() );
Harald Welte8c24c2b2018-02-26 08:31:31 +01002653 execute( TC_rach_content() );
2654 execute( TC_rach_count() );
Harald Welte54a2a2d2018-02-26 09:14:05 +01002655 execute( TC_rach_max_ta() );
Harald Welte70767382018-02-21 12:16:40 +01002656 execute( TC_meas_res_sign_tchf() );
2657 execute( TC_meas_res_sign_tchh() );
2658 execute( TC_meas_res_sign_sdcch4() );
2659 execute( TC_meas_res_sign_sdcch8() );
Harald Welte685d5982018-02-27 20:42:05 +01002660 execute( TC_meas_res_sign_tchh_toa256() );
Harald Welte70767382018-02-21 12:16:40 +01002661 execute( TC_conn_fail_crit() );
Harald Welte68e495b2018-02-25 00:05:57 +01002662 execute( TC_paging_imsi_80percent() );
2663 execute( TC_paging_tmsi_80percent() );
2664 execute( TC_paging_imsi_200percent() );
2665 execute( TC_paging_tmsi_200percent() );
Harald Welte01d982c2018-02-25 01:31:40 +01002666 execute( TC_rsl_protocol_error() );
2667 execute( TC_rsl_mand_ie_error() );
2668 execute( TC_rsl_ie_content_error() );
Harald Welte48494ca2018-02-25 16:59:50 +01002669 execute( TC_si_sched_default() );
Harald Welte0cae4552018-03-09 22:20:26 +01002670 execute( TC_si_sched_1() );
Harald Welte48494ca2018-02-25 16:59:50 +01002671 execute( TC_si_sched_2bis() );
2672 execute( TC_si_sched_2ter() );
2673 execute( TC_si_sched_2ter_2bis() );
2674 execute( TC_si_sched_2quater() );
2675 execute( TC_si_sched_13() );
2676 execute( TC_si_sched_13_2bis_2ter_2quater() );
Harald Weltea871a382018-02-25 02:03:14 +01002677 execute( TC_ipa_dlcx_not_active() );
Harald Weltea3f1df92018-02-25 12:49:55 +01002678 execute( TC_ipa_crcx_twice_not_active() );
2679 execute( TC_ipa_crcx_mdcx_dlcx_not_active() );
Harald Welte3ae11da2018-02-25 13:36:06 +01002680 execute( TC_ipa_crcx_mdcx_mdcx_dlcx_not_active() );
Harald Welte9912eb52018-02-25 13:30:15 +01002681 execute( TC_ipa_crcx_sdcch_not_active() );
Harald Welte883340c2018-02-28 18:59:29 +01002682
2683 execute( TC_pcu_act_req() );
2684 execute( TC_pcu_act_req_wrong_ts() );
2685 execute( TC_pcu_act_req_wrong_bts() );
2686 execute( TC_pcu_act_req_wrong_trx() );
2687 execute( TC_pcu_deact_req() );
2688 execute( TC_pcu_deact_req_wrong_ts() );
2689 execute( TC_pcu_ver_si13() );
2690 execute( TC_pcu_data_req_wrong_bts() );
2691 execute( TC_pcu_data_req_wrong_trx() );
2692 execute( TC_pcu_data_req_wrong_ts() );
2693 execute( TC_pcu_data_req_ts_inactive() );
2694 execute( TC_pcu_data_req_pdtch() );
2695 execute( TC_pcu_data_req_ptcch() );
2696 execute( TC_pcu_data_req_agch() );
2697 execute( TC_pcu_data_req_imm_ass_pch() );
2698 execute( TC_pcu_rach_content() );
2699 execute( TC_pcu_paging_from_rsl() );
Harald Welte70767382018-02-21 12:16:40 +01002700}
2701
2702
2703}