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Harald Welte70767382018-02-21 12:16:40 +01001module BTS_Tests {
2
3import from General_Types all;
4import from GSM_Types all;
5import from GSM_RR_Types all;
6import from Osmocom_Types all;
7import from GSM_Types all;
8import from GSM_RR_Types all;
Harald Welte82ccef72018-02-25 16:17:33 +01009import from GSM_SystemInformation all;
Harald Welte70767382018-02-21 12:16:40 +010010import from L1CTL_PortType all;
11import from L1CTL_Types all;
12import from LAPDm_Types all;
13import from Osmocom_CTRL_Adapter all;
14
15import from RSL_Types all;
Harald Welte7484fc42018-02-24 14:09:45 +010016import from IPA_Types all;
Harald Welte70767382018-02-21 12:16:40 +010017import from IPA_Emulation all;
18import from RSL_Emulation all;
19
20import from IPL4asp_Types all;
21import from TRXC_Types all;
22import from TRXC_CodecPort all;
23import from TRXC_CodecPort_CtrlFunct all;
24
Harald Welte883340c2018-02-28 18:59:29 +010025import from PCUIF_Types all;
26import from PCUIF_CodecPort all;
27
Harald Welte7484fc42018-02-24 14:09:45 +010028import from MobileL3_CommonIE_Types all;
Harald Welte68e495b2018-02-25 00:05:57 +010029import from MobileL3_RRM_Types all;
30import from MobileL3_Types all;
31import from L3_Templates all;
Harald Welte7484fc42018-02-24 14:09:45 +010032
Harald Welte8da48242018-02-27 20:41:32 +010033import from Osmocom_VTY_Functions all;
34import from TELNETasp_PortType all;
35
Harald Welte70767382018-02-21 12:16:40 +010036/* The tests assume a BTS with the following timeslot configuration:
37 * TS0 : Combined CCCH + SDCCH/4
38 * TS1 .. TS 4: TCH/F
39 * TS5 : TCH/H
40 * TS6 : SDCCH/8
41 * TS7 : PDCH
42 */
43
44modulepar {
45 charstring mp_rsl_ip := "127.0.0.2";
46 integer mp_rsl_port := 3003;
47 integer mp_trx0_arfcn := 871;
Harald Weltea4d8f352018-03-01 15:47:20 +010048 charstring mp_bb_trxc_ip := "127.0.0.1";
Harald Welteef3e1c92018-02-28 23:40:14 +010049 integer mp_bb_trxc_port := 6701;
Harald Welte883340c2018-02-28 18:59:29 +010050 charstring mp_pcu_socket := PCU_SOCK_DEFAULT;
Harald Welted5684392018-03-10 18:22:04 +010051 integer mp_tolerance_rxqual := 1;
52 integer mp_tolerance_rxlev := 3;
Harald Welte70767382018-02-21 12:16:40 +010053}
54
Harald Welte629cc6b2018-03-11 17:19:05 +010055type record of RslChannelNr ChannelNrs;
56
Harald Welte70767382018-02-21 12:16:40 +010057type component test_CT extends CTRL_Adapter_CT {
Harald Welte68e495b2018-02-25 00:05:57 +010058 /* IPA Emulation component underneath RSL */
Harald Welte70767382018-02-21 12:16:40 +010059 var IPA_Emulation_CT vc_IPA;
Harald Welte68e495b2018-02-25 00:05:57 +010060 /* RSL Emulation component (for ConnHdlr tests) */
Harald Welte70767382018-02-21 12:16:40 +010061 var RSL_Emulation_CT vc_RSL;
Harald Welte68e495b2018-02-25 00:05:57 +010062 /* Direct RSL_CCHAN_PT */
Harald Welte70767382018-02-21 12:16:40 +010063 port RSL_CCHAN_PT RSL_CCHAN;
Harald Welte68e495b2018-02-25 00:05:57 +010064
65 /* L1CTL port (for classic tests) */
66 port L1CTL_PT L1CTL;
Harald Welte48494ca2018-02-25 16:59:50 +010067
Harald Welte54a2a2d2018-02-26 09:14:05 +010068 /* TRXC port (for classic tests) */
69 port TRXC_CODEC_PT BB_TRXC;
70 var integer g_bb_trxc_conn_id;
71
Harald Welte8da48242018-02-27 20:41:32 +010072 port TELNETasp_PT BTSVTY;
73
Harald Welte883340c2018-02-28 18:59:29 +010074 /* PCU Interface of BTS */
75 port PCUIF_CODEC_PT PCU;
76 var integer g_pcu_conn_id;
77 /* Last PCU INFO IND we received */
78 var PCUIF_Message g_pcu_last_info;
79
Harald Welte48494ca2018-02-25 16:59:50 +010080 /* SI configuration */
81 var SystemInformationConfig si_cfg := {
82 bcch_extended := false,
83 si1_present := false,
84 si2bis_present := false,
85 si2ter_present := false,
86 si2quater_present := false,
87 si7_present := false,
88 si8_present := false,
89 si9_present := false,
90 si13_present := false,
91 si13alt_present := false,
92 si15_present := false,
93 si16_present := false,
94 si17_present := false,
95 si2n_present := false,
96 si21_present := false,
97 si22_present := false
98 };
Harald Welte629cc6b2018-03-11 17:19:05 +010099
100 /* all logical channels available on the BTS */
101 var ChannelNrs g_AllChannels;
Harald Welte70767382018-02-21 12:16:40 +0100102}
103
104/* an individual call / channel */
105type component ConnHdlr extends RSL_DchanHdlr {
106 port L1CTL_PT L1CTL;
107
108 port TRXC_CODEC_PT BB_TRXC;
109 var integer g_bb_trxc_conn_id;
110
111 timer g_Tguard;
112 timer g_Tmeas_exp := 2.0; /* >= 103 SACCH multiframe ~ 500ms */
113
114 var ConnHdlrPars g_pars;
115 var uint8_t g_next_meas_res_nr := 0;
Harald Weltefa45e9e2018-03-10 18:59:03 +0100116 var boolean g_first_meas_res := true;
Harald Welte70767382018-02-21 12:16:40 +0100117}
118
119function f_init_rsl(charstring id) runs on test_CT {
120 vc_IPA := IPA_Emulation_CT.create(id & "-RSL-IPA");
121 vc_RSL := RSL_Emulation_CT.create(id & "-RSL");
122
123 map(vc_IPA:IPA_PORT, system:IPA_CODEC_PT);
124 connect(vc_IPA:IPA_RSL_PORT, vc_RSL:IPA_PT);
125 connect(self:RSL_CCHAN, vc_RSL:CCHAN_PT);
126
127 vc_IPA.start(IPA_Emulation.main_server(mp_rsl_ip, mp_rsl_port));
128 vc_RSL.start(RSL_Emulation.main(false));
129}
130
131type record ConnHdlrPars {
132 RslChannelNr chan_nr,
133 RSL_IE_ChannelMode chan_mode,
134 float t_guard,
135 ConnL1Pars l1_pars
136}
137
Harald Welte82ccef72018-02-25 16:17:33 +0100138template (value) RachControlParameters ts_RachCtrl_default := {
Harald Welte0fd1fb02018-03-10 17:19:50 +0100139 max_retrans := RACH_MAX_RETRANS_7,
140 tx_integer := '1001'B, /* 12 slots */
Harald Welte82ccef72018-02-25 16:17:33 +0100141 cell_barr_access := false,
142 re_not_allowed := true,
Harald Welteb9585f82018-03-10 17:18:47 +0100143 acc := '0000010000000000'B
Harald Welte82ccef72018-02-25 16:17:33 +0100144};
145
Harald Weltef10153f2018-02-25 16:34:05 +0100146template (value) CellSelectionParameters ts_CellSelPar_default := {
Harald Welte0fd1fb02018-03-10 17:19:50 +0100147 cell_resel_hyst_2dB := 2,
148 ms_txpwr_max_cch := 7,
Harald Weltef10153f2018-02-25 16:34:05 +0100149 acs := '0'B,
150 neci := true,
151 rxlev_access_min := 0
152}
153
154template (value) LocationAreaIdentification ts_LAI_default := {
155 mcc_mnc := '262F42'H,
156 lac := 42
157}
158
Harald Welte7484fc42018-02-24 14:09:45 +0100159/* Default SYSTEM INFORMATION 3 */
Harald Weltef8df4cb2018-03-10 15:15:08 +0100160template (value) SystemInformation ts_SI3_default := {
161 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_3, 18),
Harald Welte7484fc42018-02-24 14:09:45 +0100162 payload := {
163 si3 := {
164 cell_id := 23,
Harald Weltef10153f2018-02-25 16:34:05 +0100165 lai := ts_LAI_default,
Harald Welte7484fc42018-02-24 14:09:45 +0100166 ctrl_chan_desc := {
167 msc_r99 := true,
168 att := true,
169 bs_ag_blks_res := 1,
170 ccch_conf := CCHAN_DESC_1CCCH_COMBINED,
Harald Welte82ccef72018-02-25 16:17:33 +0100171 si22ind := false,
Harald Welte7484fc42018-02-24 14:09:45 +0100172 cbq3 := CBQ3_IU_MODE_NOT_SUPPORTED,
173 spare := '00'B,
174 bs_pa_mfrms := 0, /* 2 multiframes */
175 t3212 := 1 /* 6 minutes */
176 },
Harald Welte82ccef72018-02-25 16:17:33 +0100177 cell_options := {
Harald Welte7484fc42018-02-24 14:09:45 +0100178 dn_ind := false,
179 pwrc := false,
180 dtx := MS_MAY_USE_UL_DTX,
Harald Welte0fd1fb02018-03-10 17:19:50 +0100181 radio_link_tout_div4 := (32/4)-1
Harald Welte7484fc42018-02-24 14:09:45 +0100182 },
Harald Weltef10153f2018-02-25 16:34:05 +0100183 cell_sel_par := ts_CellSelPar_default,
Harald Welte82ccef72018-02-25 16:17:33 +0100184 rach_control := ts_RachCtrl_default,
Harald Welte3778acc2018-03-09 19:32:31 +0100185 rest_octets := '2B2B2B2B'O
Harald Welte7484fc42018-02-24 14:09:45 +0100186 }
187 }
188}
Harald Welte70767382018-02-21 12:16:40 +0100189
Harald Weltef8df4cb2018-03-10 15:15:08 +0100190template (value) SystemInformation ts_SI2_default := {
191 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_2, 22),
Harald Weltef10153f2018-02-25 16:34:05 +0100192 payload := {
193 si2 := {
194 bcch_freq_list := '00000000000000000000000000000000'O,
195 ncc_permitted := '11111111'B,
196 rach_control := ts_RachCtrl_default
197 }
198 }
199}
200
Harald Weltef8df4cb2018-03-10 15:15:08 +0100201template (value) SystemInformation ts_SI4_default := {
202 header := ts_RrHeader(SYSTEM_INFORMATION_TYPE_4, 12), /* no CBCH / restoct */
Harald Weltef10153f2018-02-25 16:34:05 +0100203 payload := {
204 si4 := {
205 lai := ts_LAI_default,
206 cell_sel_par := ts_CellSelPar_default,
207 rach_control := ts_RachCtrl_default,
208 cbch_chan_desc := omit,
209 cbch_mobile_alloc := omit,
210 rest_octets := ''O
211 }
212 }
213}
214
215function f_rsl_bcch_fill_raw(RSL_IE_SysinfoType rsl_si_type, octetstring si_enc)
216runs on test_CT {
217 log("Setting ", rsl_si_type, ": ", si_enc);
218 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_BCCH_INFO(rsl_si_type, si_enc)));
219}
220
221function f_rsl_bcch_fill(RSL_IE_SysinfoType rsl_si_type, template (value) SystemInformation si_dec)
222runs on test_CT {
223 var octetstring si_enc := enc_SystemInformation(valueof(si_dec));
224 log("Setting ", rsl_si_type, ": ", si_dec);
225 f_rsl_bcch_fill_raw(rsl_si_type, si_enc);
226}
227
Harald Welte8da48242018-02-27 20:41:32 +0100228private function f_init_vty(charstring id) runs on test_CT {
229 map(self:BTSVTY, system:BTSVTY);
230 f_vty_set_prompts(BTSVTY);
231 f_vty_transceive(BTSVTY, "enable");
232}
233
Harald Welte883340c2018-02-28 18:59:29 +0100234/* PCU socket may at any time receive a new INFO.ind */
235private altstep as_pcu_info_ind() runs on test_CT {
236 var PCUIF_send_data sd;
237 [] PCU.receive(t_SD_PCUIF_MSGT(g_pcu_conn_id, PCU_IF_MSG_INFO_IND)) -> value sd {
238 g_pcu_last_info := sd.data;
239 repeat;
240 }
241}
242
243private function f_init_pcu(charstring id) runs on test_CT {
244 timer T := 2.0;
245 var PCUIF_send_data sd;
246 map(self:PCU, system:PCU);
Harald Welte84271622018-03-10 17:21:03 +0100247 if (mp_pcu_socket == "") {
248 g_pcu_conn_id := -1;
249 return;
250 }
Harald Welte883340c2018-02-28 18:59:29 +0100251 g_pcu_conn_id := f_pcuif_connect(PCU, mp_pcu_socket);
252
253 T.start;
254 alt {
255 [] PCU.receive(t_SD_PCUIF_MSGT(g_pcu_conn_id, PCU_IF_MSG_INFO_IND)) -> value sd {
256 g_pcu_last_info := sd.data;
257 }
258 [] T.timeout {
259 setverdict(fail, "Timeout waiting for PCU INFO_IND");
260 self.stop;
261 }
262 }
263}
264
Harald Welte70767382018-02-21 12:16:40 +0100265/* global init function */
Harald Welte68e495b2018-02-25 00:05:57 +0100266function f_init(charstring id := "BTS-Test") runs on test_CT {
Harald Welte629cc6b2018-03-11 17:19:05 +0100267 g_AllChannels := {
268 /* TS 1..4: TCH/F */
269 valueof(ts_RslChanNr_Bm(1)), valueof(ts_RslChanNr_Bm(2)),
270 valueof(ts_RslChanNr_Bm(3)), valueof(ts_RslChanNr_Bm(4)),
271 /* TS 5: TCH/H */
272 valueof(ts_RslChanNr_Lm(5,0)), valueof(ts_RslChanNr_Lm(5,1)),
273 /* TS 0: SDCCH/4 */
274 valueof(ts_RslChanNr_SDCCH4(0,0)), valueof(ts_RslChanNr_SDCCH4(0,1)),
275 valueof(ts_RslChanNr_SDCCH4(0,2)), valueof(ts_RslChanNr_SDCCH4(0,3)),
276 /* TS 6: SDCCH/8 */
277 valueof(ts_RslChanNr_SDCCH8(6,0)), valueof(ts_RslChanNr_SDCCH8(6,1)),
278 valueof(ts_RslChanNr_SDCCH8(6,2)), valueof(ts_RslChanNr_SDCCH8(6,3)),
279 valueof(ts_RslChanNr_SDCCH8(6,4)), valueof(ts_RslChanNr_SDCCH8(6,5)),
280 valueof(ts_RslChanNr_SDCCH8(6,6)), valueof(ts_RslChanNr_SDCCH8(6,7))
281 };
282
Harald Welte70767382018-02-21 12:16:40 +0100283 f_init_rsl(id);
284 RSL_CCHAN.receive(ASP_IPA_Event:{up_down := ASP_IPA_EVENT_UP});
Harald Welte2d142592018-02-25 13:19:44 +0100285 f_sleep(0.5); /* workaround for OS#3000 */
Harald Welte8da48242018-02-27 20:41:32 +0100286 f_init_vty(id);
Harald Welte7484fc42018-02-24 14:09:45 +0100287
288 /* Send SI3 to the BTS, it is needed for various computations */
Harald Weltef10153f2018-02-25 16:34:05 +0100289 f_rsl_bcch_fill(RSL_SYSTEM_INFO_3, ts_SI3_default);
290 /* SI2 + SI4 are required for SI testing as they are mandatory defaults */
291 f_rsl_bcch_fill(RSL_SYSTEM_INFO_2, ts_SI2_default);
292 f_rsl_bcch_fill(RSL_SYSTEM_INFO_4, ts_SI4_default);
Harald Welte57fe8232018-02-26 17:52:50 +0100293
Harald Welte883340c2018-02-28 18:59:29 +0100294 f_init_pcu(id);
295
Harald Welte84271622018-03-10 17:21:03 +0100296 if (mp_bb_trxc_port != -1) {
297 var TrxcMessage ret;
298 /* start with a default moderate timing offset equalling TA=2 */
299 f_main_trxc_connect();
300 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(2*256)));
301 }
Harald Welte70767382018-02-21 12:16:40 +0100302}
303
Harald Welte294b0a22018-03-10 23:26:48 +0100304function f_shutdown() runs on test_CT {
305 /* shut down all "externally interfaced" components first to avoid unclean shutdown */
306 vc_IPA.stop;
307 vc_RSL.stop;
308}
309
Harald Welte68e495b2018-02-25 00:05:57 +0100310/* Attach L1CTL to master test_CT (classic tests, non-handler mode) */
311function f_init_l1ctl() runs on test_CT {
312 map(self:L1CTL, system:L1CTL);
313 f_connect_reset(L1CTL);
314}
315
Harald Welte70767382018-02-21 12:16:40 +0100316type function void_fn(charstring id) runs on ConnHdlr;
317
318/* create a new test component */
319function f_start_handler(void_fn fn, ConnHdlrPars pars)
320runs on test_CT return ConnHdlr {
321 var charstring id := testcasename();
322 var ConnHdlr vc_conn;
323
324 vc_conn := ConnHdlr.create(id);
325 /* connect to RSL Emulation main component */
326 connect(vc_conn:RSL, vc_RSL:CLIENT_PT);
327 connect(vc_conn:RSL_PROC, vc_RSL:RSL_PROC);
328
329 vc_conn.start(f_handler_init(fn, id, pars));
330 return vc_conn;
331}
332
Harald Welte7484fc42018-02-24 14:09:45 +0100333template ASP_RSL_Unitdata ts_RSL_UD(template RSL_Message rsl, IpaStreamId sid := IPAC_PROTO_RSL_TRX0) := {
334 streamId := sid,
335 rsl := rsl
336}
337
338template ASP_RSL_Unitdata tr_RSL_UD(template RSL_Message rsl,
339 template IpaStreamId sid := IPAC_PROTO_RSL_TRX0) := {
340 streamId := sid,
341 rsl := rsl
342}
343
Harald Welte70767382018-02-21 12:16:40 +0100344private altstep as_Tguard() runs on ConnHdlr {
345 [] g_Tguard.timeout {
346 setverdict(fail, "Tguard timeout");
347 self.stop;
348 }
349}
350
Harald Welte68e495b2018-02-25 00:05:57 +0100351private function f_l1_tune(L1CTL_PT L1CTL) {
Harald Welte70767382018-02-21 12:16:40 +0100352 f_L1CTL_FBSB(L1CTL, { false, mp_trx0_arfcn }, CCCH_MODE_COMBINED);
353}
354
355private function f_trxc_connect() runs on ConnHdlr {
356 map(self:BB_TRXC, system:BB_TRXC);
357 var Result res;
Harald Weltea4d8f352018-03-01 15:47:20 +0100358 res := TRXC_CodecPort_CtrlFunct.f_IPL4_connect(BB_TRXC, mp_bb_trxc_ip, mp_bb_trxc_port,
359 "", -1, -1, {udp:={}}, {});
Harald Welte70767382018-02-21 12:16:40 +0100360 g_bb_trxc_conn_id := res.connId;
361}
362
363private function f_trxc_fake_rssi(uint8_t rssi) runs on ConnHdlr {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100364 var TrxcMessage ret;
365 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_RSSI(rssi)));
Harald Welte70767382018-02-21 12:16:40 +0100366}
367
368private function f_trx_fake_toffs256(int16_t toffs256) runs on ConnHdlr {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100369 var TrxcMessage ret;
370 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(toffs256)));
Harald Welte70767382018-02-21 12:16:40 +0100371}
372
373/* first function started in ConnHdlr component */
374private function f_handler_init(void_fn fn, charstring id, ConnHdlrPars pars)
375runs on ConnHdlr {
376 g_pars := pars;
377 g_chan_nr := pars.chan_nr;
378
379 map(self:L1CTL, system:L1CTL);
380 f_connect_reset(L1CTL);
381
Harald Welte84271622018-03-10 17:21:03 +0100382 if (mp_bb_trxc_port != -1) {
383 f_trxc_connect();
384 }
Harald Welte70767382018-02-21 12:16:40 +0100385
386 g_Tguard.start(pars.t_guard);
387 activate(as_Tguard());
388
389 f_rslem_register(0, pars.chan_nr);
390
391 /* call the user-supplied test case function */
392 fn.apply(id);
393}
394
Harald Welte21240e62018-03-11 21:43:35 +0100395function f_rsl_transceive(template RSL_Message tx, template RSL_Message exp_rx, charstring id,
396 boolean ignore_other := false)
Harald Welte1eba3742018-02-25 12:48:14 +0100397runs on ConnHdlr {
398 timer T := 3.0;
399 RSL.send(tx);
400 T.start;
Harald Welte70767382018-02-21 12:16:40 +0100401 alt {
Harald Welte1eba3742018-02-25 12:48:14 +0100402 [] RSL.receive(exp_rx) {
403 T.stop;
404 setverdict(pass);
Harald Welte70767382018-02-21 12:16:40 +0100405 }
Harald Welte1eba3742018-02-25 12:48:14 +0100406 [] T.timeout {
407 setverdict(fail, "Timeout expecting " & id);
408 self.stop;
409 }
Harald Welte21240e62018-03-11 21:43:35 +0100410 [not ignore_other] as_l1_sacch();
411 [not ignore_other] as_meas_res();
412 [not ignore_other] as_l1_dcch();
413 [not ignore_other] RSL.receive {
Harald Welte1eba3742018-02-25 12:48:14 +0100414 setverdict(fail, "Unexpected RSL message received");
Harald Welte70767382018-02-21 12:16:40 +0100415 }
Harald Welte21240e62018-03-11 21:43:35 +0100416 [ignore_other] RSL.receive { repeat; }
Harald Welte70767382018-02-21 12:16:40 +0100417 }
418}
419
Harald Welte1eba3742018-02-25 12:48:14 +0100420function f_rsl_chan_act(RSL_IE_ChannelMode mode) runs on ConnHdlr {
421 f_rsl_transceive(ts_RSL_CHAN_ACT(g_chan_nr, mode), tr_RSL_CHAN_ACT_ACK(g_chan_nr),
422 "RSL CHAN ACT");
423}
424
Harald Welte70767382018-02-21 12:16:40 +0100425function f_rsl_chan_deact() runs on ConnHdlr {
Harald Welte1eba3742018-02-25 12:48:14 +0100426 f_rsl_transceive(ts_RSL_RF_CHAN_REL(g_chan_nr), tr_RSL_RF_CHAN_REL_ACK(g_chan_nr),
Harald Welte21240e62018-03-11 21:43:35 +0100427 "RF CHAN REL", true);
Harald Welte70767382018-02-21 12:16:40 +0100428}
429
Harald Welte70767382018-02-21 12:16:40 +0100430private template ConnHdlrPars t_Pars(template RslChannelNr chan_nr,
431 template RSL_IE_ChannelMode chan_mode,
432 float t_guard := 20.0) := {
433 chan_nr := valueof(chan_nr),
434 chan_mode := valueof(chan_mode),
435 t_guard := t_guard,
436 l1_pars := {
437 dtx_enabled := false,
Harald Welte685d5982018-02-27 20:42:05 +0100438 toa256_enabled := false,
Harald Welte70767382018-02-21 12:16:40 +0100439 meas_ul := {
440 full := {
441 rxlev := dbm2rxlev(-53),
442 rxqual := 0
443 },
444 sub := {
445 rxlev := dbm2rxlev(-53),
446 rxqual := 0
447 }
448 },
449 timing_offset_256syms := 0,
450 bs_power_level := 0,
451 ms_power_level := 0,
452 ms_actual_ta := 0
453 }
454}
455
Harald Welte93640c62018-02-25 16:59:33 +0100456/***********************************************************************
457 * Channel Activation / Deactivation
458 ***********************************************************************/
459
Harald Welte70767382018-02-21 12:16:40 +0100460/* Stress test: Do 500 channel activations/deactivations in rapid succession */
461function f_TC_chan_act_stress(charstring id) runs on ConnHdlr {
462 for (var integer i := 0; i < 500; i := i+1) {
463 f_rsl_chan_act(g_pars.chan_mode);
464 f_rsl_chan_deact();
465 }
466 setverdict(pass);
467}
468testcase TC_chan_act_stress() runs on test_CT {
469 var ConnHdlr vc_conn;
470 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
471 f_init(testcasename());
472 vc_conn := f_start_handler(refers(f_TC_chan_act_stress), pars);
473 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100474 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100475}
476
477/* Test if re-activation of an already active channel fails as expected */
478function f_TC_chan_act_react(charstring id) runs on ConnHdlr {
479 f_rsl_chan_act(g_pars.chan_mode);
480 /* attempt to activate the same lchan again -> expect reject */
481 RSL.send(ts_RSL_CHAN_ACT(g_chan_nr, g_pars.chan_mode));
482 alt {
483 [] RSL.receive(tr_RSL_CHAN_ACT_ACK(g_chan_nr)) {
484 setverdict(fail, "Unexpected CHAN ACT ACK on double activation");
485 }
486 [] RSL.receive(tr_RSL_CHAN_ACT_NACK(g_chan_nr)) {
487 setverdict(pass);
488 }
489 }
490 f_rsl_chan_deact();
491}
492testcase TC_chan_act_react() runs on test_CT {
493 var ConnHdlr vc_conn;
494 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
Harald Welte294b0a22018-03-10 23:26:48 +0100495 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100496 vc_conn := f_start_handler(refers(f_TC_chan_act_react), pars);
497 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100498 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100499}
500
501/* Attempt to de-activate a channel that's not active */
502function f_TC_chan_deact_not_active(charstring id) runs on ConnHdlr {
503 timer T := 3.0;
504 RSL.send(ts_RSL_RF_CHAN_REL(g_chan_nr));
505 T.start;
506 alt {
507 [] RSL.receive(tr_RSL_RF_CHAN_REL_ACK(g_chan_nr)) {
508 setverdict(pass);
509 }
510 [] T.timeout {
511 setverdict(fail, "Timeout expecting RF_CHAN_REL_ACK");
512 }
513 }
514}
515testcase TC_chan_deact_not_active() runs on test_CT {
516 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
Harald Welte294b0a22018-03-10 23:26:48 +0100517 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100518 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_chan_deact_not_active), pars);
519 vc_conn.done;
Harald Welte294b0a22018-03-10 23:26:48 +0100520 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100521}
522
523/* attempt to activate channel with wrong RSL Channel Nr IE; expect NACK */
524function f_TC_chan_act_wrong_nr(charstring id) runs on ConnHdlr {
525 RSL.send(ts_RSL_CHAN_ACT(g_chan_nr, g_pars.chan_mode));
526 alt {
527 [] RSL.receive(tr_RSL_CHAN_ACT_ACK(g_chan_nr)) {
528 setverdict(fail, "Unexpected CHAN ACT ACK");
529 }
530 [] RSL.receive(tr_RSL_CHAN_ACT_NACK(g_chan_nr)) {
531 setverdict(pass);
532 }
533 }
534}
535private type record WrongChanNrCase {
536 RslChannelNr chan_nr,
537 charstring description
538}
539private type record of WrongChanNrCase WrongChanNrCases;
540private template WrongChanNrCase t_WCN(template RslChannelNr chan_nr, charstring desc) := {
541 chan_nr := chan_nr,
542 description := desc
543}
544
545testcase TC_chan_act_wrong_nr() runs on test_CT {
546 var ConnHdlr vc_conn;
547 var ConnHdlrPars pars;
548
Harald Welte294b0a22018-03-10 23:26:48 +0100549 f_init();
Harald Welte70767382018-02-21 12:16:40 +0100550
551 var WrongChanNrCases wrong := {
552 valueof(t_WCN(t_RslChanNr_RACH(0), "RACH is not a dedicated channel")),
553 valueof(t_WCN(t_RslChanNr_RACH(1), "RACH doesn't exist on timeslot")),
554 valueof(t_WCN(t_RslChanNr_BCCH(0), "BCCH is not a dedicated channel")),
555 valueof(t_WCN(t_RslChanNr_PCH_AGCH(0), "PCH/AGCH is not a dedicated channel")),
556 valueof(t_WCN(t_RslChanNr_Bm(0), "TS0 cannot be TCH/F")),
557 valueof(t_WCN(t_RslChanNr_Lm(0, 0), "TS0 cannot be TCH/H")),
558 valueof(t_WCN(t_RslChanNr_Lm(0, 1), "TS0 cannot be TCH/H")),
559 valueof(t_WCN(t_RslChanNr_PDCH(0), "TS0 cannot be PDCH")),
560 valueof(t_WCN(t_RslChanNr_SDCCH8(0, 0), "TS0 cannot be SDCCH/8")),
561 valueof(t_WCN(t_RslChanNr_SDCCH8(0, 7), "TS0 cannot be SDCCH/8")),
562 valueof(t_WCN(t_RslChanNr_SDCCH4(7, 0), "TS7 cannot be SDCCH/4")),
563 valueof(t_WCN(t_RslChanNr_SDCCH4(7, 3), "TS7 cannot be SDCCH/4")),
564 valueof(t_WCN(t_RslChanNr_Lm(1, 0), "TS1 cannot be TCH/H"))
565 };
566
567 for (var integer i := 0; i < sizeof(wrong); i := i+1) {
568 pars := valueof(t_Pars(wrong[i].chan_nr, ts_RSL_ChanMode_SIGN));
569 vc_conn := f_start_handler(refers(f_TC_chan_act_wrong_nr), pars);
570 vc_conn.done;
571 }
Harald Welte294b0a22018-03-10 23:26:48 +0100572 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100573}
574
Harald Welte93640c62018-02-25 16:59:33 +0100575/***********************************************************************
Harald Welte629cc6b2018-03-11 17:19:05 +0100576 * SACCH handling
577 ***********************************************************************/
578
579private function f_exp_sacch(boolean exp) runs on ConnHdlr {
580 timer T_sacch := 3.0;
581 T_sacch.start;
582 alt {
583 [not exp] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) {
584 setverdict(fail, "Received SACCH when not expecting it");
585 }
586 [not exp] T_sacch.timeout {
587 setverdict(pass);
588 }
589 [exp] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) {
590 setverdict(pass);
591 }
592 [exp] T_sacch.timeout {
593 setverdict(fail, "Timeout waiting for SACCH on ", g_chan_nr);
594 }
595 [] L1CTL.receive { repeat; }
596 [] RSL.receive { repeat; }
597 }
598}
599
600/* Test if DEACTIVATE SACCH actualy deactivates its transmission (TS 48.058 4.6) */
601private function f_TC_deact_sacch(charstring id) runs on ConnHdlr {
602 f_l1_tune(L1CTL);
603 RSL.clear;
604
605 /* activate the logical channel */
606 f_est_dchan();
607 L1CTL.clear;
608
609 /* check that SACCH actually are received as expected */
610 f_exp_sacch(true);
611
612 /* deactivate SACCH on the logical channel */
613 RSL.send(ts_RSL_DEACT_SACCH(g_chan_nr));
614 f_sleep(1.0);
615 L1CTL.clear;
616
617 /* check that no SACCH are received anymore */
618 f_exp_sacch(false);
619
620 /* release the channel */
621 f_rsl_chan_deact();
622 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
623}
624testcase TC_deact_sacch() runs on test_CT {
625 var ConnHdlr vc_conn;
626 var ConnHdlrPars pars;
627 f_init();
628 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
629 //for (var integer i := 0; i < 1; i := i+1) {
630 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
631 log(testcasename(), ": Starting for ", g_AllChannels[i]);
632 vc_conn := f_start_handler(refers(f_TC_deact_sacch), pars);
633 vc_conn.done;
634 }
635 /* TODO: do the above in parallel, rather than sequentially? */
636 f_shutdown();
637}
638
Harald Welteea17b912018-03-11 22:29:31 +0100639private function f_sacch_present(template octetstring l3_exp) runs on ConnHdlr {
640 var L1ctlDlMessage dl;
641 /* check that the specified SI5 value is actually sent */
642 timer T_sacch := 3.0;
643 L1CTL.clear;
644 T_sacch.start;
645 alt {
646 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(0))) -> value dl {
647 var octetstring l3 := substr(dl.payload.data_ind.payload, 4, 19);
648 if (match(l3, l3_exp)) {
649 setverdict(pass);
650 } else {
651 repeat;
652 }
653 }
654 [] L1CTL.receive { repeat; }
655 [] T_sacch.timeout {
656 setverdict(fail, "Timeout waiting for SACCH ", l3_exp);
657 self.stop;
658 }
659 }
660}
661
Harald Welte629cc6b2018-03-11 17:19:05 +0100662/* Test for default SACCH FILL transmitted in DL SACCH (all channel types) */
Harald Welteea17b912018-03-11 22:29:31 +0100663private function f_TC_sacch_filling(charstring id) runs on ConnHdlr {
664 /* Set a known default SACCH filling for SI5 */
665 var octetstring si5 := f_rnd_octstring(19);
666 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
667
668 f_l1_tune(L1CTL);
669 RSL.clear;
670
671 /* activate the logical channel */
672 f_est_dchan();
673
674 /* check that the specified SI5 value is actually sent */
675 f_sacch_present(si5);
676
677 /* release the channel */
678 RSL.clear;
679 f_rsl_chan_deact();
680 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
681}
682testcase TC_sacch_filling() runs on test_CT {
683 var ConnHdlr vc_conn;
684 var ConnHdlrPars pars;
685 f_init();
686 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
687 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
688 log(testcasename(), ": Starting for ", g_AllChannels[i]);
689 vc_conn := f_start_handler(refers(f_TC_sacch_filling), pars);
690 vc_conn.done;
691 }
692 /* TODO: do the above in parallel, rather than sequentially? */
693 f_shutdown();
694}
695
Harald Welte629cc6b2018-03-11 17:19:05 +0100696/* Test for lchan-specific SACCH INFO MODIFY (TS 48.058 4.12) */
Harald Welteea17b912018-03-11 22:29:31 +0100697private function f_TC_sacch_info_mod(charstring id) runs on ConnHdlr {
698 /* Set a known default SACCH filling for SI5 */
699 var octetstring si5 := f_rnd_octstring(19);
700 var octetstring si5_diff := f_rnd_octstring(19);
701 RSL.send(ts_RSL_SACCH_FILL(RSL_SYSTEM_INFO_5, si5));
702
703 f_l1_tune(L1CTL);
704 RSL.clear;
705
706 log("Activating channel, expecting standard SI5");
707 /* activate the logical channel */
708 f_est_dchan();
709 /* check that the specified SI5 value is actually sent */
710 f_sacch_present(si5);
711
712 /* set channel-specific different SI5 */
713 log("Setting channel specific SACCH INFO, expecting it");
714 RSL.send(ts_RSL_SACCH_INF_MOD(g_chan_nr, RSL_SYSTEM_INFO_5, si5_diff))
715 /* check that the specified lchan-specific value is now used */
716 f_sacch_present(si5_diff);
717
718 /* deactivate the channel and re-activate it, this should result in default SI5 */
719 log("De-activating and re-activating channel, expecting standard SI5");
720 f_rsl_chan_deact();
721 f_rsl_chan_act(valueof(ts_RSL_ChanMode_SIGN));
722 /* Verify that the TRX-wide default SACCH filling is present again */
723 f_sacch_present(si5);
724
725 /* release the channel */
726 RSL.clear;
727 f_rsl_chan_deact();
728 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
729}
730testcase TC_sacch_info_mod() runs on test_CT {
731 var ConnHdlr vc_conn;
732 var ConnHdlrPars pars;
733 f_init();
734 for (var integer i := 0; i < sizeof(g_AllChannels); i := i+1) {
735 pars := valueof(t_Pars(g_AllChannels[i], ts_RSL_ChanMode_SIGN));
736 log(testcasename(), ": Starting for ", g_AllChannels[i]);
737 vc_conn := f_start_handler(refers(f_TC_sacch_info_mod), pars);
738 vc_conn.done;
739 }
740 /* TODO: do the above in parallel, rather than sequentially? */
741 f_shutdown();
742}
743
Harald Welte629cc6b2018-03-11 17:19:05 +0100744/* Test for SACCH transmission rules in the context of special CHAN ACT (HO) */
745
746
747/***********************************************************************
Harald Welte93640c62018-02-25 16:59:33 +0100748 * RACH Handling
749 ***********************************************************************/
750
Harald Welte8c24c2b2018-02-26 08:31:31 +0100751/* like L1SAP_IS_PACKET_RACH */
752private function ra_is_ps(OCT1 ra) return boolean {
Harald Welte56c05802018-02-28 21:39:35 +0100753 if ((ra and4b 'F0'O == '70'O) and (ra and4b '0F'O != '0F'O)) {
Harald Welte8c24c2b2018-02-26 08:31:31 +0100754 return true;
755 }
756 return false;
757}
758
759/* generate a random RACH for circuit-switched */
760private function f_rnd_ra_cs() return OCT1 {
761 var OCT1 ra;
762 do {
763 ra := f_rnd_octstring(1);
764 } while (ra_is_ps(ra));
765 return ra;
766}
767
Harald Welte883340c2018-02-28 18:59:29 +0100768/* generate a random RACH for packet-switched */
769private function f_rnd_ra_ps() return OCT1 {
770 var OCT1 ra;
771 do {
772 ra := f_rnd_octstring(1);
773 } while (not ra_is_ps(ra));
774 return ra;
775}
776
Harald Welte8c24c2b2018-02-26 08:31:31 +0100777/* Send 1000 RACH requests and check their RA+FN on the RSL side */
778testcase TC_rach_content() runs on test_CT {
779 f_init(testcasename());
780 f_init_l1ctl();
Harald Welte68e495b2018-02-25 00:05:57 +0100781 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +0100782
Harald Welte8c24c2b2018-02-26 08:31:31 +0100783 var GsmFrameNumber fn_last := 0;
784 for (var integer i := 0; i < 1000; i := i+1) {
785 var OCT1 ra := f_rnd_ra_cs();
786 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
787 if (fn == fn_last) {
788 setverdict(fail, "Two RACH in same FN?!?");
789 self.stop;
790 }
791 fn_last := fn;
792
793 timer T := 5.0;
Harald Welte56c05802018-02-28 21:39:35 +0100794 T.start;
Harald Welte8c24c2b2018-02-26 08:31:31 +0100795 alt {
796 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn, ?))) {
797 T.stop;
798 }
799 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(?, ?, ?))) {
800 setverdict(fail, "Unexpected CHAN RQD");
801 self.stop;
802 }
803 [] RSL_CCHAN.receive { repeat; }
804 [] T.timeout {
805 setverdict(fail, "Timeout waiting for CHAN RQD");
806 self.stop;
807 }
808 }
809 }
810 setverdict(pass);
Harald Welte294b0a22018-03-10 23:26:48 +0100811 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100812}
Harald Welte8c24c2b2018-02-26 08:31:31 +0100813
814/* Send 1000 RACH Requests (flood ~ 89/s) and count if count(Abis) == count(Um) */
815testcase TC_rach_count() runs on test_CT {
Harald Welte294b0a22018-03-10 23:26:48 +0100816 f_init();
Harald Welte8c24c2b2018-02-26 08:31:31 +0100817 f_init_l1ctl();
Harald Welte294b0a22018-03-10 23:26:48 +0100818 f_sleep(1.0);
Harald Welte8c24c2b2018-02-26 08:31:31 +0100819 f_l1_tune(L1CTL);
820
821 var GsmFrameNumber fn_last := 0;
822 for (var integer i := 0; i < 1000; i := i+1) {
823 var OCT1 ra := f_rnd_ra_cs();
824 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
825 if (fn == fn_last) {
826 setverdict(fail, "Two RACH in same FN?!?");
827 self.stop;
828 }
829 fn_last := fn;
830 }
831 var integer rsl_chrqd := 0;
832 timer T := 3.0;
Harald Welte56c05802018-02-28 21:39:35 +0100833 T.start;
Harald Welte8c24c2b2018-02-26 08:31:31 +0100834 alt {
835 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(?,?))) {
836 rsl_chrqd := rsl_chrqd + 1;
Harald Weltec3a3f452018-02-26 17:37:47 +0100837 f_timer_safe_restart(T);
Harald Welte8c24c2b2018-02-26 08:31:31 +0100838 repeat;
839 }
840 [] RSL_CCHAN.receive { repeat; }
841 [] T.timeout { }
842 }
843 if (rsl_chrqd == 1000) {
844 setverdict(pass);
845 } else {
846 setverdict(fail, "Received only ", rsl_chrqd, " out of 1000 RACH");
847 }
Harald Welte294b0a22018-03-10 23:26:48 +0100848 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +0100849}
850
Harald Welte54a2a2d2018-02-26 09:14:05 +0100851private function f_main_trxc_connect() runs on test_CT {
852 map(self:BB_TRXC, system:BB_TRXC);
853 var Result res;
Harald Welted3a88a62018-03-01 16:04:52 +0100854 res := TRXC_CodecPort_CtrlFunct.f_IPL4_connect(BB_TRXC, mp_bb_trxc_ip, mp_bb_trxc_port,
855 "", -1, -1, {udp:={}}, {});
Harald Welte54a2a2d2018-02-26 09:14:05 +0100856 g_bb_trxc_conn_id := res.connId;
857}
858
859private function f_rach_toffs(int16_t toffs256, boolean expect_pass) runs on test_CT {
Harald Weltef8df4cb2018-03-10 15:15:08 +0100860 var TrxcMessage ret;
Harald Welte54a2a2d2018-02-26 09:14:05 +0100861 /* tell fake_trx to use a given timing offset for all bursts */
Harald Weltef8df4cb2018-03-10 15:15:08 +0100862 ret := f_TRXC_transceive(BB_TRXC, g_bb_trxc_conn_id, valueof(ts_TRXC_FAKE_TIMING(toffs256)));
Harald Welte54a2a2d2018-02-26 09:14:05 +0100863 f_sleep(0.5);
864
865 /* Transmit RACH request + wait for confirmation */
866 var OCT1 ra := f_rnd_ra_cs();
867 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
868
869 /* Check for expected result */
870 timer T := 1.5;
871 T.start;
872 alt {
873 [expect_pass] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn))) {
874 setverdict(pass);
875 }
876 [not expect_pass] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_CHAN_RQD(ra, fn))) {
Harald Welteb3e30942018-03-02 10:33:42 +0100877 setverdict(fail, "RACH passed but was expected to be dropped: ", toffs256);
Harald Welte54a2a2d2018-02-26 09:14:05 +0100878 }
879 [] RSL_CCHAN.receive { repeat; }
880 [not expect_pass] T.timeout {
881 setverdict(pass);
882 }
883 [expect_pass] T.timeout {
884 setverdict(fail, "Timeout waiting for CHAN RQD");
885 }
886 }
887}
888
889/* Test if dropping of RACH Based on NM_ATT_MAX_TA works */
890testcase TC_rach_max_ta() runs on test_CT {
891 f_init(testcasename());
892 f_init_l1ctl();
893 f_l1_tune(L1CTL);
Harald Welte54a2a2d2018-02-26 09:14:05 +0100894 f_sleep(1.0);
895
896 /* default max-ta is 63 (full range of GSM timing advance */
897
Vadim Yanitskiyc81d6e42018-03-05 22:39:01 +0700898 /* We allow early arrival up to 2 symbols */
899 f_rach_toffs(-1*256, true);
900 f_rach_toffs(-2*256, true);
Harald Welte54a2a2d2018-02-26 09:14:05 +0100901 f_rach_toffs(-10*256, false);
902
903 /* 0 / 32 / 63 bits is legal / permitted */
904 f_rach_toffs(0, true);
905 f_rach_toffs(32*256, true);
906 f_rach_toffs(63*256, true);
907
908 /* more than 63 bits is not legal / permitted */
909 f_rach_toffs(64*256, false);
910 f_rach_toffs(127*256, false);
Harald Welte294b0a22018-03-10 23:26:48 +0100911 f_shutdown();
Harald Welte54a2a2d2018-02-26 09:14:05 +0100912}
Harald Welte8c24c2b2018-02-26 08:31:31 +0100913
Harald Welte93640c62018-02-25 16:59:33 +0100914/***********************************************************************
915 * Measurement Processing / Reporting
916 ***********************************************************************/
917
Harald Welte70767382018-02-21 12:16:40 +0100918template LapdmAddressField ts_LapdmAddr(LapdmSapi sapi, boolean c_r) := {
919 spare := '0'B,
920 lpd := 0,
921 sapi := sapi,
922 c_r := c_r,
923 ea := true
924}
925
926template LapdmFrameB ts_LAPDm_B(LapdmSapi sapi, boolean c_r, boolean p, octetstring pl) := {
927 addr := ts_LapdmAddr(sapi, c_r),
928 ctrl := t_LapdmCtrlUI(p),
929 len := 0, /* overwritten */
930 m := false,
931 el := 1,
932 payload := pl
933}
934
935/* handle incoming downlink SACCH and respond with uplink SACCH (meas res) */
936altstep as_l1_sacch() runs on ConnHdlr {
937 var L1ctlDlMessage l1_dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +0100938 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(?))) -> value l1_dl {
Harald Welte70767382018-02-21 12:16:40 +0100939 log("SACCH received: ", l1_dl.payload.data_ind.payload);
940 var GsmRrL3Message meas_rep := valueof(ts_MEAS_REP(true, 23, 23, 0, 0, omit));
941 var LapdmFrameB lb := valueof(ts_LAPDm_B(0, false, false, enc_GsmRrL3Message(meas_rep)));
942 log("LAPDm: ", lb);
943 var octetstring pl := '0000'O & enc_LapdmFrameB(lb);
Harald Weltef8df4cb2018-03-10 15:15:08 +0100944 L1CTL.send(ts_L1CTL_DATA_REQ(g_chan_nr, ts_RslLinkID_SACCH(0), pl));
Harald Welte70767382018-02-21 12:16:40 +0100945 repeat;
946 }
947}
948
949altstep as_l1_dcch() runs on ConnHdlr {
950 var L1ctlDlMessage l1_dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +0100951 [] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_DCCH(?))) -> value l1_dl {
Harald Welte70767382018-02-21 12:16:40 +0100952 log("DCCH received: ", l1_dl.payload.data_ind.payload);
953 var octetstring pl := '010301'O;
Harald Weltef8df4cb2018-03-10 15:15:08 +0100954 L1CTL.send(ts_L1CTL_DATA_REQ(g_chan_nr, ts_RslLinkID_DCCH(0), pl));
Harald Welte70767382018-02-21 12:16:40 +0100955 repeat;
956 }
957}
958
959type record MeasElem {
960 uint6_t rxlev,
961 uint3_t rxqual
962}
963
964type record MeasElemFS {
965 MeasElem full,
966 MeasElem sub
967}
968
969type record ConnL1Pars {
970 boolean dtx_enabled,
Harald Welte685d5982018-02-27 20:42:05 +0100971 boolean toa256_enabled,
Harald Welte70767382018-02-21 12:16:40 +0100972 MeasElemFS meas_ul,
973 int16_t timing_offset_256syms,
974 uint5_t bs_power_level,
975 uint5_t ms_power_level,
976 uint8_t ms_actual_ta
977}
978
979/* Convert tiing offset from 1/256th symbol to RSL Timing Offset */
980private function toffs256s_to_rsl(int16_t toffs256s) return uint8_t {
981 return 63 + (toffs256s/256);
982}
983
Harald Welted5684392018-03-10 18:22:04 +0100984private function f_max(integer a, integer b) return integer {
985 if (a > b) {
986 return a;
987 } else {
988 return b;
989 }
990}
991
992private function f_min(integer a, integer b) return integer {
993 if (a < b) {
994 return a;
995 } else {
996 return b;
997 }
998}
999
1000/* compute negative tolerance val-tolerance, ensure >= min */
1001private function f_tolerance_neg(integer val, integer min, integer tolerance) return integer {
1002 val := val - tolerance;
1003 return f_max(val, min);
1004}
1005
1006/* compute positive tolerance val+tolerance, ensure <= max */
1007private function f_tolerance_pos(integer val, integer max, integer tolerance) return integer {
1008 val := val + tolerance;
1009 return f_min(val, max);
1010}
1011
1012/* return a template of (val-tolerance .. val+tolerance) ensuring it is within (min .. max) */
1013private function f_tolerance(integer val, integer min, integer max, integer tolerance)
1014return template integer {
1015 var template integer ret;
1016 ret := (f_tolerance_neg(val, min, tolerance) .. f_tolerance_pos(val, max, tolerance));
1017 return ret;
1018}
1019
1020
Harald Welte70767382018-02-21 12:16:40 +01001021/* build a template for matching measurement results against */
1022private function f_build_meas_res_tmpl() runs on ConnHdlr return template RSL_Message {
1023 var ConnL1Pars l1p := g_pars.l1_pars;
1024 var template RSL_IE_UplinkMeas ul_meas := {
1025 len := 3,
1026 rfu := '0'B,
1027 dtx_d := l1p.dtx_enabled,
Harald Welted5684392018-03-10 18:22:04 +01001028 rxlev_f_u := f_tolerance(l1p.meas_ul.full.rxlev, 0, 63, mp_tolerance_rxlev),
Harald Welte70767382018-02-21 12:16:40 +01001029 reserved1 := '00'B,
Harald Welted5684392018-03-10 18:22:04 +01001030 rxlev_s_u := f_tolerance(l1p.meas_ul.sub.rxlev, 0, 63, mp_tolerance_rxlev),
Harald Welte70767382018-02-21 12:16:40 +01001031 reserved2 := '00'B,
Harald Welted5684392018-03-10 18:22:04 +01001032 rxq_f_u := f_tolerance(l1p.meas_ul.full.rxqual, 0, 7, mp_tolerance_rxqual),
1033 rxq_s_u := f_tolerance(l1p.meas_ul.sub.rxqual, 0, 7, mp_tolerance_rxqual),
Harald Welte70767382018-02-21 12:16:40 +01001034 supp_meas_info := omit
1035 };
Harald Welte685d5982018-02-27 20:42:05 +01001036 if (l1p.toa256_enabled) {
1037 ul_meas.len := 5;
1038 ul_meas.supp_meas_info := int2oct(l1p.timing_offset_256syms, 2);
1039 }
Harald Welte70767382018-02-21 12:16:40 +01001040 /* HACK HACK HACK FIXME HACK HACK HACK see https://osmocom.org/issues/2988 */
1041 ul_meas.rxlev_f_u := ?;
1042 ul_meas.rxlev_s_u := ?;
1043 ul_meas.rxq_f_u := ?;
1044 ul_meas.rxq_s_u := ?;
1045 var template RSL_IE_BS_Power bs_power := {
1046 reserved := 0,
1047 epc := false,
1048 fpc := false,
1049 power_level := l1p.bs_power_level
1050 };
1051 var template RSL_IE_L1Info l1_info := {
1052 ms_power_lvl := l1p.ms_power_level,
1053 fpc := false,
1054 reserved := 0,
1055 actual_ta := l1p.ms_actual_ta
1056 };
1057 var uint8_t offs := toffs256s_to_rsl(l1p.timing_offset_256syms);
1058 var template uint8_t t_toffs := (offs-1 .. offs+1); /* some tolerance */
1059 return tr_RSL_MEAS_RES_OSMO(g_chan_nr, g_next_meas_res_nr, ul_meas, bs_power, l1_info,
1060 ?, t_toffs);
1061}
1062
1063/* verify we regularly receive measurement reports with incrementing numbers */
1064altstep as_meas_res() runs on ConnHdlr {
1065 var RSL_Message rsl;
1066 [] RSL.receive(f_build_meas_res_tmpl()) -> value rsl {
1067 /* increment counter of next to-be-expected meas rep */
1068 g_next_meas_res_nr := (g_next_meas_res_nr + 1) mod 256;
1069 /* Re-start the timer expecting the next MEAS RES */
Harald Weltec3a3f452018-02-26 17:37:47 +01001070 f_timer_safe_restart(g_Tmeas_exp);
Harald Welte70767382018-02-21 12:16:40 +01001071 repeat;
1072 }
1073 [] RSL.receive(tr_RSL_MEAS_RES(g_chan_nr, g_next_meas_res_nr)) -> value rsl {
Harald Weltefa45e9e2018-03-10 18:59:03 +01001074 /* increment counter of next to-be-expected meas rep */
1075 g_next_meas_res_nr := (g_next_meas_res_nr + 1) mod 256;
1076 if (g_first_meas_res) {
1077 g_first_meas_res := false;
1078 repeat;
1079 } else {
1080 setverdict(fail, "Received unspecific MEAS RES ", rsl);
1081 self.stop;
1082 }
Harald Welte70767382018-02-21 12:16:40 +01001083 }
1084 [] RSL.receive(tr_RSL_MEAS_RES(?)) -> value rsl {
1085 setverdict(fail, "Received unexpected MEAS RES ", rsl);
1086 self.stop;
1087 }
1088 [] g_Tmeas_exp.timeout {
1089 setverdict(fail, "Didn't receive expected measurement result")
1090 self.stop;
1091 }
1092}
1093
1094/* Establish dedicated channel: L1CTL + RSL side */
1095private function f_est_dchan() runs on ConnHdlr {
1096 var GsmFrameNumber fn;
1097 var ImmediateAssignment imm_ass;
1098 var integer ra := 23;
1099
1100 fn := f_L1CTL_RACH(L1CTL, ra);
1101 /* This arrives on CCHAN, so we cannot test for receiving CHAN RQDhere */
1102 //RSL.receive(tr_RSL_CHAN_RQD(int2oct(23,1)));
1103
1104 /* Activate channel on BTS side */
1105 f_rsl_chan_act(g_pars.chan_mode);
1106
1107 /* Send IMM.ASS via CCHAN */
1108 var ChannelDescription ch_desc := {
1109 chan_nr := g_pars.chan_nr,
1110 tsc := 7,
1111 h := false,
1112 arfcn := mp_trx0_arfcn,
1113 maio_hsn := omit
1114 };
1115 var MobileAllocation ma := {
1116 len := 0,
1117 ma := ''B
1118 };
1119 var GsmRrMessage rr_msg := valueof(ts_IMM_ASS(ra, fn, 0, ch_desc, ma));
1120 RSL.send(ts_RSL_IMM_ASSIGN(enc_GsmRrMessage(rr_msg)));
1121
1122 /* receive IMM.ASS on MS side */
1123 var ImmediateAssignment ia_um;
1124 ia_um := f_L1CTL_WAIT_IMM_ASS(L1CTL, ra, fn);
1125 /* enable dedicated mode */
1126 f_L1CTL_DM_EST_REQ_IA(L1CTL, ia_um);
Harald Weltefa45e9e2018-03-10 18:59:03 +01001127
1128 g_first_meas_res := true;
Harald Welte70767382018-02-21 12:16:40 +01001129}
1130
1131/* establish DChan, verify existance + contents of measurement reports */
1132function f_TC_meas_res_periodic(charstring id) runs on ConnHdlr {
Harald Welte68e495b2018-02-25 00:05:57 +01001133 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +01001134 RSL.clear;
1135
Harald Welte5398d5e2018-03-10 19:00:24 +01001136 if (mp_bb_trxc_port != -1) {
1137 g_pars.l1_pars.meas_ul.full.rxlev := dbm2rxlev(-100);
1138 f_trxc_fake_rssi(100);
Harald Welte70767382018-02-21 12:16:40 +01001139
Harald Welte5398d5e2018-03-10 19:00:24 +01001140 g_pars.l1_pars.timing_offset_256syms := 512; /* 2 symbols */
1141 f_trx_fake_toffs256(g_pars.l1_pars.timing_offset_256syms);
1142 } else {
1143 g_pars.l1_pars.timing_offset_256syms := 0; /* FIXME */
1144 g_pars.l1_pars.meas_ul.full.rxlev := dbm2rxlev(-55); /* FIXME */
1145 }
1146 g_pars.l1_pars.meas_ul.sub.rxlev := g_pars.l1_pars.meas_ul.full.rxlev;
Harald Welte70767382018-02-21 12:16:40 +01001147
1148 f_est_dchan();
1149
1150 /* run for a number of seconds, send SACCH + FACCH from MS side and verify
1151 * RSL measurement reports on Abis side */
1152 timer T := 8.0;
1153 T.start;
1154 alt {
1155 [] as_l1_sacch();
1156 [] as_meas_res();
1157 [] as_l1_dcch();
1158 [] L1CTL.receive { repeat; }
1159 [g_Tmeas_exp.running] T.timeout {
1160 /* as_meas_res() would have done setverdict(fail) / self.stop in case
1161 * of any earlier errors, so if we reach this timeout, we're good */
1162 setverdict(pass);
1163 }
1164 [] T.timeout {
1165 setverdict(fail, "No MEAS RES received at all");
1166 }
1167 }
1168 f_rsl_chan_deact();
Harald Welte3dc20462018-03-10 23:03:38 +01001169 f_L1CTL_DM_REL_REQ(L1CTL, g_chan_nr);
Harald Welte70767382018-02-21 12:16:40 +01001170}
1171testcase TC_meas_res_sign_tchf() runs on test_CT {
1172 var ConnHdlr vc_conn;
1173 var ConnHdlrPars pars;
1174 f_init(testcasename());
1175 for (var integer tn := 1; tn <= 4; tn := tn+1) {
1176 pars := valueof(t_Pars(t_RslChanNr_Bm(tn), ts_RSL_ChanMode_SIGN));
1177 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1178 vc_conn.done;
1179 }
Harald Welte294b0a22018-03-10 23:26:48 +01001180 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001181}
1182testcase TC_meas_res_sign_tchh() runs on test_CT {
1183 var ConnHdlr vc_conn;
1184 var ConnHdlrPars pars;
1185 f_init(testcasename());
1186 for (var integer ss := 0; ss <= 1; ss := ss+1) {
1187 pars := valueof(t_Pars(t_RslChanNr_Lm(5, ss), ts_RSL_ChanMode_SIGN));
1188 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1189 vc_conn.done;
1190 }
Harald Welte294b0a22018-03-10 23:26:48 +01001191 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001192}
1193testcase TC_meas_res_sign_sdcch4() runs on test_CT {
1194 var ConnHdlr vc_conn;
1195 var ConnHdlrPars pars;
1196 f_init(testcasename());
1197 for (var integer ss := 0; ss <= 3; ss := ss+1) {
1198 pars := valueof(t_Pars(t_RslChanNr_SDCCH4(0, ss), ts_RSL_ChanMode_SIGN));
1199 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1200 vc_conn.done;
1201 }
Harald Welte294b0a22018-03-10 23:26:48 +01001202 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001203}
1204testcase TC_meas_res_sign_sdcch8() runs on test_CT {
1205 var ConnHdlr vc_conn;
1206 var ConnHdlrPars pars;
1207 f_init(testcasename());
1208 for (var integer ss := 0; ss <= 7; ss := ss+1) {
1209 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6, ss), ts_RSL_ChanMode_SIGN));
1210 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1211 vc_conn.done;
1212 }
Harald Welte294b0a22018-03-10 23:26:48 +01001213 f_shutdown();
Harald Welte70767382018-02-21 12:16:40 +01001214}
Harald Welte685d5982018-02-27 20:42:05 +01001215testcase TC_meas_res_sign_tchh_toa256() runs on test_CT {
1216 var ConnHdlr vc_conn;
1217 var ConnHdlrPars pars;
1218 f_init(testcasename());
1219 f_vty_config(BTSVTY, "bts 0", "supp-meas-info toa256");
1220 for (var integer ss := 0; ss <= 1; ss := ss+1) {
1221 pars := valueof(t_Pars(t_RslChanNr_Lm(5, ss), ts_RSL_ChanMode_SIGN));
1222 pars.l1_pars.toa256_enabled := true;
1223 vc_conn := f_start_handler(refers(f_TC_meas_res_periodic), pars);
1224 vc_conn.done;
1225 }
Harald Welte294b0a22018-03-10 23:26:48 +01001226 f_shutdown();
Harald Welte685d5982018-02-27 20:42:05 +01001227}
1228
Harald Welte70767382018-02-21 12:16:40 +01001229
1230/* Test if a channel without valid uplink bursts generates RSL CONN FAIL IND */
1231private function f_TC_conn_fail_crit(charstring id) runs on ConnHdlr {
Harald Welte68e495b2018-02-25 00:05:57 +01001232 f_l1_tune(L1CTL);
Harald Welte70767382018-02-21 12:16:40 +01001233 RSL.clear;
1234
1235 f_est_dchan();
1236 f_sleep(2.0);
Harald Weltef8df4cb2018-03-10 15:15:08 +01001237 L1CTL.send(ts_L1CTL_DM_REL_REQ(g_chan_nr));
Harald Welte70767382018-02-21 12:16:40 +01001238
1239 timer T := 40.0;
1240 T.start;
1241 alt {
1242 [] RSL.receive(tr_RSL_CONN_FAIL_IND(g_chan_nr, ?)) {
1243 setverdict(pass)
1244 }
1245 [] RSL.receive { repeat };
1246 [] T.timeout {
1247 setverdict(fail, "No CONN FAIL IND received");
1248 }
1249 }
1250 f_rsl_chan_deact();
1251}
1252testcase TC_conn_fail_crit() runs on test_CT {
1253 var ConnHdlr vc_conn;
1254 var ConnHdlrPars pars;
1255 f_init(testcasename());
1256 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6, 3), ts_RSL_ChanMode_SIGN));
1257 pars.t_guard := 60.0;
1258 vc_conn := f_start_handler(refers(f_TC_conn_fail_crit), pars);
1259 vc_conn.done;
1260}
1261
Harald Welte93640c62018-02-25 16:59:33 +01001262/***********************************************************************
1263 * Paging
1264 ***********************************************************************/
1265
Harald Welte68e495b2018-02-25 00:05:57 +01001266function tmsi_is_dummy(TMSIP_TMSI_V tmsi) return boolean {
1267 if (tmsi == 'FFFFFFFF'O) {
1268 return true;
1269 } else {
1270 return false;
1271 }
1272}
Harald Welte70767382018-02-21 12:16:40 +01001273
Harald Welte68e495b2018-02-25 00:05:57 +01001274altstep as_l1_count_paging(inout integer num_paging_rcv_msgs, inout integer num_paging_rcv_ids)
1275runs on test_CT {
1276 var L1ctlDlMessage dl;
Harald Weltef8df4cb2018-03-10 15:15:08 +01001277 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, c_DummyUI)) {
Harald Welte68e495b2018-02-25 00:05:57 +01001278 repeat;
1279 }
Harald Weltef8df4cb2018-03-10 15:15:08 +01001280 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0))) -> value dl {
Harald Welte68e495b2018-02-25 00:05:57 +01001281 var octetstring without_plen :=
1282 substr(dl.payload.data_ind.payload, 1, lengthof(dl.payload.data_ind.payload)-1);
1283 var PDU_ML3_NW_MS rr := dec_PDU_ML3_NW_MS(without_plen);
1284 if (match(rr, tr_PAGING_REQ1)) {
1285 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1286 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1287 if (isvalue(rr.msgs.rrm.pagingReq_Type1.mobileIdentity2)) {
1288 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1289 }
1290 } else if (match(rr, tr_PAGING_REQ2)) {
1291 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1292 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type2.mobileIdentity1)) {
1293 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1294 }
1295 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type2.mobileIdentity2)) {
1296 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1297 }
1298 if (isvalue(rr.msgs.rrm.pagingReq_Type2.mobileIdentity3)) {
1299 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1300 }
1301 } else if (match(rr, tr_PAGING_REQ3)) {
1302 num_paging_rcv_msgs := num_paging_rcv_msgs + 1;
1303 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity1)) {
1304 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1305 }
1306 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity2)) {
1307 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1308 }
1309 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity3)) {
1310 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1311 }
1312 if (not tmsi_is_dummy(rr.msgs.rrm.pagingReq_Type3.mobileIdentity4)) {
1313 num_paging_rcv_ids := num_paging_rcv_ids + 1;
1314 }
1315 }
1316 repeat;
1317 }
1318}
1319
1320type record PagingTestCfg {
1321 boolean combined_ccch,
1322 integer bs_ag_blks_res,
1323 float load_factor,
1324 boolean exp_load_ind,
1325 boolean exp_overload,
1326 boolean use_tmsi
1327}
1328
1329type record PagingTestState {
1330 integer num_paging_sent,
1331 integer num_paging_rcv_msgs,
1332 integer num_paging_rcv_ids,
1333 integer num_overload
1334}
1335
1336/* receive + ignore RSL RF RES IND */
1337altstep as_rsl_res_ind() runs on test_CT {
1338 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_RF_RES_IND)) {
1339 repeat;
1340 }
1341}
1342
1343/* Helper function for paging related testing */
1344private function f_TC_paging(PagingTestCfg cfg) runs on test_CT return PagingTestState {
1345 f_init(testcasename());
1346 f_init_l1ctl();
1347 f_l1_tune(L1CTL);
1348
1349 var PagingTestState st := {
1350 num_paging_sent := 0,
1351 num_paging_rcv_msgs := 0,
1352 num_paging_rcv_ids := 0,
1353 num_overload := 0
1354 };
1355
1356 var float max_pch_blocks_per_sec := f_pch_block_rate_est(cfg.combined_ccch, cfg.bs_ag_blks_res);
1357 var float max_pch_imsi_per_sec;
1358 if (cfg.use_tmsi) {
1359 max_pch_imsi_per_sec := max_pch_blocks_per_sec * 4.0; /* Type 3 */
1360 } else {
1361 max_pch_imsi_per_sec := max_pch_blocks_per_sec * 2.0; /* Type 1 */
1362 }
1363 var float pch_blocks_per_sec := max_pch_imsi_per_sec * cfg.load_factor;
1364 var float interval := 1.0 / pch_blocks_per_sec;
1365 log("pch_blocks_per_sec=", pch_blocks_per_sec, " interval=", interval);
1366
1367 for (var integer i := 0; i < float2int(20.0/interval); i := i+1) {
1368 /* build mobile Identity */
1369 var MobileL3_CommonIE_Types.MobileIdentityLV mi;
1370 if (cfg.use_tmsi) {
1371 mi := valueof(ts_MI_TMSI_LV(f_rnd_octstring(4)));
1372 } else {
1373 mi := valueof(ts_MI_IMSI_LV(f_gen_imsi(i)));
1374 }
1375 var octetstring mi_enc_lv := enc_MobileIdentityLV(mi);
1376 var octetstring mi_enc := substr(mi_enc_lv, 1, lengthof(mi_enc_lv)-1);
1377
1378 /* Send RSL PAGING COMMAND */
1379 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_PAGING_CMD(mi_enc, i mod 4)));
1380 st.num_paging_sent := st.num_paging_sent + 1;
1381
1382 /* Wait for interval to next PAGING COMMAND */
1383 timer T_itv := interval;
1384 T_itv.start;
1385 alt {
1386 /* check for presence of CCCH LOAD IND (paging load) */
1387 [cfg.exp_overload] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(0))) {
1388 st.num_overload := st.num_overload + 1;
1389 repeat;
1390 }
1391 [not cfg.exp_overload] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(0))) {
1392 setverdict(fail, "Unexpected PCH Overload");
1393 }
1394 [cfg.exp_load_ind] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND)) {
1395 log("Rx LOAD_IND");
1396 /* FIXME: analyze/verify interval + contents */
1397 repeat;
1398 }
1399 /* check if paging requests arrive on Um side */
1400 [] as_l1_count_paging(st.num_paging_rcv_msgs, st.num_paging_rcv_ids);
1401 [] L1CTL.receive { repeat; }
1402 [] T_itv.timeout { }
1403 [] as_rsl_res_ind();
1404 }
1405 }
1406
1407 /* wait for max 18s for paging queue to drain (size: 200, ~ 13 per s -> 15s) */
1408 timer T_wait := 18.0;
1409 T_wait.start;
1410 alt {
1411 [] as_l1_count_paging(st.num_paging_rcv_msgs, st.num_paging_rcv_ids);
1412 [] L1CTL.receive { repeat; }
1413 /* 65535 == empty paging queue, we can terminate*/
1414 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND(65535))) { }
1415 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_PAGING_LOAD_IND)) { repeat; }
1416 [] T_wait.timeout {
1417 setverdict(fail, "Waiting for empty paging queue");
1418 }
1419 [] as_rsl_res_ind();
1420 }
1421
Harald Welte294b0a22018-03-10 23:26:48 +01001422 f_shutdown();
1423
Harald Welte68e495b2018-02-25 00:05:57 +01001424 log("num_paging_sent=", st.num_paging_sent, " rcvd_msgs=", st.num_paging_rcv_msgs,
1425 " rcvd_ids=", st.num_paging_rcv_ids);
1426 return st;
1427}
1428
1429/* Create ~ 80% paging load (IMSI only) sustained for about 20s, verifying that
1430 * - the number of Mobile Identities on Um PCH match the number of pages on RSL
1431 * - that CCCH LOAD IND (PCH) are being generated
1432 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1433testcase TC_paging_imsi_80percent() runs on test_CT {
1434 var PagingTestCfg cfg := {
1435 combined_ccch := true,
1436 bs_ag_blks_res := 1,
1437 load_factor := 0.8,
1438 exp_load_ind := true,
1439 exp_overload := false,
1440 use_tmsi := false
1441 };
1442 var PagingTestState st := f_TC_paging(cfg);
1443 if (st.num_paging_sent != st.num_paging_rcv_ids) {
1444 setverdict(fail, "Expected ", st.num_paging_sent, " pagings but have ",
1445 st.num_paging_rcv_ids);
1446 } else {
1447 setverdict(pass);
1448 }
1449}
1450
1451/* Create ~ 80% paging load (TMSI only) sustained for about 20s, verifying that
1452 * - the number of Mobile Identities on Um PCH match the number of pages on RSL
1453 * - that CCCH LOAD IND (PCH) are being generated
1454 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1455testcase TC_paging_tmsi_80percent() runs on test_CT {
1456 var PagingTestCfg cfg := {
1457 combined_ccch := true,
1458 bs_ag_blks_res := 1,
1459 load_factor := 0.8,
1460 exp_load_ind := true,
1461 exp_overload := false,
1462 use_tmsi := true
1463 };
1464 var PagingTestState st := f_TC_paging(cfg);
1465 if (st.num_paging_sent != st.num_paging_rcv_ids) {
1466 setverdict(fail, "Expected ", st.num_paging_sent, " pagings but have ",
1467 st.num_paging_rcv_ids);
1468 } else {
1469 setverdict(pass);
1470 }
1471}
1472
1473/* Create ~ 200% paging load (IMSI only) sustained for about 20s, verifying that
1474 * - the number of Mobile Identities on Um PCH are ~ 82% of the number of pages on RSL
1475 * - that CCCH LOAD IND (PCH) are being generated and reach 0 at some point
1476 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1477testcase TC_paging_imsi_200percent() runs on test_CT {
1478 var PagingTestCfg cfg := {
1479 combined_ccch := true,
1480 bs_ag_blks_res := 1,
1481 load_factor := 2.0,
1482 exp_load_ind := true,
1483 exp_overload := true,
1484 use_tmsi := false
1485 };
1486 var PagingTestState st := f_TC_paging(cfg);
1487 /* We expect about 80-85% to pass, given that we can fill the paging buffer of 200
1488 * slots and will fully drain that buffer before returning */
1489 var template integer tpl := (st.num_paging_sent*80/100 .. st.num_paging_sent *85/100);
1490 if (not match(st.num_paging_rcv_ids, tpl)) {
1491 setverdict(fail, "Expected ", tpl, " pagings but have ", st.num_paging_rcv_ids);
1492 } else {
1493 setverdict(pass);
1494 }
1495}
1496
1497/* Create ~ 200% paging load (TMSI only) sustained for about 20s, verifying that
1498 * - the number of Mobile Identities on Um PCH are ~ 82% of the number of pages on RSL
1499 * - that CCCH LOAD IND (PCH) are being generated and reach 0 at some point
1500 * - that CCCH LOAD IND (PCH) [no load] is received after paging flood is over */
1501testcase TC_paging_tmsi_200percent() runs on test_CT {
1502 var PagingTestCfg cfg := {
1503 combined_ccch := true,
1504 bs_ag_blks_res := 1,
1505 load_factor := 2.0,
1506 exp_load_ind := true,
1507 exp_overload := true,
1508 use_tmsi := true
1509 };
1510 var PagingTestState st := f_TC_paging(cfg);
1511 /* We expect about 70% to pass, given that we can fill the paging buffer of 200
1512 * slots and will fully drain that buffer before returning */
1513 var template integer tpl := (st.num_paging_sent*68/100 .. st.num_paging_sent *72/100);
1514 if (not match(st.num_paging_rcv_ids, tpl)) {
1515 setverdict(fail, "Expected ", tpl, " pagings but have ", st.num_paging_rcv_ids);
1516 } else {
1517 setverdict(pass);
1518 }
1519}
1520
1521
Harald Welte93640c62018-02-25 16:59:33 +01001522/***********************************************************************
1523 * Immediate Assignment / AGCH
1524 ***********************************************************************/
1525
Harald Welte68e495b2018-02-25 00:05:57 +01001526testcase TC_imm_ass() runs on test_CT {
1527 f_init(testcasename());
1528 for (var integer i := 0; i < 1000; i := i+1) {
1529 var octetstring ia_enc := f_rnd_octstring(8);
1530 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_IMM_ASSIGN(ia_enc, 0)));
1531 f_sleep(0.02);
1532 }
1533 /* FIXME: check if imm.ass arrive on Um side */
1534 /* FIXME: check for DELETE INDICATION */
1535 f_sleep(100.0);
Harald Welte294b0a22018-03-10 23:26:48 +01001536 f_shutdown();
Harald Welte68e495b2018-02-25 00:05:57 +01001537}
1538
Harald Welte48494ca2018-02-25 16:59:50 +01001539/***********************************************************************
1540 * BCCH
1541 ***********************************************************************/
1542
1543/* tuple of Frame Number + decoded SI */
1544type record SystemInformationFn {
1545 GsmFrameNumber frame_number,
1546 SystemInformation si
1547}
1548
1549/* an arbitrary-length vector of decoded SI + gsmtap header */
1550type record of SystemInformationFn SystemInformationVector;
1551
1552/* an array of SI-vectors indexed by TC value */
1553type SystemInformationVector SystemInformationVectorPerTc[8];
1554
1555/* determine if a given SI vector contains given SI type at least once */
1556function f_si_vecslot_contains(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false) return boolean {
1557 for (var integer i:= 0; i< sizeof(arr); i := i + 1) {
1558 var integer fn_mod51 := arr[i].frame_number mod 51;
1559 if (not bcch_ext and fn_mod51 == 2 or
1560 bcch_ext and fn_mod51 == 6) {
1561 if (arr[i].si.header.message_type == key) {
1562 return true;
1563 }
1564 }
1565 }
1566 return false;
1567}
1568
1569/* ensure a given TC slot of the SI vector contains given SI type at least once at TC */
1570function f_ensure_si_vec_contains(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false) {
1571 if (not f_si_vecslot_contains(arr[tc], key, ext_bcch)) {
1572 setverdict(fail, "No ", key, " in TC=", tc, "!");
1573 }
1574}
1575
1576/* check if a given SI vector contains given SI type at least once on any TC */
1577function f_si_vec_contains(SystemInformationVectorPerTc arr, RrMessageType key) return boolean {
1578 for (var integer tc:= 0; tc < sizeof(arr); tc := tc + 1) {
1579 if (f_si_vecslot_contains(arr[tc], key) or
1580 f_si_vecslot_contains(arr[tc], key, true)) {
1581 return true;
1582 }
1583 }
1584 return false;
1585}
1586
1587/* determine if a given SI vector contains given SI type at least N of M times */
1588function f_si_vecslot_contains_n_of_m(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false, integer n := 1, integer m := 4) return boolean {
1589 var integer count := 0;
1590 if (sizeof(arr) < m) {
1591 setverdict(fail, "Error: Insufficient SI in array");
1592 self.stop;
1593 }
1594 for (var integer i:= 0; i < m; i := i + 1) {
1595 var integer fn_mod51 := arr[i].frame_number mod 51;
1596 if (not bcch_ext and fn_mod51 == 2 or
1597 bcch_ext and fn_mod51 == 6) {
1598 if (arr[i].si.header.message_type == key) {
1599 count := count + 1;
1600 }
1601 }
1602 }
1603 if (count >= n) {
1604 return true;
1605 } else {
1606 return false;
1607 }
1608}
1609
1610/* ensure a given TC slot of the SI vector contains given SI type at least N out of M times at TC */
1611function f_ensure_si_vec_contains_n_of_m(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false, integer n, integer m) {
1612 if (not f_si_vecslot_contains_n_of_m(arr[tc], key, ext_bcch, n, m)) {
1613 setverdict(fail, "Not ", n, "/", m, " of ", key, " in TC=", tc, "!");
1614 }
1615}
1616
1617/* determine if a given SI vector contains given SI type at least once */
1618function f_si_vecslot_contains_only(SystemInformationVector arr, RrMessageType key, boolean bcch_ext := false) return boolean {
1619 for (var integer i:= 0; i< sizeof(arr); i := i + 1) {
1620 var integer fn_mod51 := arr[i].frame_number mod 51;
1621 if (not bcch_ext and fn_mod51 == 2 or
1622 bcch_ext and fn_mod51 == 6) {
1623 if (arr[i].si.header.message_type != key) {
1624 return false;
1625 }
1626 }
1627 }
1628 return true;
1629}
1630
1631/* ensure a given TC slot of the SI vector contains only given SI type */
1632function f_ensure_si_vec_contains_only(SystemInformationVectorPerTc arr, integer tc, RrMessageType key, boolean ext_bcch := false) {
1633 if (not f_si_vecslot_contains_only(arr[tc], key, ext_bcch)) {
1634 setverdict(fail, "Not all ", key, " in TC=", tc, "!");
1635 }
1636}
1637
1638/* SI configuration of cell, against which we validate actual SI messages */
1639type set SystemInformationConfig {
1640 boolean bcch_extended,
1641 boolean si1_present,
1642 boolean si2bis_present,
1643 boolean si2ter_present,
1644 boolean si2quater_present,
1645 boolean si7_present,
1646 boolean si8_present,
1647 boolean si9_present,
1648 boolean si13_present,
1649 boolean si13alt_present,
1650 boolean si15_present,
1651 boolean si16_present,
1652 boolean si17_present,
1653 boolean si2n_present,
1654 boolean si21_present,
1655 boolean si22_present
1656}
1657
1658/* validate the SI scheduling according to TS 45.002 version 14.1.0 Release 14, Section 6.3.1.3 */
1659function f_validate_si_scheduling(SystemInformationConfig cfg, SystemInformationVectorPerTc si_per_tc) {
1660 var integer i;
1661 for (i := 0; i < sizeof(si_per_tc); i := i + 1) {
1662 if (sizeof(si_per_tc[i]) == 0) {
Harald Welte544565a2018-03-02 10:34:08 +01001663 setverdict(fail, "No SI messages for TC=", i);
Harald Welte48494ca2018-02-25 16:59:50 +01001664 }
1665 }
1666 if (cfg.si1_present) {
1667 /* ii) System Information Type 1 needs to be sent if frequency hopping is in use or
1668 * when the NCH is present in a cell. If the MS finds another message on BCCH Norm
1669 * when TC = 0, it can assume that System Information Type 1 is not in use. */
1670 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_1);
1671 /* make sure *ALL* contain SI1 */
1672 f_ensure_si_vec_contains_only(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_1);
1673 }
1674 f_ensure_si_vec_contains(si_per_tc, 1, SYSTEM_INFORMATION_TYPE_2);
1675 /* iii) A SI 2 message will be sent at least every time TC = 1 */
1676 f_ensure_si_vec_contains(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_3);
1677 f_ensure_si_vec_contains(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_3);
1678 f_ensure_si_vec_contains(si_per_tc, 3, SYSTEM_INFORMATION_TYPE_4);
1679 f_ensure_si_vec_contains(si_per_tc, 7, SYSTEM_INFORMATION_TYPE_4);
1680
1681 /* iii) System information type 2 bis or 2 ter messages are sent if needed, as determined by the
1682 * system operator. If only one of them is needed, it is sent when TC = 5. If both are
1683 * needed, 2bis is sent when TC = 5 and 2ter is sent at least once within any of 4
1684 * consecutive occurrences of TC = 4. */
1685 if (cfg.si2bis_present and not cfg.si2ter_present) {
1686 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2bis);
1687 } else if (cfg.si2ter_present and not cfg.si2bis_present) {
1688 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2ter);
1689 } else if (cfg.si2ter_present and cfg.si2bis_present) {
1690 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2bis);
1691 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2ter, false, 1, 4);
1692 }
1693
1694 if (cfg.si7_present or cfg.si8_present) {
1695 /* vi) Use of System Information type 7 and 8 is not always necessary. It is necessary
1696 * if System Information type 4 does not contain all information needed for cell
1697 * selection and reselection. */
1698 if (not cfg.bcch_extended) {
1699 testcase.stop("Error: SI7/SI8 require BCCH Extd.");
1700 }
1701 if (cfg.si7_present) {
1702 f_ensure_si_vec_contains(si_per_tc, 7, SYSTEM_INFORMATION_TYPE_7, true);
1703 }
1704 if (cfg.si8_present) {
1705 f_ensure_si_vec_contains(si_per_tc, 3, SYSTEM_INFORMATION_TYPE_8, true);
1706 }
1707 }
1708
1709 if (cfg.si2quater_present) {
1710 /* iii) System information type 2 quater is sent if needed, as determined by the system
1711 * operator. If sent on BCCH Norm, it shall be sent when TC = 5 if neither of 2bis
1712 * and 2ter are used, otherwise it shall be sent at least once within any of 4
1713 * consecutive occurrences of TC = 4. If sent on BCCH Ext, it is sent at least once
1714 * within any of 4 consecutive occurrences of TC = 5. */
1715 if (not (cfg.bcch_extended)) {
1716 if (not (cfg.si2bis_present or cfg.si2ter_present)) {
1717 f_ensure_si_vec_contains(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2quater);
1718 } else {
1719 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2quater, false, 1, 4);
1720 }
1721 } else {
1722 f_ensure_si_vec_contains_n_of_m(si_per_tc, 5, SYSTEM_INFORMATION_TYPE_2quater, true, 1, 4);
1723 }
1724 }
1725 if (cfg.si9_present) {
1726 /* vi) System Information type 9 is sent in those blocks with TC = 4 which are specified
1727 * in system information type 3 as defined in 3GPP TS 44.018. */
1728 f_ensure_si_vec_contains(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_9); // FIXME SI3
1729 }
1730 if (cfg.si13_present) {
1731 /* vii) System Information type 13 is only related to the GPRS service. System Information
1732 * Type 13 need only be sent if GPRS support is indicated in one or more of System
1733 * Information Type 3 or 4 or 7 or 8 messages. These messages also indicate if the
1734 * message is sent on the BCCH Norm or if the message is transmitted on the BCCH Ext.
1735 * In the case that the message is sent on the BCCH Norm, it is sent at least once
1736 * within any of 4 consecutive occurrences of TC=4. */
1737 if (not cfg.bcch_extended) {
1738 log("not-bccch-extended");
1739 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_13, false, 1, 4);
1740 } else {
1741 log("bccch-extended");
1742 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_13, true);
1743 }
1744 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_13alt)) {
1745 setverdict(fail, "Cannot have SI13alt and SI13");
1746 }
1747 }
1748 if (cfg.si16_present or cfg.si17_present) {
1749 /* viii) System Information type 16 and 17 are only related to the SoLSA service. They
1750 * should not be sent in a cell where network sharing is used (see rule xv). */
1751 if (cfg.si22_present) {
1752 testcase.stop("Error: Cannot have SI16/SI17 and SI22!");
1753 }
1754 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_22)) {
1755 setverdict(fail, "Cannot have SI16/SI17 and SI22!");
1756 }
1757 if (not cfg.bcch_extended) {
1758 testcase.stop("Error: SI16/SI17 requires BCCH Extd!");
1759 }
1760 if (cfg.si16_present) {
1761 f_ensure_si_vec_contains(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_16, true);
1762 }
1763 if (cfg.si17_present) {
1764 f_ensure_si_vec_contains(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_17, true);
1765 }
1766 }
1767
1768 /* ix) System Information type 18 and 20 are sent in order to transmit non-GSM
1769 * broadcast information. The frequency with which they are sent is determined by the
1770 * system operator. System Information type 9 identifies the scheduling of System
1771 * Information type 18 and 20 messages. */
1772
1773 /* x) System Information Type 19 is sent if COMPACT neighbours exist. If System
1774 * Information Type 19 is present, then its scheduling shall be indicated in System
1775 * Information Type 9. */
1776
1777 if (cfg.si15_present) {
1778 /* xi) System Information Type 15 is broadcast if dynamic ARFCN mapping is used in the
1779 * PLMN. If sent on BCCH Norm, it is sent at least once within any of 4 consecutive
1780 * occurrences of TC = 4. If sent on BCCH Ext, it is sent at least once within any of
1781 * 4 consecutive occurrences of TC = 1. */
1782 if (not cfg.bcch_extended) {
1783 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_15, false, 1, 4);
1784 } else {
1785 f_ensure_si_vec_contains_n_of_m(si_per_tc, 1, SYSTEM_INFORMATION_TYPE_15, true, 1, 4);
1786 }
1787 }
1788 if (cfg.si13alt_present) {
1789 /* xii) System Information type 13 alt is only related to the GERAN Iu mode. System
1790 * Information Type 13 alt need only be sent if GERAN Iu mode support is indicated in
1791 * one or more of System Information Type 3 or 4 or 7 or 8 messages and SI 13 is not
1792 * broadcast. These messages also indicate if the message is sent on the BCCH Norm or
1793 * if the message is transmitted on the BCCH Ext. In the case that the message is sent
1794 * on the BCCH Norm, it is sent at least once within any of 4 consecutive occurrences
1795 * of TC = 4. */
1796 if (cfg.si13_present) {
1797 testcase.stop("Error: Cannot have SI13alt and SI13");
1798 }
1799 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_13)) {
1800 setverdict(fail, "Cannot have SI13alt and SI13");
1801 }
1802 if (not cfg.bcch_extended) {
1803 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_13alt, false, 1, 4);
1804 } else {
1805 f_ensure_si_vec_contains(si_per_tc, 0, SYSTEM_INFORMATION_TYPE_13alt, true);
1806 }
1807 }
1808 if (cfg.si2n_present) {
1809 /* xiii) System Information Type 2n is optionally sent on BCCH Norm or BCCH Ext if needed,
1810 * as determined by the system operator. In the case that the message is sent on the
1811 * BCCH Norm, it is sent at least once within any of 4 consecutive occurrences of TC =
1812 * 4. If the message is sent on BCCH Ext, it is sent at least once within any of 2
1813 * consecutive occurrences of TC = 4. */
1814 if (not cfg.bcch_extended) {
1815 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2n, false, 1, 4);
1816 } else {
1817 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_2n, true, 2, 4);
1818 }
1819 }
1820 if (cfg.si21_present) {
1821 /* xiv) System Information Type 21 is optionally sent on BCCH Norm or BCCH Ext, as
1822 * determined by the system operator. If Extended Access Barring is in use in the cell
1823 * then this message is sent at least once within any of 4 consecutive occurrences of
1824 * TC = 4 regardless if it is sent on BCCH Norm or BCCH Ext. If BCCH Ext is used in a
1825 * cell then this message shall only be sent on BCCH Ext. */
1826 if (not cfg.bcch_extended) {
1827 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_21, false, 1, 4);
1828 } else {
1829 f_ensure_si_vec_contains_n_of_m(si_per_tc, 4, SYSTEM_INFORMATION_TYPE_21, true, 1, 4);
1830 if (f_si_vecslot_contains(si_per_tc[4], SYSTEM_INFORMATION_TYPE_21)) {
1831 setverdict(fail, "Cannot have SI21 on BCCH Norm if BCCH Extd enabled!");
1832 }
1833 }
1834 }
1835 if (cfg.si22_present) {
1836 /* xv) System Information Type 22 is sent if network sharing is in use in the cell. It
1837 * should not be sent in a cell where SoLSA is used (see rule viii). System
1838 * Information Type 22 instances shall be sent on BCCH Ext within any occurrence of TC
1839 * =2 and TC=6. */
1840 if (cfg.si16_present or cfg.si17_present) {
1841 testcase.stop("Error: Cannot have SI16/SI17 and SI22!");
1842 }
1843 if (f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_16) or
1844 f_si_vec_contains(si_per_tc, SYSTEM_INFORMATION_TYPE_17)) {
1845 setverdict(fail, "Cannot have SI16/SI17 and SI22!");
1846 }
1847 if (not cfg.bcch_extended) {
1848 testcase.stop("Error: SI22 requires BCCH Extd!");
1849 } else {
1850 f_ensure_si_vec_contains_only(si_per_tc, 2, SYSTEM_INFORMATION_TYPE_22, true);
1851 f_ensure_si_vec_contains_only(si_per_tc, 6, SYSTEM_INFORMATION_TYPE_22, true);
1852 }
1853 }
1854}
1855
1856/* sample Systme Information for specified duration via L1CTL */
1857function f_l1_sample_si(L1CTL_PT pt, float duration := 8.0) return SystemInformationVectorPerTc {
1858 timer T := duration;
1859 var SystemInformationVectorPerTc si_per_tc;
1860 var L1ctlDlMessage l1_dl;
1861
1862 /* initialize all per-TC vectors empty */
1863 for (var integer i:= 0; i < sizeof(si_per_tc); i := i+1) {
1864 si_per_tc[i] := {};
1865 }
1866
1867 /* flush all previous L1 queued msgs */
1868 pt.clear;
1869
1870 T.start;
1871 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01001872 [] pt.receive(tr_L1CTL_DATA_IND(t_RslChanNr_BCCH(0), ?)) -> value l1_dl {
Harald Welte48494ca2018-02-25 16:59:50 +01001873 /* somehow dec_SystemInformation will try to decode even non-RR as SI */
1874 if (not (l1_dl.payload.data_ind.payload[1] == '06'O)) {
1875 log("Ignoring non-RR SI ", l1_dl);
1876 repeat;
1877 }
1878 var SystemInformationFn sig := {
1879 frame_number := l1_dl.dl_info.frame_nr,
1880 si := dec_SystemInformation(l1_dl.payload.data_ind.payload)
1881 }
1882 var integer tc := f_gsm_compute_tc(sig.frame_number);
1883 log("SI received at TC=", tc, ": ", sig.si);
1884 /* append to the per-TC bucket */
1885 si_per_tc[tc] := si_per_tc[tc] & { sig };
1886 repeat;
1887 }
1888 [] pt.receive { repeat; }
1889 [] T.timeout { }
1890 }
1891
1892 for (var integer i:= 0; i < sizeof(si_per_tc); i := i+1) {
1893 log(testcasename(), ": TC=", i, " has #of SI=", sizeof(si_per_tc[i]));
1894 }
1895 log("si_per_tc=", si_per_tc);
1896 return si_per_tc;
1897}
1898
1899/* helper function: Set given SI via RSL + validate scheduling.
1900 * CALLER MUST MAKE SURE TO CHANGE GLOBAL si_cfg! */
1901function f_TC_si_sched() runs on test_CT {
1902 var SystemInformationVectorPerTc si_per_tc;
1903 f_init_l1ctl();
1904 f_l1_tune(L1CTL);
1905
1906 /* Sample + Validate Scheduling */
1907 si_per_tc := f_l1_sample_si(L1CTL);
1908 f_validate_si_scheduling(si_cfg, si_per_tc);
1909
1910 setverdict(pass);
1911}
1912
1913testcase TC_si_sched_default() runs on test_CT {
1914 f_init();
Harald Welte0cae4552018-03-09 22:20:26 +01001915 /* 2+3+4 are mandatory and set in f_init() */
1916 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001917 f_shutdown();
Harald Welte0cae4552018-03-09 22:20:26 +01001918}
1919
1920testcase TC_si_sched_1() runs on test_CT {
1921 f_init();
1922 si_cfg.si1_present := true;
1923 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_1, '5506198fb38000000000000000000000000000e504002b'O);
Harald Welte48494ca2018-02-25 16:59:50 +01001924 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001925 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001926}
1927
1928testcase TC_si_sched_2bis() runs on test_CT {
1929 f_init();
1930 si_cfg.si2bis_present := true;
1931 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
1932 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001933 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001934}
1935
1936testcase TC_si_sched_2ter() runs on test_CT {
1937 f_init();
1938 si_cfg.si2ter_present := true;
1939 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
1940 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001941 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001942}
1943
1944testcase TC_si_sched_2ter_2bis() runs on test_CT {
1945 f_init();
1946 si_cfg.si2bis_present := true;
1947 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
1948 si_cfg.si2ter_present := true;
1949 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
1950 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001951 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001952}
1953
1954testcase TC_si_sched_2quater() runs on test_CT {
1955 f_init();
1956 si_cfg.si2quater_present := true;
1957 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2quater, '050607a8a0364aa698d72ff424feee0506d5e7fff02043'O);
1958 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001959 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001960}
1961
1962testcase TC_si_sched_13() runs on test_CT {
1963 f_init();
1964 si_cfg.si13_present := true;
1965 //f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, fixme);
1966 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001967 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001968}
1969
1970testcase TC_si_sched_13_2bis_2ter_2quater() runs on test_CT {
1971 f_init();
1972 si_cfg.si2bis_present := true;
1973 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2bis, '550602bfe809b3ff00000000000000000000007900002b'O);
1974 si_cfg.si2ter_present := true;
1975 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2ter, '010603bf66b0aa0a00000002000000000000002b2b2b2b'O);
1976 si_cfg.si2quater_present := true;
1977 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_2quater, '050607a8a0364aa698d72ff424feee0506d5e7fff02043'O);
1978 si_cfg.si13_present := true;
1979 //f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, fixme);
1980 f_TC_si_sched();
Harald Welte294b0a22018-03-10 23:26:48 +01001981 f_shutdown();
Harald Welte48494ca2018-02-25 16:59:50 +01001982}
1983
1984
Harald Welte68e495b2018-02-25 00:05:57 +01001985testcase TC_bcch_info() runs on test_CT {
1986 f_init(testcasename());
1987 /* FIXME: enable / disable individual BCCH info */
1988 //ts_RSL_BCCH_INFO(si_type, info);
1989 /* expect no ERROR REPORT after either of them *
1990 /* negative test: ensure ERROR REPORT on unsupported types */
Harald Welte294b0a22018-03-10 23:26:48 +01001991 f_shutdown();
Harald Welte68e495b2018-02-25 00:05:57 +01001992}
1993
Harald Welte93640c62018-02-25 16:59:33 +01001994/***********************************************************************
1995 * Low-Level Protocol Errors / ERROR REPORT
1996 ***********************************************************************/
1997
Harald Welte01d982c2018-02-25 01:31:40 +01001998private function f_exp_err_rep(template RSL_Cause cause) runs on test_CT {
1999 timer T := 5.0;
2000 T.start;
2001 alt {
2002 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_ERROR_REPORT(cause))) {
2003 setverdict(pass);
2004 }
2005 [] RSL_CCHAN.receive(tr_RSL_UD(tr_RSL_ERROR_REPORT(?))) {
2006 setverdict(fail, "Wrong cause in RSL ERR REP");
2007 }
2008 [] RSL_CCHAN.receive {
2009 repeat;
2010 }
2011 [] T.timeout {
2012 setverdict(fail, "Timeout waiting for RSL ERR REP");
2013 }
2014 }
2015}
2016
2017/* Provoke a protocol error (message too short) and match on ERROR REPORT */
2018testcase TC_rsl_protocol_error() runs on test_CT {
2019 f_init(testcasename());
2020 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2021 rsl.ies := omit;
2022 RSL_CCHAN.send(ts_RSL_UD(rsl));
2023
2024 f_exp_err_rep(RSL_ERR_PROTO);
2025}
2026
2027/* Provoke a mandatory IE error and match on ERROR REPORT */
2028testcase TC_rsl_mand_ie_error() runs on test_CT {
2029 f_init(testcasename());
2030
2031 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2032 rsl.ies := { rsl.ies[0] };
2033 RSL_CCHAN.send(ts_RSL_UD(rsl));
2034
2035 f_exp_err_rep(RSL_ERR_MAND_IE_ERROR);
2036}
2037
2038/* Provoke an IE content error and match on ERROR REPORT */
2039testcase TC_rsl_ie_content_error() runs on test_CT {
2040 f_init(testcasename());
2041 var RSL_Message rsl := valueof(ts_RSL_BCCH_INFO(RSL_SYSTEM_INFO_1, ''O));
2042 rsl.ies[1].body.sysinfo_type := RSL_SYSTEM_INFO_5;
2043 RSL_CCHAN.send(ts_RSL_UD(rsl));
2044
2045 f_exp_err_rep(RSL_ERR_IE_CONTENT);
2046}
2047
Harald Welte93640c62018-02-25 16:59:33 +01002048/***********************************************************************
2049 * IPA CRCX/MDCX/DLCS media stream handling
2050 ***********************************************************************/
2051
Harald Weltea871a382018-02-25 02:03:14 +01002052/* Send IPA DLCX to inactive lchan */
2053function f_TC_ipa_dlcx_not_active(charstring id) runs on ConnHdlr {
Harald Welte1eba3742018-02-25 12:48:14 +01002054 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, 0), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2055 "IPA DLCX ACK");
Harald Weltea871a382018-02-25 02:03:14 +01002056}
2057testcase TC_ipa_dlcx_not_active() runs on test_CT {
2058 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2059 f_init(testcasename());
2060 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_dlcx_not_active), pars);
2061 vc_conn.done;
2062}
Harald Welte68e495b2018-02-25 00:05:57 +01002063
Harald Weltea3f1df92018-02-25 12:49:55 +01002064/* Send IPA CRCX twice to inactive lchan */
2065function f_TC_ipa_crcx_twice_not_active(charstring id) runs on ConnHdlr {
2066 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2067 "IPA CRCX ACK");
2068 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_NACK(g_chan_nr, RSL_ERR_RES_UNAVAIL),
2069 "IPA CRCX NACK");
2070}
2071testcase TC_ipa_crcx_twice_not_active() runs on test_CT {
2072 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2073 f_init(testcasename());
2074 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_twice_not_active), pars);
2075 vc_conn.done;
2076}
2077
2078/* Regular sequence of CRCX/MDCX/DLCX */
2079function f_TC_ipa_crcx_mdcx_dlcx_not_active(charstring id) runs on ConnHdlr {
2080 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2081 "IPA CRCX ACK");
2082 var uint32_t remote_ip := f_rnd_int(c_UINT32_MAX);
2083 var uint16_t remote_port := f_rnd_int(c_UINT16_MAX);
2084 var uint7_t rtp_pt2 := f_rnd_int(127);
2085 var uint16_t fake_conn_id := 23; /* we're too lazy to read it out from the CRCX ACK above */
2086 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2087 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2088 "IPA MDCX ACK");
2089 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, fake_conn_id), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2090 "IPA DLCX ACK");
2091}
2092testcase TC_ipa_crcx_mdcx_dlcx_not_active() runs on test_CT {
2093 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2094 f_init(testcasename());
2095 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_mdcx_dlcx_not_active), pars);
2096 vc_conn.done;
2097}
2098
Harald Welte3ae11da2018-02-25 13:36:06 +01002099/* Sequence of CRCX, 2x MDCX, DLCX */
2100function f_TC_ipa_crcx_mdcx_mdcx_dlcx_not_active(charstring id) runs on ConnHdlr {
2101 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_ACK(g_chan_nr, ?, ?, ?),
2102 "IPA CRCX ACK");
2103 var uint32_t remote_ip := f_rnd_int(c_UINT32_MAX);
2104 var uint16_t remote_port := f_rnd_int(c_UINT16_MAX);
2105 var uint7_t rtp_pt2 := f_rnd_int(127);
2106 var uint16_t fake_conn_id := 23; /* we're too lazy to read it out from the CRCX ACK above */
2107 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2108 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2109 "IPA MDCX ACK");
2110 /* Second MDCX */
2111 remote_ip := f_rnd_int(c_UINT32_MAX);
2112 remote_port := f_rnd_int(c_UINT16_MAX);
2113 f_rsl_transceive(ts_RSL_IPA_MDCX(g_chan_nr, fake_conn_id, remote_ip, remote_port, rtp_pt2),
2114 tr_RSL_IPA_MDCX_ACK(g_chan_nr, ?, ?, ?, rtp_pt2),
2115 "IPA MDCX ACK");
2116 f_rsl_transceive(ts_RSL_IPA_DLCX(g_chan_nr, fake_conn_id), tr_RSL_IPA_DLCX_ACK(g_chan_nr, ?, ?),
2117 "IPA DLCX ACK");
2118}
2119testcase TC_ipa_crcx_mdcx_mdcx_dlcx_not_active() runs on test_CT {
2120 var ConnHdlrPars pars := valueof(t_Pars(t_RslChanNr_Bm(1), ts_RSL_ChanMode_SIGN));
2121 f_init(testcasename());
2122 var ConnHdlr vc_conn := f_start_handler(refers(f_TC_ipa_crcx_mdcx_mdcx_dlcx_not_active), pars);
2123 vc_conn.done;
2124}
2125
Harald Welte9912eb52018-02-25 13:30:15 +01002126/* IPA CRCX on SDCCH/4 and SDCCH/8 (doesn't make sense) */
2127function f_TC_ipa_crcx_sdcch_not_active(charstring id) runs on ConnHdlr {
2128 f_rsl_transceive(ts_RSL_IPA_CRCX(g_chan_nr), tr_RSL_IPA_CRCX_NACK(g_chan_nr, ?),
2129 "IPA CRCX NACK");
2130}
2131testcase TC_ipa_crcx_sdcch_not_active() runs on test_CT {
2132 var ConnHdlrPars pars;
2133 var ConnHdlr vc_conn;
2134 f_init(testcasename());
2135
2136 pars := valueof(t_Pars(t_RslChanNr_SDCCH4(0,1), ts_RSL_ChanMode_SIGN));
2137 vc_conn := f_start_handler(refers(f_TC_ipa_crcx_sdcch_not_active), pars);
2138 vc_conn.done;
2139
2140 pars := valueof(t_Pars(t_RslChanNr_SDCCH8(6,5), ts_RSL_ChanMode_SIGN));
2141 vc_conn := f_start_handler(refers(f_TC_ipa_crcx_sdcch_not_active), pars);
2142 vc_conn.done;
2143}
2144
Harald Weltea3f1df92018-02-25 12:49:55 +01002145
Harald Welte883340c2018-02-28 18:59:29 +01002146/***********************************************************************
2147 * PCU Socket related tests
2148 ***********************************************************************/
2149
2150private function f_TC_pcu_act_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr, boolean exp_success)
2151runs on test_CT {
2152 timer T := 3.0;
2153
2154 /* we don't expect any RTS.req before PDCH are active */
2155 T.start;
2156 alt {
2157 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr))) {
2158 setverdict(fail, "PCU RTS.req before PDCH active?");
2159 self.stop;
2160 }
2161 [] PCU.receive { repeat; }
2162 [] T.timeout { }
2163 }
2164
2165 /* Send PDCH activate request for known PDCH timeslot */
2166 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_ACT_REQ(bts_nr, trx_nr, ts_nr)));
2167
2168 /* we now expect RTS.req for this timeslot (only) */
2169 T.start;
2170 alt {
2171 [exp_success] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2172 setverdict(pass);
2173 }
2174 [not exp_success] PCU.receive(t_SD_PCUIF(g_pcu_conn_id,
2175 tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2176 setverdict(fail, "Unexpected RTS.req for supposedly failing activation");
2177 self.stop;
2178 }
2179 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ)) {
2180 setverdict(fail, "RTS.req for wrong TRX/TS");
2181 self.stop;
2182 }
2183 [] PCU.receive { repeat; }
2184 [exp_success] T.timeout {
2185 setverdict(fail, "Timeout waiting for PCU RTS.req");
2186 }
2187 [not exp_success] T.timeout {
2188 setverdict(pass);
2189 }
2190 }
2191}
2192
2193private function f_TC_pcu_deact_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr)
2194runs on test_CT {
2195 timer T := 3.0;
2196
2197 /* Send PDCH activate request for known PDCH timeslot */
2198 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_DEACT_REQ(bts_nr, trx_nr, ts_nr)));
2199
2200 PCU.clear;
2201 /* we now expect no RTS.req for this timeslot */
2202 T.start;
2203 alt {
2204 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr))) {
2205 setverdict(fail, "Received unexpected PCU RTS.req");
2206 self.stop;
2207 }
2208 [] PCU.receive { repeat; }
2209 [] T.timeout {
2210 setverdict(pass);
2211 }
2212 }
2213}
2214
2215/* PDCH activation via PCU socket; check for presence of RTS.req */
2216testcase TC_pcu_act_req() runs on test_CT {
2217 f_init();
2218 f_TC_pcu_act_req(0, 0, 7, true);
2219}
2220
2221/* PDCH activation via PCU socket on non-PDCU timeslot */
2222testcase TC_pcu_act_req_wrong_ts() runs on test_CT {
2223 f_init();
2224 f_TC_pcu_act_req(0, 0, 1, false);
2225}
2226
2227/* PDCH activation via PCU socket on wrong BTS */
2228testcase TC_pcu_act_req_wrong_bts() runs on test_CT {
2229 f_init();
2230 f_TC_pcu_act_req(23, 0, 7, false);
2231}
2232
2233/* PDCH activation via PCU socket on wrong TRX */
2234testcase TC_pcu_act_req_wrong_trx() runs on test_CT {
2235 f_init();
2236 f_TC_pcu_act_req(0, 23, 7, false);
2237}
2238
2239/* PDCH deactivation via PCU socket; check for absence of RTS.req */
2240testcase TC_pcu_deact_req() runs on test_CT {
2241 f_init();
2242 /* Activate PDCH */
2243 f_TC_pcu_act_req(0, 0, 7, true);
2244 f_sleep(1.0);
2245 /* and De-Activate again */
2246 f_TC_pcu_deact_req(0, 0, 7);
2247}
2248
2249/* Attempt to deactivate a PDCH on a non-PDCH timeslot */
2250testcase TC_pcu_deact_req_wrong_ts() runs on test_CT {
2251 f_init();
2252 f_TC_pcu_deact_req(0, 0, 1);
2253}
2254
2255/* Test the PCU->BTS Version and BTS->PCU SI13 handshake */
2256testcase TC_pcu_ver_si13() runs on test_CT {
2257 const octetstring si13 := '00010203040506070909'O;
2258 var PCUIF_send_data sd;
2259 timer T:= 3.0;
2260 f_init();
2261
2262 /* Set SI13 via RSL */
2263 f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_13, si13);
2264 PCU.send(t_SD_PCUIF(g_pcu_conn_id, ts_PCUIF_TXT_IND(0, PCU_VERSION, "BTS_Test v23")));
2265 T.start;
2266 alt {
2267 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_DATA_IND(0, 0, 0, ?, PCU_IF_SAPI_BCCH))) -> value sd {
2268 if (substr(sd.data.u.data_ind.data, 0, lengthof(si13)) == si13) {
2269 setverdict(pass);
2270 } else {
2271 repeat;
2272 }
2273 }
2274 [] PCU.receive { repeat; }
2275 [] T.timeout {
2276 setverdict(fail, "Timeout waiting for SI13");
2277 self.stop;
2278 }
2279 }
2280}
2281
2282private const octetstring c_PCU_DATA := '000102030405060708090a0b0c0d0e0f10111213141516'O;
2283
2284/* helper function to send a PCU DATA.req */
2285private function f_pcu_data_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr,
2286 uint8_t block_nr, uint32_t fn, PCUIF_Sapi sapi, octetstring data)
2287runs on test_CT
2288{
2289 PCU.send(t_SD_PCUIF(g_pcu_conn_id,
2290 ts_PCUIF_DATA_REQ(bts_nr, trx_nr, ts_nr, block_nr, fn, sapi, data)));
2291}
2292
2293/* helper function to wait for RTS.ind for given SAPI on given BTS/TRX/TS and then send */
2294private function f_pcu_wait_rts_and_data_req(uint8_t bts_nr, uint8_t trx_nr, uint8_t ts_nr,
2295 PCUIF_Sapi sapi, octetstring data)
2296runs on test_CT
2297{
2298 var PCUIF_send_data sd;
2299
2300 timer T := 3.0;
2301 T.start;
2302 alt {
2303 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id,
2304 tr_PCUIF_RTS_REQ(bts_nr, trx_nr, ts_nr, sapi))) -> value sd {
2305 f_pcu_data_req(bts_nr, trx_nr, ts_nr, sd.data.u.rts_req.block_nr,
2306 sd.data.u.rts_req.fn, sapi, data);
2307 }
2308 [] PCU.receive { repeat; }
2309 [] T.timeout {
2310 setverdict(fail, "Timeout waiting for RTS.ind");
2311 }
2312 }
2313}
2314
2315/* Send DATA.req on invalid BTS */
2316testcase TC_pcu_data_req_wrong_bts() runs on test_CT {
2317 f_init();
2318 f_TC_pcu_act_req(0, 0, 7, true);
2319 f_pcu_data_req(23, 0, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2320 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2321 f_sleep(10.0);
2322}
2323
2324/* Send DATA.req on invalid TRX */
2325testcase TC_pcu_data_req_wrong_trx() runs on test_CT {
2326 f_init();
2327 f_TC_pcu_act_req(0, 0, 7, true);
2328 f_pcu_data_req(0, 100, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2329 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2330 f_sleep(10.0);
2331}
2332
2333/* Send DATA.req on invalid timeslot */
2334testcase TC_pcu_data_req_wrong_ts() runs on test_CT {
2335 f_init();
2336 f_TC_pcu_act_req(0, 0, 7, true);
2337 f_pcu_data_req(0, 0, 70, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2338 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2339 f_sleep(10.0);
2340}
2341
2342/* Send DATA.req on timeslot that hasn't been activated */
2343testcase TC_pcu_data_req_ts_inactive() runs on test_CT {
2344 f_init();
2345 f_pcu_data_req(0, 0, 7, 0, 0, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2346 /* FIXME: how to check this wasn't actually sent and didn't crash BTS? */
2347 f_sleep(2.0);
2348}
2349
2350testcase TC_pcu_data_req_pdtch() runs on test_CT {
2351 f_init();
2352 f_TC_pcu_act_req(0, 0, 7, true);
2353 f_pcu_wait_rts_and_data_req(0, 0, 7, PCU_IF_SAPI_PDTCH, c_PCU_DATA);
2354 /* FIXME: how to check this was actually sent */
2355 f_sleep(2.0);
2356}
2357
2358testcase TC_pcu_data_req_ptcch() runs on test_CT {
2359 f_init();
2360 f_TC_pcu_act_req(0, 0, 7, true);
2361 f_pcu_wait_rts_and_data_req(0, 0, 7, PCU_IF_SAPI_PTCCH, c_PCU_DATA);
2362 /* FIXME: how to check this was actually sent */
2363 f_sleep(2.0);
2364}
2365
2366/* Send AGCH from PCU; check it appears on Um side */
2367testcase TC_pcu_data_req_agch() runs on test_CT {
2368 timer T := 3.0;
2369 f_init();
2370 f_init_l1ctl();
2371 f_l1_tune(L1CTL);
2372
2373 f_TC_pcu_act_req(0, 0, 7, true);
2374 f_pcu_data_req(0, 0, 7, 0, 0, PCU_IF_SAPI_AGCH, c_PCU_DATA);
2375
2376 T.start;
2377 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01002378 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, c_PCU_DATA)) {
Harald Welte883340c2018-02-28 18:59:29 +01002379 setverdict(pass);
2380 }
2381 [] L1CTL.receive { repeat; }
2382 [] T.timeout {
2383 setverdict(fail, "Timeout waiting for PCU-originated AGCH block on Um");
2384 }
2385 }
2386}
2387
2388/* Send IMM.ASS from PCU for PCH; check it appears on Um side */
2389testcase TC_pcu_data_req_imm_ass_pch() runs on test_CT {
2390 var octetstring imm_ass := f_rnd_octstring(23);
2391 f_init();
2392 f_init_l1ctl();
2393 f_l1_tune(L1CTL);
2394
2395 /* append 3 last imsi digits so BTS can compute pagng group */
2396 var uint32_t fn := f_PCUIF_tx_imm_ass_pch(PCU, g_pcu_conn_id, imm_ass, '123459987'H);
2397
2398 timer T := 0.5;
2399 T.start;
2400 alt {
Harald Weltef8df4cb2018-03-10 15:15:08 +01002401 [] L1CTL.receive(tr_L1CTL_DATA_IND(t_RslChanNr_PCH_AGCH(0), ?, imm_ass)) {
Harald Welte883340c2018-02-28 18:59:29 +01002402 /* TODO: verify paging group */
2403 setverdict(pass);
2404 }
2405 [] L1CTL.receive { repeat; }
2406 [] T.timeout {
2407 setverdict(fail, "Timeout waiting for PCU-originated AGCH block on Um");
2408 }
2409 }
2410}
2411
2412/* Send RACH from Um side, expect it to show up on PCU socket */
2413testcase TC_pcu_rach_content() runs on test_CT {
2414 f_init();
2415 f_init_l1ctl();
2416 f_l1_tune(L1CTL);
2417
2418 var GsmFrameNumber fn_last := 0;
2419 for (var integer i := 0; i < 1000; i := i+1) {
2420 var OCT1 ra := f_rnd_ra_ps();
2421 var GsmFrameNumber fn := f_L1CTL_RACH(L1CTL, oct2int(ra));
2422 if (fn == fn_last) {
2423 setverdict(fail, "Two RACH in same FN?!?");
2424 self.stop;
2425 }
2426 fn_last := fn;
2427
2428 timer T := 2.0;
2429 T.start;
2430 alt {
2431 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RACH_IND(0, oct2int(ra), 0, ?, fn))) {
2432 T.stop;
2433 }
2434 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_RACH_IND)) {
2435 setverdict(fail, "Unexpected RACH IND");
2436 self.stop;
2437 }
2438 [] PCU.receive { repeat; }
2439 [] T.timeout {
2440 setverdict(fail, "Timeout waiting for RACH IND");
2441 self.stop;
2442 }
2443 }
2444 }
2445 setverdict(pass);
2446}
2447
2448private function f_pad_oct(octetstring str, integer len, OCT1 pad) return octetstring {
2449 var integer strlen := lengthof(str);
2450 for (var integer i := 0; i < len-strlen; i := i+1) {
2451 str := str & pad;
2452 }
2453 return str;
2454}
2455
2456/* Send PAGING via RSL, expect it to shw up on PCU socket */
2457testcase TC_pcu_paging_from_rsl() runs on test_CT {
2458 f_init();
2459
2460 for (var integer i := 0; i < 100; i := i+1) {
2461 var MobileL3_CommonIE_Types.MobileIdentityLV mi;
2462 timer T := 3.0;
2463 if (i < 50) {
2464 mi := valueof(ts_MI_TMSI_LV(f_rnd_octstring(4)));
2465 } else {
2466 mi := valueof(ts_MI_IMSI_LV(f_gen_imsi(i)));
2467 }
2468 var octetstring mi_enc_lv := enc_MobileIdentityLV(mi);
2469 var octetstring mi_enc := substr(mi_enc_lv, 1, lengthof(mi_enc_lv)-1);
2470 var octetstring t_mi_lv := f_pad_oct(mi_enc_lv, 9, '00'O);
2471
2472 /* Send RSL PAGING COMMAND */
2473 RSL_CCHAN.send(ts_RSL_UD(ts_RSL_PAGING_CMD(mi_enc, i mod 4)));
2474 T.start;
2475 alt {
2476 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_PAG_REQ(0, t_mi_lv))) {
2477 }
2478 [] PCU.receive(t_SD_PCUIF(g_pcu_conn_id, tr_PCUIF_PAG_REQ)) {
2479 setverdict(fail, "Unexpected PAGING REQ");
2480 self.stop;
2481 }
2482 [] PCU.receive { repeat; }
2483 [] T.timeout {
2484 setverdict(fail, "Timeout waiting for PAGING REQ");
2485 self.stop;
2486 }
2487 }
2488 }
2489 setverdict(pass);
2490}
2491
2492
Harald Welte68e495b2018-02-25 00:05:57 +01002493/* TODO Areas:
2494
2495* channel activation
2496** with BS_Power / MS_Power, bypassing power control loop
2497** on primary vs. secondary TRX
2498** with encryption from initial activation on
2499** with timing advance from initial activation on
2500* mode modify
2501** encryption
2502** multirate
2503* check DEACTIVATE SACCH
2504* encryption command / intricate logic about tx-only/tx+rx/...
2505** unsupported algorithm
2506* handover detection
2507* MS Power Control
2508* BS Power Control
2509* Physical Context
2510* SACCH info modify
Harald Welte68e495b2018-02-25 00:05:57 +01002511* CCCH Load Indication for PCH and RACH
2512* Delete Indication on AGCH overflow
2513* SMS Broadcast Req / Cmd / CBCH LOad Ind
2514* RF resource ind
Harald Welte68e495b2018-02-25 00:05:57 +01002515* error handling
2516* discriminator error
2517** type error
2518** sequence error
2519** IE duplicated?
Harald Welte883340c2018-02-28 18:59:29 +01002520* PCU interface
2521** TIME_IND from BTS->PCU
2522** DATA_IND from BTS->PCU
2523** verification of PCU-originated DATA_REQ arrival on Um/MS side
Harald Welte68e495b2018-02-25 00:05:57 +01002524
2525*/
Harald Welte70767382018-02-21 12:16:40 +01002526
2527control {
2528 execute( TC_chan_act_stress() );
2529 execute( TC_chan_act_react() );
2530 execute( TC_chan_deact_not_active() );
2531 execute( TC_chan_act_wrong_nr() );
Harald Welte629cc6b2018-03-11 17:19:05 +01002532 execute( TC_deact_sacch() );
Harald Welteea17b912018-03-11 22:29:31 +01002533 execute( TC_sacch_filling() );
2534 execute( TC_sacch_info_mod() );
Harald Welte8c24c2b2018-02-26 08:31:31 +01002535 execute( TC_rach_content() );
2536 execute( TC_rach_count() );
Harald Welte54a2a2d2018-02-26 09:14:05 +01002537 execute( TC_rach_max_ta() );
Harald Welte70767382018-02-21 12:16:40 +01002538 execute( TC_meas_res_sign_tchf() );
2539 execute( TC_meas_res_sign_tchh() );
2540 execute( TC_meas_res_sign_sdcch4() );
2541 execute( TC_meas_res_sign_sdcch8() );
Harald Welte685d5982018-02-27 20:42:05 +01002542 execute( TC_meas_res_sign_tchh_toa256() );
Harald Welte70767382018-02-21 12:16:40 +01002543 execute( TC_conn_fail_crit() );
Harald Welte68e495b2018-02-25 00:05:57 +01002544 execute( TC_paging_imsi_80percent() );
2545 execute( TC_paging_tmsi_80percent() );
2546 execute( TC_paging_imsi_200percent() );
2547 execute( TC_paging_tmsi_200percent() );
Harald Welte01d982c2018-02-25 01:31:40 +01002548 execute( TC_rsl_protocol_error() );
2549 execute( TC_rsl_mand_ie_error() );
2550 execute( TC_rsl_ie_content_error() );
Harald Welte48494ca2018-02-25 16:59:50 +01002551 execute( TC_si_sched_default() );
Harald Welte0cae4552018-03-09 22:20:26 +01002552 execute( TC_si_sched_1() );
Harald Welte48494ca2018-02-25 16:59:50 +01002553 execute( TC_si_sched_2bis() );
2554 execute( TC_si_sched_2ter() );
2555 execute( TC_si_sched_2ter_2bis() );
2556 execute( TC_si_sched_2quater() );
2557 execute( TC_si_sched_13() );
2558 execute( TC_si_sched_13_2bis_2ter_2quater() );
Harald Weltea871a382018-02-25 02:03:14 +01002559 execute( TC_ipa_dlcx_not_active() );
Harald Weltea3f1df92018-02-25 12:49:55 +01002560 execute( TC_ipa_crcx_twice_not_active() );
2561 execute( TC_ipa_crcx_mdcx_dlcx_not_active() );
Harald Welte3ae11da2018-02-25 13:36:06 +01002562 execute( TC_ipa_crcx_mdcx_mdcx_dlcx_not_active() );
Harald Welte9912eb52018-02-25 13:30:15 +01002563 execute( TC_ipa_crcx_sdcch_not_active() );
Harald Welte883340c2018-02-28 18:59:29 +01002564
2565 execute( TC_pcu_act_req() );
2566 execute( TC_pcu_act_req_wrong_ts() );
2567 execute( TC_pcu_act_req_wrong_bts() );
2568 execute( TC_pcu_act_req_wrong_trx() );
2569 execute( TC_pcu_deact_req() );
2570 execute( TC_pcu_deact_req_wrong_ts() );
2571 execute( TC_pcu_ver_si13() );
2572 execute( TC_pcu_data_req_wrong_bts() );
2573 execute( TC_pcu_data_req_wrong_trx() );
2574 execute( TC_pcu_data_req_wrong_ts() );
2575 execute( TC_pcu_data_req_ts_inactive() );
2576 execute( TC_pcu_data_req_pdtch() );
2577 execute( TC_pcu_data_req_ptcch() );
2578 execute( TC_pcu_data_req_agch() );
2579 execute( TC_pcu_data_req_imm_ass_pch() );
2580 execute( TC_pcu_rach_content() );
2581 execute( TC_pcu_paging_from_rsl() );
Harald Welte70767382018-02-21 12:16:40 +01002582}
2583
2584
2585}