Christina Quast | 53b2105 | 2014-12-09 15:34:35 +0100 | [diff] [blame] | 1 | /* ---------------------------------------------------------------------------- |
| 2 | * ATMEL Microcontroller Software Support |
| 3 | * ---------------------------------------------------------------------------- |
| 4 | * Copyright (c) 2010, Atmel Corporation |
| 5 | * |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * Redistribution and use in source and binary forms, with or without |
| 9 | * modification, are permitted provided that the following conditions are met: |
| 10 | * |
| 11 | * - Redistributions of source code must retain the above copyright notice, |
| 12 | * this list of conditions and the disclaimer below. |
| 13 | * |
| 14 | * Atmel's name may not be used to endorse or promote products derived from |
| 15 | * this software without specific prior written permission. |
| 16 | * |
| 17 | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| 20 | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
| 23 | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
| 26 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * ---------------------------------------------------------------------------- |
| 28 | */ |
| 29 | |
| 30 | /** |
| 31 | * \file |
| 32 | * |
| 33 | * \section Purpose |
| 34 | * |
| 35 | * This file provides a basic API for PIO configuration and usage of |
| 36 | * user-controlled pins. Please refer to the board.h file for a list of |
| 37 | * available pin definitions. |
| 38 | * |
| 39 | * \section Usage |
| 40 | * |
| 41 | * -# Define a constant pin description array such as the following one, using |
| 42 | * the existing definitions provided by the board.h file if possible: |
| 43 | * \code |
| 44 | * const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD}; |
| 45 | * \endcode |
| 46 | * Alternatively, it is possible to add new pins by provided the full Pin |
| 47 | * structure: |
| 48 | * \code |
| 49 | * // Pin instance to configure PA10 & PA11 as inputs with the internal |
| 50 | * // pull-up enabled. |
| 51 | * const Pin pPins = { |
| 52 | * (1 << 10) | (1 << 11), |
| 53 | * REG_PIOA, |
| 54 | * ID_PIOA, |
| 55 | * PIO_INPUT, |
| 56 | * PIO_PULLUP |
| 57 | * }; |
| 58 | * \endcode |
| 59 | * -# Configure a pin array by calling PIO_Configure() with a pointer to the |
| 60 | * array and its size (which is computed using the PIO_LISTSIZE macro). |
| 61 | * -# Change and get the value of a user-controlled pin using the PIO_Set, |
| 62 | * PIO_Clear and PIO_Get methods. |
| 63 | * -# Get the level being currently output by a user-controlled pin configured |
| 64 | * as an output using PIO_GetOutputDataStatus(). |
| 65 | */ |
| 66 | |
| 67 | #ifndef _PIO_ |
| 68 | #define _PIO_ |
| 69 | |
| 70 | /* |
| 71 | * Headers |
| 72 | */ |
| 73 | |
| 74 | #include "chip.h" |
| 75 | |
| 76 | #include <stdint.h> |
| 77 | |
| 78 | /* |
| 79 | * Global Definitions |
| 80 | */ |
| 81 | |
| 82 | /* The pin is controlled by the associated signal of peripheral A. */ |
| 83 | #define PIO_PERIPH_A 0 |
| 84 | /* The pin is controlled by the associated signal of peripheral B. */ |
| 85 | #define PIO_PERIPH_B 1 |
| 86 | /* The pin is controlled by the associated signal of peripheral C. */ |
| 87 | #define PIO_PERIPH_C 2 |
| 88 | /* The pin is controlled by the associated signal of peripheral D. */ |
| 89 | #define PIO_PERIPH_D 3 |
| 90 | /* The pin is an input. */ |
| 91 | #define PIO_INPUT 4 |
| 92 | /* The pin is an output and has a default level of 0. */ |
| 93 | #define PIO_OUTPUT_0 5 |
| 94 | /* The pin is an output and has a default level of 1. */ |
| 95 | #define PIO_OUTPUT_1 6 |
| 96 | |
| 97 | /* Default pin configuration (no attribute). */ |
| 98 | #define PIO_DEFAULT (0 << 0) |
| 99 | /* The internal pin pull-up is active. */ |
| 100 | #define PIO_PULLUP (1 << 0) |
| 101 | /* The internal glitch filter is active. */ |
| 102 | #define PIO_DEGLITCH (1 << 1) |
| 103 | /* The pin is open-drain. */ |
| 104 | #define PIO_OPENDRAIN (1 << 2) |
| 105 | |
| 106 | /* The internal debouncing filter is active. */ |
| 107 | #define PIO_DEBOUNCE (1 << 3) |
| 108 | |
| 109 | /* Enable additional interrupt modes. */ |
| 110 | #define PIO_IT_AIME (1 << 4) |
| 111 | |
| 112 | /* Interrupt High Level/Rising Edge detection is active. */ |
| 113 | #define PIO_IT_RE_OR_HL (1 << 5) |
| 114 | /* Interrupt Edge detection is active. */ |
| 115 | #define PIO_IT_EDGE (1 << 6) |
| 116 | |
| 117 | /* Low level interrupt is active */ |
| 118 | #define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME) |
| 119 | /* High level interrupt is active */ |
| 120 | #define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME) |
| 121 | /* Falling edge interrupt is active */ |
| 122 | #define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME) |
| 123 | /* Rising edge interrupt is active */ |
| 124 | #define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME) |
| 125 | |
| 126 | #ifdef __cplusplus |
| 127 | extern "C" { |
| 128 | #endif |
| 129 | |
| 130 | /* |
| 131 | * Global Macros |
| 132 | */ |
| 133 | |
| 134 | /** |
| 135 | * Calculates the size of an array of Pin instances. The array must be defined |
| 136 | * locally (i.e. not a pointer), otherwise the computation will not be correct. |
| 137 | * \param pPins Local array of Pin instances. |
| 138 | * \return Number of elements in array. |
| 139 | */ |
| 140 | #define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin)) |
| 141 | |
| 142 | /* |
| 143 | * Global Types |
| 144 | */ |
| 145 | |
| 146 | |
| 147 | /* |
| 148 | * Describes the type and attribute of one PIO pin or a group of similar pins. |
| 149 | * The #type# field can have the following values: |
| 150 | * - PIO_PERIPH_A |
| 151 | * - PIO_PERIPH_B |
| 152 | * - PIO_OUTPUT_0 |
| 153 | * - PIO_OUTPUT_1 |
| 154 | * - PIO_INPUT |
| 155 | * |
| 156 | * The #attribute# field is a bitmask that can either be set to PIO_DEFAULt, |
| 157 | * or combine (using bitwise OR '|') any number of the following constants: |
| 158 | * - PIO_PULLUP |
| 159 | * - PIO_DEGLITCH |
| 160 | * - PIO_DEBOUNCE |
| 161 | * - PIO_OPENDRAIN |
| 162 | * - PIO_IT_LOW_LEVEL |
| 163 | * - PIO_IT_HIGH_LEVEL |
| 164 | * - PIO_IT_FALL_EDGE |
| 165 | * - PIO_IT_RISE_EDGE |
| 166 | */ |
| 167 | typedef struct _Pin |
| 168 | { |
| 169 | /* Bitmask indicating which pin(s) to configure. */ |
| 170 | uint32_t mask; |
| 171 | /* Pointer to the PIO controller which has the pin(s). */ |
| 172 | Pio *pio; |
| 173 | /* Peripheral ID of the PIO controller which has the pin(s). */ |
| 174 | uint8_t id; |
| 175 | /* Pin type. */ |
| 176 | uint8_t type; |
| 177 | /* Pin attribute. */ |
| 178 | uint8_t attribute; |
| 179 | } Pin ; |
| 180 | |
| 181 | /* |
| 182 | * Global Access Macros |
| 183 | */ |
| 184 | |
| 185 | /* |
| 186 | * Global Functions |
| 187 | */ |
| 188 | |
| 189 | extern uint8_t PIO_Configure( const Pin *list, uint32_t size ) ; |
| 190 | |
| 191 | extern void PIO_Set( const Pin *pin ) ; |
| 192 | |
| 193 | extern void PIO_Clear( const Pin *pin ) ; |
| 194 | |
| 195 | extern uint8_t PIO_Get( const Pin *pin ) ; |
| 196 | |
| 197 | extern uint8_t PIO_GetOutputDataStatus( const Pin *pin ) ; |
| 198 | |
| 199 | extern void PIO_SetDebounceFilter( const Pin *pin, uint32_t cuttoff ); |
| 200 | |
| 201 | #ifdef __cplusplus |
| 202 | } |
| 203 | #endif |
| 204 | |
| 205 | #endif /* #ifndef _PIO_ */ |
| 206 | |