dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008, 2009 Free Software Foundation, Inc. |
| 3 | * |
| 4 | * This software is distributed under the terms of the GNU Affero Public License. |
| 5 | * See the COPYING file in the main directory for details. |
| 6 | * |
| 7 | * This use of this software may be subject to additional restrictions. |
| 8 | * See the LEGAL file in the main directory for details. |
| 9 | |
| 10 | This program is free software: you can redistribute it and/or modify |
| 11 | it under the terms of the GNU Affero General Public License as published by |
| 12 | the Free Software Foundation, either version 3 of the License, or |
| 13 | (at your option) any later version. |
| 14 | |
| 15 | This program is distributed in the hope that it will be useful, |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | GNU Affero General Public License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU Affero General Public License |
| 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 22 | |
| 23 | */ |
| 24 | |
| 25 | |
| 26 | /* |
| 27 | Compilation Flags |
| 28 | |
| 29 | SWLOOPBACK compile for software loopback testing |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 30 | */ |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 31 | |
| 32 | |
| 33 | #include <stdint.h> |
| 34 | #include <string.h> |
| 35 | #include <stdlib.h> |
Alexander Huemer | 6fafd33 | 2018-01-12 15:04:02 +0100 | [diff] [blame] | 36 | #include "Logger.h" |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 37 | #include "Threads.h" |
| 38 | #include "USRPDevice.h" |
| 39 | |
kurtis.heimerl | 3758b16 | 2011-11-26 03:19:22 +0000 | [diff] [blame] | 40 | #ifdef HAVE_CONFIG_H |
| 41 | #include "config.h" |
| 42 | #endif |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 43 | |
| 44 | using namespace std; |
| 45 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 46 | enum dboardConfigType { |
| 47 | TXA_RXB, |
| 48 | TXB_RXA, |
| 49 | TXA_RXA, |
| 50 | TXB_RXB |
| 51 | }; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 52 | |
kurtis.heimerl | 3758b16 | 2011-11-26 03:19:22 +0000 | [diff] [blame] | 53 | #ifdef SINGLEDB |
| 54 | const dboardConfigType dboardConfig = TXA_RXA; |
| 55 | #else |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 56 | const dboardConfigType dboardConfig = TXA_RXB; |
kurtis.heimerl | 3758b16 | 2011-11-26 03:19:22 +0000 | [diff] [blame] | 57 | #endif |
| 58 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 59 | const double USRPDevice::masterClockRate = 52.0e6; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 60 | |
Harald Welte | 61707e8 | 2018-06-13 23:21:57 +0200 | [diff] [blame] | 61 | USRPDevice::USRPDevice(size_t tx_sps, size_t rx_sps, InterfaceType iface, |
| 62 | size_t chans, double lo_offset, |
| 63 | const std::vector<std::string>& tx_paths, |
| 64 | const std::vector<std::string>& rx_paths): |
| 65 | RadioDevice(tx_sps, rx_sps, iface, chans, lo_offset, tx_paths, rx_paths) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 66 | { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 67 | LOGC(DDEV, INFO) << "creating USRP device..."; |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 68 | |
Harald Welte | ce70ba5 | 2018-06-13 22:47:48 +0200 | [diff] [blame] | 69 | decimRate = (unsigned int) round(masterClockRate/((GSMRATE) * (double) tx_sps)); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 70 | actualSampleRate = masterClockRate/decimRate; |
| 71 | rxGain = 0; |
| 72 | |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 73 | /* |
| 74 | * Undetermined delay b/w ping response timestamp and true |
| 75 | * receive timestamp. Values are empirically measured. With |
| 76 | * split sample rate Tx/Rx - 4/1 sps we need to need to |
| 77 | * compensate for advance rather than delay. |
| 78 | */ |
Harald Welte | ce70ba5 | 2018-06-13 22:47:48 +0200 | [diff] [blame] | 79 | if (tx_sps == 1) |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 80 | pingOffset = 272; |
Harald Welte | ce70ba5 | 2018-06-13 22:47:48 +0200 | [diff] [blame] | 81 | else if (tx_sps == 4) |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 82 | pingOffset = 269 - 7500; |
| 83 | else |
| 84 | pingOffset = 0; |
| 85 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 86 | #ifdef SWLOOPBACK |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 87 | samplePeriod = 1.0e6/actualSampleRate; |
| 88 | loopbackBufferSize = 0; |
| 89 | gettimeofday(&lastReadTime,NULL); |
| 90 | firstRead = false; |
| 91 | #endif |
| 92 | } |
| 93 | |
Tom Tsou | 2f3e60b | 2016-07-17 19:29:08 -0700 | [diff] [blame] | 94 | int USRPDevice::open(const std::string &, int, bool) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 95 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 96 | writeLock.unlock(); |
| 97 | |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 98 | LOGC(DDEV, INFO) << "opening USRP device.."; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 99 | #ifndef SWLOOPBACK |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 100 | string rbf = "std_inband.rbf"; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 101 | //string rbf = "inband_1rxhb_1tx.rbf"; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 102 | m_uRx.reset(); |
| 103 | if (!skipRx) { |
| 104 | try { |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 105 | m_uRx = usrp_standard_rx_sptr(usrp_standard_rx::make( |
Harald Welte | ce70ba5 | 2018-06-13 22:47:48 +0200 | [diff] [blame] | 106 | 0, decimRate * tx_sps, 1, -1, |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 107 | usrp_standard_rx::FPGA_MODE_NORMAL, |
| 108 | 1024, 16 * 8, rbf)); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 109 | m_uRx->set_fpga_master_clock_freq(masterClockRate); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 110 | } |
Thomas Tsou | c064124 | 2013-10-11 14:55:31 -0400 | [diff] [blame] | 111 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 112 | catch(...) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 113 | LOGC(DDEV, ALERT) << "make failed on Rx"; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 114 | m_uRx.reset(); |
Thomas Tsou | cb69f08 | 2013-04-08 14:18:26 -0400 | [diff] [blame] | 115 | return -1; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | if (m_uRx->fpga_master_clock_freq() != masterClockRate) |
| 119 | { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 120 | LOGC(DDEV, ALERT) << "WRONG FPGA clock freq = " << m_uRx->fpga_master_clock_freq() |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 121 | << ", desired clock freq = " << masterClockRate; |
| 122 | m_uRx.reset(); |
Thomas Tsou | cb69f08 | 2013-04-08 14:18:26 -0400 | [diff] [blame] | 123 | return -1; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 124 | } |
| 125 | } |
| 126 | |
| 127 | try { |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 128 | m_uTx = usrp_standard_tx_sptr(usrp_standard_tx::make( |
| 129 | 0, decimRate * 2, 1, -1, |
| 130 | 1024, 16 * 8, rbf)); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 131 | m_uTx->set_fpga_master_clock_freq(masterClockRate); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 132 | } |
Thomas Tsou | c064124 | 2013-10-11 14:55:31 -0400 | [diff] [blame] | 133 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 134 | catch(...) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 135 | LOGC(DDEV, ALERT) << "make failed on Tx"; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 136 | m_uTx.reset(); |
Thomas Tsou | cb69f08 | 2013-04-08 14:18:26 -0400 | [diff] [blame] | 137 | return -1; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 138 | } |
| 139 | |
| 140 | if (m_uTx->fpga_master_clock_freq() != masterClockRate) |
| 141 | { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 142 | LOGC(DDEV, ALERT) << "WRONG FPGA clock freq = " << m_uTx->fpga_master_clock_freq() |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 143 | << ", desired clock freq = " << masterClockRate; |
| 144 | m_uTx.reset(); |
Thomas Tsou | cb69f08 | 2013-04-08 14:18:26 -0400 | [diff] [blame] | 145 | return -1; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | if (!skipRx) m_uRx->stop(); |
| 149 | m_uTx->stop(); |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 150 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 151 | #endif |
| 152 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 153 | switch (dboardConfig) { |
| 154 | case TXA_RXB: |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 155 | txSubdevSpec = usrp_subdev_spec(0,0); |
| 156 | rxSubdevSpec = usrp_subdev_spec(1,0); |
| 157 | break; |
| 158 | case TXB_RXA: |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 159 | txSubdevSpec = usrp_subdev_spec(1,0); |
| 160 | rxSubdevSpec = usrp_subdev_spec(0,0); |
| 161 | break; |
| 162 | case TXA_RXA: |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 163 | txSubdevSpec = usrp_subdev_spec(0,0); |
| 164 | rxSubdevSpec = usrp_subdev_spec(0,0); |
| 165 | break; |
| 166 | case TXB_RXB: |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 167 | txSubdevSpec = usrp_subdev_spec(1,0); |
| 168 | rxSubdevSpec = usrp_subdev_spec(1,0); |
| 169 | break; |
| 170 | default: |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 171 | txSubdevSpec = usrp_subdev_spec(0,0); |
| 172 | rxSubdevSpec = usrp_subdev_spec(1,0); |
| 173 | } |
| 174 | |
kurtis.heimerl | b9e237e | 2011-11-26 03:17:59 +0000 | [diff] [blame] | 175 | m_dbTx = m_uTx->selected_subdev(txSubdevSpec); |
| 176 | m_dbRx = m_uRx->selected_subdev(rxSubdevSpec); |
| 177 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 178 | samplesRead = 0; |
| 179 | samplesWritten = 0; |
| 180 | started = false; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 181 | |
Thomas Tsou | cb69f08 | 2013-04-08 14:18:26 -0400 | [diff] [blame] | 182 | return NORMAL; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | |
| 186 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 187 | bool USRPDevice::start() |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 188 | { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 189 | LOGC(DDEV, INFO) << "starting USRP..."; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 190 | #ifndef SWLOOPBACK |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 191 | if (!m_uRx && !skipRx) return false; |
| 192 | if (!m_uTx) return false; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 193 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 194 | if (!skipRx) m_uRx->stop(); |
| 195 | m_uTx->stop(); |
| 196 | |
| 197 | writeLock.lock(); |
| 198 | // power up and configure daughterboards |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 199 | m_dbTx->set_enable(true); |
| 200 | m_uTx->set_mux(m_uTx->determine_tx_mux_value(txSubdevSpec)); |
| 201 | m_uRx->set_mux(m_uRx->determine_rx_mux_value(rxSubdevSpec)); |
| 202 | |
| 203 | if (!m_dbRx->select_rx_antenna(1)) |
| 204 | m_dbRx->select_rx_antenna(0); |
| 205 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 206 | writeLock.unlock(); |
| 207 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 208 | // Set gains to midpoint |
| 209 | setTxGain((minTxGain() + maxTxGain()) / 2); |
| 210 | setRxGain((minRxGain() + maxRxGain()) / 2); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 211 | |
| 212 | data = new short[currDataSize]; |
| 213 | dataStart = 0; |
| 214 | dataEnd = 0; |
| 215 | timeStart = 0; |
| 216 | timeEnd = 0; |
| 217 | timestampOffset = 0; |
| 218 | latestWriteTimestamp = 0; |
| 219 | lastPktTimestamp = 0; |
| 220 | hi32Timestamp = 0; |
| 221 | isAligned = false; |
| 222 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 223 | |
| 224 | if (!skipRx) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 225 | started = (m_uRx->start() && m_uTx->start()); |
| 226 | else |
| 227 | started = m_uTx->start(); |
| 228 | return started; |
| 229 | #else |
| 230 | gettimeofday(&lastReadTime,NULL); |
| 231 | return true; |
| 232 | #endif |
| 233 | } |
| 234 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 235 | bool USRPDevice::stop() |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 236 | { |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 237 | #ifndef SWLOOPBACK |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 238 | if (!m_uRx) return false; |
| 239 | if (!m_uTx) return false; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 240 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 241 | delete[] currData; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 242 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 243 | started = !(m_uRx->stop() && m_uTx->stop()); |
| 244 | return !started; |
| 245 | #else |
| 246 | return true; |
| 247 | #endif |
| 248 | } |
| 249 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 250 | double USRPDevice::maxTxGain() |
| 251 | { |
| 252 | return m_dbTx->gain_max(); |
| 253 | } |
| 254 | |
| 255 | double USRPDevice::minTxGain() |
| 256 | { |
| 257 | return m_dbTx->gain_min(); |
| 258 | } |
| 259 | |
| 260 | double USRPDevice::maxRxGain() |
| 261 | { |
| 262 | return m_dbRx->gain_max(); |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 263 | } |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 264 | |
| 265 | double USRPDevice::minRxGain() |
| 266 | { |
| 267 | return m_dbRx->gain_min(); |
| 268 | } |
| 269 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 270 | double USRPDevice::setTxGain(double dB, size_t chan) |
| 271 | { |
| 272 | if (chan) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 273 | LOGC(DDEV, ALERT) << "Invalid channel " << chan; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 274 | return 0.0; |
| 275 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 276 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 277 | writeLock.lock(); |
| 278 | if (dB > maxTxGain()) |
| 279 | dB = maxTxGain(); |
| 280 | if (dB < minTxGain()) |
| 281 | dB = minTxGain(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 282 | |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 283 | LOGC(DDEV, NOTICE) << "Setting TX gain to " << dB << " dB."; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 284 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 285 | if (!m_dbTx->set_gain(dB)) |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 286 | LOGC(DDEV, ERR) << "Error setting TX gain"; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 287 | |
| 288 | writeLock.unlock(); |
| 289 | |
| 290 | return dB; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 294 | double USRPDevice::setRxGain(double dB, size_t chan) |
| 295 | { |
| 296 | if (chan) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 297 | LOGC(DDEV, ALERT) << "Invalid channel " << chan; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 298 | return 0.0; |
| 299 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 300 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 301 | dB = 47.0; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 302 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 303 | writeLock.lock(); |
| 304 | if (dB > maxRxGain()) |
| 305 | dB = maxRxGain(); |
| 306 | if (dB < minRxGain()) |
| 307 | dB = minRxGain(); |
| 308 | |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 309 | LOGC(DDEV, NOTICE) << "Setting RX gain to " << dB << " dB."; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 310 | |
| 311 | if (!m_dbRx->set_gain(dB)) |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 312 | LOGC(DDEV, ERR) << "Error setting RX gain"; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 313 | |
| 314 | writeLock.unlock(); |
| 315 | |
| 316 | return dB; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 317 | } |
| 318 | |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 319 | bool USRPDevice::setRxAntenna(const std::string &ant, size_t chan) |
| 320 | { |
| 321 | if (chan >= rx_paths.size()) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 322 | LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 323 | return false; |
| 324 | } |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 325 | LOGC(DDEV, ALERT) << "Not implemented"; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 326 | return true; |
| 327 | } |
| 328 | |
| 329 | std::string USRPDevice::getRxAntenna(size_t chan) |
| 330 | { |
| 331 | if (chan >= rx_paths.size()) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 332 | LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 333 | return ""; |
| 334 | } |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 335 | LOGC(DDEV, ALERT) << "Not implemented"; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 336 | return ""; |
| 337 | } |
| 338 | |
| 339 | bool USRPDevice::setTxAntenna(const std::string &ant, size_t chan) |
| 340 | { |
| 341 | if (chan >= tx_paths.size()) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 342 | LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 343 | return false; |
| 344 | } |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 345 | LOGC(DDEV, ALERT) << "Not implemented"; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 346 | return true; |
| 347 | } |
| 348 | |
| 349 | std::string USRPDevice::getTxAntenna(size_t chan) |
| 350 | { |
| 351 | if (chan >= tx_paths.size()) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 352 | LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 353 | return ""; |
| 354 | } |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 355 | LOGC(DDEV, ALERT) << "Not implemented"; |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 356 | return ""; |
| 357 | } |
| 358 | |
Pau Espin Pedrol | 0fc20d1 | 2018-04-24 17:48:52 +0200 | [diff] [blame] | 359 | bool USRPDevice::requiresRadioAlign() |
| 360 | { |
| 361 | return true; |
| 362 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 363 | |
Pau Espin Pedrol | e564f0f | 2018-04-24 18:43:51 +0200 | [diff] [blame] | 364 | GSM::Time USRPDevice::minLatency() { |
| 365 | return GSM::Time(1,1); |
| 366 | } |
| 367 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 368 | // NOTE: Assumes sequential reads |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 369 | int USRPDevice::readSamples(std::vector<short *> &bufs, int len, bool *overrun, |
| 370 | TIMESTAMP timestamp, bool *underrun, unsigned *RSSI) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 371 | { |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 372 | #ifndef SWLOOPBACK |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 373 | if (!m_uRx) |
| 374 | return 0; |
| 375 | |
| 376 | short *buf = bufs[0]; |
| 377 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 378 | timestamp += timestampOffset; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 379 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 380 | if (timestamp + len < timeStart) { |
| 381 | memset(buf,0,len*2*sizeof(short)); |
| 382 | return len; |
| 383 | } |
| 384 | |
| 385 | if (underrun) *underrun = false; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 386 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 387 | uint32_t readBuf[2000]; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 388 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 389 | while (1) { |
| 390 | //guestimate USB read size |
| 391 | int readLen=0; |
| 392 | { |
| 393 | int numSamplesNeeded = timestamp + len - timeEnd; |
| 394 | if (numSamplesNeeded <=0) break; |
| 395 | readLen = 512 * ((int) ceil((float) numSamplesNeeded/126.0)); |
| 396 | if (readLen > 8000) readLen= (8000/512)*512; |
| 397 | } |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 398 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 399 | // read USRP packets, parse and save A/D data as needed |
| 400 | readLen = m_uRx->read((void *)readBuf,readLen,overrun); |
Pau Espin Pedrol | 4d179ab | 2018-09-10 10:36:04 +0200 | [diff] [blame] | 401 | for (int pktNum = 0; pktNum < (readLen/512); pktNum++) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 402 | // tmpBuf points to start of a USB packet |
| 403 | uint32_t* tmpBuf = (uint32_t *) (readBuf+pktNum*512/4); |
| 404 | TIMESTAMP pktTimestamp = usrp_to_host_u32(tmpBuf[1]); |
| 405 | uint32_t word0 = usrp_to_host_u32(tmpBuf[0]); |
| 406 | uint32_t chan = (word0 >> 16) & 0x1f; |
| 407 | unsigned payloadSz = word0 & 0x1ff; |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 408 | LOGC(DDEV, DEBUG) << "first two bytes: " << hex << word0 << " " << dec << pktTimestamp; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 409 | |
| 410 | bool incrementHi32 = ((lastPktTimestamp & 0x0ffffffffll) > pktTimestamp); |
| 411 | if (incrementHi32 && (timeStart!=0)) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 412 | LOGC(DDEV, DEBUG) << "high 32 increment!!!"; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 413 | hi32Timestamp++; |
| 414 | } |
| 415 | pktTimestamp = (((TIMESTAMP) hi32Timestamp) << 32) | pktTimestamp; |
| 416 | lastPktTimestamp = pktTimestamp; |
| 417 | |
| 418 | if (chan == 0x01f) { |
| 419 | // control reply, check to see if its ping reply |
| 420 | uint32_t word2 = usrp_to_host_u32(tmpBuf[2]); |
| 421 | if ((word2 >> 16) == ((0x01 << 8) | 0x02)) { |
| 422 | timestamp -= timestampOffset; |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 423 | timestampOffset = pktTimestamp - pingTimestamp + pingOffset; |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 424 | LOGC(DDEV, DEBUG) << "updating timestamp offset to: " << timestampOffset; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 425 | timestamp += timestampOffset; |
| 426 | isAligned = true; |
| 427 | } |
| 428 | continue; |
| 429 | } |
| 430 | if (chan != 0) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 431 | LOGC(DDEV, DEBUG) << "chan: " << chan << ", timestamp: " << pktTimestamp << ", sz:" << payloadSz; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 432 | continue; |
| 433 | } |
| 434 | if ((word0 >> 28) & 0x04) { |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 435 | if (underrun) *underrun = true; |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 436 | LOGC(DDEV, DEBUG) << "UNDERRUN in TRX->USRP interface"; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 437 | } |
| 438 | if (RSSI) *RSSI = (word0 >> 21) & 0x3f; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 439 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 440 | if (!isAligned) continue; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 441 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 442 | unsigned cursorStart = pktTimestamp - timeStart + dataStart; |
| 443 | while (cursorStart*2 > currDataSize) { |
| 444 | cursorStart -= currDataSize/2; |
| 445 | } |
| 446 | if (cursorStart*2 + payloadSz/2 > currDataSize) { |
| 447 | // need to circle around buffer |
| 448 | memcpy(data+cursorStart*2,tmpBuf+2,(currDataSize-cursorStart*2)*sizeof(short)); |
| 449 | memcpy(data,tmpBuf+2+(currDataSize/2-cursorStart),payloadSz-(currDataSize-cursorStart*2)*sizeof(short)); |
| 450 | } |
| 451 | else { |
| 452 | memcpy(data+cursorStart*2,tmpBuf+2,payloadSz); |
| 453 | } |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 454 | if (pktTimestamp + payloadSz/2/sizeof(short) > timeEnd) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 455 | timeEnd = pktTimestamp+payloadSz/2/sizeof(short); |
| 456 | |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 457 | LOGC(DDEV, DEBUG) << "timeStart: " << timeStart << ", timeEnd: " << timeEnd << ", pktTimestamp: " << pktTimestamp; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 458 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 459 | } |
| 460 | } |
| 461 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 462 | // copy desired data to buf |
| 463 | unsigned bufStart = dataStart+(timestamp-timeStart); |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 464 | if (bufStart + len < currDataSize/2) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 465 | LOGC(DDEV, DEBUG) << "bufStart: " << bufStart; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 466 | memcpy(buf,data+bufStart*2,len*2*sizeof(short)); |
| 467 | memset(data+bufStart*2,0,len*2*sizeof(short)); |
| 468 | } |
| 469 | else { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 470 | LOGC(DDEV, DEBUG) << "len: " << len << ", currDataSize/2: " << currDataSize/2 << ", bufStart: " << bufStart; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 471 | unsigned firstLength = (currDataSize/2-bufStart); |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 472 | LOGC(DDEV, DEBUG) << "firstLength: " << firstLength; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 473 | memcpy(buf,data+bufStart*2,firstLength*2*sizeof(short)); |
| 474 | memset(data+bufStart*2,0,firstLength*2*sizeof(short)); |
| 475 | memcpy(buf+firstLength*2,data,(len-firstLength)*2*sizeof(short)); |
| 476 | memset(data,0,(len-firstLength)*2*sizeof(short)); |
| 477 | } |
| 478 | dataStart = (bufStart + len) % (currDataSize/2); |
| 479 | timeStart = timestamp + len; |
| 480 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 481 | return len; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 482 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 483 | #else |
| 484 | if (loopbackBufferSize < 2) return 0; |
| 485 | int numSamples = 0; |
| 486 | struct timeval currTime; |
| 487 | gettimeofday(&currTime,NULL); |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 488 | double timeElapsed = (currTime.tv_sec - lastReadTime.tv_sec)*1.0e6 + |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 489 | (currTime.tv_usec - lastReadTime.tv_usec); |
| 490 | if (timeElapsed < samplePeriod) {return 0;} |
| 491 | int numSamplesToRead = (int) floor(timeElapsed/samplePeriod); |
| 492 | if (numSamplesToRead < len) return 0; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 493 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 494 | if (numSamplesToRead > len) numSamplesToRead = len; |
| 495 | if (numSamplesToRead > loopbackBufferSize/2) { |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 496 | firstRead =false; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 497 | numSamplesToRead = loopbackBufferSize/2; |
| 498 | } |
| 499 | memcpy(buf,loopbackBuffer,sizeof(short)*2*numSamplesToRead); |
| 500 | loopbackBufferSize -= 2*numSamplesToRead; |
| 501 | memcpy(loopbackBuffer,loopbackBuffer+2*numSamplesToRead, |
| 502 | sizeof(short)*loopbackBufferSize); |
| 503 | numSamples = numSamplesToRead; |
| 504 | if (firstRead) { |
| 505 | int new_usec = lastReadTime.tv_usec + (int) round((double) numSamplesToRead * samplePeriod); |
| 506 | lastReadTime.tv_sec = lastReadTime.tv_sec + new_usec/1000000; |
| 507 | lastReadTime.tv_usec = new_usec % 1000000; |
| 508 | } |
| 509 | else { |
| 510 | gettimeofday(&lastReadTime,NULL); |
| 511 | firstRead = true; |
| 512 | } |
| 513 | samplesRead += numSamples; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 514 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 515 | return numSamples; |
| 516 | #endif |
| 517 | } |
| 518 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 519 | int USRPDevice::writeSamples(std::vector<short *> &bufs, int len, |
| 520 | bool *underrun, unsigned long long timestamp, |
| 521 | bool isControl) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 522 | { |
| 523 | writeLock.lock(); |
| 524 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 525 | #ifndef SWLOOPBACK |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 526 | if (!m_uTx) |
| 527 | return 0; |
| 528 | |
| 529 | short *buf = bufs[0]; |
| 530 | |
kurtis.heimerl | c8739b8 | 2011-11-02 00:06:34 +0000 | [diff] [blame] | 531 | static uint32_t outData[128*20]; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 532 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 533 | for (int i = 0; i < len*2; i++) { |
| 534 | buf[i] = host_to_usrp_short(buf[i]); |
| 535 | } |
| 536 | |
| 537 | int numWritten = 0; |
| 538 | unsigned isStart = 1; |
| 539 | unsigned RSSI = 0; |
| 540 | unsigned CHAN = (isControl) ? 0x01f : 0x00; |
| 541 | len = len*2*sizeof(short); |
| 542 | int numPkts = (int) ceil((float)len/(float)504); |
| 543 | unsigned isEnd = (numPkts < 2); |
| 544 | uint32_t *outPkt = outData; |
| 545 | int pktNum = 0; |
| 546 | while (numWritten < len) { |
| 547 | // pkt is pointer to start of a USB packet |
| 548 | uint32_t *pkt = outPkt + pktNum*128; |
| 549 | isEnd = (len - numWritten <= 504); |
| 550 | unsigned payloadLen = ((len - numWritten) < 504) ? (len-numWritten) : 504; |
| 551 | pkt[0] = (isStart << 12 | isEnd << 11 | (RSSI & 0x3f) << 5 | CHAN) << 16 | payloadLen; |
| 552 | pkt[1] = timestamp & 0x0ffffffffll; |
| 553 | memcpy(pkt+2,buf+(numWritten/sizeof(short)),payloadLen); |
| 554 | numWritten += payloadLen; |
| 555 | timestamp += payloadLen/2/sizeof(short); |
| 556 | isStart = 0; |
| 557 | pkt[0] = host_to_usrp_u32(pkt[0]); |
| 558 | pkt[1] = host_to_usrp_u32(pkt[1]); |
| 559 | pktNum++; |
| 560 | } |
| 561 | m_uTx->write((const void*) outPkt,sizeof(uint32_t)*128*numPkts,NULL); |
| 562 | |
| 563 | samplesWritten += len/2/sizeof(short); |
| 564 | writeLock.unlock(); |
| 565 | |
| 566 | return len/2/sizeof(short); |
| 567 | #else |
| 568 | int retVal = len; |
| 569 | memcpy(loopbackBuffer+loopbackBufferSize,buf,sizeof(short)*2*len); |
| 570 | samplesWritten += retVal; |
| 571 | loopbackBufferSize += retVal*2; |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 572 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 573 | return retVal; |
| 574 | #endif |
| 575 | } |
| 576 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 577 | bool USRPDevice::updateAlignment(TIMESTAMP timestamp) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 578 | { |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 579 | #ifndef SWLOOPBACK |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 580 | short data[] = {0x00,0x02,0x00,0x00}; |
| 581 | uint32_t *wordPtr = (uint32_t *) data; |
kurtis.heimerl | c8739b8 | 2011-11-02 00:06:34 +0000 | [diff] [blame] | 582 | *wordPtr = host_to_usrp_u32(*wordPtr); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 583 | bool tmpUnderrun; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 584 | |
| 585 | std::vector<short *> buf(1, data); |
| 586 | if (writeSamples(buf, 1, &tmpUnderrun, timestamp & 0x0ffffffffll, true)) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 587 | pingTimestamp = timestamp; |
| 588 | return true; |
| 589 | } |
| 590 | return false; |
| 591 | #else |
| 592 | return true; |
| 593 | #endif |
| 594 | } |
| 595 | |
Pau Espin Pedrol | f58cd8a | 2018-02-05 13:04:41 +0100 | [diff] [blame] | 596 | #ifndef SWLOOPBACK |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 597 | bool USRPDevice::setTxFreq(double wFreq, size_t chan) |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 598 | { |
| 599 | usrp_tune_result result; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 600 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 601 | if (chan) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 602 | LOGC(DDEV, ALERT) << "Invalid channel " << chan; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 603 | return false; |
| 604 | } |
| 605 | |
kurtis.heimerl | b9e237e | 2011-11-26 03:17:59 +0000 | [diff] [blame] | 606 | if (m_uTx->tune(txSubdevSpec.side, m_dbTx, wFreq, &result)) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 607 | LOGC(DDEV, INFO) << "set TX: " << wFreq << std::endl |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 608 | << " baseband freq: " << result.baseband_freq << std::endl |
| 609 | << " DDC freq: " << result.dxc_freq << std::endl |
| 610 | << " residual freq: " << result.residual_freq; |
| 611 | return true; |
| 612 | } |
| 613 | else { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 614 | LOGC(DDEV, ALERT) << "set TX: " << wFreq << "failed" << std::endl |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 615 | << " baseband freq: " << result.baseband_freq << std::endl |
| 616 | << " DDC freq: " << result.dxc_freq << std::endl |
| 617 | << " residual freq: " << result.residual_freq; |
| 618 | return false; |
| 619 | } |
| 620 | } |
| 621 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 622 | bool USRPDevice::setRxFreq(double wFreq, size_t chan) |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 623 | { |
| 624 | usrp_tune_result result; |
| 625 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 626 | if (chan) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 627 | LOGC(DDEV, ALERT) << "Invalid channel " << chan; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 628 | return false; |
| 629 | } |
| 630 | |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 631 | if (m_uRx->tune(0, m_dbRx, wFreq, &result)) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 632 | LOGC(DDEV, INFO) << "set RX: " << wFreq << std::endl |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 633 | << " baseband freq: " << result.baseband_freq << std::endl |
| 634 | << " DDC freq: " << result.dxc_freq << std::endl |
| 635 | << " residual freq: " << result.residual_freq; |
| 636 | return true; |
| 637 | } |
| 638 | else { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 639 | LOGC(DDEV, ALERT) << "set RX: " << wFreq << "failed" << std::endl |
kurtis.heimerl | 79e71c9 | 2011-11-26 03:16:48 +0000 | [diff] [blame] | 640 | << " baseband freq: " << result.baseband_freq << std::endl |
| 641 | << " DDC freq: " << result.dxc_freq << std::endl |
| 642 | << " residual freq: " << result.residual_freq; |
| 643 | return false; |
| 644 | } |
| 645 | |
| 646 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 647 | |
| 648 | #else |
| 649 | bool USRPDevice::setTxFreq(double wFreq) { return true;}; |
| 650 | bool USRPDevice::setRxFreq(double wFreq) { return true;}; |
| 651 | #endif |
kurtis.heimerl | 965e757 | 2011-11-26 03:16:54 +0000 | [diff] [blame] | 652 | |
Tom Tsou | 5cd70dc | 2016-03-06 01:28:40 -0800 | [diff] [blame] | 653 | RadioDevice *RadioDevice::make(size_t tx_sps, size_t rx_sps, |
Harald Welte | 61707e8 | 2018-06-13 23:21:57 +0200 | [diff] [blame] | 654 | InterfaceType iface, size_t chans, double lo_offset, |
Pau Espin Pedrol | 77ce99a | 2018-02-05 13:05:06 +0100 | [diff] [blame] | 655 | const std::vector<std::string>& tx_paths, |
| 656 | const std::vector<std::string>& rx_paths) |
kurtis.heimerl | 965e757 | 2011-11-26 03:16:54 +0000 | [diff] [blame] | 657 | { |
Harald Welte | b229439 | 2018-06-13 23:42:19 +0200 | [diff] [blame] | 658 | if (tx_sps != rx_sps) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 659 | LOGC(DDEV, ERROR) << "USRP1 requires tx_sps == rx_sps"; |
Harald Welte | b229439 | 2018-06-13 23:42:19 +0200 | [diff] [blame] | 660 | return NULL; |
| 661 | } |
| 662 | if (chans != 1) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 663 | LOGC(DDEV, ERROR) << "USRP1 supports only 1 channel"; |
Harald Welte | b229439 | 2018-06-13 23:42:19 +0200 | [diff] [blame] | 664 | return NULL; |
| 665 | } |
| 666 | if (lo_offset != 0.0) { |
Harald Welte | 5cc8858 | 2018-08-17 19:55:38 +0200 | [diff] [blame] | 667 | LOGC(DDEV, ERROR) << "USRP1 doesn't support lo_offset"; |
Harald Welte | b229439 | 2018-06-13 23:42:19 +0200 | [diff] [blame] | 668 | return NULL; |
| 669 | } |
Harald Welte | 61707e8 | 2018-06-13 23:21:57 +0200 | [diff] [blame] | 670 | return new USRPDevice(tx_sps, rx_sps, iface, chans, lo_offset, tx_paths, rx_paths); |
kurtis.heimerl | 965e757 | 2011-11-26 03:16:54 +0000 | [diff] [blame] | 671 | } |