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dburgessb3a0ca42011-10-12 07:44:40 +00001/*
2* Copyright 2008, 2009 Free Software Foundation, Inc.
3*
4* This software is distributed under the terms of the GNU Affero Public License.
5* See the COPYING file in the main directory for details.
6*
7* This use of this software may be subject to additional restrictions.
8* See the LEGAL file in the main directory for details.
9
10 This program is free software: you can redistribute it and/or modify
11 it under the terms of the GNU Affero General Public License as published by
12 the Free Software Foundation, either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU Affero General Public License for more details.
19
20 You should have received a copy of the GNU Affero General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>.
22
23*/
24
25
26/*
27 Compilation Flags
28
29 SWLOOPBACK compile for software loopback testing
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +010030*/
dburgessb3a0ca42011-10-12 07:44:40 +000031
32
33#include <stdint.h>
34#include <string.h>
35#include <stdlib.h>
Alexander Huemer6fafd332018-01-12 15:04:02 +010036#include "Logger.h"
dburgessb3a0ca42011-10-12 07:44:40 +000037#include "Threads.h"
38#include "USRPDevice.h"
39
kurtis.heimerl3758b162011-11-26 03:19:22 +000040#ifdef HAVE_CONFIG_H
41#include "config.h"
42#endif
dburgessb3a0ca42011-10-12 07:44:40 +000043
44using namespace std;
45
kurtis.heimerl79e71c92011-11-26 03:16:48 +000046enum dboardConfigType {
47 TXA_RXB,
48 TXB_RXA,
49 TXA_RXA,
50 TXB_RXB
51};
dburgessb3a0ca42011-10-12 07:44:40 +000052
kurtis.heimerl3758b162011-11-26 03:19:22 +000053#ifdef SINGLEDB
54const dboardConfigType dboardConfig = TXA_RXA;
55#else
kurtis.heimerl79e71c92011-11-26 03:16:48 +000056const dboardConfigType dboardConfig = TXA_RXB;
kurtis.heimerl3758b162011-11-26 03:19:22 +000057#endif
58
kurtis.heimerl79e71c92011-11-26 03:16:48 +000059const double USRPDevice::masterClockRate = 52.0e6;
dburgessb3a0ca42011-10-12 07:44:40 +000060
Harald Welte61707e82018-06-13 23:21:57 +020061USRPDevice::USRPDevice(size_t tx_sps, size_t rx_sps, InterfaceType iface,
62 size_t chans, double lo_offset,
63 const std::vector<std::string>& tx_paths,
64 const std::vector<std::string>& rx_paths):
65 RadioDevice(tx_sps, rx_sps, iface, chans, lo_offset, tx_paths, rx_paths)
dburgessb3a0ca42011-10-12 07:44:40 +000066{
Harald Welte5cc88582018-08-17 19:55:38 +020067 LOGC(DDEV, INFO) << "creating USRP device...";
Thomas Tsouc1f7c422013-10-11 13:49:55 -040068
Harald Weltece70ba52018-06-13 22:47:48 +020069 decimRate = (unsigned int) round(masterClockRate/((GSMRATE) * (double) tx_sps));
dburgessb3a0ca42011-10-12 07:44:40 +000070 actualSampleRate = masterClockRate/decimRate;
71 rxGain = 0;
72
Thomas Tsouc1f7c422013-10-11 13:49:55 -040073 /*
74 * Undetermined delay b/w ping response timestamp and true
75 * receive timestamp. Values are empirically measured. With
76 * split sample rate Tx/Rx - 4/1 sps we need to need to
77 * compensate for advance rather than delay.
78 */
Harald Weltece70ba52018-06-13 22:47:48 +020079 if (tx_sps == 1)
Thomas Tsouc1f7c422013-10-11 13:49:55 -040080 pingOffset = 272;
Harald Weltece70ba52018-06-13 22:47:48 +020081 else if (tx_sps == 4)
Thomas Tsouc1f7c422013-10-11 13:49:55 -040082 pingOffset = 269 - 7500;
83 else
84 pingOffset = 0;
85
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +010086#ifdef SWLOOPBACK
dburgessb3a0ca42011-10-12 07:44:40 +000087 samplePeriod = 1.0e6/actualSampleRate;
88 loopbackBufferSize = 0;
89 gettimeofday(&lastReadTime,NULL);
90 firstRead = false;
91#endif
92}
93
Tom Tsou2f3e60b2016-07-17 19:29:08 -070094int USRPDevice::open(const std::string &, int, bool)
dburgessb3a0ca42011-10-12 07:44:40 +000095{
dburgessb3a0ca42011-10-12 07:44:40 +000096 writeLock.unlock();
97
Harald Welte5cc88582018-08-17 19:55:38 +020098 LOGC(DDEV, INFO) << "opening USRP device..";
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +010099#ifndef SWLOOPBACK
dburgessb3a0ca42011-10-12 07:44:40 +0000100 string rbf = "std_inband.rbf";
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100101 //string rbf = "inband_1rxhb_1tx.rbf";
dburgessb3a0ca42011-10-12 07:44:40 +0000102 m_uRx.reset();
103 if (!skipRx) {
104 try {
Thomas Tsouc1f7c422013-10-11 13:49:55 -0400105 m_uRx = usrp_standard_rx_sptr(usrp_standard_rx::make(
Harald Weltece70ba52018-06-13 22:47:48 +0200106 0, decimRate * tx_sps, 1, -1,
Thomas Tsouc1f7c422013-10-11 13:49:55 -0400107 usrp_standard_rx::FPGA_MODE_NORMAL,
108 1024, 16 * 8, rbf));
dburgessb3a0ca42011-10-12 07:44:40 +0000109 m_uRx->set_fpga_master_clock_freq(masterClockRate);
dburgessb3a0ca42011-10-12 07:44:40 +0000110 }
Thomas Tsouc0641242013-10-11 14:55:31 -0400111
dburgessb3a0ca42011-10-12 07:44:40 +0000112 catch(...) {
Harald Welte5cc88582018-08-17 19:55:38 +0200113 LOGC(DDEV, ALERT) << "make failed on Rx";
dburgessb3a0ca42011-10-12 07:44:40 +0000114 m_uRx.reset();
Thomas Tsoucb69f082013-04-08 14:18:26 -0400115 return -1;
dburgessb3a0ca42011-10-12 07:44:40 +0000116 }
117
118 if (m_uRx->fpga_master_clock_freq() != masterClockRate)
119 {
Harald Welte5cc88582018-08-17 19:55:38 +0200120 LOGC(DDEV, ALERT) << "WRONG FPGA clock freq = " << m_uRx->fpga_master_clock_freq()
dburgessb3a0ca42011-10-12 07:44:40 +0000121 << ", desired clock freq = " << masterClockRate;
122 m_uRx.reset();
Thomas Tsoucb69f082013-04-08 14:18:26 -0400123 return -1;
dburgessb3a0ca42011-10-12 07:44:40 +0000124 }
125 }
126
127 try {
Thomas Tsouc1f7c422013-10-11 13:49:55 -0400128 m_uTx = usrp_standard_tx_sptr(usrp_standard_tx::make(
129 0, decimRate * 2, 1, -1,
130 1024, 16 * 8, rbf));
dburgessb3a0ca42011-10-12 07:44:40 +0000131 m_uTx->set_fpga_master_clock_freq(masterClockRate);
dburgessb3a0ca42011-10-12 07:44:40 +0000132 }
Thomas Tsouc0641242013-10-11 14:55:31 -0400133
dburgessb3a0ca42011-10-12 07:44:40 +0000134 catch(...) {
Harald Welte5cc88582018-08-17 19:55:38 +0200135 LOGC(DDEV, ALERT) << "make failed on Tx";
dburgessb3a0ca42011-10-12 07:44:40 +0000136 m_uTx.reset();
Thomas Tsoucb69f082013-04-08 14:18:26 -0400137 return -1;
dburgessb3a0ca42011-10-12 07:44:40 +0000138 }
139
140 if (m_uTx->fpga_master_clock_freq() != masterClockRate)
141 {
Harald Welte5cc88582018-08-17 19:55:38 +0200142 LOGC(DDEV, ALERT) << "WRONG FPGA clock freq = " << m_uTx->fpga_master_clock_freq()
dburgessb3a0ca42011-10-12 07:44:40 +0000143 << ", desired clock freq = " << masterClockRate;
144 m_uTx.reset();
Thomas Tsoucb69f082013-04-08 14:18:26 -0400145 return -1;
dburgessb3a0ca42011-10-12 07:44:40 +0000146 }
147
148 if (!skipRx) m_uRx->stop();
149 m_uTx->stop();
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100150
dburgessb3a0ca42011-10-12 07:44:40 +0000151#endif
152
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000153 switch (dboardConfig) {
154 case TXA_RXB:
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000155 txSubdevSpec = usrp_subdev_spec(0,0);
156 rxSubdevSpec = usrp_subdev_spec(1,0);
157 break;
158 case TXB_RXA:
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000159 txSubdevSpec = usrp_subdev_spec(1,0);
160 rxSubdevSpec = usrp_subdev_spec(0,0);
161 break;
162 case TXA_RXA:
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000163 txSubdevSpec = usrp_subdev_spec(0,0);
164 rxSubdevSpec = usrp_subdev_spec(0,0);
165 break;
166 case TXB_RXB:
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000167 txSubdevSpec = usrp_subdev_spec(1,0);
168 rxSubdevSpec = usrp_subdev_spec(1,0);
169 break;
170 default:
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000171 txSubdevSpec = usrp_subdev_spec(0,0);
172 rxSubdevSpec = usrp_subdev_spec(1,0);
173 }
174
kurtis.heimerlb9e237e2011-11-26 03:17:59 +0000175 m_dbTx = m_uTx->selected_subdev(txSubdevSpec);
176 m_dbRx = m_uRx->selected_subdev(rxSubdevSpec);
177
dburgessb3a0ca42011-10-12 07:44:40 +0000178 samplesRead = 0;
179 samplesWritten = 0;
180 started = false;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100181
Thomas Tsoucb69f082013-04-08 14:18:26 -0400182 return NORMAL;
dburgessb3a0ca42011-10-12 07:44:40 +0000183}
184
185
186
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100187bool USRPDevice::start()
dburgessb3a0ca42011-10-12 07:44:40 +0000188{
Harald Welte5cc88582018-08-17 19:55:38 +0200189 LOGC(DDEV, INFO) << "starting USRP...";
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100190#ifndef SWLOOPBACK
dburgessb3a0ca42011-10-12 07:44:40 +0000191 if (!m_uRx && !skipRx) return false;
192 if (!m_uTx) return false;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100193
dburgessb3a0ca42011-10-12 07:44:40 +0000194 if (!skipRx) m_uRx->stop();
195 m_uTx->stop();
196
197 writeLock.lock();
198 // power up and configure daughterboards
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000199 m_dbTx->set_enable(true);
200 m_uTx->set_mux(m_uTx->determine_tx_mux_value(txSubdevSpec));
201 m_uRx->set_mux(m_uRx->determine_rx_mux_value(rxSubdevSpec));
202
203 if (!m_dbRx->select_rx_antenna(1))
204 m_dbRx->select_rx_antenna(0);
205
dburgessb3a0ca42011-10-12 07:44:40 +0000206 writeLock.unlock();
207
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000208 // Set gains to midpoint
209 setTxGain((minTxGain() + maxTxGain()) / 2);
210 setRxGain((minRxGain() + maxRxGain()) / 2);
dburgessb3a0ca42011-10-12 07:44:40 +0000211
212 data = new short[currDataSize];
213 dataStart = 0;
214 dataEnd = 0;
215 timeStart = 0;
216 timeEnd = 0;
217 timestampOffset = 0;
218 latestWriteTimestamp = 0;
219 lastPktTimestamp = 0;
220 hi32Timestamp = 0;
221 isAligned = false;
222
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100223
224 if (!skipRx)
dburgessb3a0ca42011-10-12 07:44:40 +0000225 started = (m_uRx->start() && m_uTx->start());
226 else
227 started = m_uTx->start();
228 return started;
229#else
230 gettimeofday(&lastReadTime,NULL);
231 return true;
232#endif
233}
234
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100235bool USRPDevice::stop()
dburgessb3a0ca42011-10-12 07:44:40 +0000236{
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100237#ifndef SWLOOPBACK
dburgessb3a0ca42011-10-12 07:44:40 +0000238 if (!m_uRx) return false;
239 if (!m_uTx) return false;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100240
dburgessb3a0ca42011-10-12 07:44:40 +0000241 delete[] currData;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100242
dburgessb3a0ca42011-10-12 07:44:40 +0000243 started = !(m_uRx->stop() && m_uTx->stop());
244 return !started;
245#else
246 return true;
247#endif
248}
249
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000250double USRPDevice::maxTxGain()
251{
252 return m_dbTx->gain_max();
253}
254
255double USRPDevice::minTxGain()
256{
257 return m_dbTx->gain_min();
258}
259
260double USRPDevice::maxRxGain()
261{
262 return m_dbRx->gain_max();
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100263}
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000264
265double USRPDevice::minRxGain()
266{
267 return m_dbRx->gain_min();
268}
269
Thomas Tsou204a9f12013-10-29 18:34:16 -0400270double USRPDevice::setTxGain(double dB, size_t chan)
271{
272 if (chan) {
Harald Welte5cc88582018-08-17 19:55:38 +0200273 LOGC(DDEV, ALERT) << "Invalid channel " << chan;
Thomas Tsou204a9f12013-10-29 18:34:16 -0400274 return 0.0;
275 }
dburgessb3a0ca42011-10-12 07:44:40 +0000276
Thomas Tsou204a9f12013-10-29 18:34:16 -0400277 writeLock.lock();
278 if (dB > maxTxGain())
279 dB = maxTxGain();
280 if (dB < minTxGain())
281 dB = minTxGain();
dburgessb3a0ca42011-10-12 07:44:40 +0000282
Harald Welte5cc88582018-08-17 19:55:38 +0200283 LOGC(DDEV, NOTICE) << "Setting TX gain to " << dB << " dB.";
dburgessb3a0ca42011-10-12 07:44:40 +0000284
Thomas Tsou204a9f12013-10-29 18:34:16 -0400285 if (!m_dbTx->set_gain(dB))
Harald Welte5cc88582018-08-17 19:55:38 +0200286 LOGC(DDEV, ERR) << "Error setting TX gain";
Thomas Tsou204a9f12013-10-29 18:34:16 -0400287
288 writeLock.unlock();
289
290 return dB;
dburgessb3a0ca42011-10-12 07:44:40 +0000291}
292
293
Thomas Tsou204a9f12013-10-29 18:34:16 -0400294double USRPDevice::setRxGain(double dB, size_t chan)
295{
296 if (chan) {
Harald Welte5cc88582018-08-17 19:55:38 +0200297 LOGC(DDEV, ALERT) << "Invalid channel " << chan;
Thomas Tsou204a9f12013-10-29 18:34:16 -0400298 return 0.0;
299 }
dburgessb3a0ca42011-10-12 07:44:40 +0000300
Thomas Tsou204a9f12013-10-29 18:34:16 -0400301 dB = 47.0;
dburgessb3a0ca42011-10-12 07:44:40 +0000302
Thomas Tsou204a9f12013-10-29 18:34:16 -0400303 writeLock.lock();
304 if (dB > maxRxGain())
305 dB = maxRxGain();
306 if (dB < minRxGain())
307 dB = minRxGain();
308
Harald Welte5cc88582018-08-17 19:55:38 +0200309 LOGC(DDEV, NOTICE) << "Setting RX gain to " << dB << " dB.";
Thomas Tsou204a9f12013-10-29 18:34:16 -0400310
311 if (!m_dbRx->set_gain(dB))
Harald Welte5cc88582018-08-17 19:55:38 +0200312 LOGC(DDEV, ERR) << "Error setting RX gain";
Thomas Tsou204a9f12013-10-29 18:34:16 -0400313
314 writeLock.unlock();
315
316 return dB;
dburgessb3a0ca42011-10-12 07:44:40 +0000317}
318
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100319bool USRPDevice::setRxAntenna(const std::string &ant, size_t chan)
320{
321 if (chan >= rx_paths.size()) {
Harald Welte5cc88582018-08-17 19:55:38 +0200322 LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan;
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100323 return false;
324 }
Harald Welte5cc88582018-08-17 19:55:38 +0200325 LOGC(DDEV, ALERT) << "Not implemented";
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100326 return true;
327}
328
329std::string USRPDevice::getRxAntenna(size_t chan)
330{
331 if (chan >= rx_paths.size()) {
Harald Welte5cc88582018-08-17 19:55:38 +0200332 LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan;
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100333 return "";
334 }
Harald Welte5cc88582018-08-17 19:55:38 +0200335 LOGC(DDEV, ALERT) << "Not implemented";
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100336 return "";
337}
338
339bool USRPDevice::setTxAntenna(const std::string &ant, size_t chan)
340{
341 if (chan >= tx_paths.size()) {
Harald Welte5cc88582018-08-17 19:55:38 +0200342 LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan;
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100343 return false;
344 }
Harald Welte5cc88582018-08-17 19:55:38 +0200345 LOGC(DDEV, ALERT) << "Not implemented";
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100346 return true;
347}
348
349std::string USRPDevice::getTxAntenna(size_t chan)
350{
351 if (chan >= tx_paths.size()) {
Harald Welte5cc88582018-08-17 19:55:38 +0200352 LOGC(DDEV, ALERT) << "Requested non-existent channel " << chan;
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100353 return "";
354 }
Harald Welte5cc88582018-08-17 19:55:38 +0200355 LOGC(DDEV, ALERT) << "Not implemented";
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100356 return "";
357}
358
Pau Espin Pedrol0fc20d12018-04-24 17:48:52 +0200359bool USRPDevice::requiresRadioAlign()
360{
361 return true;
362}
dburgessb3a0ca42011-10-12 07:44:40 +0000363
Pau Espin Pedrole564f0f2018-04-24 18:43:51 +0200364GSM::Time USRPDevice::minLatency() {
365 return GSM::Time(1,1);
366}
367
dburgessb3a0ca42011-10-12 07:44:40 +0000368// NOTE: Assumes sequential reads
Thomas Tsou204a9f12013-10-29 18:34:16 -0400369int USRPDevice::readSamples(std::vector<short *> &bufs, int len, bool *overrun,
370 TIMESTAMP timestamp, bool *underrun, unsigned *RSSI)
dburgessb3a0ca42011-10-12 07:44:40 +0000371{
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100372#ifndef SWLOOPBACK
Thomas Tsou204a9f12013-10-29 18:34:16 -0400373 if (!m_uRx)
374 return 0;
375
376 short *buf = bufs[0];
377
dburgessb3a0ca42011-10-12 07:44:40 +0000378 timestamp += timestampOffset;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100379
dburgessb3a0ca42011-10-12 07:44:40 +0000380 if (timestamp + len < timeStart) {
381 memset(buf,0,len*2*sizeof(short));
382 return len;
383 }
384
385 if (underrun) *underrun = false;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100386
dburgessb3a0ca42011-10-12 07:44:40 +0000387 uint32_t readBuf[2000];
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100388
dburgessb3a0ca42011-10-12 07:44:40 +0000389 while (1) {
390 //guestimate USB read size
391 int readLen=0;
392 {
393 int numSamplesNeeded = timestamp + len - timeEnd;
394 if (numSamplesNeeded <=0) break;
395 readLen = 512 * ((int) ceil((float) numSamplesNeeded/126.0));
396 if (readLen > 8000) readLen= (8000/512)*512;
397 }
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100398
dburgessb3a0ca42011-10-12 07:44:40 +0000399 // read USRP packets, parse and save A/D data as needed
400 readLen = m_uRx->read((void *)readBuf,readLen,overrun);
Pau Espin Pedrol4d179ab2018-09-10 10:36:04 +0200401 for (int pktNum = 0; pktNum < (readLen/512); pktNum++) {
dburgessb3a0ca42011-10-12 07:44:40 +0000402 // tmpBuf points to start of a USB packet
403 uint32_t* tmpBuf = (uint32_t *) (readBuf+pktNum*512/4);
404 TIMESTAMP pktTimestamp = usrp_to_host_u32(tmpBuf[1]);
405 uint32_t word0 = usrp_to_host_u32(tmpBuf[0]);
406 uint32_t chan = (word0 >> 16) & 0x1f;
407 unsigned payloadSz = word0 & 0x1ff;
Harald Welte5cc88582018-08-17 19:55:38 +0200408 LOGC(DDEV, DEBUG) << "first two bytes: " << hex << word0 << " " << dec << pktTimestamp;
dburgessb3a0ca42011-10-12 07:44:40 +0000409
410 bool incrementHi32 = ((lastPktTimestamp & 0x0ffffffffll) > pktTimestamp);
411 if (incrementHi32 && (timeStart!=0)) {
Harald Welte5cc88582018-08-17 19:55:38 +0200412 LOGC(DDEV, DEBUG) << "high 32 increment!!!";
dburgessb3a0ca42011-10-12 07:44:40 +0000413 hi32Timestamp++;
414 }
415 pktTimestamp = (((TIMESTAMP) hi32Timestamp) << 32) | pktTimestamp;
416 lastPktTimestamp = pktTimestamp;
417
418 if (chan == 0x01f) {
419 // control reply, check to see if its ping reply
420 uint32_t word2 = usrp_to_host_u32(tmpBuf[2]);
421 if ((word2 >> 16) == ((0x01 << 8) | 0x02)) {
422 timestamp -= timestampOffset;
Thomas Tsouc1f7c422013-10-11 13:49:55 -0400423 timestampOffset = pktTimestamp - pingTimestamp + pingOffset;
Harald Welte5cc88582018-08-17 19:55:38 +0200424 LOGC(DDEV, DEBUG) << "updating timestamp offset to: " << timestampOffset;
dburgessb3a0ca42011-10-12 07:44:40 +0000425 timestamp += timestampOffset;
426 isAligned = true;
427 }
428 continue;
429 }
430 if (chan != 0) {
Harald Welte5cc88582018-08-17 19:55:38 +0200431 LOGC(DDEV, DEBUG) << "chan: " << chan << ", timestamp: " << pktTimestamp << ", sz:" << payloadSz;
dburgessb3a0ca42011-10-12 07:44:40 +0000432 continue;
433 }
434 if ((word0 >> 28) & 0x04) {
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100435 if (underrun) *underrun = true;
Harald Welte5cc88582018-08-17 19:55:38 +0200436 LOGC(DDEV, DEBUG) << "UNDERRUN in TRX->USRP interface";
dburgessb3a0ca42011-10-12 07:44:40 +0000437 }
438 if (RSSI) *RSSI = (word0 >> 21) & 0x3f;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100439
dburgessb3a0ca42011-10-12 07:44:40 +0000440 if (!isAligned) continue;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100441
dburgessb3a0ca42011-10-12 07:44:40 +0000442 unsigned cursorStart = pktTimestamp - timeStart + dataStart;
443 while (cursorStart*2 > currDataSize) {
444 cursorStart -= currDataSize/2;
445 }
446 if (cursorStart*2 + payloadSz/2 > currDataSize) {
447 // need to circle around buffer
448 memcpy(data+cursorStart*2,tmpBuf+2,(currDataSize-cursorStart*2)*sizeof(short));
449 memcpy(data,tmpBuf+2+(currDataSize/2-cursorStart),payloadSz-(currDataSize-cursorStart*2)*sizeof(short));
450 }
451 else {
452 memcpy(data+cursorStart*2,tmpBuf+2,payloadSz);
453 }
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100454 if (pktTimestamp + payloadSz/2/sizeof(short) > timeEnd)
dburgessb3a0ca42011-10-12 07:44:40 +0000455 timeEnd = pktTimestamp+payloadSz/2/sizeof(short);
456
Harald Welte5cc88582018-08-17 19:55:38 +0200457 LOGC(DDEV, DEBUG) << "timeStart: " << timeStart << ", timeEnd: " << timeEnd << ", pktTimestamp: " << pktTimestamp;
dburgessb3a0ca42011-10-12 07:44:40 +0000458
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100459 }
460 }
461
dburgessb3a0ca42011-10-12 07:44:40 +0000462 // copy desired data to buf
463 unsigned bufStart = dataStart+(timestamp-timeStart);
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100464 if (bufStart + len < currDataSize/2) {
Harald Welte5cc88582018-08-17 19:55:38 +0200465 LOGC(DDEV, DEBUG) << "bufStart: " << bufStart;
dburgessb3a0ca42011-10-12 07:44:40 +0000466 memcpy(buf,data+bufStart*2,len*2*sizeof(short));
467 memset(data+bufStart*2,0,len*2*sizeof(short));
468 }
469 else {
Harald Welte5cc88582018-08-17 19:55:38 +0200470 LOGC(DDEV, DEBUG) << "len: " << len << ", currDataSize/2: " << currDataSize/2 << ", bufStart: " << bufStart;
dburgessb3a0ca42011-10-12 07:44:40 +0000471 unsigned firstLength = (currDataSize/2-bufStart);
Harald Welte5cc88582018-08-17 19:55:38 +0200472 LOGC(DDEV, DEBUG) << "firstLength: " << firstLength;
dburgessb3a0ca42011-10-12 07:44:40 +0000473 memcpy(buf,data+bufStart*2,firstLength*2*sizeof(short));
474 memset(data+bufStart*2,0,firstLength*2*sizeof(short));
475 memcpy(buf+firstLength*2,data,(len-firstLength)*2*sizeof(short));
476 memset(data,0,(len-firstLength)*2*sizeof(short));
477 }
478 dataStart = (bufStart + len) % (currDataSize/2);
479 timeStart = timestamp + len;
480
dburgessb3a0ca42011-10-12 07:44:40 +0000481 return len;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100482
dburgessb3a0ca42011-10-12 07:44:40 +0000483#else
484 if (loopbackBufferSize < 2) return 0;
485 int numSamples = 0;
486 struct timeval currTime;
487 gettimeofday(&currTime,NULL);
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100488 double timeElapsed = (currTime.tv_sec - lastReadTime.tv_sec)*1.0e6 +
dburgessb3a0ca42011-10-12 07:44:40 +0000489 (currTime.tv_usec - lastReadTime.tv_usec);
490 if (timeElapsed < samplePeriod) {return 0;}
491 int numSamplesToRead = (int) floor(timeElapsed/samplePeriod);
492 if (numSamplesToRead < len) return 0;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100493
dburgessb3a0ca42011-10-12 07:44:40 +0000494 if (numSamplesToRead > len) numSamplesToRead = len;
495 if (numSamplesToRead > loopbackBufferSize/2) {
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100496 firstRead =false;
dburgessb3a0ca42011-10-12 07:44:40 +0000497 numSamplesToRead = loopbackBufferSize/2;
498 }
499 memcpy(buf,loopbackBuffer,sizeof(short)*2*numSamplesToRead);
500 loopbackBufferSize -= 2*numSamplesToRead;
501 memcpy(loopbackBuffer,loopbackBuffer+2*numSamplesToRead,
502 sizeof(short)*loopbackBufferSize);
503 numSamples = numSamplesToRead;
504 if (firstRead) {
505 int new_usec = lastReadTime.tv_usec + (int) round((double) numSamplesToRead * samplePeriod);
506 lastReadTime.tv_sec = lastReadTime.tv_sec + new_usec/1000000;
507 lastReadTime.tv_usec = new_usec % 1000000;
508 }
509 else {
510 gettimeofday(&lastReadTime,NULL);
511 firstRead = true;
512 }
513 samplesRead += numSamples;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100514
dburgessb3a0ca42011-10-12 07:44:40 +0000515 return numSamples;
516#endif
517}
518
Thomas Tsou204a9f12013-10-29 18:34:16 -0400519int USRPDevice::writeSamples(std::vector<short *> &bufs, int len,
520 bool *underrun, unsigned long long timestamp,
521 bool isControl)
dburgessb3a0ca42011-10-12 07:44:40 +0000522{
523 writeLock.lock();
524
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100525#ifndef SWLOOPBACK
Thomas Tsou204a9f12013-10-29 18:34:16 -0400526 if (!m_uTx)
527 return 0;
528
529 short *buf = bufs[0];
530
kurtis.heimerlc8739b82011-11-02 00:06:34 +0000531 static uint32_t outData[128*20];
Thomas Tsou204a9f12013-10-29 18:34:16 -0400532
dburgessb3a0ca42011-10-12 07:44:40 +0000533 for (int i = 0; i < len*2; i++) {
534 buf[i] = host_to_usrp_short(buf[i]);
535 }
536
537 int numWritten = 0;
538 unsigned isStart = 1;
539 unsigned RSSI = 0;
540 unsigned CHAN = (isControl) ? 0x01f : 0x00;
541 len = len*2*sizeof(short);
542 int numPkts = (int) ceil((float)len/(float)504);
543 unsigned isEnd = (numPkts < 2);
544 uint32_t *outPkt = outData;
545 int pktNum = 0;
546 while (numWritten < len) {
547 // pkt is pointer to start of a USB packet
548 uint32_t *pkt = outPkt + pktNum*128;
549 isEnd = (len - numWritten <= 504);
550 unsigned payloadLen = ((len - numWritten) < 504) ? (len-numWritten) : 504;
551 pkt[0] = (isStart << 12 | isEnd << 11 | (RSSI & 0x3f) << 5 | CHAN) << 16 | payloadLen;
552 pkt[1] = timestamp & 0x0ffffffffll;
553 memcpy(pkt+2,buf+(numWritten/sizeof(short)),payloadLen);
554 numWritten += payloadLen;
555 timestamp += payloadLen/2/sizeof(short);
556 isStart = 0;
557 pkt[0] = host_to_usrp_u32(pkt[0]);
558 pkt[1] = host_to_usrp_u32(pkt[1]);
559 pktNum++;
560 }
561 m_uTx->write((const void*) outPkt,sizeof(uint32_t)*128*numPkts,NULL);
562
563 samplesWritten += len/2/sizeof(short);
564 writeLock.unlock();
565
566 return len/2/sizeof(short);
567#else
568 int retVal = len;
569 memcpy(loopbackBuffer+loopbackBufferSize,buf,sizeof(short)*2*len);
570 samplesWritten += retVal;
571 loopbackBufferSize += retVal*2;
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100572
dburgessb3a0ca42011-10-12 07:44:40 +0000573 return retVal;
574#endif
575}
576
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100577bool USRPDevice::updateAlignment(TIMESTAMP timestamp)
dburgessb3a0ca42011-10-12 07:44:40 +0000578{
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100579#ifndef SWLOOPBACK
dburgessb3a0ca42011-10-12 07:44:40 +0000580 short data[] = {0x00,0x02,0x00,0x00};
581 uint32_t *wordPtr = (uint32_t *) data;
kurtis.heimerlc8739b82011-11-02 00:06:34 +0000582 *wordPtr = host_to_usrp_u32(*wordPtr);
dburgessb3a0ca42011-10-12 07:44:40 +0000583 bool tmpUnderrun;
Thomas Tsou204a9f12013-10-29 18:34:16 -0400584
585 std::vector<short *> buf(1, data);
586 if (writeSamples(buf, 1, &tmpUnderrun, timestamp & 0x0ffffffffll, true)) {
dburgessb3a0ca42011-10-12 07:44:40 +0000587 pingTimestamp = timestamp;
588 return true;
589 }
590 return false;
591#else
592 return true;
593#endif
594}
595
Pau Espin Pedrolf58cd8a2018-02-05 13:04:41 +0100596#ifndef SWLOOPBACK
Thomas Tsou204a9f12013-10-29 18:34:16 -0400597bool USRPDevice::setTxFreq(double wFreq, size_t chan)
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000598{
599 usrp_tune_result result;
dburgessb3a0ca42011-10-12 07:44:40 +0000600
Thomas Tsou204a9f12013-10-29 18:34:16 -0400601 if (chan) {
Harald Welte5cc88582018-08-17 19:55:38 +0200602 LOGC(DDEV, ALERT) << "Invalid channel " << chan;
Thomas Tsou204a9f12013-10-29 18:34:16 -0400603 return false;
604 }
605
kurtis.heimerlb9e237e2011-11-26 03:17:59 +0000606 if (m_uTx->tune(txSubdevSpec.side, m_dbTx, wFreq, &result)) {
Harald Welte5cc88582018-08-17 19:55:38 +0200607 LOGC(DDEV, INFO) << "set TX: " << wFreq << std::endl
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000608 << " baseband freq: " << result.baseband_freq << std::endl
609 << " DDC freq: " << result.dxc_freq << std::endl
610 << " residual freq: " << result.residual_freq;
611 return true;
612 }
613 else {
Harald Welte5cc88582018-08-17 19:55:38 +0200614 LOGC(DDEV, ALERT) << "set TX: " << wFreq << "failed" << std::endl
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000615 << " baseband freq: " << result.baseband_freq << std::endl
616 << " DDC freq: " << result.dxc_freq << std::endl
617 << " residual freq: " << result.residual_freq;
618 return false;
619 }
620}
621
Thomas Tsou204a9f12013-10-29 18:34:16 -0400622bool USRPDevice::setRxFreq(double wFreq, size_t chan)
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000623{
624 usrp_tune_result result;
625
Thomas Tsou204a9f12013-10-29 18:34:16 -0400626 if (chan) {
Harald Welte5cc88582018-08-17 19:55:38 +0200627 LOGC(DDEV, ALERT) << "Invalid channel " << chan;
Thomas Tsou204a9f12013-10-29 18:34:16 -0400628 return false;
629 }
630
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000631 if (m_uRx->tune(0, m_dbRx, wFreq, &result)) {
Harald Welte5cc88582018-08-17 19:55:38 +0200632 LOGC(DDEV, INFO) << "set RX: " << wFreq << std::endl
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000633 << " baseband freq: " << result.baseband_freq << std::endl
634 << " DDC freq: " << result.dxc_freq << std::endl
635 << " residual freq: " << result.residual_freq;
636 return true;
637 }
638 else {
Harald Welte5cc88582018-08-17 19:55:38 +0200639 LOGC(DDEV, ALERT) << "set RX: " << wFreq << "failed" << std::endl
kurtis.heimerl79e71c92011-11-26 03:16:48 +0000640 << " baseband freq: " << result.baseband_freq << std::endl
641 << " DDC freq: " << result.dxc_freq << std::endl
642 << " residual freq: " << result.residual_freq;
643 return false;
644 }
645
646}
dburgessb3a0ca42011-10-12 07:44:40 +0000647
648#else
649bool USRPDevice::setTxFreq(double wFreq) { return true;};
650bool USRPDevice::setRxFreq(double wFreq) { return true;};
651#endif
kurtis.heimerl965e7572011-11-26 03:16:54 +0000652
Tom Tsou5cd70dc2016-03-06 01:28:40 -0800653RadioDevice *RadioDevice::make(size_t tx_sps, size_t rx_sps,
Harald Welte61707e82018-06-13 23:21:57 +0200654 InterfaceType iface, size_t chans, double lo_offset,
Pau Espin Pedrol77ce99a2018-02-05 13:05:06 +0100655 const std::vector<std::string>& tx_paths,
656 const std::vector<std::string>& rx_paths)
kurtis.heimerl965e7572011-11-26 03:16:54 +0000657{
Harald Welteb2294392018-06-13 23:42:19 +0200658 if (tx_sps != rx_sps) {
Harald Welte5cc88582018-08-17 19:55:38 +0200659 LOGC(DDEV, ERROR) << "USRP1 requires tx_sps == rx_sps";
Harald Welteb2294392018-06-13 23:42:19 +0200660 return NULL;
661 }
662 if (chans != 1) {
Harald Welte5cc88582018-08-17 19:55:38 +0200663 LOGC(DDEV, ERROR) << "USRP1 supports only 1 channel";
Harald Welteb2294392018-06-13 23:42:19 +0200664 return NULL;
665 }
666 if (lo_offset != 0.0) {
Harald Welte5cc88582018-08-17 19:55:38 +0200667 LOGC(DDEV, ERROR) << "USRP1 doesn't support lo_offset";
Harald Welteb2294392018-06-13 23:42:19 +0200668 return NULL;
669 }
Harald Welte61707e82018-06-13 23:21:57 +0200670 return new USRPDevice(tx_sps, rx_sps, iface, chans, lo_offset, tx_paths, rx_paths);
kurtis.heimerl965e7572011-11-26 03:16:54 +0000671}