blob: 8a509255c906c971ee9a352e65ea4e2cb6e4e427 [file] [log] [blame]
Kévin Redon69b92d92019-01-24 16:39:20 +01001/*
2 * Code generated from Atmel Start.
3 *
4 * This file will be overwritten when reconfiguring your Atmel Start project.
5 * Please copy examples or other code you want to keep to a separate file
6 * to avoid losing it when reconfiguring.
7 */
8
9#include "driver_init.h"
10#include <peripheral_clk_config.h>
11#include <utils.h>
12#include <hal_init.h>
13
Kévin Redonccbed0b2019-01-24 18:30:26 +010014/*! The buffer size for USART */
Kévin Redon1f8ecef2019-01-31 13:36:12 +010015#define SIM0_BUFFER_SIZE 16
16
17/*! The buffer size for USART */
18#define SIM1_BUFFER_SIZE 16
19
20/*! The buffer size for USART */
21#define SIM2_BUFFER_SIZE 16
22
23/*! The buffer size for USART */
24#define SIM3_BUFFER_SIZE 16
25
26/*! The buffer size for USART */
27#define SIM4_BUFFER_SIZE 16
28
29/*! The buffer size for USART */
30#define SIM5_BUFFER_SIZE 16
31
32/*! The buffer size for USART */
33#define SIM6_BUFFER_SIZE 16
34
Kévin Redonba3a2fa2019-03-07 15:52:27 +010035/*! The buffer size for USART */
36#define UART_DEBUG_BUFFER_SIZE 32
37
Kévin Redon1f8ecef2019-01-31 13:36:12 +010038struct usart_async_descriptor SIM0;
39struct usart_async_descriptor SIM1;
40struct usart_async_descriptor SIM2;
41struct usart_async_descriptor SIM3;
42struct usart_async_descriptor SIM4;
43struct usart_async_descriptor SIM5;
44struct usart_async_descriptor SIM6;
Kévin Redonccbed0b2019-01-24 18:30:26 +010045
Kévin Redon1f8ecef2019-01-31 13:36:12 +010046static uint8_t SIM0_buffer[SIM0_BUFFER_SIZE];
47static uint8_t SIM1_buffer[SIM1_BUFFER_SIZE];
48static uint8_t SIM2_buffer[SIM2_BUFFER_SIZE];
49static uint8_t SIM3_buffer[SIM3_BUFFER_SIZE];
50static uint8_t SIM4_buffer[SIM4_BUFFER_SIZE];
51static uint8_t SIM5_buffer[SIM5_BUFFER_SIZE];
52static uint8_t SIM6_buffer[SIM6_BUFFER_SIZE];
Harald Welte361ed202019-02-24 21:15:39 +010053
Kévin Redonba3a2fa2019-03-07 15:52:27 +010054struct usart_async_descriptor UART_debug;
55
56static uint8_t UART_DEBUG_buffer[UART_DEBUG_BUFFER_SIZE];
Kévin Redonccbed0b2019-01-24 18:30:26 +010057
58/**
59 * \brief USART Clock initialization function
60 *
61 * Enables register interface and peripheral clock
62 */
Kévin Redon1f8ecef2019-01-31 13:36:12 +010063void SIM0_CLOCK_init()
64{
65
66 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
67 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
68
69 hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK);
70}
71
72/**
73 * \brief USART pinmux initialization function
74 *
75 * Set each required pin to USART functionality
76 */
77void SIM0_PORT_init()
78{
79
80 gpio_set_pin_function(SIM0_IO, PINMUX_PA04D_SERCOM0_PAD0);
81}
82
83/**
84 * \brief USART initialization function
85 *
86 * Enables USART peripheral, clocks and initializes USART driver
87 */
88void SIM0_init(void)
89{
90 SIM0_CLOCK_init();
91 usart_async_init(&SIM0, SERCOM0, SIM0_buffer, SIM0_BUFFER_SIZE, (void *)NULL);
92 SIM0_PORT_init();
93}
94
95/**
96 * \brief USART Clock initialization function
97 *
98 * Enables register interface and peripheral clock
99 */
100void SIM1_CLOCK_init()
101{
102
103 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
104 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
105
106 hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK);
107}
108
109/**
110 * \brief USART pinmux initialization function
111 *
112 * Set each required pin to USART functionality
113 */
114void SIM1_PORT_init()
115{
116
117 gpio_set_pin_function(SIM1_IO, PINMUX_PA16C_SERCOM1_PAD0);
118}
119
120/**
121 * \brief USART initialization function
122 *
123 * Enables USART peripheral, clocks and initializes USART driver
124 */
125void SIM1_init(void)
126{
127 SIM1_CLOCK_init();
128 usart_async_init(&SIM1, SERCOM1, SIM1_buffer, SIM1_BUFFER_SIZE, (void *)NULL);
129 SIM1_PORT_init();
130}
131
132/**
133 * \brief USART Clock initialization function
134 *
135 * Enables register interface and peripheral clock
136 */
137void SIM2_CLOCK_init()
138{
139
140 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_CORE, CONF_GCLK_SERCOM2_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
141 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_SLOW, CONF_GCLK_SERCOM2_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
142
143 hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK);
144}
145
146/**
147 * \brief USART pinmux initialization function
148 *
149 * Set each required pin to USART functionality
150 */
151void SIM2_PORT_init()
152{
153
154 gpio_set_pin_function(SIM2_IO, PINMUX_PA09D_SERCOM2_PAD0);
155}
156
157/**
158 * \brief USART initialization function
159 *
160 * Enables USART peripheral, clocks and initializes USART driver
161 */
162void SIM2_init(void)
163{
164 SIM2_CLOCK_init();
165 usart_async_init(&SIM2, SERCOM2, SIM2_buffer, SIM2_BUFFER_SIZE, (void *)NULL);
166 SIM2_PORT_init();
167}
168
169/**
170 * \brief USART Clock initialization function
171 *
172 * Enables register interface and peripheral clock
173 */
174void SIM3_CLOCK_init()
175{
176
177 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
178 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
179
180 hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
181}
182
183/**
184 * \brief USART pinmux initialization function
185 *
186 * Set each required pin to USART functionality
187 */
188void SIM3_PORT_init()
189{
190
191 gpio_set_pin_function(SIM3_IO, PINMUX_PB20C_SERCOM3_PAD0);
192}
193
194/**
195 * \brief USART initialization function
196 *
197 * Enables USART peripheral, clocks and initializes USART driver
198 */
199void SIM3_init(void)
200{
201 SIM3_CLOCK_init();
202 usart_async_init(&SIM3, SERCOM3, SIM3_buffer, SIM3_BUFFER_SIZE, (void *)NULL);
203 SIM3_PORT_init();
204}
205
206/**
207 * \brief USART Clock initialization function
208 *
209 * Enables register interface and peripheral clock
210 */
211void SIM4_CLOCK_init()
212{
213
214 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
215 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_SLOW, CONF_GCLK_SERCOM4_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
216
217 hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK);
218}
219
220/**
221 * \brief USART pinmux initialization function
222 *
223 * Set each required pin to USART functionality
224 */
225void SIM4_PORT_init()
226{
227
228 gpio_set_pin_function(SIM4_IO, PINMUX_PB08D_SERCOM4_PAD0);
229}
230
231/**
232 * \brief USART initialization function
233 *
234 * Enables USART peripheral, clocks and initializes USART driver
235 */
236void SIM4_init(void)
237{
238 SIM4_CLOCK_init();
239 usart_async_init(&SIM4, SERCOM4, SIM4_buffer, SIM4_BUFFER_SIZE, (void *)NULL);
240 SIM4_PORT_init();
241}
242
243/**
244 * \brief USART Clock initialization function
245 *
246 * Enables register interface and peripheral clock
247 */
248void SIM5_CLOCK_init()
249{
250
251 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_CORE, CONF_GCLK_SERCOM5_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
252 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM5_GCLK_ID_SLOW, CONF_GCLK_SERCOM5_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
253
254 hri_mclk_set_APBDMASK_SERCOM5_bit(MCLK);
255}
256
257/**
258 * \brief USART pinmux initialization function
259 *
260 * Set each required pin to USART functionality
261 */
262void SIM5_PORT_init()
263{
264
265 gpio_set_pin_function(SIM5_IO, PINMUX_PB16C_SERCOM5_PAD0);
266}
267
268/**
269 * \brief USART initialization function
270 *
271 * Enables USART peripheral, clocks and initializes USART driver
272 */
273void SIM5_init(void)
274{
275 SIM5_CLOCK_init();
276 usart_async_init(&SIM5, SERCOM5, SIM5_buffer, SIM5_BUFFER_SIZE, (void *)NULL);
277 SIM5_PORT_init();
278}
279
280/**
281 * \brief USART Clock initialization function
282 *
283 * Enables register interface and peripheral clock
284 */
285void SIM6_CLOCK_init()
286{
287
288 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_CORE, CONF_GCLK_SERCOM6_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
289 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM6_GCLK_ID_SLOW, CONF_GCLK_SERCOM6_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
290
291 hri_mclk_set_APBDMASK_SERCOM6_bit(MCLK);
292}
293
294/**
295 * \brief USART pinmux initialization function
296 *
297 * Set each required pin to USART functionality
298 */
299void SIM6_PORT_init()
300{
301
302 gpio_set_pin_function(SIM6_IO, PINMUX_PC16C_SERCOM6_PAD0);
303}
304
305/**
306 * \brief USART initialization function
307 *
308 * Enables USART peripheral, clocks and initializes USART driver
309 */
310void SIM6_init(void)
311{
312 SIM6_CLOCK_init();
313 usart_async_init(&SIM6, SERCOM6, SIM6_buffer, SIM6_BUFFER_SIZE, (void *)NULL);
314 SIM6_PORT_init();
315}
316
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100317/**
318 * \brief USART Clock initialization function
319 *
320 * Enables register interface and peripheral clock
321 */
322void UART_debug_CLOCK_init()
323{
324
325 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
326 hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
327
328 hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
329}
330
331/**
332 * \brief USART pinmux initialization function
333 *
334 * Set each required pin to USART functionality
335 */
336void UART_debug_PORT_init()
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100337{
338
Kévin Redon4e39b012019-01-30 15:55:58 +0100339 gpio_set_pin_function(UART_TX, PINMUX_PB30C_SERCOM7_PAD0);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100340
Kévin Redon4e39b012019-01-30 15:55:58 +0100341 gpio_set_pin_function(UART_RX, PINMUX_PB31C_SERCOM7_PAD1);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100342}
343
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100344/**
345 * \brief USART initialization function
346 *
347 * Enables USART peripheral, clocks and initializes USART driver
348 */
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100349void UART_debug_init(void)
350{
351 UART_debug_CLOCK_init();
Kévin Redonba3a2fa2019-03-07 15:52:27 +0100352 usart_async_init(&UART_debug, SERCOM7, UART_DEBUG_buffer, UART_DEBUG_BUFFER_SIZE, (void *)NULL);
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100353 UART_debug_PORT_init();
354}
355
Kévin Redon69b92d92019-01-24 16:39:20 +0100356void USB_DEVICE_INSTANCE_PORT_init(void)
357{
358
Kévin Redon4e39b012019-01-30 15:55:58 +0100359 gpio_set_pin_direction(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100360 // <y> Pin direction
361 // <id> pad_direction
362 // <GPIO_DIRECTION_OFF"> Off
363 // <GPIO_DIRECTION_IN"> In
364 // <GPIO_DIRECTION_OUT"> Out
365 GPIO_DIRECTION_OUT);
366
Kévin Redon4e39b012019-01-30 15:55:58 +0100367 gpio_set_pin_level(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100368 // <y> Initial level
369 // <id> pad_initial_level
370 // <false"> Low
371 // <true"> High
372 false);
373
Kévin Redon4e39b012019-01-30 15:55:58 +0100374 gpio_set_pin_pull_mode(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100375 // <y> Pull configuration
376 // <id> pad_pull_config
377 // <GPIO_PULL_OFF"> Off
378 // <GPIO_PULL_UP"> Pull-up
379 // <GPIO_PULL_DOWN"> Pull-down
380 GPIO_PULL_OFF);
381
Kévin Redon4e39b012019-01-30 15:55:58 +0100382 gpio_set_pin_function(USBUP_D_N,
Kévin Redon69b92d92019-01-24 16:39:20 +0100383 // <y> Pin function
384 // <id> pad_function
385 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
386 // <PINMUX_PA24H_USB_DM"> Auto
387 // <GPIO_PIN_FUNCTION_OFF"> Off
388 // <GPIO_PIN_FUNCTION_A"> A
389 // <GPIO_PIN_FUNCTION_B"> B
390 // <GPIO_PIN_FUNCTION_C"> C
391 // <GPIO_PIN_FUNCTION_D"> D
392 // <GPIO_PIN_FUNCTION_E"> E
393 // <GPIO_PIN_FUNCTION_F"> F
394 // <GPIO_PIN_FUNCTION_G"> G
395 // <GPIO_PIN_FUNCTION_H"> H
396 // <GPIO_PIN_FUNCTION_I"> I
397 // <GPIO_PIN_FUNCTION_J"> J
398 // <GPIO_PIN_FUNCTION_K"> K
399 // <GPIO_PIN_FUNCTION_L"> L
400 // <GPIO_PIN_FUNCTION_M"> M
401 // <GPIO_PIN_FUNCTION_N"> N
402 PINMUX_PA24H_USB_DM);
403
Kévin Redon4e39b012019-01-30 15:55:58 +0100404 gpio_set_pin_direction(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100405 // <y> Pin direction
406 // <id> pad_direction
407 // <GPIO_DIRECTION_OFF"> Off
408 // <GPIO_DIRECTION_IN"> In
409 // <GPIO_DIRECTION_OUT"> Out
410 GPIO_DIRECTION_OUT);
411
Kévin Redon4e39b012019-01-30 15:55:58 +0100412 gpio_set_pin_level(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100413 // <y> Initial level
414 // <id> pad_initial_level
415 // <false"> Low
416 // <true"> High
417 false);
418
Kévin Redon4e39b012019-01-30 15:55:58 +0100419 gpio_set_pin_pull_mode(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100420 // <y> Pull configuration
421 // <id> pad_pull_config
422 // <GPIO_PULL_OFF"> Off
423 // <GPIO_PULL_UP"> Pull-up
424 // <GPIO_PULL_DOWN"> Pull-down
425 GPIO_PULL_OFF);
426
Kévin Redon4e39b012019-01-30 15:55:58 +0100427 gpio_set_pin_function(USBUP_D_P,
Kévin Redon69b92d92019-01-24 16:39:20 +0100428 // <y> Pin function
429 // <id> pad_function
430 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
431 // <PINMUX_PA25H_USB_DP"> Auto
432 // <GPIO_PIN_FUNCTION_OFF"> Off
433 // <GPIO_PIN_FUNCTION_A"> A
434 // <GPIO_PIN_FUNCTION_B"> B
435 // <GPIO_PIN_FUNCTION_C"> C
436 // <GPIO_PIN_FUNCTION_D"> D
437 // <GPIO_PIN_FUNCTION_E"> E
438 // <GPIO_PIN_FUNCTION_F"> F
439 // <GPIO_PIN_FUNCTION_G"> G
440 // <GPIO_PIN_FUNCTION_H"> H
441 // <GPIO_PIN_FUNCTION_I"> I
442 // <GPIO_PIN_FUNCTION_J"> J
443 // <GPIO_PIN_FUNCTION_K"> K
444 // <GPIO_PIN_FUNCTION_L"> L
445 // <GPIO_PIN_FUNCTION_M"> M
446 // <GPIO_PIN_FUNCTION_N"> N
447 PINMUX_PA25H_USB_DP);
448}
449
450/* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
451 * for low speed and full speed operation. */
452#if (CONF_GCLK_USB_FREQUENCY > (48000000 + 48000000 / 400)) || (CONF_GCLK_USB_FREQUENCY < (48000000 - 48000000 / 400))
453#warning USB clock should be 48MHz ~ 0.25% clock, check your configuration!
454#endif
455
456void USB_DEVICE_INSTANCE_CLOCK_init(void)
457{
458
459 hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN);
460 hri_mclk_set_AHBMASK_USB_bit(MCLK);
461 hri_mclk_set_APBBMASK_USB_bit(MCLK);
462}
463
464void USB_DEVICE_INSTANCE_init(void)
465{
466 USB_DEVICE_INSTANCE_CLOCK_init();
467 usb_d_init();
468 USB_DEVICE_INSTANCE_PORT_init();
469}
470
471void system_init(void)
472{
473 init_mcu();
474
Harald Welte092494e2019-02-24 10:33:40 +0100475 // GPIO on PA02
476
477 // Set pin direction to input
478 gpio_set_pin_direction(SIM4_INT, GPIO_DIRECTION_IN);
479
480 gpio_set_pin_pull_mode(SIM4_INT,
481 // <y> Pull configuration
482 // <id> pad_pull_config
483 // <GPIO_PULL_OFF"> Off
484 // <GPIO_PULL_UP"> Pull-up
485 // <GPIO_PULL_DOWN"> Pull-down
486 GPIO_PULL_OFF);
487
488 gpio_set_pin_function(SIM4_INT, GPIO_PIN_FUNCTION_OFF);
489
490 // GPIO on PA03
491
492 // Set pin direction to input
493 gpio_set_pin_direction(SIM5_INT, GPIO_DIRECTION_IN);
494
495 gpio_set_pin_pull_mode(SIM5_INT,
496 // <y> Pull configuration
497 // <id> pad_pull_config
498 // <GPIO_PULL_OFF"> Off
499 // <GPIO_PULL_UP"> Pull-up
500 // <GPIO_PULL_DOWN"> Pull-down
501 GPIO_PULL_OFF);
502
503 gpio_set_pin_function(SIM5_INT, GPIO_PIN_FUNCTION_OFF);
504
Kévin Redon6a8295c2019-01-30 18:58:44 +0100505 // GPIO on PA11
506
507 gpio_set_pin_direction(SIMCLK_20MHZ,
508 // <y> Pin direction
509 // <id> pad_direction
510 // <GPIO_DIRECTION_OFF"> Off
511 // <GPIO_DIRECTION_IN"> In
512 // <GPIO_DIRECTION_OUT"> Out
513 GPIO_DIRECTION_OUT);
514
515 gpio_set_pin_level(SIMCLK_20MHZ,
516 // <y> Initial level
517 // <id> pad_initial_level
518 // <false"> Low
519 // <true"> High
520 false);
521
522 gpio_set_pin_pull_mode(SIMCLK_20MHZ,
523 // <y> Pull configuration
524 // <id> pad_pull_config
525 // <GPIO_PULL_OFF"> Off
526 // <GPIO_PULL_UP"> Pull-up
527 // <GPIO_PULL_DOWN"> Pull-down
528 GPIO_PULL_OFF);
529
530 gpio_set_pin_function(SIMCLK_20MHZ,
531 // <y> Pin function
532 // <id> pad_function
533 // <i> Auto : use driver pinmux if signal is imported by driver, else turn off function
534 // <GPIO_PIN_FUNCTION_OFF"> Auto
535 // <GPIO_PIN_FUNCTION_OFF"> Off
536 // <GPIO_PIN_FUNCTION_A"> A
537 // <GPIO_PIN_FUNCTION_B"> B
538 // <GPIO_PIN_FUNCTION_C"> C
539 // <GPIO_PIN_FUNCTION_D"> D
540 // <GPIO_PIN_FUNCTION_E"> E
541 // <GPIO_PIN_FUNCTION_F"> F
542 // <GPIO_PIN_FUNCTION_G"> G
543 // <GPIO_PIN_FUNCTION_H"> H
544 // <GPIO_PIN_FUNCTION_I"> I
545 // <GPIO_PIN_FUNCTION_J"> J
546 // <GPIO_PIN_FUNCTION_K"> K
547 // <GPIO_PIN_FUNCTION_L"> L
548 // <GPIO_PIN_FUNCTION_M"> M
549 // <GPIO_PIN_FUNCTION_N"> N
550 GPIO_PIN_FUNCTION_M);
551
552 // GPIO on PA20
553
554 // Set pin direction to input
555 gpio_set_pin_direction(VB0, GPIO_DIRECTION_IN);
556
557 gpio_set_pin_pull_mode(VB0,
558 // <y> Pull configuration
559 // <id> pad_pull_config
560 // <GPIO_PULL_OFF"> Off
561 // <GPIO_PULL_UP"> Pull-up
562 // <GPIO_PULL_DOWN"> Pull-down
563 GPIO_PULL_OFF);
564
565 gpio_set_pin_function(VB0, GPIO_PIN_FUNCTION_OFF);
566
567 // GPIO on PA21
568
569 // Set pin direction to input
570 gpio_set_pin_direction(VB1, GPIO_DIRECTION_IN);
571
572 gpio_set_pin_pull_mode(VB1,
573 // <y> Pull configuration
574 // <id> pad_pull_config
575 // <GPIO_PULL_OFF"> Off
576 // <GPIO_PULL_UP"> Pull-up
577 // <GPIO_PULL_DOWN"> Pull-down
578 GPIO_PULL_OFF);
579
580 gpio_set_pin_function(VB1, GPIO_PIN_FUNCTION_OFF);
581
582 // GPIO on PA22
583
584 // Set pin direction to input
585 gpio_set_pin_direction(VB2, GPIO_DIRECTION_IN);
586
587 gpio_set_pin_pull_mode(VB2,
588 // <y> Pull configuration
589 // <id> pad_pull_config
590 // <GPIO_PULL_OFF"> Off
591 // <GPIO_PULL_UP"> Pull-up
592 // <GPIO_PULL_DOWN"> Pull-down
593 GPIO_PULL_OFF);
594
595 gpio_set_pin_function(VB2, GPIO_PIN_FUNCTION_OFF);
596
597 // GPIO on PA23
598
599 // Set pin direction to input
600 gpio_set_pin_direction(VB3, GPIO_DIRECTION_IN);
601
602 gpio_set_pin_pull_mode(VB3,
603 // <y> Pull configuration
604 // <id> pad_pull_config
605 // <GPIO_PULL_OFF"> Off
606 // <GPIO_PULL_UP"> Pull-up
607 // <GPIO_PULL_DOWN"> Pull-down
608 GPIO_PULL_OFF);
609
610 gpio_set_pin_function(VB3, GPIO_PIN_FUNCTION_OFF);
611
Harald Welte092494e2019-02-24 10:33:40 +0100612 // GPIO on PB02
613
614 gpio_set_pin_level(SCL2,
615 // <y> Initial level
616 // <id> pad_initial_level
617 // <false"> Low
618 // <true"> High
619 false);
620
621 // Set pin direction to output
622 gpio_set_pin_direction(SCL2, GPIO_DIRECTION_OUT);
623
624 gpio_set_pin_function(SCL2, GPIO_PIN_FUNCTION_OFF);
625
626 // GPIO on PB03
627
628 gpio_set_pin_level(SDA2,
629 // <y> Initial level
630 // <id> pad_initial_level
631 // <false"> Low
632 // <true"> High
633 false);
634
635 // Set pin direction to output
636 gpio_set_pin_direction(SDA2, GPIO_DIRECTION_OUT);
637
638 gpio_set_pin_function(SDA2, GPIO_PIN_FUNCTION_OFF);
639
640 // GPIO on PB04
641
642 // Set pin direction to input
643 gpio_set_pin_direction(SIM6_INT, GPIO_DIRECTION_IN);
644
645 gpio_set_pin_pull_mode(SIM6_INT,
646 // <y> Pull configuration
647 // <id> pad_pull_config
648 // <GPIO_PULL_OFF"> Off
649 // <GPIO_PULL_UP"> Pull-up
650 // <GPIO_PULL_DOWN"> Pull-down
651 GPIO_PULL_OFF);
652
653 gpio_set_pin_function(SIM6_INT, GPIO_PIN_FUNCTION_OFF);
654
655 // GPIO on PB05
656
657 // Set pin direction to input
658 gpio_set_pin_direction(SIM7_INT, GPIO_DIRECTION_IN);
659
660 gpio_set_pin_pull_mode(SIM7_INT,
661 // <y> Pull configuration
662 // <id> pad_pull_config
663 // <GPIO_PULL_OFF"> Off
664 // <GPIO_PULL_UP"> Pull-up
665 // <GPIO_PULL_DOWN"> Pull-down
666 GPIO_PULL_OFF);
667
668 gpio_set_pin_function(SIM7_INT, GPIO_PIN_FUNCTION_OFF);
669
670 // GPIO on PB06
671
672 gpio_set_pin_level(SCL3,
673 // <y> Initial level
674 // <id> pad_initial_level
675 // <false"> Low
676 // <true"> High
677 false);
678
679 // Set pin direction to output
680 gpio_set_pin_direction(SCL3, GPIO_DIRECTION_OUT);
681
682 gpio_set_pin_function(SCL3, GPIO_PIN_FUNCTION_OFF);
683
684 // GPIO on PB07
685
686 gpio_set_pin_level(SDA3,
687 // <y> Initial level
688 // <id> pad_initial_level
689 // <false"> Low
690 // <true"> High
691 false);
692
693 // Set pin direction to output
694 gpio_set_pin_direction(SDA3, GPIO_DIRECTION_OUT);
695
696 gpio_set_pin_function(SDA3, GPIO_PIN_FUNCTION_OFF);
697
698 // GPIO on PB14
699
700 gpio_set_pin_level(SCL1,
701 // <y> Initial level
702 // <id> pad_initial_level
703 // <false"> Low
704 // <true"> High
705 false);
706
707 // Set pin direction to output
708 gpio_set_pin_direction(SCL1, GPIO_DIRECTION_OUT);
709
710 gpio_set_pin_function(SCL1, GPIO_PIN_FUNCTION_OFF);
711
712 // GPIO on PB15
713
714 gpio_set_pin_level(SDA1,
715 // <y> Initial level
716 // <id> pad_initial_level
717 // <false"> Low
718 // <true"> High
719 false);
720
721 // Set pin direction to output
722 gpio_set_pin_direction(SDA1, GPIO_DIRECTION_OUT);
723
724 gpio_set_pin_function(SDA1, GPIO_PIN_FUNCTION_OFF);
725
726 // GPIO on PC00
727
728 // Set pin direction to input
729 gpio_set_pin_direction(SIM0_INT, GPIO_DIRECTION_IN);
730
731 gpio_set_pin_pull_mode(SIM0_INT,
732 // <y> Pull configuration
733 // <id> pad_pull_config
734 // <GPIO_PULL_OFF"> Off
735 // <GPIO_PULL_UP"> Pull-up
736 // <GPIO_PULL_DOWN"> Pull-down
737 GPIO_PULL_OFF);
738
739 gpio_set_pin_function(SIM0_INT, GPIO_PIN_FUNCTION_OFF);
740
741 // GPIO on PC01
742
743 // Set pin direction to input
744 gpio_set_pin_direction(SIM1_INT, GPIO_DIRECTION_IN);
745
746 gpio_set_pin_pull_mode(SIM1_INT,
747 // <y> Pull configuration
748 // <id> pad_pull_config
749 // <GPIO_PULL_OFF"> Off
750 // <GPIO_PULL_UP"> Pull-up
751 // <GPIO_PULL_DOWN"> Pull-down
752 GPIO_PULL_OFF);
753
754 gpio_set_pin_function(SIM1_INT, GPIO_PIN_FUNCTION_OFF);
755
756 // GPIO on PC02
757
758 // Set pin direction to input
759 gpio_set_pin_direction(SIM2_INT, GPIO_DIRECTION_IN);
760
761 gpio_set_pin_pull_mode(SIM2_INT,
762 // <y> Pull configuration
763 // <id> pad_pull_config
764 // <GPIO_PULL_OFF"> Off
765 // <GPIO_PULL_UP"> Pull-up
766 // <GPIO_PULL_DOWN"> Pull-down
767 GPIO_PULL_OFF);
768
769 gpio_set_pin_function(SIM2_INT, GPIO_PIN_FUNCTION_OFF);
770
771 // GPIO on PC03
772
773 // Set pin direction to input
774 gpio_set_pin_direction(SIM3_INT, GPIO_DIRECTION_IN);
775
776 gpio_set_pin_pull_mode(SIM3_INT,
777 // <y> Pull configuration
778 // <id> pad_pull_config
779 // <GPIO_PULL_OFF"> Off
780 // <GPIO_PULL_UP"> Pull-up
781 // <GPIO_PULL_DOWN"> Pull-down
782 GPIO_PULL_OFF);
783
784 gpio_set_pin_function(SIM3_INT, GPIO_PIN_FUNCTION_OFF);
785
Kévin Redon6a8295c2019-01-30 18:58:44 +0100786 // GPIO on PC14
787
788 // Set pin direction to input
789 gpio_set_pin_direction(SWITCH, GPIO_DIRECTION_IN);
790
791 gpio_set_pin_pull_mode(SWITCH,
792 // <y> Pull configuration
793 // <id> pad_pull_config
794 // <GPIO_PULL_OFF"> Off
795 // <GPIO_PULL_UP"> Pull-up
796 // <GPIO_PULL_DOWN"> Pull-down
797 GPIO_PULL_OFF);
798
799 gpio_set_pin_function(SWITCH, GPIO_PIN_FUNCTION_OFF);
800
Harald Welte092494e2019-02-24 10:33:40 +0100801 // GPIO on PC15
802
803 // Set pin direction to input
Kévin Redon3c045b22019-02-26 19:52:02 +0100804 gpio_set_pin_direction(MUX_STAT, GPIO_DIRECTION_IN);
Harald Welte092494e2019-02-24 10:33:40 +0100805
Kévin Redon3c045b22019-02-26 19:52:02 +0100806 gpio_set_pin_pull_mode(MUX_STAT,
Harald Welte092494e2019-02-24 10:33:40 +0100807 // <y> Pull configuration
808 // <id> pad_pull_config
809 // <GPIO_PULL_OFF"> Off
810 // <GPIO_PULL_UP"> Pull-up
811 // <GPIO_PULL_DOWN"> Pull-down
812 GPIO_PULL_OFF);
813
Kévin Redon3c045b22019-02-26 19:52:02 +0100814 gpio_set_pin_function(MUX_STAT, GPIO_PIN_FUNCTION_OFF);
Harald Welte092494e2019-02-24 10:33:40 +0100815
Kévin Redon4e39b012019-01-30 15:55:58 +0100816 // GPIO on PC26
Kévin Redon5908a5c2019-01-24 18:45:23 +0100817
Kévin Redon6a8295c2019-01-30 18:58:44 +0100818 gpio_set_pin_level(USER_LED,
Kévin Redon5908a5c2019-01-24 18:45:23 +0100819 // <y> Initial level
820 // <id> pad_initial_level
821 // <false"> Low
822 // <true"> High
Kévin Redon4e39b012019-01-30 15:55:58 +0100823 false);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100824
825 // Set pin direction to output
Kévin Redon6a8295c2019-01-30 18:58:44 +0100826 gpio_set_pin_direction(USER_LED, GPIO_DIRECTION_OUT);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100827
Kévin Redon6a8295c2019-01-30 18:58:44 +0100828 gpio_set_pin_function(USER_LED, GPIO_PIN_FUNCTION_OFF);
Kévin Redon5908a5c2019-01-24 18:45:23 +0100829
Harald Welte092494e2019-02-24 10:33:40 +0100830 // GPIO on PC27
831
832 gpio_set_pin_level(SCL4,
833 // <y> Initial level
834 // <id> pad_initial_level
835 // <false"> Low
836 // <true"> High
837 false);
838
839 // Set pin direction to output
840 gpio_set_pin_direction(SCL4, GPIO_DIRECTION_OUT);
841
842 gpio_set_pin_function(SCL4, GPIO_PIN_FUNCTION_OFF);
843
844 // GPIO on PC28
845
846 gpio_set_pin_level(SDA4,
847 // <y> Initial level
848 // <id> pad_initial_level
849 // <false"> Low
850 // <true"> High
851 false);
852
853 // Set pin direction to output
854 gpio_set_pin_direction(SDA4, GPIO_DIRECTION_OUT);
855
856 gpio_set_pin_function(SDA4, GPIO_PIN_FUNCTION_OFF);
857
Kévin Redon1f8ecef2019-01-31 13:36:12 +0100858 SIM0_init();
859 SIM1_init();
860 SIM2_init();
861 SIM3_init();
862 SIM4_init();
863 SIM5_init();
864 SIM6_init();
Harald Welte361ed202019-02-24 21:15:39 +0100865
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100866 UART_debug_init();
867
Kévin Redon69b92d92019-01-24 16:39:20 +0100868 USB_DEVICE_INSTANCE_init();
869}