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Kévin Redon4cd3f7d2019-01-24 17:57:13 +01001/**
2 * \file
3 *
4 * \brief SPI Master DMA related functionality declaration.
5 *
6 * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Subject to your compliance with these terms, you may use Microchip
13 * software and any derivatives exclusively with Microchip products.
14 * It is your responsibility to comply with third party license terms applicable
15 * to your use of third party software (including open source software) that
16 * may accompany Microchip software.
17 *
18 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
19 * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
20 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
21 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
22 * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
23 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
24 * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
25 * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
26 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
27 * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
28 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
29 *
30 * \asf_license_stop
31 *
32 */
33
34#ifndef _HPL_SPI_M_DMA_H_INCLUDED
35#define _HPL_SPI_M_DMA_H_INCLUDED
36
37#include <hpl_spi.h>
38#include <hpl_spi_dma.h>
39
40/**
41 * \addtogroup hpl_spi HPL SPI
42 *
43 *
44 *@{
45 */
46
47#ifdef __cplusplus
48extern "C" {
49#endif
50
51/** Uses common SPI dma device driver. */
52#define _spi_m_dma_dev _spi_dma_dev
53
54#define _spi_m_dma_dev_cb_type _spi_dma_dev_cb_type
55
56/**
Harald Welte863ea292019-02-24 10:05:12 +010057 * \name HPL functions
58 */
59//@{
60/**
Kévin Redon4cd3f7d2019-01-24 17:57:13 +010061 * \brief Initialize SPI for access with interrupts
62 * It will load default hardware configuration and software struct.
63 * \param[in, out] dev Pointer to the SPI device instance.
64 * \param[in] hw Pointer to the hardware base.
65 * \return Operation status.
66 * \retval ERR_INVALID_ARG Input parameter problem.
67 * \retval ERR_BUSY SPI hardware not ready (resetting).
68 * \retval ERR_DENIED SPI has been enabled.
69 * \retval 0 ERR_NONE is operation done successfully.
70 */
71int32_t _spi_m_dma_init(struct _spi_m_dma_dev *dev, void *const hw);
72
73/**
74 * \brief Initialize SPI for access with interrupts
75 * Disable, reset the hardware and the software struct.
76 * \param[in, out] dev Pointer to the SPI device instance.
77 * \return Operation status.
78 * \retval 0 ERR_NONE is operation done successfully.
79 */
80int32_t _spi_m_dma_deinit(struct _spi_m_dma_dev *dev);
81
82/**
83 * \brief Enable SPI for access with interrupts
84 * Enable the SPI and enable callback generation of receive and error
85 * interrupts.
86 * \param[in] dev Pointer to the SPI device instance.
87 * \return Operation status.
88 * \retval ERR_INVALID_ARG Input parameter problem.
89 * \retval ERR_BUSY SPI hardware not ready (resetting).
90 * \retval 0 ERR_NONE is operation done successfully.
91 */
92int32_t _spi_m_dma_enable(struct _spi_m_dma_dev *dev);
93
94/**
95 * \brief Disable SPI for access without interrupts
96 * Disable SPI and interrupts. Deactivate all CS pins if works as master.
97 * \param[in] dev Pointer to the SPI device instance.
98 * \return Operation status.
99 * \retval 0 ERR_NONE is operation done successfully.
100 */
101int32_t _spi_m_dma_disable(struct _spi_m_dma_dev *dev);
102
103/**
104 * \brief Set SPI transfer mode
105 * Set SPI transfer mode (\ref spi_transfer_mode),
106 * which controls clock polarity and clock phase.
107 * Mode 0: leading edge is rising edge, data sample on leading edge.
108 * Mode 1: leading edge is rising edge, data sample on trailing edge.
109 * Mode 2: leading edge is falling edge, data sample on leading edge.
110 * Mode 3: leading edge is falling edge, data sample on trailing edge.
111 * \param[in] dev Pointer to the SPI device instance.
112 * \param[in] mode The SPI transfer mode.
113 * \return Operation status.
114 * \retval ERR_BUSY SPI is not ready to accept new setting.
115 * \retval 0 ERR_NONE is operation done successfully.
116 */
117int32_t _spi_m_dma_set_mode(struct _spi_m_dma_dev *dev, const enum spi_transfer_mode mode);
118
119/**
120 * \brief Set SPI baudrate
121 * \param[in] dev Pointer to the SPI device instance.
122 * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
123 * how it's generated.
124 * \return Operation status.
125 * \retval ERR_BUSY SPI is not ready to accept new setting.
126 * \retval 0 Operation done successfully.
127 */
128int32_t _spi_m_dma_set_baudrate(struct _spi_m_dma_dev *dev, const uint32_t baud_val);
129
130/**
131 * \brief Set SPI baudrate
132 * \param[in, out] dev Pointer to the SPI device instance.
133 * \param[in] char_size The character size, see \ref spi_char_size.
134 * \return Operation status.
135 * \retval ERR_INVALID_ARG The character size is not supported.
136 * \retval ERR_BUSY SPI is not ready to accept new setting.
137 * \retval 0 Operation done successfully.
138 */
139int32_t _spi_m_dma_set_char_size(struct _spi_m_dma_dev *dev, const enum spi_char_size char_size);
140
141/**
142 * \brief Set SPI data order
143 * \param[in] dev Pointer to the SPI device instance.
144 * \param[in] dord SPI data order (LSB/MSB first).
145 * \return Operation status.
146 * \retval ERR_INVALID_ARG The character size is not supported.
147 * \retval ERR_BUSY SPI is not ready to accept new setting.
148 * \retval 0 Operation done successfully.
149 */
150int32_t _spi_m_dma_set_data_order(struct _spi_m_dma_dev *dev, const enum spi_data_order dord);
151
152/**
153 * \brief Register the SPI device callback
154 * \param[in] dev Pointer to the SPI device instance.
155 * \param[in] cb_type The callback type.
156 * \param[in] func The callback function to register. NULL to disable callback.
157 * \return Always 0.
158 */
159void _spi_m_dma_register_callback(struct _spi_m_dma_dev *dev, enum _spi_dma_dev_cb_type, _spi_dma_cb_t func);
160
161/** \brief Do SPI data transfer (TX & RX) with DMA
162 * Log the TX & RX buffers and transfer them in background. It never blocks.
163 *
164 * \param[in] dev Pointer to the SPI device instance.
165 * \param[in] txbuf Pointer to the transfer information (\ref spi_transfer).
166 * \param[out] rxbuf Pointer to the receiver information (\ref spi_receive).
167 * \param[in] length spi transfer data length.
168 *
169 * \return Operation status.
170 * \retval ERR_NONE Success.
171 * \retval ERR_BUSY Busy.
172 */
173int32_t _spi_m_dma_transfer(struct _spi_m_dma_dev *dev, uint8_t const *txbuf, uint8_t *const rxbuf,
174 const uint16_t length);
Harald Welte863ea292019-02-24 10:05:12 +0100175//@}
Kévin Redon4cd3f7d2019-01-24 17:57:13 +0100176
177#ifdef __cplusplus
178}
179#endif
180
181/**@}*/
182#endif /* ifndef _HPL_SPI_M_DMA_H_INCLUDED */