blob: f481fb873d4df465c33e9158ad0cfd96337baea9 [file] [log] [blame]
Kévin Redon4cd3f7d2019-01-24 17:57:13 +01001/**
2 * \file
3 *
4 * \brief SPI Master DMA related functionality declaration.
5 *
6 * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Subject to your compliance with these terms, you may use Microchip
13 * software and any derivatives exclusively with Microchip products.
14 * It is your responsibility to comply with third party license terms applicable
15 * to your use of third party software (including open source software) that
16 * may accompany Microchip software.
17 *
18 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
19 * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
20 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
21 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
22 * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
23 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
24 * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
25 * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
26 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
27 * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
28 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
29 *
30 * \asf_license_stop
31 *
32 */
33
34#ifndef _HPL_SPI_M_DMA_H_INCLUDED
35#define _HPL_SPI_M_DMA_H_INCLUDED
36
37#include <hpl_spi.h>
38#include <hpl_spi_dma.h>
39
40/**
41 * \addtogroup hpl_spi HPL SPI
42 *
43 *
44 *@{
45 */
46
47#ifdef __cplusplus
48extern "C" {
49#endif
50
51/** Uses common SPI dma device driver. */
52#define _spi_m_dma_dev _spi_dma_dev
53
54#define _spi_m_dma_dev_cb_type _spi_dma_dev_cb_type
55
56/**
57 * \brief Initialize SPI for access with interrupts
58 * It will load default hardware configuration and software struct.
59 * \param[in, out] dev Pointer to the SPI device instance.
60 * \param[in] hw Pointer to the hardware base.
61 * \return Operation status.
62 * \retval ERR_INVALID_ARG Input parameter problem.
63 * \retval ERR_BUSY SPI hardware not ready (resetting).
64 * \retval ERR_DENIED SPI has been enabled.
65 * \retval 0 ERR_NONE is operation done successfully.
66 */
67int32_t _spi_m_dma_init(struct _spi_m_dma_dev *dev, void *const hw);
68
69/**
70 * \brief Initialize SPI for access with interrupts
71 * Disable, reset the hardware and the software struct.
72 * \param[in, out] dev Pointer to the SPI device instance.
73 * \return Operation status.
74 * \retval 0 ERR_NONE is operation done successfully.
75 */
76int32_t _spi_m_dma_deinit(struct _spi_m_dma_dev *dev);
77
78/**
79 * \brief Enable SPI for access with interrupts
80 * Enable the SPI and enable callback generation of receive and error
81 * interrupts.
82 * \param[in] dev Pointer to the SPI device instance.
83 * \return Operation status.
84 * \retval ERR_INVALID_ARG Input parameter problem.
85 * \retval ERR_BUSY SPI hardware not ready (resetting).
86 * \retval 0 ERR_NONE is operation done successfully.
87 */
88int32_t _spi_m_dma_enable(struct _spi_m_dma_dev *dev);
89
90/**
91 * \brief Disable SPI for access without interrupts
92 * Disable SPI and interrupts. Deactivate all CS pins if works as master.
93 * \param[in] dev Pointer to the SPI device instance.
94 * \return Operation status.
95 * \retval 0 ERR_NONE is operation done successfully.
96 */
97int32_t _spi_m_dma_disable(struct _spi_m_dma_dev *dev);
98
99/**
100 * \brief Set SPI transfer mode
101 * Set SPI transfer mode (\ref spi_transfer_mode),
102 * which controls clock polarity and clock phase.
103 * Mode 0: leading edge is rising edge, data sample on leading edge.
104 * Mode 1: leading edge is rising edge, data sample on trailing edge.
105 * Mode 2: leading edge is falling edge, data sample on leading edge.
106 * Mode 3: leading edge is falling edge, data sample on trailing edge.
107 * \param[in] dev Pointer to the SPI device instance.
108 * \param[in] mode The SPI transfer mode.
109 * \return Operation status.
110 * \retval ERR_BUSY SPI is not ready to accept new setting.
111 * \retval 0 ERR_NONE is operation done successfully.
112 */
113int32_t _spi_m_dma_set_mode(struct _spi_m_dma_dev *dev, const enum spi_transfer_mode mode);
114
115/**
116 * \brief Set SPI baudrate
117 * \param[in] dev Pointer to the SPI device instance.
118 * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on
119 * how it's generated.
120 * \return Operation status.
121 * \retval ERR_BUSY SPI is not ready to accept new setting.
122 * \retval 0 Operation done successfully.
123 */
124int32_t _spi_m_dma_set_baudrate(struct _spi_m_dma_dev *dev, const uint32_t baud_val);
125
126/**
127 * \brief Set SPI baudrate
128 * \param[in, out] dev Pointer to the SPI device instance.
129 * \param[in] char_size The character size, see \ref spi_char_size.
130 * \return Operation status.
131 * \retval ERR_INVALID_ARG The character size is not supported.
132 * \retval ERR_BUSY SPI is not ready to accept new setting.
133 * \retval 0 Operation done successfully.
134 */
135int32_t _spi_m_dma_set_char_size(struct _spi_m_dma_dev *dev, const enum spi_char_size char_size);
136
137/**
138 * \brief Set SPI data order
139 * \param[in] dev Pointer to the SPI device instance.
140 * \param[in] dord SPI data order (LSB/MSB first).
141 * \return Operation status.
142 * \retval ERR_INVALID_ARG The character size is not supported.
143 * \retval ERR_BUSY SPI is not ready to accept new setting.
144 * \retval 0 Operation done successfully.
145 */
146int32_t _spi_m_dma_set_data_order(struct _spi_m_dma_dev *dev, const enum spi_data_order dord);
147
148/**
149 * \brief Register the SPI device callback
150 * \param[in] dev Pointer to the SPI device instance.
151 * \param[in] cb_type The callback type.
152 * \param[in] func The callback function to register. NULL to disable callback.
153 * \return Always 0.
154 */
155void _spi_m_dma_register_callback(struct _spi_m_dma_dev *dev, enum _spi_dma_dev_cb_type, _spi_dma_cb_t func);
156
157/** \brief Do SPI data transfer (TX & RX) with DMA
158 * Log the TX & RX buffers and transfer them in background. It never blocks.
159 *
160 * \param[in] dev Pointer to the SPI device instance.
161 * \param[in] txbuf Pointer to the transfer information (\ref spi_transfer).
162 * \param[out] rxbuf Pointer to the receiver information (\ref spi_receive).
163 * \param[in] length spi transfer data length.
164 *
165 * \return Operation status.
166 * \retval ERR_NONE Success.
167 * \retval ERR_BUSY Busy.
168 */
169int32_t _spi_m_dma_transfer(struct _spi_m_dma_dev *dev, uint8_t const *txbuf, uint8_t *const rxbuf,
170 const uint16_t length);
171
172#ifdef __cplusplus
173}
174#endif
175
176/**@}*/
177#endif /* ifndef _HPL_SPI_M_DMA_H_INCLUDED */