| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /* Auto-generated config file peripheral_clk_config.h */ |
| 2 | #ifndef PERIPHERAL_CLK_CONFIG_H |
| 3 | #define PERIPHERAL_CLK_CONFIG_H |
| 4 | |
| 5 | // <<< Use Configuration Wizard in Context Menu >>> |
| 6 | |
| 7 | /** |
| 8 | * \def CONF_CPU_FREQUENCY |
| 9 | * \brief CPU's Clock frequency |
| 10 | */ |
| 11 | #ifndef CONF_CPU_FREQUENCY |
| Kévin Redon | 4a2d8f4 | 2019-01-24 17:15:10 +0100 | [diff] [blame] | 12 | #define CONF_CPU_FREQUENCY 120000000 |
| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 13 | #endif |
| 14 | |
| Kévin Redon | 4cd3f7d | 2019-01-24 17:57:13 +0100 | [diff] [blame] | 15 | // <y> Core Clock Source |
| 16 | // <id> core_gclk_selection |
| 17 | |
| 18 | // <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 |
| 19 | |
| 20 | // <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 |
| 21 | |
| 22 | // <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 |
| 23 | |
| 24 | // <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 |
| 25 | |
| 26 | // <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 |
| 27 | |
| 28 | // <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 |
| 29 | |
| 30 | // <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 |
| 31 | |
| 32 | // <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 |
| 33 | |
| 34 | // <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 |
| 35 | |
| 36 | // <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 |
| 37 | |
| 38 | // <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 |
| 39 | |
| 40 | // <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 |
| 41 | |
| 42 | // <i> Select the clock source for CORE. |
| 43 | #ifndef CONF_GCLK_SERCOM2_CORE_SRC |
| 44 | #define CONF_GCLK_SERCOM2_CORE_SRC GCLK_PCHCTRL_GEN_GCLK2_Val |
| 45 | #endif |
| 46 | |
| 47 | // <y> Slow Clock Source |
| 48 | // <id> slow_gclk_selection |
| 49 | |
| 50 | // <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 |
| 51 | |
| 52 | // <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 |
| 53 | |
| 54 | // <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 |
| 55 | |
| 56 | // <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 |
| 57 | |
| 58 | // <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 |
| 59 | |
| 60 | // <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 |
| 61 | |
| 62 | // <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 |
| 63 | |
| 64 | // <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 |
| 65 | |
| 66 | // <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 |
| 67 | |
| 68 | // <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 |
| 69 | |
| 70 | // <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 |
| 71 | |
| 72 | // <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 |
| 73 | |
| 74 | // <i> Select the slow clock source. |
| 75 | #ifndef CONF_GCLK_SERCOM2_SLOW_SRC |
| 76 | #define CONF_GCLK_SERCOM2_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val |
| 77 | #endif |
| 78 | |
| 79 | /** |
| 80 | * \def CONF_GCLK_SERCOM2_CORE_FREQUENCY |
| 81 | * \brief SERCOM2's Core Clock frequency |
| 82 | */ |
| 83 | #ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY |
| 84 | #define CONF_GCLK_SERCOM2_CORE_FREQUENCY 100000000 |
| 85 | #endif |
| 86 | |
| 87 | /** |
| 88 | * \def CONF_GCLK_SERCOM2_SLOW_FREQUENCY |
| 89 | * \brief SERCOM2's Slow Clock frequency |
| 90 | */ |
| 91 | #ifndef CONF_GCLK_SERCOM2_SLOW_FREQUENCY |
| 92 | #define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 32768 |
| 93 | #endif |
| 94 | |
| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 95 | // <y> USB Clock Source |
| 96 | // <id> usb_gclk_selection |
| 97 | |
| 98 | // <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 |
| 99 | |
| 100 | // <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 |
| 101 | |
| 102 | // <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 |
| 103 | |
| 104 | // <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 |
| 105 | |
| 106 | // <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 |
| 107 | |
| 108 | // <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 |
| 109 | |
| 110 | // <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 |
| 111 | |
| 112 | // <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 |
| 113 | |
| 114 | // <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 |
| 115 | |
| 116 | // <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 |
| 117 | |
| 118 | // <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 |
| 119 | |
| 120 | // <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 |
| 121 | |
| 122 | // <i> Select the clock source for USB. |
| 123 | #ifndef CONF_GCLK_USB_SRC |
| 124 | #define CONF_GCLK_USB_SRC GCLK_PCHCTRL_GEN_GCLK1_Val |
| 125 | |
| 126 | #endif |
| 127 | |
| 128 | /** |
| 129 | * \def CONF_GCLK_USB_FREQUENCY |
| 130 | * \brief USB's Clock frequency |
| 131 | */ |
| 132 | #ifndef CONF_GCLK_USB_FREQUENCY |
| 133 | #define CONF_GCLK_USB_FREQUENCY 48000000 |
| 134 | #endif |
| 135 | |
| 136 | // <<< end of configuration section >>> |
| 137 | |
| 138 | #endif // PERIPHERAL_CLK_CONFIG_H |