| commit | 4a2d8f4773a18d35080c10a63607095dd34901be | [log] [tgz] |
|---|---|---|
| author | Kévin Redon <kredon@sysmocom.de> | Thu Jan 24 17:15:10 2019 +0100 |
| committer | Kévin Redon <kredon@sysmocom.de> | Thu Feb 07 15:56:04 2019 +0100 |
| tree | d7cc5d7a6cc2a324586517eb764e267a17d1581a | |
| parent | 87af489c19749c16b844ea45ce55e915efcaab28 [diff] |
switch CPU clock to 120 MHz use GCLK11 to bring external crystal oscillator XOSC1 from 12 MHz to 2MHz use DPLL0 to multiply 2 MHz to 120 MHz. the division is first needed because the DPLL0 maximum input frequency is 3.2 MHz Change-Id: I642e724ec56a376addf21cc58ecd2ef1b40bd116