| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief Generic Clock Controller. |
| 5 | * |
| 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * Subject to your compliance with these terms, you may use Microchip |
| 13 | * software and any derivatives exclusively with Microchip products. |
| 14 | * It is your responsibility to comply with third party license terms applicable |
| 15 | * to your use of third party software (including open source software) that |
| 16 | * may accompany Microchip software. |
| 17 | * |
| 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, |
| 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, |
| 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, |
| 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE |
| 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL |
| 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE |
| 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE |
| 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT |
| 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY |
| 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, |
| 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. |
| 29 | * |
| 30 | * \asf_license_stop |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #ifndef _HPL_GCLK_H_INCLUDED |
| 35 | #define _HPL_GCLK_H_INCLUDED |
| 36 | |
| 37 | #include <compiler.h> |
| 38 | #ifdef _UNIT_TEST_ |
| 39 | #include <hri_gclk1_v210_mock.h> |
| 40 | #endif |
| 41 | |
| 42 | #ifdef __cplusplus |
| 43 | extern "C" { |
| 44 | #endif |
| 45 | |
| 46 | /** |
| 47 | * \addtogroup gclk_group GCLK Hardware Proxy Layer |
| 48 | * |
| 49 | * \section gclk_hpl_rev Revision History |
| 50 | * - v0.0.0.1 Initial Commit |
| 51 | * |
| 52 | *@{ |
| 53 | */ |
| 54 | |
| 55 | /** |
| 56 | * \name HPL functions |
| 57 | */ |
| 58 | //@{ |
| 59 | /** |
| 60 | * \brief Enable clock on the given channel with the given clock source |
| 61 | * |
| 62 | * This function maps the given clock source to the given clock channel |
| 63 | * and enables channel. |
| 64 | * |
| 65 | * \param[in] channel The channel to enable clock for |
| 66 | * \param[in] source The clock source for the given channel |
| 67 | */ |
| 68 | static inline void _gclk_enable_channel(const uint8_t channel, const uint8_t source) |
| 69 | { |
| 70 | |
| 71 | hri_gclk_write_PCHCTRL_reg(GCLK, channel, source | GCLK_PCHCTRL_CHEN); |
| 72 | } |
| 73 | |
| 74 | /** |
| 75 | * \brief Initialize GCLK generators by function references |
| 76 | * \param[in] bm Bit mapping for referenced generators, |
| 77 | * a bit 1 in position triggers generator initialization. |
| 78 | */ |
| 79 | void _gclk_init_generators_by_fref(uint32_t bm); |
| 80 | |
| 81 | //@} |
| 82 | /**@}*/ |
| 83 | #ifdef __cplusplus |
| 84 | } |
| 85 | #endif |
| 86 | |
| 87 | #endif /* _HPL_GCLK_H_INCLUDED */ |