Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 1 | #pragma once |
| 2 | #include "board_common.h" |
| 3 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 4 | /* Name of the board */ |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 5 | #define BOARD_NAME "SAM3S-SIMTRACE" |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 6 | /* Board definition */ |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 7 | #define simtrace |
| 8 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 9 | /* Board main oscillator frequency (in Hz) */ |
Harald Welte | a02b641 | 2016-08-21 18:32:12 +0200 | [diff] [blame] | 10 | #define BOARD_MAINOSC 18432000 |
| 11 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 12 | /** Pin configuration **/ |
| 13 | /* Button to force bootloader start (shorted to ground when pressed */ |
| 14 | #define PIN_BOOTLOADER_SW {PIO_PA31, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} |
| 15 | /* Enable powering the card using the second 3.3 V output of the LDO (active high) */ |
| 16 | #define SIM_PWEN_PIN {SIM_PWEN, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} |
Kévin Redon | ee62a9d | 2018-06-11 13:42:23 +0200 | [diff] [blame^] | 17 | /* Enable powering the SIM card */ |
| 18 | #define PWR_PINS SIM_PWEN_PIN |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 19 | /* Card presence pin */ |
| 20 | #define SW_SIM PIO_PA8 |
| 21 | /* Pull card presence pin high (shorted to ground in card slot when card is present) */ |
| 22 | #define SMARTCARD_CONNECT_PIN {SW_SIM, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_DEGLITCH | PIO_IT_EDGE } |
| 23 | |
| 24 | /** Smart card connection **/ |
| 25 | /* Card RST reset signal input (active low; RST_SIM in schematic) */ |
Kévin Redon | 45ad62d | 2018-06-07 18:56:41 +0200 | [diff] [blame] | 26 | #define PIN_SIM_RST {PIO_PA7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 27 | /* Card I/O data signal input/output (I/O_SIM in schematic) */ |
| 28 | #define PIN_SIM_IO {PIO_PA6A_TXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 29 | /* Card CLK clock input (CLK_SIM in schematic) */ |
| 30 | #define PIN_SIM_CLK {PIO_PA2B_SCK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 31 | /* Pin to measure card I/O timing (to start measuring the ETU on I/O activity; connected I/O_SIM in schematic) */ |
| 32 | #define PIN_SIM_IO_INPUT {PIO_PA1B_TIOB0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} |
| 33 | /* Pin used as clock input (to measure the ETU duration; connected to CLK_SIM in schematic) */ |
| 34 | #define PIN_SIM_CLK_INPUT {PIO_PA4B_TCLK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} |
| 35 | /* Pins used to measure ETU timing (using timer counter) */ |
| 36 | #define PINS_TC PIN_SIM_IO_INPUT, PIN_SIM_CLK_INPUT |
| 37 | |
| 38 | /** Phone connection **/ |
| 39 | /* Phone USIM slot 1 VCC pin (VCC_PHONE in schematic) */ |
| 40 | #define PIN_USIM1_VCC {PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} |
| 41 | /* Phone USIM slot 1 RST pin (active low; RST_PHONE in schematic) */ |
| 42 | #define PIN_USIM1_nRST {PIO_PA24, PIOA, ID_PIOA, PIO_INPUT, PIO_IT_RISE_EDGE | PIO_DEGLITCH } |
| 43 | /* Phone I/O data signal input/output (I/O_PHONE in schematic) */ |
| 44 | #define PIN_PHONE_IO {PIO_PA22A_TXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 45 | /* Phone CLK clock input (CLK_PHONE in schematic) */ |
| 46 | #define PIN_PHONE_CLK {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 47 | /* Pin used for phone USIM slot 1 communication */ |
| 48 | #define PINS_USIM1 PIN_PHONE_IO, PIN_PHONE_CLK, PIN_PHONE_CLK_INPUT, PIN_USIM1_VCC, PIN_PHONE_IO_INPUT, PIN_USIM1_nRST |
| 49 | /* Phone I/O data signal input/output (unused USART RX input; connected to I/O_PHONE in schematic) */ |
| 50 | #define PIN_PHONE_IO_INPUT {PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 51 | /* Pin used as clock input (to measure the ETU duration; connected to CLK_PHONE in schematic) */ |
| 52 | #define PIN_PHONE_CLK_INPUT {PIO_PA29B_TCLK2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} |
| 53 | |
Kévin Redon | ee62a9d | 2018-06-11 13:42:23 +0200 | [diff] [blame^] | 54 | /** Default pin configuration **/ |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 55 | /* Disconnect VPP, CLK, and RST lines between card and phone using bus switch (high sets bus switch to high-impedance) */ |
| 56 | #define PIN_SC_SW_DEFAULT {PIO_PA20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} |
| 57 | /* Disconnect I/O line between card and phone using bus switch (high sets bus switch to high-impedance) */ |
| 58 | #define PIN_IO_SW_DEFAULT {PIO_PA19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} |
| 59 | /* Disconnect all lines (VPP, CLK, RST, and I/O) between card and phone */ |
| 60 | #define PINS_BUS_DEFAULT PIN_SC_SW_DEFAULT, PIN_IO_SW_DEFAULT |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 61 | |
| 62 | /** Sniffer configuration **/ |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 63 | /* Connect VPP, CLK, and RST lines between card and phone using bus switch (low connects signals on bus switch) */ |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 64 | #define PIN_SC_SW_SNIFF {PIO_PA20, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 65 | /* Connect I/O line between card and phone using bus switch (low connects signals on bus switch) */ |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 66 | #define PIN_IO_SW_SNIFF {PIO_PA19, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 67 | /* Connect all lines (VPP, CLK, RST, and I/O) between card and phone */ |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 68 | #define PINS_BUS_SNIFF PIN_SC_SW_SNIFF, PIN_IO_SW_SNIFF |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 69 | /* Pins used to sniff phone-card communication */ |
Kévin Redon | ee62a9d | 2018-06-11 13:42:23 +0200 | [diff] [blame^] | 70 | #define PINS_SIM_SNIFF PIN_SIM_IO, PIN_SIM_CLK, PIN_SIM_RST |
Kévin Redon | 45ad62d | 2018-06-07 18:56:41 +0200 | [diff] [blame] | 71 | /* Disable power converter 4.5-6V to 3.3V (active high) */ |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 72 | #define PIN_SIM_PWEN_SNIFF {SIM_PWEN, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
Kévin Redon | 45ad62d | 2018-06-07 18:56:41 +0200 | [diff] [blame] | 73 | /* Enable power switch to forward VCC_PHONE to VCC_SIM (active high) */ |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 74 | #define PIN_VCC_FWD_SNIFF {VCC_FWD, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} |
| 75 | /* Use phone VCC to power card */ |
Kévin Redon | ee62a9d | 2018-06-11 13:42:23 +0200 | [diff] [blame^] | 76 | #define PINS_PWR_SNIFF PIN_SIM_PWEN_SNIFF, PIN_VCC_FWD_SNIFF |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 77 | |
Kévin Redon | 45ad62d | 2018-06-07 18:56:41 +0200 | [diff] [blame] | 78 | /** CCID configuration */ |
| 79 | /* Card RST reset signal input (active low; RST_SIM in schematic) */ |
| 80 | #define PIN_ISO7816_RSTMC {PIO_PA7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
| 81 | /* ISO7816-communication related pins */ |
| 82 | #define PINS_ISO7816 PIN_SIM_IO, PIN_SIM_CLK, PIN_ISO7816_RSTMC // SIM_PWEN_PIN, PIN_SIM_IO2, PIN_SIM_CLK2 |
| 83 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 84 | /** External SPI flash interface **/ |
| 85 | /* SPI MISO pin definition */ |
| 86 | #define PIN_SPI_MISO {PIO_PA12A_MISO, PIOA, PIOA, PIO_PERIPH_A, PIO_PULLUP} |
| 87 | /* SPI MOSI pin definition */ |
| 88 | #define PIN_SPI_MOSI {PIO_PA13A_MOSI, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 89 | /* SPI SCK pin definition */ |
| 90 | #define PIN_SPI_SCK {PIO_PA14A_SPCK, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 91 | /* SPI pins definition. Contains MISO, MOSI & SCK */ |
| 92 | #define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SCK |
| 93 | /* SPI chip select 0 pin definition */ |
| 94 | #define PIN_SPI_NPCS0 {PIO_PA11A_NPCS0, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT} |
| 95 | /* SPI flash write protect pin (active low, pulled low) */ |
| 96 | #define PIN_SPI_WP {PA15, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} |
Harald Welte | 2d3371e | 2015-11-30 11:59:03 +0100 | [diff] [blame] | 97 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 98 | /** USB definitions */ |
| 99 | /* OpenMoko SIMtrace 2 USB vendor ID */ |
| 100 | #define BOARD_USB_VENDOR_ID USB_VENDOR_OPENMOKO |
| 101 | /* OpenMoko SIMtrace 2 USB product ID (main application/runtime mode) */ |
| 102 | #define BOARD_USB_PRODUCT_ID USB_PRODUCT_SIMTRACE2 |
| 103 | /* OpenMoko SIMtrace 2 DFU USB product ID (DFU bootloader/DFU mode) */ |
| 104 | #define BOARD_DFU_USB_PRODUCT_ID USB_PRODUCT_SIMTRACE2_DFU |
| 105 | /* USB release number (bcdDevice, shown as 0.00) */ |
| 106 | #define BOARD_USB_RELEASE 0x000 |
| 107 | /* Indicate SIMtrace is bus power in USB attributes */ |
Harald Welte | 3ecbf67 | 2017-03-03 02:10:34 +0100 | [diff] [blame] | 108 | #define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP |
| 109 | |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 110 | /** Supported modes */ |
| 111 | /* SIMtrace board supports sniffer mode */ |
Kévin Redon | 36abece | 2018-06-04 16:30:01 +0200 | [diff] [blame] | 112 | #define HAVE_SNIFFER |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 113 | /* SIMtrace board supports CCID mode */ |
Harald Welte | 5e6e8dc | 2017-11-28 20:58:06 +0100 | [diff] [blame] | 114 | #define HAVE_CCID |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 115 | /* SIMtrace board supports card emulation mode */ |
Harald Welte | 2fb5996 | 2016-02-28 12:34:26 +0100 | [diff] [blame] | 116 | #define HAVE_CARDEM |
Kévin Redon | 2c4e2af | 2018-06-06 17:02:33 +0200 | [diff] [blame] | 117 | /* SIMtrace board supports man-in-the-middle mode */ |
Harald Welte | ba2ad56 | 2017-11-28 19:49:41 +0100 | [diff] [blame] | 118 | //#define HAVE_MITM |