Kévin Redon | 93717e4 | 2018-07-08 13:26:15 +0200 | [diff] [blame] | 1 | /* ---------------------------------------------------------------------------- |
| 2 | * ATMEL Microcontroller Software Support |
| 3 | * ---------------------------------------------------------------------------- |
| 4 | * Copyright (c) 2009, Atmel Corporation |
| 5 | * |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * Redistribution and use in source and binary forms, with or without |
| 9 | * modification, are permitted provided that the following conditions are met: |
| 10 | * |
| 11 | * - Redistributions of source code must retain the above copyright notice, |
| 12 | * this list of conditions and the disclaimer below. |
| 13 | * |
| 14 | * Atmel's name may not be used to endorse or promote products derived from |
| 15 | * this software without specific prior written permission. |
| 16 | * |
| 17 | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| 20 | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
| 23 | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
| 26 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * ---------------------------------------------------------------------------- |
| 28 | */ |
| 29 | |
| 30 | /** |
| 31 | * \file |
| 32 | * |
| 33 | * Implementation of Timer Counter (TC). |
| 34 | * |
| 35 | */ |
| 36 | |
| 37 | /*------------------------------------------------------------------------------ |
| 38 | * Headers |
| 39 | *------------------------------------------------------------------------------*/ |
| 40 | |
| 41 | #include "chip.h" |
| 42 | |
| 43 | #include <assert.h> |
| 44 | |
| 45 | /*------------------------------------------------------------------------------ |
| 46 | * Global functions |
| 47 | *------------------------------------------------------------------------------*/ |
| 48 | |
| 49 | /** |
| 50 | * \brief Configures a Timer Counter Channel |
| 51 | * |
| 52 | * Configures a Timer Counter to operate in the given mode. Timer is stopped |
| 53 | * after configuration and must be restarted with TC_Start(). All the |
| 54 | * interrupts of the timer are also disabled. |
| 55 | * |
| 56 | * \param pTc Pointer to a Tc instance. |
| 57 | * \param channel Channel number. |
| 58 | * \param mode Operating mode (TC_CMR value). |
| 59 | */ |
| 60 | extern void TC_Configure( Tc *pTc, uint32_t dwChannel, uint32_t dwMode ) |
| 61 | { |
| 62 | TcChannel* pTcCh ; |
| 63 | |
| 64 | assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ; |
| 65 | pTcCh = pTc->TC_CHANNEL+dwChannel ; |
| 66 | |
| 67 | /* Disable TC clock */ |
| 68 | pTcCh->TC_CCR = TC_CCR_CLKDIS ; |
| 69 | |
| 70 | /* Disable interrupts */ |
| 71 | pTcCh->TC_IDR = 0xFFFFFFFF ; |
| 72 | |
| 73 | /* Clear status register */ |
| 74 | pTcCh->TC_SR ; |
| 75 | |
| 76 | /* Set mode */ |
| 77 | pTcCh->TC_CMR = dwMode ; |
| 78 | } |
| 79 | |
| 80 | /** |
| 81 | * \brief Reset and Start the TC Channel |
| 82 | * |
| 83 | * Enables the timer clock and performs a software reset to start the counting. |
| 84 | * |
| 85 | * \param pTc Pointer to a Tc instance. |
| 86 | * \param dwChannel Channel number. |
| 87 | */ |
| 88 | extern void TC_Start( Tc *pTc, uint32_t dwChannel ) |
| 89 | { |
| 90 | TcChannel* pTcCh ; |
| 91 | |
| 92 | assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ; |
| 93 | |
| 94 | pTcCh = pTc->TC_CHANNEL+dwChannel ; |
| 95 | pTcCh->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ; |
| 96 | } |
| 97 | |
| 98 | /** |
| 99 | * \brief Stop TC Channel |
| 100 | * |
| 101 | * Disables the timer clock, stopping the counting. |
| 102 | * |
| 103 | * \param pTc Pointer to a Tc instance. |
| 104 | * \param dwChannel Channel number. |
| 105 | */ |
| 106 | extern void TC_Stop(Tc *pTc, uint32_t dwChannel ) |
| 107 | { |
| 108 | TcChannel* pTcCh ; |
| 109 | |
| 110 | assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ; |
| 111 | |
| 112 | pTcCh = pTc->TC_CHANNEL+dwChannel ; |
| 113 | pTcCh->TC_CCR = TC_CCR_CLKDIS ; |
| 114 | } |
| 115 | |
| 116 | /** |
| 117 | * \brief Find best MCK divisor |
| 118 | * |
| 119 | * Finds the best MCK divisor given the timer frequency and MCK. The result |
| 120 | * is guaranteed to satisfy the following equation: |
| 121 | * \code |
| 122 | * (MCK / (DIV * 65536)) <= freq <= (MCK / DIV) |
| 123 | * \endcode |
| 124 | * with DIV being the highest possible value. |
| 125 | * |
| 126 | * \param dwFreq Desired timer frequency. |
| 127 | * \param dwMCk Master clock frequency. |
| 128 | * \param dwDiv Divisor value. |
| 129 | * \param dwTcClks TCCLKS field value for divisor. |
| 130 | * \param dwBoardMCK Board clock frequency. |
| 131 | * |
| 132 | * \return 1 if a proper divisor has been found, otherwise 0. |
| 133 | */ |
| 134 | extern uint32_t TC_FindMckDivisor( uint32_t dwFreq, uint32_t dwMCk, uint32_t *dwDiv, uint32_t *dwTcClks, uint32_t dwBoardMCK ) |
| 135 | { |
| 136 | const uint32_t adwDivisors[5] = { 2, 8, 32, 128, dwBoardMCK / 32768 } ; |
| 137 | |
| 138 | uint32_t dwIndex = 0 ; |
| 139 | |
| 140 | /* Satisfy lower bound */ |
| 141 | while ( dwFreq < ((dwMCk / adwDivisors[dwIndex]) / 65536) ) |
| 142 | { |
| 143 | dwIndex++ ; |
| 144 | |
| 145 | /* If no divisor can be found, return 0 */ |
| 146 | if ( dwIndex == (sizeof( adwDivisors )/sizeof( adwDivisors[0] )) ) |
| 147 | { |
| 148 | return 0 ; |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | /* Try to maximize DIV while satisfying upper bound */ |
| 153 | while ( dwIndex < 4 ) |
| 154 | { |
| 155 | |
| 156 | if ( dwFreq > (dwMCk / adwDivisors[dwIndex + 1]) ) |
| 157 | { |
| 158 | break ; |
| 159 | } |
| 160 | dwIndex++ ; |
| 161 | } |
| 162 | |
| 163 | /* Store results */ |
| 164 | if ( dwDiv ) |
| 165 | { |
| 166 | *dwDiv = adwDivisors[dwIndex] ; |
| 167 | } |
| 168 | if ( dwTcClks ) |
| 169 | { |
| 170 | *dwTcClks = dwIndex ; |
| 171 | } |
| 172 | |
| 173 | return 1 ; |
| 174 | } |
| 175 | |