Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 1 | /* SimTrace TC (Timer / Clock) support code |
| 2 | * (C) 2006 by Harald Welte <hwelte@hmw-consulting.de> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | /*------------------------------------------------------------------------------ |
| 21 | * Headers |
| 22 | *------------------------------------------------------------------------------*/ |
| 23 | #include "board.h" |
| 24 | |
| 25 | #include <string.h> |
| 26 | |
| 27 | //FIXME: |
Christina Quast | 2889fc2 | 2015-03-22 19:06:51 +0100 | [diff] [blame] | 28 | static const Pin pTC[] = {{PIO_PA4B_TCLK0, PIO_PA0B_TIOA0, PIO_PA1B_TIOB0}}; |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 29 | |
| 30 | /** Global timestamp in milliseconds since start of application */ |
| 31 | volatile uint32_t dwTimeStamp = 0; |
Christina Quast | 2889fc2 | 2015-03-22 19:06:51 +0100 | [diff] [blame] | 32 | volatile uint8_t timeout_occured = 0; |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 33 | |
| 34 | // FIXME: Do I need the function?: |
| 35 | /** |
| 36 | * \brief Handler for Sytem Tick interrupt. |
| 37 | * |
| 38 | * Process System Tick Event |
| 39 | * Increments the timestamp counter. |
| 40 | */ |
| 41 | void SysTick_Handler( void ) |
| 42 | { |
| 43 | dwTimeStamp ++; |
| 44 | |
| 45 | } |
| 46 | |
| 47 | |
| 48 | |
| 49 | void TC0_IrqHandler( void ) |
| 50 | { |
| 51 | volatile uint32_t dummy; |
| 52 | /* Clear status bit to acknowledge interrupt */ |
| 53 | dummy = TC0->TC_CHANNEL[ 0 ].TC_SR; |
| 54 | |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 55 | timeout_occured++; |
Christina Quast | 2889fc2 | 2015-03-22 19:06:51 +0100 | [diff] [blame] | 56 | // printf("++++ TC0_Irq %d\n\r", timeout_occured); |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 57 | } |
| 58 | |
| 59 | |
| 60 | void TC0_Counter_Reset( void ) |
| 61 | { |
| 62 | TC0->TC_CHANNEL[ 0 ].TC_CCR = TC_CCR_SWTRG ; |
Christina Quast | 2889fc2 | 2015-03-22 19:06:51 +0100 | [diff] [blame] | 63 | timeout_occured = 0; |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | /* == Timeouts == |
| 67 | * One symbol is about 2ms --> Timeout = BUFLEN * 2ms ? |
| 68 | * For BUFLEN = 64 that is 7.8 Hz |
| 69 | */ |
| 70 | void Timer_Init() |
| 71 | { |
| 72 | uint32_t div; |
| 73 | uint32_t tcclks; |
| 74 | |
| 75 | /** Enable peripheral clock. */ |
| 76 | PMC_EnablePeripheral(ID_TC0); |
| 77 | |
Christina Quast | 2889fc2 | 2015-03-22 19:06:51 +0100 | [diff] [blame] | 78 | /** Configure TC for a $ARG1 Hz frequency and trigger on RC compare. */ |
Christina Quast | 4bcc023 | 2015-03-24 21:59:32 +0100 | [diff] [blame] | 79 | TC_FindMckDivisor( 8, BOARD_MCK, &div, &tcclks, BOARD_MCK ); |
Christina Quast | ca39e16 | 2015-04-06 19:19:16 +0200 | [diff] [blame] | 80 | TRACE_INFO("Chosen div, tcclk: %d, %d\r\n", div, tcclks); |
Christina Quast | 531d10b | 2015-03-19 19:27:04 +0100 | [diff] [blame] | 81 | /* TC_CMR: TC Channel Mode Register: Capture Mode */ |
| 82 | /* CPCTRG: RC Compare resets the counter and starts the counter clock. */ |
| 83 | TC_Configure( TC0, 0, tcclks | TC_CMR_CPCTRG ); |
| 84 | /* TC_RC: TC Register C: contains the Register C value in real time. */ |
| 85 | TC0->TC_CHANNEL[ 0 ].TC_RC = ( BOARD_MCK / div ) / 4; |
| 86 | |
| 87 | /* Configure and enable interrupt on RC compare */ |
| 88 | NVIC_EnableIRQ( (IRQn_Type)ID_TC0 ); |
| 89 | |
| 90 | TC0->TC_CHANNEL[ 0 ].TC_IER = TC_IER_CPCS; /* CPCS: RC Compare */ |
| 91 | TC_Start( TC0, 0 ); |
| 92 | |
| 93 | return; |
| 94 | |
| 95 | /*** From here on we have code based on old simtrace code */ |
| 96 | |
| 97 | /* Cfg PA4(TCLK0), PA0(TIOA0), PA1(TIOB0) */ |
| 98 | |
| 99 | PIO_Configure( pTC, PIO_LISTSIZE( pTC ) ); |
| 100 | |
| 101 | |
| 102 | |
| 103 | // FIXME: |
| 104 | // PIO_ConfigureIt( &pinPhoneRST, ISR_PhoneRST ) ; |
| 105 | // PIO_EnableIt( &pinPhoneRST ) ; |
| 106 | |
| 107 | /* enable interrupts for Compare-C and External Trigger */ |
| 108 | TC0->TC_CHANNEL[0].TC_IER = TC_IER_CPCS | TC_IER_ETRGS; |
| 109 | |
| 110 | //... |
| 111 | /* Enable master clock for TC0 */ |
| 112 | // TC0->TC_CHANNEL[0].TC_CCR |
| 113 | |
| 114 | /* Reset to start timers */ |
| 115 | //... |
| 116 | } |