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Christina Quastb0a05702014-11-28 10:27:32 +01001/* ----------------------------------------------------------------------------
2 * ATMEL Microcontroller Software Support
3 * ----------------------------------------------------------------------------
4 * Copyright (c) 2009, Atmel Corporation
5 *
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * - Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the disclaimer below.
13 *
14 * Atmel's name may not be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * ----------------------------------------------------------------------------
28 */
29
30/**
31 * \file
32 *
33 * Provides the low-level initialization function that called on chip startup.
34 */
35
36/*----------------------------------------------------------------------------
37 * Headers
38 *----------------------------------------------------------------------------*/
39
40#include "board.h"
Christina Quastb0a05702014-11-28 10:27:32 +010041
42/*----------------------------------------------------------------------------
43 * Local definitions
44 *----------------------------------------------------------------------------*/
45
Christina Quastb0a05702014-11-28 10:27:32 +010046#if (BOARD_MCK == 48000000)
Harald Weltea02b6412016-08-21 18:32:12 +020047#ifndef qmod
48/* Clock settings at 48MHz for 18 MHz crystal */
Christina Quastb0a05702014-11-28 10:27:32 +010049#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
50#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
Christina Quast530f2082014-12-05 13:03:59 +010051 | CKGR_PLLAR_MULA(0xc) \
Christina Quastb0a05702014-11-28 10:27:32 +010052 | CKGR_PLLAR_PLLACOUNT(0x1) \
Christina Quast530f2082014-12-05 13:03:59 +010053 | CKGR_PLLAR_DIVA(0x5))
54#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
Harald Weltea02b6412016-08-21 18:32:12 +020055#else /* qmod */
Harald Welte78611322017-01-12 11:07:04 +010056/* QMod has 12 MHz clock, so multply by 8 (96 MHz) and divide by 2 */
Harald Weltea02b6412016-08-21 18:32:12 +020057#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
Harald Welte78611322017-01-12 11:07:04 +010058 | CKGR_PLLAR_MULA(8-1) \
Harald Weltea02b6412016-08-21 18:32:12 +020059 | CKGR_PLLAR_PLLACOUNT(0x1) \
Harald Welte78611322017-01-12 11:07:04 +010060 | CKGR_PLLAR_DIVA(2))
Harald Weltea02b6412016-08-21 18:32:12 +020061#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
62#endif
Christina Quast530f2082014-12-05 13:03:59 +010063/* Clock settings at 64MHz for 18 MHz crystal */
Christina Quastb0a05702014-11-28 10:27:32 +010064#elif (BOARD_MCK == 64000000)
65#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
66#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
Christina Quast530f2082014-12-05 13:03:59 +010067 | CKGR_PLLAR_MULA(0x06) \
Christina Quastb0a05702014-11-28 10:27:32 +010068 | CKGR_PLLAR_PLLACOUNT(0x1) \
Christina Quast530f2082014-12-05 13:03:59 +010069 | CKGR_PLLAR_DIVA(0x2))
Christina Quastb0a05702014-11-28 10:27:32 +010070#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
71
72#else
73 #error "No settings for current BOARD_MCK."
74#endif
75
76/* Define clock timeout */
77#define CLOCK_TIMEOUT 0xFFFFFFFF
78
79/*----------------------------------------------------------------------------
80 * Exported functions
81 *----------------------------------------------------------------------------*/
82
83/**
84 * \brief Performs the low-level initialization of the chip.
85 * This includes EFC and master clock configuration.
86 * It also enable a low level on the pin NRST triggers a user reset.
87 */
Christina Quast8be71e42014-12-02 13:06:01 +010088extern WEAK void LowLevelInit( void )
Christina Quastb0a05702014-11-28 10:27:32 +010089{
90 uint32_t timeout = 0;
91
Harald Welte372f4cc2016-03-16 22:17:39 +010092 /* enable both LED and green LED */
93 PIOA->PIO_PER |= LED_RED | LED_GREEN;
94 PIOA->PIO_OER |= LED_RED | LED_GREEN;
95 PIOA->PIO_CODR |= LED_RED | LED_GREEN;
Harald Welte7abdb512016-03-03 17:48:32 +010096
Christina Quastb0a05702014-11-28 10:27:32 +010097 /* Set 3 FWS for Embedded Flash Access */
98 EFC->EEFC_FMR = EEFC_FMR_FWS(3);
99
100 /* Select external slow clock */
Christina Quast8be71e42014-12-02 13:06:01 +0100101/* if ((SUPC->SUPC_SR & SUPC_SR_OSCSEL) != SUPC_SR_OSCSEL_CRYST)
Christina Quastb0a05702014-11-28 10:27:32 +0100102 {
103 SUPC->SUPC_CR = (uint32_t)(SUPC_CR_XTALSEL_CRYSTAL_SEL | SUPC_CR_KEY(0xA5));
104 timeout = 0;
105 while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL_CRYST) );
106 }
Christina Quast8be71e42014-12-02 13:06:01 +0100107*/
Christina Quastb0a05702014-11-28 10:27:32 +0100108
Harald Weltea02b6412016-08-21 18:32:12 +0200109#ifndef qmod
Christina Quastb0a05702014-11-28 10:27:32 +0100110 /* Initialize main oscillator */
Harald Welte5e004002016-03-16 20:40:19 +0100111 if ( !(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) )
Christina Quastb0a05702014-11-28 10:27:32 +0100112 {
113 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN;
114 timeout = 0;
115 while (!(PMC->PMC_SR & PMC_SR_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT));
Harald Welte5e004002016-03-16 20:40:19 +0100116 }
Christina Quastb0a05702014-11-28 10:27:32 +0100117
118 /* Switch to 3-20MHz Xtal oscillator */
Harald Welte5e004002016-03-16 20:40:19 +0100119 PIOB->PIO_PDR = (1 << 8) | (1 << 9);
120 PIOB->PIO_PUDR = (1 << 8) | (1 << 9);
121 PIOB->PIO_PPDDR = (1 << 8) | (1 << 9);
Christina Quastb0a05702014-11-28 10:27:32 +0100122 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
Harald Welte46783882016-02-29 19:45:59 +0100123 /* wait for Main XTAL oscillator stabilization */
Christina Quastb0a05702014-11-28 10:27:32 +0100124 timeout = 0;
125 while (!(PMC->PMC_SR & PMC_SR_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
Harald Weltea02b6412016-08-21 18:32:12 +0200126#else
127 /* QMOD has external 12MHz clock source */
128 PIOB->PIO_PDR = (1 << 9);
129 PIOB->PIO_PUDR = (1 << 9);
130 PIOB->PIO_PPDDR = (1 << 9);
131 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTBY| CKGR_MOR_MOSCSEL;
132#endif
Harald Welte46783882016-02-29 19:45:59 +0100133
Harald Welte372f4cc2016-03-16 22:17:39 +0100134 /* disable the red LED after main clock initialization */
135 PIOA->PIO_SODR = LED_RED;
Harald Welte7abdb512016-03-03 17:48:32 +0100136
Harald Welte46783882016-02-29 19:45:59 +0100137 /* "switch" to main clock as master clock source (should already be the case */
Christina Quastb0a05702014-11-28 10:27:32 +0100138 PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
Harald Welte46783882016-02-29 19:45:59 +0100139 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100140 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
141
142 /* Initialize PLLA */
143 PMC->CKGR_PLLAR = BOARD_PLLAR;
Harald Welte46783882016-02-29 19:45:59 +0100144 /* Wait for PLLA to lock */
Christina Quastb0a05702014-11-28 10:27:32 +0100145 timeout = 0;
146 while (!(PMC->PMC_SR & PMC_SR_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
147
Harald Welte46783882016-02-29 19:45:59 +0100148 /* Switch to main clock (again ?!?) */
Christina Quastb0a05702014-11-28 10:27:32 +0100149 PMC->PMC_MCKR = (BOARD_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
Harald Welte46783882016-02-29 19:45:59 +0100150 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100151 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
152
Harald Welte46783882016-02-29 19:45:59 +0100153 /* switch to PLLA as master clock source */
Christina Quastb0a05702014-11-28 10:27:32 +0100154 PMC->PMC_MCKR = BOARD_MCKR ;
Harald Welte46783882016-02-29 19:45:59 +0100155 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100156 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
157}