Christina Quast | 53b2105 | 2014-12-09 15:34:35 +0100 | [diff] [blame] | 1 | /* ---------------------------------------------------------------------------- |
| 2 | * ATMEL Microcontroller Software Support |
| 3 | * ---------------------------------------------------------------------------- |
| 4 | * Copyright (c) 2009, Atmel Corporation |
| 5 | * |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * Redistribution and use in source and binary forms, with or without |
| 9 | * modification, are permitted provided that the following conditions are met: |
| 10 | * |
| 11 | * - Redistributions of source code must retain the above copyright notice, |
| 12 | * this list of conditions and the disclaimer below. |
| 13 | * |
| 14 | * Atmel's name may not be used to endorse or promote products derived from |
| 15 | * this software without specific prior written permission. |
| 16 | * |
| 17 | * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| 20 | * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, |
| 23 | * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 24 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 25 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
| 26 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | * ---------------------------------------------------------------------------- |
| 28 | */ |
| 29 | |
| 30 | /** |
| 31 | * \file |
| 32 | * |
| 33 | * \section Purpose |
| 34 | * |
| 35 | * Interface for configuration the Analog-to-Digital Converter (DACC) peripheral. |
| 36 | * |
| 37 | * \section Usage |
| 38 | * |
| 39 | * -# Configurate the pins for DACC |
| 40 | * -# Initialize the DACC with DACC_Initialize(). |
| 41 | * -# Select the active channel using DACC_EnableChannel() |
| 42 | * -# Start the conversion with DACC_StartConversion() |
| 43 | * -# Wait the end of the conversion by polling status with DACC_GetStatus() |
| 44 | * -# Finally, get the converted data using DACC_GetConvertedData() |
| 45 | * |
| 46 | */ |
| 47 | #ifndef _DACC_ |
| 48 | #define _DACC_ |
| 49 | |
| 50 | /*---------------------------------------------------------------------------- |
| 51 | * Headers |
| 52 | *----------------------------------------------------------------------------*/ |
| 53 | #include "chip.h" |
| 54 | |
| 55 | #include <stdint.h> |
| 56 | #include <assert.h> |
| 57 | |
| 58 | /*------------------------------------------------------------------------------ |
| 59 | * Definitions |
| 60 | *------------------------------------------------------------------------------*/ |
| 61 | #define DACC_CHANNEL_0 0 |
| 62 | #define DACC_CHANNEL_1 1 |
| 63 | |
| 64 | #ifdef __cplusplus |
| 65 | extern "C" { |
| 66 | #endif |
| 67 | |
| 68 | /*------------------------------------------------------------------------------ |
| 69 | * Macros function of register access |
| 70 | *------------------------------------------------------------------------------*/ |
| 71 | #define DACC_CfgModeReg(pDACC, mode) { \ |
| 72 | (pDACC)->DACC_MR = (mode);\ |
| 73 | } |
| 74 | |
| 75 | #define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR) |
| 76 | |
| 77 | #define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START) |
| 78 | |
| 79 | #define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST) |
| 80 | |
| 81 | #define DACC_EnableChannel(pDACC, channel) {\ |
| 82 | (pDACC)->DACC_CHER = (1 << (channel));\ |
| 83 | } |
| 84 | |
| 85 | #define DACC_DisableChannel(pDACC, channel) {\ |
| 86 | (pDACC)->DACC_CHDR = (1 << (channel));\ |
| 87 | } |
| 88 | |
| 89 | #define DACC_EnableIt(pDACC, mode) {\ |
| 90 | assert( ((mode)&0xFFF00000)== 0 ) ;\ |
| 91 | (pDACC)->DACC_IER = (mode);\ |
| 92 | } |
| 93 | |
| 94 | #define DACC_DisableIt(pDACC, mode) {\ |
| 95 | assert( ((mode)&0xFFF00000)== 0 ) ;\ |
| 96 | (pDACC)->DACC_IDR = (mode);\ |
| 97 | } |
| 98 | |
| 99 | #define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY) |
| 100 | |
| 101 | #define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR) |
| 102 | |
| 103 | #define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR) |
| 104 | |
| 105 | #define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR) |
| 106 | |
| 107 | #define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR) |
| 108 | |
| 109 | #define DACC_CfgAnalogCtrlReg(pDACC,mode) {\ |
| 110 | assert( ((mode) & 0xFFFCFF3C)==0 ) ;\ |
| 111 | (pDACC)->DACC_ACR = (mode);\ |
| 112 | } |
| 113 | |
| 114 | #define DACC_CfgExtModeReg(pDACC, extmode) {\ |
| 115 | assert( ((extmode) & 0xFF00FFFE)==0 ) ;\ |
| 116 | (pDACC)->DACC_EMR = (extmode);\ |
| 117 | } |
| 118 | |
| 119 | #define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR) |
| 120 | |
| 121 | /*------------------------------------------------------------------------------ |
| 122 | * Exported functions |
| 123 | *------------------------------------------------------------------------------*/ |
| 124 | extern void DACC_Initialize( Dacc* pDACC, |
| 125 | uint8_t idDACC, |
| 126 | uint8_t trgEn, |
| 127 | uint8_t trgSel, |
| 128 | uint8_t word, |
| 129 | uint8_t sleepMode, |
| 130 | uint32_t mck, |
| 131 | uint8_t refresh,/*refresh period*/ |
| 132 | uint8_t user_sel,/*user channel selection*/ |
| 133 | uint32_t tag_mode,/*using tag for channel number*/ |
| 134 | uint32_t startup |
| 135 | ); |
| 136 | |
| 137 | |
| 138 | extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData ) ; |
| 139 | |
| 140 | extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t* pwBuffer, uint32_t dwSize ) ; |
| 141 | |
| 142 | #ifdef __cplusplus |
| 143 | } |
| 144 | #endif |
| 145 | |
| 146 | #endif /* #ifndef _DACC_ */ |