blob: 42a679f14c286483e753bc63daa0ea7133ee37d6 [file] [log] [blame]
Christina Quastb0a05702014-11-28 10:27:32 +01001/* ----------------------------------------------------------------------------
2 * ATMEL Microcontroller Software Support
3 * ----------------------------------------------------------------------------
4 * Copyright (c) 2009, Atmel Corporation
5 *
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * - Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the disclaimer below.
13 *
14 * Atmel's name may not be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * ----------------------------------------------------------------------------
28 */
29
30/**
31 * \file
32 *
33 * Provides the low-level initialization function that called on chip startup.
34 */
35
36/*----------------------------------------------------------------------------
37 * Headers
38 *----------------------------------------------------------------------------*/
39
40#include "board.h"
Christina Quastb0a05702014-11-28 10:27:32 +010041
42/*----------------------------------------------------------------------------
43 * Local definitions
44 *----------------------------------------------------------------------------*/
45
Christina Quastb0a05702014-11-28 10:27:32 +010046#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
Christina Quast530f2082014-12-05 13:03:59 +010047#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
Harald Weltefb3f3082017-01-12 18:16:23 +010048
49#if (BOARD_MCK == 48000000)
50#if (BOARD_MAINOSC == 18432000)
51/* Clock settings at 48MHz for 18 MHz crystal */
52#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
53 | CKGR_PLLAR_MULA(13-1) \
54 | CKGR_PLLAR_PLLACOUNT(0x1) \
55 | CKGR_PLLAR_DIVA(5))
56#elif (BOARD_MAINOSC == 12000000)
Harald Welte78611322017-01-12 11:07:04 +010057/* QMod has 12 MHz clock, so multply by 8 (96 MHz) and divide by 2 */
Harald Weltea02b6412016-08-21 18:32:12 +020058#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
Harald Welte78611322017-01-12 11:07:04 +010059 | CKGR_PLLAR_MULA(8-1) \
Harald Weltea02b6412016-08-21 18:32:12 +020060 | CKGR_PLLAR_PLLACOUNT(0x1) \
Harald Welte78611322017-01-12 11:07:04 +010061 | CKGR_PLLAR_DIVA(2))
Christina Quastb0a05702014-11-28 10:27:32 +010062#else
Harald Weltefb3f3082017-01-12 18:16:23 +010063#error "Please define PLLA config for your MAINOSC frequency"
64#endif /* MAINOSC */
65#elif (BOARD_MCK == 64000000)
66#if (BOARD_MAINOSC == 18432000)
67/* Clock settings at 64MHz for 18 MHz crystal: 64.512 MHz */
68#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
69 | CKGR_PLLAR_MULA(7-1) \
70 | CKGR_PLLAR_PLLACOUNT(0x1) \
71 | CKGR_PLLAR_DIVA(2))
72#elif (BOARD_MAINOSC == 12000000)
73/* QMod has 12 MHz clock, so multply by 10 / div by 2: 60 MHz */
74#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
75 | CKGR_PLLAR_MULA(10-1) \
76 | CKGR_PLLAR_PLLACOUNT(0x1) \
77 | CKGR_PLLAR_DIVA(2))
78#error "Please define PLLA config for your MAINOSC frequency"
79#endif /* MAINOSC */
80#else
81 #error "No PLL settings for current BOARD_MCK."
Christina Quastb0a05702014-11-28 10:27:32 +010082#endif
83
Harald Welte0395bd12017-02-28 01:28:56 +010084#if (BOARD_MAINOSC == 12000000)
85#define PLLB_CFG (CKGR_PLLBR_DIVB(2)|CKGR_PLLBR_MULB(8-1)|CKGR_PLLBR_PLLBCOUNT_Msk)
86#elif (BOARD_MAINOSC == 18432000)
87#define PLLB_CFG (CKGR_PLLBR_DIVB(5)|CKGR_PLLBR_MULB(13-1)|CKGR_PLLBR_PLLBCOUNT_Msk)
88#else
89#error "Please configure PLLB for your MAINOSC freq"
90#endif
91
Christina Quastb0a05702014-11-28 10:27:32 +010092/* Define clock timeout */
93#define CLOCK_TIMEOUT 0xFFFFFFFF
94
Harald Welte0395bd12017-02-28 01:28:56 +010095/**
96 * \brief Configure 48MHz Clock for USB
97 */
98static void _ConfigureUsbClock(void)
99{
100 /* Enable PLLB for USB */
101 PMC->CKGR_PLLBR = PLLB_CFG;
102 while ((PMC->PMC_SR & PMC_SR_LOCKB) == 0) ;
103
104 /* USB Clock uses PLLB */
105 PMC->PMC_USB = PMC_USB_USBDIV(0) /* /1 (no divider) */
106 | PMC_USB_USBS; /* PLLB */
107}
108
Christina Quastb0a05702014-11-28 10:27:32 +0100109/*----------------------------------------------------------------------------
110 * Exported functions
111 *----------------------------------------------------------------------------*/
112
113/**
114 * \brief Performs the low-level initialization of the chip.
115 * This includes EFC and master clock configuration.
116 * It also enable a low level on the pin NRST triggers a user reset.
117 */
Christina Quast8be71e42014-12-02 13:06:01 +0100118extern WEAK void LowLevelInit( void )
Christina Quastb0a05702014-11-28 10:27:32 +0100119{
120 uint32_t timeout = 0;
121
Harald Welte372f4cc2016-03-16 22:17:39 +0100122 /* enable both LED and green LED */
123 PIOA->PIO_PER |= LED_RED | LED_GREEN;
124 PIOA->PIO_OER |= LED_RED | LED_GREEN;
125 PIOA->PIO_CODR |= LED_RED | LED_GREEN;
Harald Welte7abdb512016-03-03 17:48:32 +0100126
Christina Quastb0a05702014-11-28 10:27:32 +0100127 /* Set 3 FWS for Embedded Flash Access */
128 EFC->EEFC_FMR = EEFC_FMR_FWS(3);
129
130 /* Select external slow clock */
Christina Quast8be71e42014-12-02 13:06:01 +0100131/* if ((SUPC->SUPC_SR & SUPC_SR_OSCSEL) != SUPC_SR_OSCSEL_CRYST)
Christina Quastb0a05702014-11-28 10:27:32 +0100132 {
133 SUPC->SUPC_CR = (uint32_t)(SUPC_CR_XTALSEL_CRYSTAL_SEL | SUPC_CR_KEY(0xA5));
134 timeout = 0;
135 while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL_CRYST) );
136 }
Christina Quast8be71e42014-12-02 13:06:01 +0100137*/
Christina Quastb0a05702014-11-28 10:27:32 +0100138
Harald Weltea02b6412016-08-21 18:32:12 +0200139#ifndef qmod
Christina Quastb0a05702014-11-28 10:27:32 +0100140 /* Initialize main oscillator */
Harald Welte5e004002016-03-16 20:40:19 +0100141 if ( !(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) )
Christina Quastb0a05702014-11-28 10:27:32 +0100142 {
143 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN;
144 timeout = 0;
145 while (!(PMC->PMC_SR & PMC_SR_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT));
Harald Welte5e004002016-03-16 20:40:19 +0100146 }
Christina Quastb0a05702014-11-28 10:27:32 +0100147
148 /* Switch to 3-20MHz Xtal oscillator */
Harald Welte5e004002016-03-16 20:40:19 +0100149 PIOB->PIO_PDR = (1 << 8) | (1 << 9);
150 PIOB->PIO_PUDR = (1 << 8) | (1 << 9);
151 PIOB->PIO_PPDDR = (1 << 8) | (1 << 9);
Christina Quastb0a05702014-11-28 10:27:32 +0100152 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
Harald Welte46783882016-02-29 19:45:59 +0100153 /* wait for Main XTAL oscillator stabilization */
Christina Quastb0a05702014-11-28 10:27:32 +0100154 timeout = 0;
155 while (!(PMC->PMC_SR & PMC_SR_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
Harald Weltea02b6412016-08-21 18:32:12 +0200156#else
157 /* QMOD has external 12MHz clock source */
158 PIOB->PIO_PDR = (1 << 9);
159 PIOB->PIO_PUDR = (1 << 9);
160 PIOB->PIO_PPDDR = (1 << 9);
161 PMC->CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTBY| CKGR_MOR_MOSCSEL;
162#endif
Harald Welte46783882016-02-29 19:45:59 +0100163
Harald Welte372f4cc2016-03-16 22:17:39 +0100164 /* disable the red LED after main clock initialization */
165 PIOA->PIO_SODR = LED_RED;
Harald Welte7abdb512016-03-03 17:48:32 +0100166
Harald Welte46783882016-02-29 19:45:59 +0100167 /* "switch" to main clock as master clock source (should already be the case */
Christina Quastb0a05702014-11-28 10:27:32 +0100168 PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
Harald Welte46783882016-02-29 19:45:59 +0100169 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100170 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
171
172 /* Initialize PLLA */
173 PMC->CKGR_PLLAR = BOARD_PLLAR;
Harald Welte46783882016-02-29 19:45:59 +0100174 /* Wait for PLLA to lock */
Christina Quastb0a05702014-11-28 10:27:32 +0100175 timeout = 0;
176 while (!(PMC->PMC_SR & PMC_SR_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
177
Harald Welte46783882016-02-29 19:45:59 +0100178 /* Switch to main clock (again ?!?) */
Christina Quastb0a05702014-11-28 10:27:32 +0100179 PMC->PMC_MCKR = (BOARD_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
Harald Welte46783882016-02-29 19:45:59 +0100180 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100181 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
182
Harald Welte46783882016-02-29 19:45:59 +0100183 /* switch to PLLA as master clock source */
Christina Quastb0a05702014-11-28 10:27:32 +0100184 PMC->PMC_MCKR = BOARD_MCKR ;
Harald Welte46783882016-02-29 19:45:59 +0100185 /* wait for master clock to be ready */
Christina Quastb0a05702014-11-28 10:27:32 +0100186 for ( timeout = 0; !(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT) ; );
Harald Welte83207e02017-02-03 22:16:47 +0100187
188 /* Configure SysTick for 1ms */
189 SysTick_Config(BOARD_MCK/1000);
Harald Welte0395bd12017-02-28 01:28:56 +0100190
191 _ConfigureUsbClock();
Harald Welte83207e02017-02-03 22:16:47 +0100192}
193
194/* SysTick based delay function */
195
196volatile uint32_t jiffies;
197
198/* Interrupt handler for SysTick interrupt */
199void SysTick_Handler(void)
200{
201 jiffies++;
202}
203
204void mdelay(unsigned int msecs)
205{
206 uint32_t jiffies_start = jiffies;
207 do {
208 } while ((jiffies - jiffies_start) < msecs);
Christina Quastb0a05702014-11-28 10:27:32 +0100209}