dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008, 2009, 2010 Free Software Foundation, Inc. |
| 3 | * |
| 4 | * This software is distributed under the terms of the GNU Public License. |
| 5 | * See the COPYING file in the main directory for details. |
| 6 | * |
| 7 | * This use of this software may be subject to additional restrictions. |
| 8 | * See the LEGAL file in the main directory for details. |
| 9 | |
| 10 | This program is free software: you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation, either version 3 of the License, or |
| 13 | (at your option) any later version. |
| 14 | |
| 15 | This program is distributed in the hope that it will be useful, |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | GNU General Public License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License |
| 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 22 | */ |
| 23 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 24 | #include <stdio.h> |
| 25 | #include "Transceiver.h" |
| 26 | #include <Logger.h> |
| 27 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 28 | extern "C" { |
| 29 | #include "sch.h" |
| 30 | } |
| 31 | |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 32 | #ifdef HAVE_CONFIG_H |
| 33 | #include "config.h" |
| 34 | #endif |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 35 | |
Alexander Chemeris | d734e2d | 2013-06-16 14:30:58 +0400 | [diff] [blame] | 36 | using namespace GSM; |
| 37 | |
kurtis.heimerl | ec842de | 2012-11-23 08:37:32 +0000 | [diff] [blame] | 38 | #define USB_LATENCY_INTRVL 10,0 |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 39 | |
| 40 | #if USE_UHD |
kurtis.heimerl | ec842de | 2012-11-23 08:37:32 +0000 | [diff] [blame] | 41 | # define USB_LATENCY_MIN 6,7 |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 42 | #else |
kurtis.heimerl | ec842de | 2012-11-23 08:37:32 +0000 | [diff] [blame] | 43 | # define USB_LATENCY_MIN 1,1 |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 44 | #endif |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 45 | |
Tom Tsou | 774a063 | 2014-10-31 13:18:43 -0700 | [diff] [blame] | 46 | /* Clock indication interval in frames */ |
| 47 | #define CLK_IND_INTERVAL 100 |
| 48 | |
Thomas Tsou | fa3a787 | 2013-10-17 21:23:34 -0400 | [diff] [blame] | 49 | /* Number of running values use in noise average */ |
| 50 | #define NOISE_CNT 20 |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 51 | #define FREQ_CNT 20 |
ttsou | e8dde02 | 2012-12-06 15:43:55 +0000 | [diff] [blame] | 52 | |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 53 | TransceiverState::TransceiverState() |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 54 | : mRetrans(false), mNoiseLev(0.0), |
| 55 | mNoises(NOISE_CNT), mFreqOffsets(FREQ_CNT), mode(Transceiver::TRX_MODE_OFF) |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 56 | { |
| 57 | for (int i = 0; i < 8; i++) { |
| 58 | chanType[i] = Transceiver::NONE; |
| 59 | fillerModulus[i] = 26; |
| 60 | chanResponse[i] = NULL; |
| 61 | DFEForward[i] = NULL; |
| 62 | DFEFeedback[i] = NULL; |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 63 | prevFrame[i] = NULL; |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 64 | |
| 65 | for (int n = 0; n < 102; n++) |
| 66 | fillerTable[n][i] = NULL; |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | TransceiverState::~TransceiverState() |
| 71 | { |
| 72 | for (int i = 0; i < 8; i++) { |
| 73 | delete chanResponse[i]; |
| 74 | delete DFEForward[i]; |
| 75 | delete DFEFeedback[i]; |
| 76 | |
| 77 | for (int n = 0; n < 102; n++) |
| 78 | delete fillerTable[n][i]; |
| 79 | } |
| 80 | } |
| 81 | |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 82 | void TransceiverState::init(size_t slot, signalVector *burst, bool fill) |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 83 | { |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 84 | signalVector *filler; |
| 85 | |
| 86 | for (int i = 0; i < 102; i++) { |
| 87 | if (fill) |
| 88 | filler = new signalVector(*burst); |
| 89 | else |
| 90 | filler = new signalVector(burst->size()); |
| 91 | |
| 92 | fillerTable[i][slot] = filler; |
| 93 | } |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 94 | } |
| 95 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 96 | Transceiver::Transceiver(int wBasePort, |
| 97 | const char *TRXAddress, |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 98 | size_t wSPS, size_t wChans, |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 99 | GSM::Time wTransmitLatency, |
| 100 | RadioInterface *wRadioInterface) |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 101 | : mBasePort(wBasePort), mAddr(TRXAddress), |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 102 | mTransmitLatency(wTransmitLatency), mClockSocket(NULL), |
| 103 | mRadioInterface(wRadioInterface), mSPSTx(wSPS), mSPSRx(1), mChans(wChans), |
Thomas Tsou | e287598 | 2014-10-06 10:38:43 -0700 | [diff] [blame] | 104 | mOn(false), mTxFreq(0.0), mRxFreq(0.0), mPower(-10), mMaxExpectedDelay(0), |
| 105 | mBSIC(-1) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 106 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 107 | GSM::Time startTime(random() % gHyperframe,0); |
| 108 | |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 109 | mLowerLoopThread = new Thread(32768); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 110 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 111 | mTransmitDeadlineClock = startTime; |
| 112 | mLastClockUpdateTime = startTime; |
| 113 | mLatencyUpdateTime = startTime; |
| 114 | mRadioInterface->getClock()->set(startTime); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 115 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 116 | txFullScale = mRadioInterface->fullScaleInputValue(); |
| 117 | rxFullScale = mRadioInterface->fullScaleOutputValue(); |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 118 | |
| 119 | for (int i = 0; i < 8; i++) |
| 120 | mRxSlotMask[i] = 0; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | Transceiver::~Transceiver() |
| 124 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 125 | sigProcLibDestroy(); |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 126 | |
| 127 | delete mClockSocket; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 128 | |
| 129 | for (size_t i = 0; i < mChans; i++) { |
| 130 | mTxPriorityQueues[i].clear(); |
| 131 | delete mCtrlSockets[i]; |
| 132 | delete mDataSockets[i]; |
| 133 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 134 | } |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 135 | |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 136 | bool Transceiver::init(bool filler) |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 137 | { |
Thomas Tsou | e1ce925 | 2013-11-13 22:40:44 -0500 | [diff] [blame] | 138 | int d_srcport, d_dstport, c_srcport, c_dstport; |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 139 | signalVector *burst; |
| 140 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 141 | if (!mChans) { |
| 142 | LOG(ALERT) << "No channels assigned"; |
| 143 | return false; |
| 144 | } |
| 145 | |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 146 | if (!sigProcLibSetup(mSPSTx)) { |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 147 | LOG(ALERT) << "Failed to initialize signal processing library"; |
| 148 | return false; |
| 149 | } |
| 150 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 151 | mDataSockets.resize(mChans); |
| 152 | mCtrlSockets.resize(mChans); |
| 153 | |
| 154 | mControlServiceLoopThreads.resize(mChans); |
| 155 | mTxPriorityQueueServiceLoopThreads.resize(mChans); |
| 156 | mRxServiceLoopThreads.resize(mChans); |
| 157 | |
| 158 | mTxPriorityQueues.resize(mChans); |
| 159 | mReceiveFIFO.resize(mChans); |
| 160 | mStates.resize(mChans); |
| 161 | |
Thomas Tsou | ccb73e1 | 2014-04-15 17:41:28 -0400 | [diff] [blame] | 162 | /* Filler table retransmissions - support only on channel 0 */ |
| 163 | if (filler) |
| 164 | mStates[0].mRetrans = true; |
| 165 | |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 166 | mClockSocket = new UDPSocket(mBasePort, mAddr.c_str(), mBasePort + 100); |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 167 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 168 | for (size_t i = 0; i < mChans; i++) { |
Thomas Tsou | e1ce925 | 2013-11-13 22:40:44 -0500 | [diff] [blame] | 169 | c_srcport = mBasePort + 2 * i + 1; |
| 170 | c_dstport = mBasePort + 2 * i + 101; |
| 171 | d_srcport = mBasePort + 2 * i + 2; |
| 172 | d_dstport = mBasePort + 2 * i + 102; |
| 173 | |
| 174 | mCtrlSockets[i] = new UDPSocket(c_srcport, mAddr.c_str(), c_dstport); |
| 175 | mDataSockets[i] = new UDPSocket(d_srcport, mAddr.c_str(), d_dstport); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 176 | } |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 177 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 178 | for (size_t i = 0; i < mChans; i++) { |
| 179 | mControlServiceLoopThreads[i] = new Thread(32768); |
| 180 | mTxPriorityQueueServiceLoopThreads[i] = new Thread(32768); |
| 181 | mRxServiceLoopThreads[i] = new Thread(32768); |
| 182 | |
| 183 | for (size_t n = 0; n < 8; n++) { |
| 184 | burst = modulateBurst(gDummyBurst, 8 + (n % 4 == 0), mSPSTx); |
| 185 | scaleVector(*burst, txFullScale); |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 186 | mStates[i].init(n, burst, filler && !i); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 187 | delete burst; |
| 188 | } |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 189 | } |
| 190 | |
| 191 | return true; |
| 192 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 193 | |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 194 | void Transceiver::addRadioVector(size_t chan, BitVector &bits, |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 195 | int RSSI, GSM::Time &wTime) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 196 | { |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 197 | signalVector *burst; |
| 198 | radioVector *radio_burst; |
| 199 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 200 | if (chan >= mTxPriorityQueues.size()) { |
| 201 | LOG(ALERT) << "Invalid channel " << chan; |
| 202 | return; |
| 203 | } |
| 204 | |
Thomas Tsou | 2d0c00b | 2013-11-14 15:28:23 -0500 | [diff] [blame] | 205 | if (wTime.TN() > 7) { |
| 206 | LOG(ALERT) << "Received burst with invalid slot " << wTime.TN(); |
| 207 | return; |
| 208 | } |
| 209 | |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 210 | if (mStates[0].mode != TRX_MODE_BTS) |
| 211 | return; |
| 212 | |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 213 | burst = modulateBurst(bits, 8 + (wTime.TN() % 4 == 0), mSPSTx); |
| 214 | scaleVector(*burst, txFullScale * pow(10, -RSSI / 10)); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 215 | |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 216 | radio_burst = new radioVector(wTime, burst); |
| 217 | |
| 218 | mTxPriorityQueues[chan].write(radio_burst); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 219 | } |
| 220 | |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 221 | void Transceiver::updateFillerTable(size_t chan, radioVector *burst) |
| 222 | { |
| 223 | int TN, modFN; |
| 224 | TransceiverState *state = &mStates[chan]; |
| 225 | |
| 226 | TN = burst->getTime().TN(); |
| 227 | modFN = burst->getTime().FN() % state->fillerModulus[TN]; |
| 228 | |
| 229 | delete state->fillerTable[modFN][TN]; |
| 230 | state->fillerTable[modFN][TN] = burst->getVector(); |
| 231 | burst->setVector(NULL); |
| 232 | } |
| 233 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 234 | void Transceiver::pushRadioVector(GSM::Time &nowTime) |
| 235 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 236 | int TN, modFN; |
| 237 | radioVector *burst; |
| 238 | TransceiverState *state; |
| 239 | std::vector<signalVector *> bursts(mChans); |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 240 | std::vector<bool> zeros(mChans, false); |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 241 | std::vector<bool> filler(mChans, true); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 242 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 243 | for (size_t i = 0; i < mChans; i ++) { |
| 244 | state = &mStates[i]; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 245 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 246 | while ((burst = mTxPriorityQueues[i].getStaleBurst(nowTime))) { |
| 247 | LOG(NOTICE) << "dumping STALE burst in TRX->USRP interface"; |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 248 | if (state->mRetrans) |
| 249 | updateFillerTable(i, burst); |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 250 | delete burst; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | TN = nowTime.TN(); |
| 254 | modFN = nowTime.FN() % state->fillerModulus[TN]; |
| 255 | |
| 256 | bursts[i] = state->fillerTable[modFN][TN]; |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 257 | if (state->mode == TRX_MODE_BTS) |
| 258 | zeros[i] = state->chanType[TN] == NONE; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 259 | |
| 260 | if ((burst = mTxPriorityQueues[i].getCurrentBurst(nowTime))) { |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 261 | bursts[i] = burst->getVector(); |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 262 | |
| 263 | if (state->mRetrans) { |
| 264 | updateFillerTable(i, burst); |
| 265 | } else { |
| 266 | burst->setVector(NULL); |
| 267 | filler[i] = false; |
| 268 | } |
| 269 | |
Thomas Tsou | a2fe91a | 2013-11-13 22:48:11 -0500 | [diff] [blame] | 270 | delete burst; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 271 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 272 | } |
| 273 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 274 | mRadioInterface->driveTransmitRadio(bursts, zeros); |
| 275 | |
Thomas Tsou | 15d743e | 2014-01-25 02:34:03 -0500 | [diff] [blame] | 276 | for (size_t i = 0; i < mChans; i++) { |
| 277 | if (!filler[i]) |
| 278 | delete bursts[i]; |
| 279 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 280 | } |
| 281 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 282 | void Transceiver::setModulus(size_t timeslot, size_t chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 283 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 284 | TransceiverState *state = &mStates[chan]; |
| 285 | |
| 286 | switch (state->chanType[timeslot]) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 287 | case NONE: |
| 288 | case I: |
| 289 | case II: |
| 290 | case III: |
| 291 | case FILL: |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 292 | state->fillerModulus[timeslot] = 26; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 293 | break; |
| 294 | case IV: |
| 295 | case VI: |
| 296 | case V: |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 297 | state->fillerModulus[timeslot] = 51; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 298 | break; |
| 299 | //case V: |
| 300 | case VII: |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 301 | state->fillerModulus[timeslot] = 102; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 302 | break; |
ttsou | fc40a84 | 2013-06-09 22:38:18 +0000 | [diff] [blame] | 303 | case XIII: |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 304 | state->fillerModulus[timeslot] = 52; |
ttsou | fc40a84 | 2013-06-09 22:38:18 +0000 | [diff] [blame] | 305 | break; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 306 | default: |
| 307 | break; |
| 308 | } |
| 309 | } |
| 310 | |
| 311 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 312 | Transceiver::CorrType Transceiver::expectedCorrType(GSM::Time currTime, |
| 313 | size_t chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 314 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 315 | TransceiverState *state = &mStates[chan]; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 316 | unsigned burstTN = currTime.TN(); |
| 317 | unsigned burstFN = currTime.FN(); |
| 318 | |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 319 | if (state->mode == TRX_MODE_MS_TRACK) { |
| 320 | /* 102 modulus case currently unhandled */ |
| 321 | if (state->fillerModulus[burstTN] > 52) |
| 322 | return OFF; |
| 323 | |
| 324 | int modFN = burstFN % state->fillerModulus[burstTN]; |
Thomas Tsou | 94ce835 | 2014-10-08 11:49:08 -0700 | [diff] [blame] | 325 | unsigned long long reg = (unsigned long long) 1 << modFN; |
| 326 | if (reg & mRxSlotMask[burstTN]) |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 327 | return TSC; |
| 328 | else |
| 329 | return OFF; |
| 330 | } |
| 331 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 332 | switch (state->chanType[burstTN]) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 333 | case NONE: |
| 334 | return OFF; |
| 335 | break; |
| 336 | case FILL: |
| 337 | return IDLE; |
| 338 | break; |
| 339 | case I: |
| 340 | return TSC; |
| 341 | /*if (burstFN % 26 == 25) |
| 342 | return IDLE; |
| 343 | else |
| 344 | return TSC;*/ |
| 345 | break; |
| 346 | case II: |
ttsou | 2064297 | 2013-03-27 22:00:25 +0000 | [diff] [blame] | 347 | return TSC; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 348 | break; |
| 349 | case III: |
| 350 | return TSC; |
| 351 | break; |
| 352 | case IV: |
| 353 | case VI: |
| 354 | return RACH; |
| 355 | break; |
| 356 | case V: { |
| 357 | int mod51 = burstFN % 51; |
| 358 | if ((mod51 <= 36) && (mod51 >= 14)) |
| 359 | return RACH; |
| 360 | else if ((mod51 == 4) || (mod51 == 5)) |
| 361 | return RACH; |
| 362 | else if ((mod51 == 45) || (mod51 == 46)) |
| 363 | return RACH; |
| 364 | else |
| 365 | return TSC; |
| 366 | break; |
| 367 | } |
| 368 | case VII: |
| 369 | if ((burstFN % 51 <= 14) && (burstFN % 51 >= 12)) |
| 370 | return IDLE; |
| 371 | else |
| 372 | return TSC; |
| 373 | break; |
ttsou | fc40a84 | 2013-06-09 22:38:18 +0000 | [diff] [blame] | 374 | case XIII: { |
| 375 | int mod52 = burstFN % 52; |
| 376 | if ((mod52 == 12) || (mod52 == 38)) |
| 377 | return RACH; |
| 378 | else if ((mod52 == 25) || (mod52 == 51)) |
| 379 | return IDLE; |
| 380 | else |
| 381 | return TSC; |
| 382 | break; |
| 383 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 384 | case LOOPBACK: |
| 385 | if ((burstFN % 51 <= 50) && (burstFN % 51 >=48)) |
| 386 | return IDLE; |
| 387 | else |
| 388 | return TSC; |
| 389 | break; |
| 390 | default: |
| 391 | return OFF; |
| 392 | break; |
| 393 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 394 | } |
Thomas Tsou | fa3a787 | 2013-10-17 21:23:34 -0400 | [diff] [blame] | 395 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 396 | /* |
| 397 | * Detect RACH synchronization sequence within a burst. No equalization |
| 398 | * is used or available on the RACH channel. |
| 399 | */ |
| 400 | bool Transceiver::detectRACH(TransceiverState *state, |
| 401 | signalVector &burst, |
| 402 | complex &, float &toa) |
| 403 | { |
| 404 | float threshold = 6.0; |
| 405 | |
| 406 | return detectRACHBurst(burst, threshold, mSPSRx, &, &toa); |
| 407 | } |
| 408 | |
Thomas Tsou | 1189019 | 2014-04-16 19:36:30 -0400 | [diff] [blame] | 409 | /* Detect SCH synchronization sequence within a burst */ |
| 410 | bool Transceiver::detectSCH(TransceiverState *state, |
| 411 | signalVector &burst, |
| 412 | complex &, float &toa) |
| 413 | { |
Thomas Tsou | 98b1af8 | 2014-04-16 23:34:21 -0400 | [diff] [blame] | 414 | int shift, full;; |
Thomas Tsou | 1189019 | 2014-04-16 19:36:30 -0400 | [diff] [blame] | 415 | float mag, threshold = 7.0; |
| 416 | |
Thomas Tsou | 98b1af8 | 2014-04-16 23:34:21 -0400 | [diff] [blame] | 417 | full = (state->mode == TRX_MODE_MS_TRACK) ? |
| 418 | SCH_DETECT_NARROW : SCH_DETECT_FULL; |
| 419 | |
| 420 | if (!detectSCHBurst(burst, threshold, mSPSRx, &, &toa, full)) |
Thomas Tsou | 1189019 | 2014-04-16 19:36:30 -0400 | [diff] [blame] | 421 | return false; |
| 422 | |
| 423 | std::cout << "SCH : Timing offset " << toa << " symbols" << std::endl; |
| 424 | |
| 425 | mag = fabsf(toa); |
| 426 | if (mag < 1.0f) |
| 427 | return true; |
| 428 | |
| 429 | shift = (int) (mag / 2.0f); |
| 430 | if (!shift) |
| 431 | shift++; |
| 432 | |
| 433 | mRadioInterface->applyOffset(toa > 0 ? shift : -shift); |
| 434 | return false; |
| 435 | } |
| 436 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 437 | #define SCH_BIT_SCALE 64 |
| 438 | |
| 439 | /* Decode SCH burst */ |
| 440 | bool Transceiver::decodeSCH(SoftVector *burst, GSM::Time *time) |
| 441 | { |
| 442 | int fn; |
| 443 | struct sch_info sch; |
| 444 | ubit_t info[GSM_SCH_INFO_LEN]; |
| 445 | sbit_t data[GSM_SCH_CODED_LEN]; |
| 446 | |
| 447 | if (burst->size() < 156) { |
| 448 | std::cout << "Invalid SCH burst length" << std::endl; |
| 449 | return false; |
| 450 | } |
| 451 | |
| 452 | float_to_sbit(&(*burst)[3], &data[0], SCH_BIT_SCALE, 39); |
| 453 | float_to_sbit(&(*burst)[106], &data[39], SCH_BIT_SCALE, 39); |
| 454 | |
| 455 | if (!gsm_sch_decode(info, data)) { |
| 456 | gsm_sch_parse(info, &sch); |
| 457 | |
Thomas Tsou | e287598 | 2014-10-06 10:38:43 -0700 | [diff] [blame] | 458 | mBSIC = sch.bsic; |
| 459 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 460 | std::cout << "SCH : Decoded values" << std::endl; |
| 461 | std::cout << " BSIC: " << sch.bsic << std::endl; |
| 462 | std::cout << " T1 : " << sch.t1 << std::endl; |
| 463 | std::cout << " T2 : " << sch.t2 << std::endl; |
| 464 | std::cout << " T3p : " << sch.t3p << std::endl; |
| 465 | std::cout << " FN : " << gsm_sch_to_fn(&sch) << std::endl; |
| 466 | |
| 467 | fn = gsm_sch_to_fn(&sch); |
| 468 | if (fn < 0) { |
| 469 | std::cout << "SCH : Failed to convert FN " << std::endl; |
| 470 | return false; |
| 471 | } |
| 472 | |
| 473 | time->FN(fn); |
| 474 | time->TN(0); |
| 475 | } else { |
| 476 | return false; |
| 477 | } |
| 478 | |
| 479 | return true; |
| 480 | } |
| 481 | |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 482 | #define FCCH_OFFSET_LIMIT 2e3 |
| 483 | #define FCCH_ADJUST_LIMIT 20.0 |
| 484 | |
| 485 | /* Apply FCCH frequency correction */ |
| 486 | bool Transceiver::correctFCCH(TransceiverState *state, signalVector *burst) |
| 487 | { |
| 488 | double offset, avg; |
| 489 | |
| 490 | if (!burst) |
| 491 | return false; |
| 492 | |
| 493 | offset = gsm_fcch_offset((float *) burst->begin(), burst->size()); |
| 494 | if (offset > FCCH_OFFSET_LIMIT) |
| 495 | return false; |
| 496 | |
| 497 | state->mFreqOffsets.insert(offset); |
| 498 | avg = state->mFreqOffsets.avg(); |
| 499 | |
| 500 | if (state->mFreqOffsets.full()) |
| 501 | std::cout << "FCCH: Frequency offset " << avg << " Hz" << std::endl; |
| 502 | |
| 503 | if (state->mFreqOffsets.full() && (fabs(avg) > FCCH_ADJUST_LIMIT)) { |
| 504 | mRadioInterface->tuneRxOffset(-avg); |
| 505 | state->mFreqOffsets.reset(); |
| 506 | } |
| 507 | |
| 508 | return true; |
| 509 | } |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 510 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 511 | /* |
| 512 | * Detect normal burst training sequence midamble. Update equalization |
| 513 | * state information and channel estimate if necessary. Equalization |
| 514 | * is currently disabled. |
| 515 | */ |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 516 | bool Transceiver::detectTSC(TransceiverState *state, signalVector &burst, |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 517 | complex &, float &toa, GSM::Time &time) |
| 518 | { |
| 519 | int tn = time.TN(); |
| 520 | float chanOffset, threshold = 5.0; |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 521 | bool noise, needDFE = false, estimateChan = false; |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 522 | double elapsed = time - state->chanEstimateTime[tn]; |
| 523 | signalVector *chanResp; |
| 524 | |
| 525 | /* Check equalization update state */ |
Thomas Tsou | fb827d0 | 2013-11-16 16:14:12 -0500 | [diff] [blame] | 526 | if (needDFE && ((elapsed > 50) || (!state->chanResponse[tn]))) { |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 527 | delete state->DFEForward[tn]; |
| 528 | delete state->DFEFeedback[tn]; |
| 529 | state->DFEForward[tn] = NULL; |
| 530 | state->DFEFeedback[tn] = NULL; |
| 531 | |
| 532 | estimateChan = true; |
| 533 | } |
| 534 | |
| 535 | /* Detect normal burst midambles */ |
| 536 | if (!analyzeTrafficBurst(burst, mTSC, threshold, mSPSRx, &, |
| 537 | &toa, mMaxExpectedDelay, estimateChan, |
| 538 | &chanResp, &chanOffset)) { |
| 539 | return false; |
| 540 | } |
| 541 | |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 542 | noise = state->mNoiseLev; |
| 543 | state->SNRestimate[tn] = amp.norm2() / (noise * noise + 1.0); |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 544 | |
| 545 | /* Set equalizer if unabled */ |
| 546 | if (needDFE && estimateChan) { |
| 547 | state->chanResponse[tn] = chanResp; |
| 548 | state->chanRespOffset[tn] = chanOffset; |
| 549 | state->chanRespAmplitude[tn] = amp; |
| 550 | |
| 551 | scaleVector(*chanResp, complex(1.0, 0.0) / amp); |
| 552 | |
| 553 | designDFE(*chanResp, state->SNRestimate[tn], |
| 554 | 7, &state->DFEForward[tn], &state->DFEFeedback[tn]); |
| 555 | |
| 556 | state->chanEstimateTime[tn] = time; |
| 557 | } |
| 558 | |
| 559 | return true;; |
| 560 | } |
| 561 | |
| 562 | /* |
| 563 | * Demodulate GMSK burst using equalization if requested. Otherwise |
| 564 | * demodulate by direct rotation and soft slicing. |
| 565 | */ |
| 566 | SoftVector *Transceiver::demodulate(TransceiverState *state, |
| 567 | signalVector &burst, complex amp, |
| 568 | float toa, size_t tn, bool equalize) |
| 569 | { |
| 570 | if (equalize) { |
| 571 | scaleVector(burst, complex(1.0, 0.0) / amp); |
| 572 | return equalizeBurst(burst, |
| 573 | toa - state->chanRespOffset[tn], |
| 574 | mSPSRx, |
| 575 | *state->DFEForward[tn], |
| 576 | *state->DFEFeedback[tn]); |
| 577 | } |
| 578 | |
| 579 | return demodulateBurst(burst, mSPSRx, amp, toa); |
| 580 | } |
| 581 | |
| 582 | /* |
| 583 | * Pull bursts from the FIFO and handle according to the slot |
| 584 | * and burst correlation type. Equalzation is currently disabled. |
| 585 | */ |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 586 | SoftVector *Transceiver::pullRadioVector(GSM::Time &wTime, int &RSSI, |
| 587 | int &timingOffset, size_t chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 588 | { |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 589 | bool success, equalize = false; |
| 590 | complex amp; |
| 591 | float toa, pow, max = -1.0, avg = 0.0; |
Thomas Tsou | e90a42b | 2013-11-13 23:38:09 -0500 | [diff] [blame] | 592 | int max_i = -1; |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 593 | signalVector *burst; |
Thomas Tsou | ef25dba | 2013-11-14 15:31:24 -0500 | [diff] [blame] | 594 | SoftVector *bits = NULL; |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 595 | TransceiverState *state = &mStates[chan]; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 596 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 597 | GSM::Time sch_time, burst_time, diff_time; |
| 598 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 599 | /* Blocking FIFO read */ |
| 600 | radioVector *radio_burst = mReceiveFIFO[chan]->read(); |
| 601 | if (!radio_burst) |
| 602 | return NULL; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 603 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 604 | /* Set time and determine correlation type */ |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 605 | burst_time = radio_burst->getTime(); |
| 606 | CorrType type = expectedCorrType(burst_time, chan); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 607 | |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 608 | switch (state->mode) { |
| 609 | case TRX_MODE_MS_ACQUIRE: |
| 610 | type = SCH; |
| 611 | break; |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 612 | case TRX_MODE_MS_TRACK: |
Thomas Tsou | 94ce835 | 2014-10-08 11:49:08 -0700 | [diff] [blame] | 613 | if (gsm_sch_check_fn(burst_time.FN())) |
| 614 | type = SCH; |
| 615 | else if (type == OFF) |
| 616 | goto release; |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 617 | break; |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 618 | case TRX_MODE_BTS: |
| 619 | if ((type == TSC) || (type == RACH)) |
| 620 | break; |
| 621 | case TRX_MODE_OFF: |
| 622 | default: |
| 623 | goto release; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 624 | } |
kurtis.heimerl | 3ed6fb7 | 2011-11-26 03:17:52 +0000 | [diff] [blame] | 625 | |
Thomas Tsou | e90a42b | 2013-11-13 23:38:09 -0500 | [diff] [blame] | 626 | /* Select the diversity channel with highest energy */ |
| 627 | for (size_t i = 0; i < radio_burst->chans(); i++) { |
| 628 | energyDetect(*radio_burst->getVector(i), 20 * mSPSRx, 0.0, &pow); |
| 629 | if (pow > max) { |
| 630 | max = pow; |
| 631 | max_i = i; |
| 632 | } |
| 633 | avg += pow; |
| 634 | } |
| 635 | |
| 636 | if (max_i < 0) { |
| 637 | LOG(ALERT) << "Received empty burst"; |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 638 | goto release; |
Thomas Tsou | e90a42b | 2013-11-13 23:38:09 -0500 | [diff] [blame] | 639 | } |
| 640 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 641 | /* Average noise on diversity paths and update global levels */ |
Thomas Tsou | e90a42b | 2013-11-13 23:38:09 -0500 | [diff] [blame] | 642 | burst = radio_burst->getVector(max_i); |
Thomas Tsou | ef25dba | 2013-11-14 15:31:24 -0500 | [diff] [blame] | 643 | avg = sqrt(avg / radio_burst->chans()); |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 644 | state->mNoiseLev = state->mNoises.avg(); |
Thomas Tsou | fa3a787 | 2013-10-17 21:23:34 -0400 | [diff] [blame] | 645 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 646 | /* Detect normal or RACH bursts */ |
| 647 | if (type == TSC) |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 648 | success = detectTSC(state, *burst, amp, toa, burst_time); |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 649 | else if (type == RACH) |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 650 | success = detectRACH(state, *burst, amp, toa); |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 651 | else if (type == SCH) |
| 652 | success = detectSCH(state, *burst, amp, toa); |
| 653 | else |
| 654 | success = false; |
Thomas Tsou | f078273 | 2013-10-29 15:55:47 -0400 | [diff] [blame] | 655 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 656 | if (!success) { |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 657 | state->mNoises.insert(avg); |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 658 | goto release; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 659 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 660 | |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 661 | /* Demodulate and set output info */ |
| 662 | if (equalize && (type != TSC)) |
| 663 | equalize = false; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 664 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 665 | /* Ignore noise threshold on MS mode for now */ |
| 666 | if ((type == SCH) || (avg - state->mNoiseLev > 0.0)) |
| 667 | bits = demodulate(state, *burst, amp, toa, |
| 668 | burst_time.TN(), equalize); |
Thomas Tsou | ef25dba | 2013-11-14 15:31:24 -0500 | [diff] [blame] | 669 | |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 670 | /* MS: Decode SCH and adjust GSM clock */ |
| 671 | if ((state->mode == TRX_MODE_MS_ACQUIRE) || |
| 672 | (state->mode == TRX_MODE_MS_TRACK)) { |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 673 | correctFCCH(state, state->prevFrame[burst_time.TN()]->getVector()); |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 674 | |
| 675 | if (decodeSCH(bits, &sch_time)) { |
| 676 | if (state->mode == TRX_MODE_MS_ACQUIRE) { |
| 677 | diff_time = GSM::Time(sch_time.FN() - burst_time.FN(), |
| 678 | -burst_time.TN()); |
| 679 | mRadioInterface->adjustClock(diff_time); |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 680 | mTransmitDeadlineClock = RadioClock::adjust( |
| 681 | mTransmitDeadlineClock, |
| 682 | diff_time); |
Thomas Tsou | c7f36c2 | 2014-04-16 22:24:00 -0400 | [diff] [blame] | 683 | state->mode = TRX_MODE_MS_TRACK; |
| 684 | |
| 685 | std::cout << "SCH : Locking GSM clock " << std::endl; |
| 686 | } else { |
| 687 | std::cout << "SCH : Read SCH at FN " << burst_time.FN() |
| 688 | << " FN51 " << burst_time.FN() % 51 << std::endl; |
| 689 | } |
| 690 | } |
| 691 | goto release; |
| 692 | } |
| 693 | |
| 694 | wTime = burst_time; |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 695 | RSSI = (int) floor(20.0 * log10(rxFullScale / avg)); |
| 696 | timingOffset = (int) round(toa * 256.0 / mSPSRx); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 697 | |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 698 | delete state->prevFrame[burst_time.TN()]; |
| 699 | state->prevFrame[burst_time.TN()] = radio_burst; |
Thomas Tsou | 30421a7 | 2013-11-13 23:14:48 -0500 | [diff] [blame] | 700 | |
| 701 | return bits; |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 702 | |
| 703 | release: |
Thomas Tsou | 14bb9c9 | 2014-04-16 23:10:12 -0400 | [diff] [blame] | 704 | delete state->prevFrame[burst_time.TN()]; |
| 705 | state->prevFrame[burst_time.TN()] = radio_burst; |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 706 | delete bits; |
| 707 | return NULL; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 708 | } |
| 709 | |
| 710 | void Transceiver::start() |
| 711 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 712 | TransceiverChannel *chan; |
| 713 | |
| 714 | for (size_t i = 0; i < mControlServiceLoopThreads.size(); i++) { |
| 715 | chan = new TransceiverChannel(this, i); |
| 716 | mControlServiceLoopThreads[i]->start((void * (*)(void*)) |
| 717 | ControlServiceLoopAdapter, (void*) chan); |
| 718 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 719 | } |
| 720 | |
| 721 | void Transceiver::reset() |
| 722 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 723 | for (size_t i = 0; i < mTxPriorityQueues.size(); i++) |
| 724 | mTxPriorityQueues[i].clear(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 725 | } |
| 726 | |
| 727 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 728 | void Transceiver::driveControl(size_t chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 729 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 730 | int MAX_PACKET_LENGTH = 100; |
| 731 | |
| 732 | // check control socket |
| 733 | char buffer[MAX_PACKET_LENGTH]; |
| 734 | int msgLen = -1; |
| 735 | buffer[0] = '\0'; |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 736 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 737 | msgLen = mCtrlSockets[chan]->read(buffer); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 738 | |
| 739 | if (msgLen < 1) { |
| 740 | return; |
| 741 | } |
| 742 | |
| 743 | char cmdcheck[4]; |
| 744 | char command[MAX_PACKET_LENGTH]; |
| 745 | char response[MAX_PACKET_LENGTH]; |
| 746 | |
| 747 | sscanf(buffer,"%3s %s",cmdcheck,command); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 748 | |
| 749 | if (!chan) |
| 750 | writeClockInterface(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 751 | |
| 752 | if (strcmp(cmdcheck,"CMD")!=0) { |
| 753 | LOG(WARNING) << "bogus message on control interface"; |
| 754 | return; |
| 755 | } |
| 756 | LOG(INFO) << "command is " << buffer; |
| 757 | |
| 758 | if (strcmp(command,"POWEROFF")==0) { |
| 759 | // turn off transmitter/demod |
| 760 | sprintf(response,"RSP POWEROFF 0"); |
| 761 | } |
| 762 | else if (strcmp(command,"POWERON")==0) { |
| 763 | // turn on transmitter/demod |
| 764 | if (!mTxFreq || !mRxFreq) |
| 765 | sprintf(response,"RSP POWERON 1"); |
| 766 | else { |
| 767 | sprintf(response,"RSP POWERON 0"); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 768 | if (!chan && !mOn) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 769 | // Prepare for thread start |
| 770 | mPower = -20; |
| 771 | mRadioInterface->start(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 772 | |
| 773 | // Start radio interface threads. |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 774 | mLowerLoopThread->start((void * (*)(void*)) |
| 775 | LowerLoopAdapter,(void*) this); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 776 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 777 | for (size_t i = 0; i < mChans; i++) { |
| 778 | TransceiverChannel *chan = new TransceiverChannel(this, i); |
| 779 | mRxServiceLoopThreads[i]->start((void * (*)(void*)) |
| 780 | RxUpperLoopAdapter, (void*) chan); |
| 781 | |
| 782 | chan = new TransceiverChannel(this, i); |
| 783 | mTxPriorityQueueServiceLoopThreads[i]->start((void * (*)(void*)) |
| 784 | TxUpperLoopAdapter, (void*) chan); |
| 785 | } |
| 786 | |
| 787 | writeClockInterface(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 788 | mOn = true; |
| 789 | } |
| 790 | } |
| 791 | } |
| 792 | else if (strcmp(command,"SETMAXDLY")==0) { |
| 793 | //set expected maximum time-of-arrival |
| 794 | int maxDelay; |
| 795 | sscanf(buffer,"%3s %s %d",cmdcheck,command,&maxDelay); |
| 796 | mMaxExpectedDelay = maxDelay; // 1 GSM symbol is approx. 1 km |
| 797 | sprintf(response,"RSP SETMAXDLY 0 %d",maxDelay); |
| 798 | } |
| 799 | else if (strcmp(command,"SETRXGAIN")==0) { |
| 800 | //set expected maximum time-of-arrival |
| 801 | int newGain; |
| 802 | sscanf(buffer,"%3s %s %d",cmdcheck,command,&newGain); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 803 | newGain = mRadioInterface->setRxGain(newGain, chan); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 804 | sprintf(response,"RSP SETRXGAIN 0 %d",newGain); |
| 805 | } |
| 806 | else if (strcmp(command,"NOISELEV")==0) { |
| 807 | if (mOn) { |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 808 | float lev = mStates[chan].mNoiseLev; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 809 | sprintf(response,"RSP NOISELEV 0 %d", |
Thomas Tsou | a0179e3 | 2013-11-14 15:52:04 -0500 | [diff] [blame] | 810 | (int) round(20.0 * log10(rxFullScale / lev))); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 811 | } |
| 812 | else { |
| 813 | sprintf(response,"RSP NOISELEV 1 0"); |
| 814 | } |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 815 | } |
| 816 | else if (!strcmp(command, "SETPOWER")) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 817 | // set output power in dB |
| 818 | int dbPwr; |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 819 | sscanf(buffer, "%3s %s %d", cmdcheck, command, &dbPwr); |
| 820 | if (!mOn) |
| 821 | sprintf(response, "RSP SETPOWER 1 %d", dbPwr); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 822 | else { |
| 823 | mPower = dbPwr; |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 824 | mRadioInterface->setPowerAttenuation(mPower, chan); |
| 825 | sprintf(response, "RSP SETPOWER 0 %d", dbPwr); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 826 | } |
| 827 | } |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 828 | else if (!strcmp(command,"ADJPOWER")) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 829 | // adjust power in dB steps |
| 830 | int dbStep; |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 831 | sscanf(buffer, "%3s %s %d", cmdcheck, command, &dbStep); |
| 832 | if (!mOn) |
| 833 | sprintf(response, "RSP ADJPOWER 1 %d", mPower); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 834 | else { |
| 835 | mPower += dbStep; |
Thomas Tsou | cb269a3 | 2013-11-15 14:15:47 -0500 | [diff] [blame] | 836 | mRadioInterface->setPowerAttenuation(mPower, chan); |
| 837 | sprintf(response, "RSP ADJPOWER 0 %d", mPower); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 838 | } |
| 839 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 840 | else if (strcmp(command,"RXTUNE")==0) { |
| 841 | // tune receiver |
| 842 | int freqKhz; |
| 843 | sscanf(buffer,"%3s %s %d",cmdcheck,command,&freqKhz); |
Thomas Tsou | 477b77c | 2013-11-15 16:13:59 -0500 | [diff] [blame] | 844 | mRxFreq = freqKhz * 1e3; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 845 | if (!mRadioInterface->tuneRx(mRxFreq, chan)) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 846 | LOG(ALERT) << "RX failed to tune"; |
| 847 | sprintf(response,"RSP RXTUNE 1 %d",freqKhz); |
| 848 | } |
| 849 | else |
| 850 | sprintf(response,"RSP RXTUNE 0 %d",freqKhz); |
| 851 | } |
| 852 | else if (strcmp(command,"TXTUNE")==0) { |
| 853 | // tune txmtr |
| 854 | int freqKhz; |
| 855 | sscanf(buffer,"%3s %s %d",cmdcheck,command,&freqKhz); |
Thomas Tsou | 477b77c | 2013-11-15 16:13:59 -0500 | [diff] [blame] | 856 | mTxFreq = freqKhz * 1e3; |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 857 | if (!mRadioInterface->tuneTx(mTxFreq, chan)) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 858 | LOG(ALERT) << "TX failed to tune"; |
| 859 | sprintf(response,"RSP TXTUNE 1 %d",freqKhz); |
| 860 | } |
| 861 | else |
| 862 | sprintf(response,"RSP TXTUNE 0 %d",freqKhz); |
| 863 | } |
Thomas Tsou | d3fccea | 2013-11-15 14:22:53 -0500 | [diff] [blame] | 864 | else if (!strcmp(command,"SETTSC")) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 865 | // set TSC |
Thomas Tsou | 3f32ab5 | 2013-11-15 16:32:54 -0500 | [diff] [blame] | 866 | unsigned TSC; |
Thomas Tsou | d3fccea | 2013-11-15 14:22:53 -0500 | [diff] [blame] | 867 | sscanf(buffer, "%3s %s %d", cmdcheck, command, &TSC); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 868 | if (mOn) |
Thomas Tsou | d3fccea | 2013-11-15 14:22:53 -0500 | [diff] [blame] | 869 | sprintf(response, "RSP SETTSC 1 %d", TSC); |
| 870 | else if (chan && (TSC != mTSC)) |
| 871 | sprintf(response, "RSP SETTSC 1 %d", TSC); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 872 | else { |
| 873 | mTSC = TSC; |
Thomas Tsou | c1f7c42 | 2013-10-11 13:49:55 -0400 | [diff] [blame] | 874 | generateMidamble(mSPSRx, TSC); |
Thomas Tsou | 83e0689 | 2013-08-20 16:10:01 -0400 | [diff] [blame] | 875 | sprintf(response,"RSP SETTSC 0 %d", TSC); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 876 | } |
| 877 | } |
Thomas Tsou | e287598 | 2014-10-06 10:38:43 -0700 | [diff] [blame] | 878 | else if (!strcmp(command,"GETBSIC")) { |
| 879 | if (mBSIC < 0) |
| 880 | sprintf(response, "RSP GETBSIC 1"); |
| 881 | else |
| 882 | sprintf(response, "RSP GETBSIC 0 %d", mBSIC); |
| 883 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 884 | else if (strcmp(command,"SETSLOT")==0) { |
| 885 | // set TSC |
| 886 | int corrCode; |
| 887 | int timeslot; |
| 888 | sscanf(buffer,"%3s %s %d %d",cmdcheck,command,×lot,&corrCode); |
| 889 | if ((timeslot < 0) || (timeslot > 7)) { |
| 890 | LOG(WARNING) << "bogus message on control interface"; |
| 891 | sprintf(response,"RSP SETSLOT 1 %d %d",timeslot,corrCode); |
| 892 | return; |
| 893 | } |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 894 | mStates[chan].chanType[timeslot] = (ChannelCombination) corrCode; |
| 895 | setModulus(timeslot, chan); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 896 | sprintf(response,"RSP SETSLOT 0 %d %d",timeslot,corrCode); |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 897 | } |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 898 | else if (!strcmp(command,"SETRXMASK")) { |
| 899 | int slot; |
| 900 | unsigned long long mask; |
Thomas Tsou | 94ce835 | 2014-10-08 11:49:08 -0700 | [diff] [blame] | 901 | sscanf(buffer,"%3s %s %d 0x%llx", cmdcheck, command, &slot, &mask); |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 902 | if ((slot < 0) || (slot > 7)) { |
| 903 | sprintf(response, "RSP SETRXMASK 1"); |
| 904 | } else { |
| 905 | mRxSlotMask[slot] = mask; |
Thomas Tsou | 94ce835 | 2014-10-08 11:49:08 -0700 | [diff] [blame] | 906 | sprintf(response, "RSP SETRXMASK 0 %d 0x%llx", slot, mask); |
Thomas Tsou | 25021df | 2014-10-06 11:43:48 -0700 | [diff] [blame] | 907 | } |
| 908 | } |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 909 | else if (!strcmp(command, "SYNC")) { |
| 910 | mStates[0].mode = TRX_MODE_MS_ACQUIRE; |
| 911 | sprintf(response,"RSP SYNC 0"); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 912 | } |
| 913 | else { |
| 914 | LOG(WARNING) << "bogus command " << command << " on control interface."; |
| 915 | } |
| 916 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 917 | mCtrlSockets[chan]->write(response, strlen(response) + 1); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 918 | } |
| 919 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 920 | bool Transceiver::driveTxPriorityQueue(size_t chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 921 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 922 | char buffer[gSlotLen+50]; |
| 923 | |
| 924 | // check data socket |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 925 | size_t msgLen = mDataSockets[chan]->read(buffer); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 926 | |
| 927 | if (msgLen!=gSlotLen+1+4+1) { |
| 928 | LOG(ERR) << "badly formatted packet on GSM->TRX interface"; |
| 929 | return false; |
| 930 | } |
| 931 | |
| 932 | int timeSlot = (int) buffer[0]; |
| 933 | uint64_t frameNum = 0; |
| 934 | for (int i = 0; i < 4; i++) |
| 935 | frameNum = (frameNum << 8) | (0x0ff & buffer[i+1]); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 936 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 937 | LOG(DEBUG) << "rcvd. burst at: " << GSM::Time(frameNum,timeSlot); |
| 938 | |
| 939 | int RSSI = (int) buffer[5]; |
| 940 | static BitVector newBurst(gSlotLen); |
| 941 | BitVector::iterator itr = newBurst.begin(); |
| 942 | char *bufferItr = buffer+6; |
| 943 | while (itr < newBurst.end()) |
| 944 | *itr++ = *bufferItr++; |
| 945 | |
| 946 | GSM::Time currTime = GSM::Time(frameNum,timeSlot); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 947 | |
| 948 | addRadioVector(chan, newBurst, RSSI, currTime); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 949 | |
| 950 | return true; |
| 951 | |
| 952 | |
| 953 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 954 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 955 | void Transceiver::driveReceiveRadio() |
| 956 | { |
| 957 | if (!mRadioInterface->driveReceiveRadio()) |
| 958 | usleep(100000); |
| 959 | } |
| 960 | |
| 961 | void Transceiver::driveReceiveFIFO(size_t chan) |
| 962 | { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 963 | SoftVector *rxBurst = NULL; |
| 964 | int RSSI; |
| 965 | int TOA; // in 1/256 of a symbol |
| 966 | GSM::Time burstTime; |
| 967 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 968 | rxBurst = pullRadioVector(burstTime, RSSI, TOA, chan); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 969 | |
| 970 | if (rxBurst) { |
| 971 | |
| 972 | LOG(DEBUG) << "burst parameters: " |
| 973 | << " time: " << burstTime |
| 974 | << " RSSI: " << RSSI |
| 975 | << " TOA: " << TOA |
| 976 | << " bits: " << *rxBurst; |
| 977 | |
| 978 | char burstString[gSlotLen+10]; |
| 979 | burstString[0] = burstTime.TN(); |
| 980 | for (int i = 0; i < 4; i++) |
| 981 | burstString[1+i] = (burstTime.FN() >> ((3-i)*8)) & 0x0ff; |
| 982 | burstString[5] = RSSI; |
| 983 | burstString[6] = (TOA >> 8) & 0x0ff; |
| 984 | burstString[7] = TOA & 0x0ff; |
| 985 | SoftVector::iterator burstItr = rxBurst->begin(); |
| 986 | |
| 987 | for (unsigned int i = 0; i < gSlotLen; i++) { |
| 988 | burstString[8+i] =(char) round((*burstItr++)*255.0); |
| 989 | } |
| 990 | burstString[gSlotLen+9] = '\0'; |
| 991 | delete rxBurst; |
| 992 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 993 | mDataSockets[chan]->write(burstString,gSlotLen+10); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 994 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 995 | } |
| 996 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 997 | void Transceiver::driveTxFIFO() |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 998 | { |
| 999 | |
| 1000 | /** |
| 1001 | Features a carefully controlled latency mechanism, to |
| 1002 | assure that transmit packets arrive at the radio/USRP |
| 1003 | before they need to be transmitted. |
| 1004 | |
| 1005 | Deadline clock indicates the burst that needs to be |
| 1006 | pushed into the FIFO right NOW. If transmit queue does |
| 1007 | not have a burst, stick in filler data. |
| 1008 | */ |
| 1009 | |
| 1010 | |
| 1011 | RadioClock *radioClock = (mRadioInterface->getClock()); |
| 1012 | |
| 1013 | if (mOn) { |
| 1014 | //radioClock->wait(); // wait until clock updates |
| 1015 | LOG(DEBUG) << "radio clock " << radioClock->get(); |
| 1016 | while (radioClock->get() + mTransmitLatency > mTransmitDeadlineClock) { |
| 1017 | // if underrun, then we're not providing bursts to radio/USRP fast |
| 1018 | // enough. Need to increase latency by one GSM frame. |
Thomas Tsou | 02d88d1 | 2013-04-05 15:36:30 -0400 | [diff] [blame] | 1019 | if (mRadioInterface->getWindowType() == RadioDevice::TX_WINDOW_USRP1) { |
kurtis.heimerl | e380af3 | 2011-11-26 03:18:55 +0000 | [diff] [blame] | 1020 | if (mRadioInterface->isUnderrun()) { |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 1021 | // only update latency at the defined frame interval |
| 1022 | if (radioClock->get() > mLatencyUpdateTime + GSM::Time(USB_LATENCY_INTRVL)) { |
kurtis.heimerl | e380af3 | 2011-11-26 03:18:55 +0000 | [diff] [blame] | 1023 | mTransmitLatency = mTransmitLatency + GSM::Time(1,0); |
| 1024 | LOG(INFO) << "new latency: " << mTransmitLatency; |
| 1025 | mLatencyUpdateTime = radioClock->get(); |
| 1026 | } |
| 1027 | } |
| 1028 | else { |
| 1029 | // if underrun hasn't occurred in the last sec (216 frames) drop |
| 1030 | // transmit latency by a timeslot |
ttsou | 2173abf | 2012-08-08 00:51:31 +0000 | [diff] [blame] | 1031 | if (mTransmitLatency > GSM::Time(USB_LATENCY_MIN)) { |
kurtis.heimerl | e380af3 | 2011-11-26 03:18:55 +0000 | [diff] [blame] | 1032 | if (radioClock->get() > mLatencyUpdateTime + GSM::Time(216,0)) { |
| 1033 | mTransmitLatency.decTN(); |
| 1034 | LOG(INFO) << "reduced latency: " << mTransmitLatency; |
| 1035 | mLatencyUpdateTime = radioClock->get(); |
| 1036 | } |
| 1037 | } |
| 1038 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1039 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1040 | // time to push burst to transmit FIFO |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 1041 | pushRadioVector(mTransmitDeadlineClock); |
Thomas Tsou | f31e4bb | 2014-04-16 20:02:06 -0400 | [diff] [blame] | 1042 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1043 | mTransmitDeadlineClock.incTN(); |
Tom Tsou | 774a063 | 2014-10-31 13:18:43 -0700 | [diff] [blame] | 1044 | |
| 1045 | if (!mTransmitDeadlineClock.TN() && |
| 1046 | !(mTransmitDeadlineClock.FN() % CLK_IND_INTERVAL)) { |
| 1047 | writeClockInterface(); |
| 1048 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1049 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1050 | } |
Thomas Tsou | 92c16df | 2013-09-28 18:04:19 -0400 | [diff] [blame] | 1051 | |
| 1052 | radioClock->wait(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1053 | } |
| 1054 | |
| 1055 | |
| 1056 | |
| 1057 | void Transceiver::writeClockInterface() |
| 1058 | { |
| 1059 | char command[50]; |
| 1060 | // FIXME -- This should be adaptive. |
| 1061 | sprintf(command,"IND CLOCK %llu",(unsigned long long) (mTransmitDeadlineClock.FN()+2)); |
| 1062 | |
| 1063 | LOG(INFO) << "ClockInterface: sending " << command; |
| 1064 | |
Thomas Tsou | d647ec5 | 2013-10-29 15:17:34 -0400 | [diff] [blame] | 1065 | mClockSocket->write(command, strlen(command) + 1); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1066 | |
| 1067 | mLastClockUpdateTime = mTransmitDeadlineClock; |
| 1068 | |
Thomas Tsou | 92c16df | 2013-09-28 18:04:19 -0400 | [diff] [blame] | 1069 | } |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1070 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1071 | void *RxUpperLoopAdapter(TransceiverChannel *chan) |
| 1072 | { |
| 1073 | Transceiver *trx = chan->trx; |
| 1074 | size_t num = chan->num; |
| 1075 | |
| 1076 | delete chan; |
| 1077 | |
Thomas Tsou | 7553aa9 | 2013-11-08 12:50:03 -0500 | [diff] [blame] | 1078 | trx->setPriority(0.42); |
| 1079 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1080 | while (1) { |
| 1081 | trx->driveReceiveFIFO(num); |
| 1082 | pthread_testcancel(); |
| 1083 | } |
| 1084 | return NULL; |
| 1085 | } |
| 1086 | |
Thomas Tsou | 1303376 | 2014-10-06 19:05:52 -0700 | [diff] [blame] | 1087 | void *LowerLoopAdapter(Transceiver *transceiver) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1088 | { |
Thomas Tsou | 7553aa9 | 2013-11-08 12:50:03 -0500 | [diff] [blame] | 1089 | transceiver->setPriority(0.45); |
kurtis.heimerl | 6b495a5 | 2011-11-26 03:17:21 +0000 | [diff] [blame] | 1090 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1091 | while (1) { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1092 | transceiver->driveReceiveRadio(); |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1093 | transceiver->driveTxFIFO(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1094 | pthread_testcancel(); |
| 1095 | } |
| 1096 | return NULL; |
| 1097 | } |
| 1098 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1099 | void *ControlServiceLoopAdapter(TransceiverChannel *chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1100 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1101 | Transceiver *trx = chan->trx; |
| 1102 | size_t num = chan->num; |
| 1103 | |
| 1104 | delete chan; |
| 1105 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1106 | while (1) { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1107 | trx->driveControl(num); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1108 | pthread_testcancel(); |
| 1109 | } |
| 1110 | return NULL; |
| 1111 | } |
| 1112 | |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1113 | void *TxUpperLoopAdapter(TransceiverChannel *chan) |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1114 | { |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1115 | Transceiver *trx = chan->trx; |
| 1116 | size_t num = chan->num; |
| 1117 | |
| 1118 | delete chan; |
| 1119 | |
Thomas Tsou | a4cf48c | 2013-11-09 21:44:26 -0500 | [diff] [blame] | 1120 | trx->setPriority(0.40); |
| 1121 | |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1122 | while (1) { |
| 1123 | bool stale = false; |
| 1124 | // Flush the UDP packets until a successful transfer. |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1125 | while (!trx->driveTxPriorityQueue(num)) { |
| 1126 | stale = true; |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1127 | } |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1128 | if (!num && stale) { |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1129 | // If a packet was stale, remind the GSM stack of the clock. |
Thomas Tsou | 204a9f1 | 2013-10-29 18:34:16 -0400 | [diff] [blame] | 1130 | trx->writeClockInterface(); |
dburgess | b3a0ca4 | 2011-10-12 07:44:40 +0000 | [diff] [blame] | 1131 | } |
| 1132 | pthread_testcancel(); |
| 1133 | } |
| 1134 | return NULL; |
| 1135 | } |