blob: c250a74fb9517153010bdca52c2d0e7225f7f9ff [file] [log] [blame]
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +02001#pragma once
2
3#include <stdint.h>
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +02004#include <stdbool.h>
5#include <unistd.h>
6#include <math.h>
7
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +02008#include <osmocom/core/endian.h>
9
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020010#include "debug.h"
11
12#define MAX_RX_BURST_BUF_SIZE 444 /* 444 = EDGE_BURST_NBITS */
13
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020014enum Modulation {
15 MODULATION_GMSK,
16 MODULATION_8PSK,
17/* Not supported yet:
18 MODULATION_AQPSK,
19 MODULATION_16QAM,
20 MODULATION_32QAM
21*/
22};
23
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020024struct trx_ul_burst_ind {
25 float rx_burst[MAX_RX_BURST_BUF_SIZE]; /* soft bits normalized 0..1 */
26 unsigned nbits; // number of symbols per slot in rxBurst, not counting guard periods
27 uint32_t fn; // TDMA frame number
28 uint8_t tn; // TDMA time-slot number
29 double rssi; // in dBFS
30 double toa; // in symbols
31 double noise; // noise level in dBFS
32 bool idle; // true if no valid burst is included
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020033 enum Modulation modulation; // modulation type
34 uint8_t tss; // training sequence set
35 uint8_t tsc; // training sequence code
36 float ci; // Carrier-to-Interference ratio, in dB
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020037};
38
39bool trxd_send_burst_ind_v0(size_t chan, int fd, const struct trx_ul_burst_ind *bi);
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020040bool trxd_send_burst_ind_v1(size_t chan, int fd, const struct trx_ul_burst_ind *bi);
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020041
42/* The latest supported TRXD header format version */
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020043#define TRX_DATA_FORMAT_VER 1
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020044
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020045struct trxd_hdr_common {
46#if OSMO_IS_LITTLE_ENDIAN
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020047 uint8_t tn:3,
48 reserved:1,
49 version:4;
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020050#elif OSMO_IS_BIG_ENDIAN
Oliver Smith8c4336d2023-02-20 10:53:48 +010051/* auto-generated from the little endian part above (libosmocore/contrib/struct_endianness.py) */
52 uint8_t version:4, reserved:1, tn:3;
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020053#endif
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020054 uint32_t fn; /* big endian */
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020055} __attribute__ ((packed));
56
57struct trxd_hdr_v0_specific {
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020058 uint8_t rssi;
59 uint16_t toa; /* big endian */
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020060} __attribute__ ((packed));
61
62struct trxd_hdr_v0 {
Pau Espin Pedrol15fa64b2019-07-01 20:41:55 +020063 struct trxd_hdr_common common;
64 struct trxd_hdr_v0_specific v0;
65 uint8_t soft_bits[0];
Pau Espin Pedrol778b30a2019-06-28 13:27:24 +020066} __attribute__ ((packed));
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020067
Pau Espin Pedrole4166be2019-08-26 11:21:55 +020068/* Downlink burst (BTS->TRX), v0 anf v1 use same format */
69struct trxd_hdr_v01_dl {
70 struct trxd_hdr_common common;
71 uint8_t tx_att; /* Tx Attentuation */
72 uint8_t soft_bits[0];
73} __attribute__ ((packed));
74
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020075
76#define TRXD_MODULATION_GMSK(ts_set) (0b0000 | (ts_set & 0b0011))
77#define TRXD_MODULATION_8PSK(ts_set) (0b0100 | (ts_set & 0b0001))
78#define TRXD_MODULATION_AQPSK(ts_set) (0b0110 | (ts_set & 0b0001))
79#define TRXD_MODULATION_16QAM(ts_set) (0b1000 | (ts_set & 0b0001))
80#define TRXD_MODULATION_32QAM(ts_set) (0b1010 | (ts_set & 0b0001))
81
82struct trxd_hdr_v1_specific {
83#if OSMO_IS_LITTLE_ENDIAN
84 uint8_t tsc:3,
85 modulation:4,
86 idle:1;
87#elif OSMO_IS_BIG_ENDIAN
Oliver Smith8c4336d2023-02-20 10:53:48 +010088/* auto-generated from the little endian part above (libosmocore/contrib/struct_endianness.py) */
89 uint8_t idle:1, modulation:4, tsc:3;
Pau Espin Pedrolcf6113b2019-07-01 20:42:53 +020090#endif
91 int16_t ci; /* big endian, in centiBels */
92} __attribute__ ((packed));
93
94struct trxd_hdr_v1 {
95 struct trxd_hdr_common common;
96 struct trxd_hdr_v0_specific v0;
97 struct trxd_hdr_v1_specific v1;
98 uint8_t soft_bits[0];
99} __attribute__ ((packed));