Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 1 | #pragma once |
| 2 | |
| 3 | #include <stdint.h> |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 4 | #include <stdbool.h> |
| 5 | #include <unistd.h> |
| 6 | #include <math.h> |
| 7 | |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 8 | #include <osmocom/core/endian.h> |
| 9 | |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 10 | #include "debug.h" |
| 11 | |
| 12 | #define MAX_RX_BURST_BUF_SIZE 444 /* 444 = EDGE_BURST_NBITS */ |
| 13 | |
Pau Espin Pedrol | cf6113b | 2019-07-01 20:42:53 +0200 | [diff] [blame] | 14 | enum Modulation { |
| 15 | MODULATION_GMSK, |
| 16 | MODULATION_8PSK, |
| 17 | /* Not supported yet: |
| 18 | MODULATION_AQPSK, |
| 19 | MODULATION_16QAM, |
| 20 | MODULATION_32QAM |
| 21 | */ |
| 22 | }; |
| 23 | |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 24 | struct trx_ul_burst_ind { |
| 25 | float rx_burst[MAX_RX_BURST_BUF_SIZE]; /* soft bits normalized 0..1 */ |
| 26 | unsigned nbits; // number of symbols per slot in rxBurst, not counting guard periods |
| 27 | uint32_t fn; // TDMA frame number |
| 28 | uint8_t tn; // TDMA time-slot number |
| 29 | double rssi; // in dBFS |
| 30 | double toa; // in symbols |
| 31 | double noise; // noise level in dBFS |
| 32 | bool idle; // true if no valid burst is included |
Pau Espin Pedrol | cf6113b | 2019-07-01 20:42:53 +0200 | [diff] [blame] | 33 | enum Modulation modulation; // modulation type |
| 34 | uint8_t tss; // training sequence set |
| 35 | uint8_t tsc; // training sequence code |
| 36 | float ci; // Carrier-to-Interference ratio, in dB |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | bool trxd_send_burst_ind_v0(size_t chan, int fd, const struct trx_ul_burst_ind *bi); |
Pau Espin Pedrol | cf6113b | 2019-07-01 20:42:53 +0200 | [diff] [blame] | 40 | bool trxd_send_burst_ind_v1(size_t chan, int fd, const struct trx_ul_burst_ind *bi); |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 41 | |
| 42 | /* The latest supported TRXD header format version */ |
Pau Espin Pedrol | cf6113b | 2019-07-01 20:42:53 +0200 | [diff] [blame] | 43 | #define TRX_DATA_FORMAT_VER 1 |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 44 | |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 45 | struct trxd_hdr_common { |
| 46 | #if OSMO_IS_LITTLE_ENDIAN |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 47 | uint8_t tn:3, |
| 48 | reserved:1, |
| 49 | version:4; |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 50 | #elif OSMO_IS_BIG_ENDIAN |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 51 | uint8_t version:4, |
| 52 | reserved:1, |
| 53 | tn:3; |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 54 | #endif |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 55 | uint32_t fn; /* big endian */ |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 56 | } __attribute__ ((packed)); |
| 57 | |
| 58 | struct trxd_hdr_v0_specific { |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 59 | uint8_t rssi; |
| 60 | uint16_t toa; /* big endian */ |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 61 | } __attribute__ ((packed)); |
| 62 | |
| 63 | struct trxd_hdr_v0 { |
Pau Espin Pedrol | 15fa64b | 2019-07-01 20:41:55 +0200 | [diff] [blame] | 64 | struct trxd_hdr_common common; |
| 65 | struct trxd_hdr_v0_specific v0; |
| 66 | uint8_t soft_bits[0]; |
Pau Espin Pedrol | 778b30a | 2019-06-28 13:27:24 +0200 | [diff] [blame] | 67 | } __attribute__ ((packed)); |
Pau Espin Pedrol | cf6113b | 2019-07-01 20:42:53 +0200 | [diff] [blame] | 68 | |
| 69 | |
| 70 | #define TRXD_MODULATION_GMSK(ts_set) (0b0000 | (ts_set & 0b0011)) |
| 71 | #define TRXD_MODULATION_8PSK(ts_set) (0b0100 | (ts_set & 0b0001)) |
| 72 | #define TRXD_MODULATION_AQPSK(ts_set) (0b0110 | (ts_set & 0b0001)) |
| 73 | #define TRXD_MODULATION_16QAM(ts_set) (0b1000 | (ts_set & 0b0001)) |
| 74 | #define TRXD_MODULATION_32QAM(ts_set) (0b1010 | (ts_set & 0b0001)) |
| 75 | |
| 76 | struct trxd_hdr_v1_specific { |
| 77 | #if OSMO_IS_LITTLE_ENDIAN |
| 78 | uint8_t tsc:3, |
| 79 | modulation:4, |
| 80 | idle:1; |
| 81 | #elif OSMO_IS_BIG_ENDIAN |
| 82 | uint8_t idle:1, |
| 83 | modulation:4, |
| 84 | tsc:3; |
| 85 | #endif |
| 86 | int16_t ci; /* big endian, in centiBels */ |
| 87 | } __attribute__ ((packed)); |
| 88 | |
| 89 | struct trxd_hdr_v1 { |
| 90 | struct trxd_hdr_common common; |
| 91 | struct trxd_hdr_v0_specific v0; |
| 92 | struct trxd_hdr_v1_specific v1; |
| 93 | uint8_t soft_bits[0]; |
| 94 | } __attribute__ ((packed)); |