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gerrit.osmocom.org / osmo-mgw / d47a4beff8753feb23704c0e18bbba9660c388c5 / . / src / e1_config.c
blob: 4110d489e498e6689742828e8dd8fffff3bcd510 [file] [log] [blame]
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]1#include <string.h>
2#include <errno.h>
3
4#include <openbsc/gsm_data.h>
5#include <openbsc/e1_input.h>
Harald Welte39a1b712009-02-10 17:17:09 +0000[diff] [blame]6#include <openbsc/trau_mux.h>
Holger Freytherff9592f2009-03-09 16:17:14 +0000[diff] [blame]7#include <openbsc/misdn.h>
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]8
9#define SAPI_L2ML 0
10#define SAPI_OML 62
11#define SAPI_RSL 0 /* 63 ? */
12
13#define TEI_L2ML 127
14#define TEI_OML 25
15#define TEI_RSL 1
16
17/* do some compiled-in configuration for our BTS/E1 setup */
Holger Freytherb5c00f52009-04-22 22:08:07 +0000[diff] [blame]18int e1_config(struct gsm_bts *bts, int cardnr, int release_l2)
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]19{
20 struct e1inp_line *line;
21 struct e1inp_ts *sign_ts;
22 struct e1inp_sign_link *oml_link, *rsl_link;
23
24 line = malloc(sizeof(*line));
25 if (!line)
26 return -ENOMEM;
27 memset(line, 0, sizeof(*line));
28
29 /* create E1 timeslots for signalling and TRAU frames */
30 e1inp_ts_config(&line->ts[1-1], line, E1INP_TS_TYPE_SIGN);
31 e1inp_ts_config(&line->ts[2-1], line, E1INP_TS_TYPE_TRAU);
Harald Welted47a4be2009-04-29 16:21:34 +0000[diff] [blame^]32 e1inp_ts_config(&line->ts[3-1], line, E1INP_TS_TYPE_TRAU);
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]33
34 /* create signalling links for TS1 */
35 sign_ts = &line->ts[1-1];
36 oml_link = e1inp_sign_link_create(sign_ts, E1INP_SIGN_OML,
37 bts->c0, TEI_OML, SAPI_OML);
38 rsl_link = e1inp_sign_link_create(sign_ts, E1INP_SIGN_RSL,
39 bts->c0, TEI_RSL, SAPI_RSL);
40
41 /* create back-links from bts/trx */
42 bts->oml_link = oml_link;
43 bts->c0->rsl_link = rsl_link;
44
Harald Welte11fa29c2009-02-19 17:24:39 +0000[diff] [blame]45 /* enable subchannel demuxer on TS2 */
46 subch_demux_activate(&line->ts[2-1].trau.demux, 1);
47 subch_demux_activate(&line->ts[2-1].trau.demux, 2);
48 subch_demux_activate(&line->ts[2-1].trau.demux, 3);
Harald Welte93d3f372009-02-18 03:27:14 +0000[diff] [blame]49
Harald Welte11fa29c2009-02-19 17:24:39 +0000[diff] [blame]50 /* enable subchannel demuxer on TS3 */
51 subch_demux_activate(&line->ts[3-1].trau.demux, 0);
52 subch_demux_activate(&line->ts[3-1].trau.demux, 1);
53 subch_demux_activate(&line->ts[3-1].trau.demux, 2);
54 subch_demux_activate(&line->ts[3-1].trau.demux, 3);
Harald Welte11fa29c2009-02-19 17:24:39 +0000[diff] [blame]55
Harald Welte39a1b712009-02-10 17:17:09 +0000[diff] [blame]56#ifdef HAVE_TRX1
57 /* create E1 timeslots for TRAU frames of TRX1 */
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]58 e1inp_ts_config(&line->ts[4-1], line, E1INP_TS_TYPE_TRAU);
59 e1inp_ts_config(&line->ts[5-1], line, E1INP_TS_TYPE_TRAU);
60
Harald Welte39a1b712009-02-10 17:17:09 +0000[diff] [blame]61 /* create RSL signalling link for TRX1 */
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]62 sign_ts = &line->ts[1-1];
63 rsl_link = e1inp_sign_link_create(sign_ts, E1INP_SIGN_RSL,
64 &bts->trx[1], TEI_RSL+1, SAPI_RSL);
65 /* create back-links from trx */
66 bts->trx[1].rsl_link = rsl_link;
67#endif
68
Holger Freytherb5c00f52009-04-22 22:08:07 +0000[diff] [blame]69 return mi_setup(cardnr, line, release_l2);
Harald Welte1fa60c82009-02-09 18:13:26 +0000[diff] [blame]70}
Harald Welte5fd8a542009-02-13 02:43:36 +0000[diff] [blame]71
72/* do some compiled-in configuration for our BTS/E1 setup */
73int ia_config(struct gsm_bts *bts)
74{
75 struct e1inp_line *line;
Harald Welte5c1e4582009-02-15 11:57:29 +0000[diff] [blame]76 struct e1inp_ts *sign_ts, *rsl_ts;
Harald Welte5fd8a542009-02-13 02:43:36 +0000[diff] [blame]77 struct e1inp_sign_link *oml_link, *rsl_link;
78
79 line = malloc(sizeof(*line));
80 if (!line)
81 return -ENOMEM;
82 memset(line, 0, sizeof(*line));
83
84 /* create E1 timeslots for signalling and TRAU frames */
85 e1inp_ts_config(&line->ts[1-1], line, E1INP_TS_TYPE_SIGN);
Harald Welte5c1e4582009-02-15 11:57:29 +0000[diff] [blame]86 e1inp_ts_config(&line->ts[2-1], line, E1INP_TS_TYPE_SIGN);
Harald Welte5fd8a542009-02-13 02:43:36 +0000[diff] [blame]87
88 /* create signalling links for TS1 */
89 sign_ts = &line->ts[1-1];
Harald Welte5c1e4582009-02-15 11:57:29 +0000[diff] [blame]90 rsl_ts = &line->ts[2-1];
Harald Welte5fd8a542009-02-13 02:43:36 +0000[diff] [blame]91 oml_link = e1inp_sign_link_create(sign_ts, E1INP_SIGN_OML,
92 bts->c0, 0, 0xff);
Harald Welte5c1e4582009-02-15 11:57:29 +0000[diff] [blame]93 rsl_link = e1inp_sign_link_create(rsl_ts, E1INP_SIGN_RSL,
Harald Welte5fd8a542009-02-13 02:43:36 +0000[diff] [blame]94 bts->c0, 0, 0);
95
96 /* create back-links from bts/trx */
97 bts->oml_link = oml_link;
98 bts->c0->rsl_link = rsl_link;
99
100 return ipaccess_setup(line);
101}