Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1 | /* Ericsson RBS 2xxx GSM O&M (OM2000) messages on the A-bis interface |
| 2 | * implemented based on protocol trace analysis, no formal documentation */ |
| 3 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 4 | /* (C) 2010-2011,2016 by Harald Welte <laforge@gnumonks.org> |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 5 | * |
| 6 | * All Rights Reserved |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU Affero General Public License as published by |
| 10 | * the Free Software Foundation; either version 3 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU Affero General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU Affero General Public License |
| 19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | |
| 24 | #include <errno.h> |
| 25 | #include <unistd.h> |
| 26 | #include <stdio.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <time.h> |
| 29 | #include <stdint.h> |
| 30 | |
| 31 | #include <arpa/inet.h> |
| 32 | |
Pablo Neira Ayuso | 136f453 | 2011-03-22 16:47:59 +0100 | [diff] [blame] | 33 | #include <osmocom/core/msgb.h> |
| 34 | #include <osmocom/gsm/tlv.h> |
| 35 | #include <osmocom/core/talloc.h> |
| 36 | #include <osmocom/core/utils.h> |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 37 | #include <osmocom/core/fsm.h> |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 38 | |
| 39 | #include <openbsc/gsm_data.h> |
| 40 | #include <openbsc/debug.h> |
| 41 | #include <openbsc/abis_nm.h> |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 42 | #include <openbsc/abis_om2000.h> |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 43 | #include <openbsc/signal.h> |
Pablo Neira Ayuso | ed5cacb | 2011-08-17 22:44:07 +0200 | [diff] [blame] | 44 | #include <osmocom/abis/e1_input.h> |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 45 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 46 | /* FIXME: move to libosmocore */ |
| 47 | struct osmo_fsm_inst *osmo_fsm_inst_alloc_child_id(struct osmo_fsm *fsm, |
| 48 | struct osmo_fsm_inst *parent, |
| 49 | uint32_t parent_term_event, |
| 50 | const char *id) |
| 51 | { |
| 52 | struct osmo_fsm_inst *fi; |
| 53 | |
| 54 | fi = osmo_fsm_inst_alloc(fsm, parent, NULL, parent->log_level, |
| 55 | id ? id : parent->id); |
| 56 | if (!fi) { |
| 57 | /* indicate immediate termination to caller */ |
| 58 | osmo_fsm_inst_dispatch(parent, parent_term_event, NULL); |
| 59 | return NULL; |
| 60 | } |
| 61 | |
| 62 | LOGPFSM(fi, "is child of %s\n", osmo_fsm_inst_name(parent)); |
| 63 | |
| 64 | fi->proc.parent = parent; |
| 65 | fi->proc.parent_term_event = parent_term_event; |
| 66 | llist_add(&fi->proc.child, &parent->proc.children); |
| 67 | |
| 68 | return fi; |
| 69 | } |
| 70 | |
| 71 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 72 | #define OM_ALLOC_SIZE 1024 |
| 73 | #define OM_HEADROOM_SIZE 128 |
| 74 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 75 | #define OM2K_TIMEOUT 10 |
| 76 | #define TRX_FSM_TIMEOUT 60 |
| 77 | #define BTS_FSM_TIMEOUT 60 |
| 78 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 79 | /* use following functions from abis_nm.c: |
| 80 | * om2k_msgb_alloc() |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 81 | * abis_om2k_sendmsg() |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 82 | */ |
| 83 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 84 | struct abis_om2k_hdr { |
| 85 | struct abis_om_hdr om; |
| 86 | uint16_t msg_type; |
| 87 | struct abis_om2k_mo mo; |
| 88 | uint8_t data[0]; |
| 89 | } __attribute__ ((packed)); |
| 90 | |
| 91 | enum abis_om2k_msgtype { |
| 92 | OM2K_MSGT_ABORT_SP_CMD = 0x0000, |
| 93 | OM2K_MSGT_ABORT_SP_COMPL = 0x0002, |
| 94 | OM2K_MSGT_ALARM_REP_ACK = 0x0004, |
| 95 | OM2K_MSGT_ALARM_REP_NACK = 0x0005, |
| 96 | OM2K_MSGT_ALARM_REP = 0x0006, |
| 97 | OM2K_MSGT_ALARM_STATUS_REQ = 0x0008, |
| 98 | OM2K_MSGT_ALARM_STATUS_REQ_ACK = 0x000a, |
| 99 | OM2K_MSGT_ALARM_STATUS_REQ_REJ = 0x000b, |
| 100 | OM2K_MSGT_ALARM_STATUS_RES_ACK = 0x000c, |
| 101 | OM2K_MSGT_ALARM_STATUS_RES_NACK = 0x000d, |
| 102 | OM2K_MSGT_ALARM_STATUS_RES = 0x000e, |
| 103 | OM2K_MSGT_CAL_TIME_RESP = 0x0010, |
| 104 | OM2K_MSGT_CAL_TIME_REJ = 0x0011, |
| 105 | OM2K_MSGT_CAL_TIME_REQ = 0x0012, |
| 106 | |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 107 | OM2K_MSGT_CON_CONF_REQ = 0x0014, |
| 108 | OM2K_MSGT_CON_CONF_REQ_ACK = 0x0016, |
| 109 | OM2K_MSGT_CON_CONF_REQ_REJ = 0x0017, |
| 110 | OM2K_MSGT_CON_CONF_RES_ACK = 0x0018, |
| 111 | OM2K_MSGT_CON_CONF_RES_NACK = 0x0019, |
| 112 | OM2K_MSGT_CON_CONF_RES = 0x001a, |
| 113 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 114 | OM2K_MSGT_CONNECT_CMD = 0x001c, |
| 115 | OM2K_MSGT_CONNECT_COMPL = 0x001e, |
| 116 | OM2K_MSGT_CONNECT_REJ = 0x001f, |
| 117 | |
Harald Welte | 0741ffe | 2011-02-12 18:48:53 +0100 | [diff] [blame] | 118 | OM2K_MSGT_DISABLE_REQ = 0x0028, |
| 119 | OM2K_MSGT_DISABLE_REQ_ACK = 0x002a, |
| 120 | OM2K_MSGT_DISABLE_REQ_REJ = 0x002b, |
| 121 | OM2K_MSGT_DISABLE_RES_ACK = 0x002c, |
| 122 | OM2K_MSGT_DISABLE_RES_NACK = 0x002d, |
| 123 | OM2K_MSGT_DISABLE_RES = 0x002e, |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 124 | OM2K_MSGT_DISCONNECT_CMD = 0x0030, |
| 125 | OM2K_MSGT_DISCONNECT_COMPL = 0x0032, |
| 126 | OM2K_MSGT_DISCONNECT_REJ = 0x0033, |
Harald Welte | 0741ffe | 2011-02-12 18:48:53 +0100 | [diff] [blame] | 127 | OM2K_MSGT_ENABLE_REQ = 0x0034, |
| 128 | OM2K_MSGT_ENABLE_REQ_ACK = 0x0036, |
| 129 | OM2K_MSGT_ENABLE_REQ_REJ = 0x0037, |
| 130 | OM2K_MSGT_ENABLE_RES_ACK = 0x0038, |
| 131 | OM2K_MSGT_ENABLE_RES_NACK = 0x0039, |
| 132 | OM2K_MSGT_ENABLE_RES = 0x003a, |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 133 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 134 | OM2K_MSGT_FAULT_REP_ACK = 0x0040, |
| 135 | OM2K_MSGT_FAULT_REP_NACK = 0x0041, |
| 136 | OM2K_MSGT_FAULT_REP = 0x0042, |
| 137 | |
| 138 | OM2K_MSGT_IS_CONF_REQ = 0x0060, |
| 139 | OM2K_MSGT_IS_CONF_REQ_ACK = 0x0062, |
| 140 | OM2K_MSGT_IS_CONF_REQ_REJ = 0x0063, |
| 141 | OM2K_MSGT_IS_CONF_RES_ACK = 0x0064, |
| 142 | OM2K_MSGT_IS_CONF_RES_NACK = 0x0065, |
| 143 | OM2K_MSGT_IS_CONF_RES = 0x0066, |
| 144 | |
| 145 | OM2K_MSGT_OP_INFO = 0x0074, |
| 146 | OM2K_MSGT_OP_INFO_ACK = 0x0076, |
| 147 | OM2K_MSGT_OP_INFO_REJ = 0x0077, |
| 148 | OM2K_MSGT_RESET_CMD = 0x0078, |
| 149 | OM2K_MSGT_RESET_COMPL = 0x007a, |
| 150 | OM2K_MSGT_RESET_REJ = 0x007b, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 151 | OM2K_MSGT_RX_CONF_REQ = 0x007c, |
| 152 | OM2K_MSGT_RX_CONF_REQ_ACK = 0x007e, |
| 153 | OM2K_MSGT_RX_CONF_REQ_REJ = 0x007f, |
| 154 | OM2K_MSGT_RX_CONF_RES_ACK = 0x0080, |
| 155 | OM2K_MSGT_RX_CONF_RES_NACK = 0x0081, |
| 156 | OM2K_MSGT_RX_CONF_RES = 0x0082, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 157 | OM2K_MSGT_START_REQ = 0x0084, |
| 158 | OM2K_MSGT_START_REQ_ACK = 0x0086, |
| 159 | OM2K_MSGT_START_REQ_REJ = 0x0087, |
| 160 | OM2K_MSGT_START_RES_ACK = 0x0088, |
| 161 | OM2K_MSGT_START_RES_NACK = 0x0089, |
| 162 | OM2K_MSGT_START_RES = 0x008a, |
Harald Welte | e1d5eca | 2011-02-12 14:42:59 +0100 | [diff] [blame] | 163 | OM2K_MSGT_STATUS_REQ = 0x008c, |
| 164 | OM2K_MSGT_STATUS_RESP = 0x008e, |
| 165 | OM2K_MSGT_STATUS_REJ = 0x008f, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 166 | |
Harald Welte | 8024d8f | 2011-02-12 15:07:30 +0100 | [diff] [blame] | 167 | OM2K_MSGT_TEST_REQ = 0x0094, |
| 168 | OM2K_MSGT_TEST_REQ_ACK = 0x0096, |
| 169 | OM2K_MSGT_TEST_REQ_REJ = 0x0097, |
| 170 | OM2K_MSGT_TEST_RES_ACK = 0x0098, |
| 171 | OM2K_MSGT_TEST_RES_NACK = 0x0099, |
| 172 | OM2K_MSGT_TEST_RES = 0x009a, |
| 173 | |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 174 | OM2K_MSGT_TF_CONF_REQ = 0x00a0, |
| 175 | OM2K_MSGT_TF_CONF_REQ_ACK = 0x00a2, |
| 176 | OM2K_MSGT_TF_CONF_REQ_REJ = 0x00a3, |
| 177 | OM2K_MSGT_TF_CONF_RES_ACK = 0x00a4, |
| 178 | OM2K_MSGT_TF_CONF_RES_NACK = 0x00a5, |
| 179 | OM2K_MSGT_TF_CONF_RES = 0x00a6, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 180 | OM2K_MSGT_TS_CONF_REQ = 0x00a8, |
| 181 | OM2K_MSGT_TS_CONF_REQ_ACK = 0x00aa, |
| 182 | OM2K_MSGT_TS_CONF_REQ_REJ = 0x00ab, |
| 183 | OM2K_MSGT_TS_CONF_RES_ACK = 0x00ac, |
| 184 | OM2K_MSGT_TS_CONF_RES_NACK = 0x00ad, |
| 185 | OM2K_MSGT_TS_CONF_RES = 0x00ae, |
| 186 | OM2K_MSGT_TX_CONF_REQ = 0x00b0, |
| 187 | OM2K_MSGT_TX_CONF_REQ_ACK = 0x00b2, |
| 188 | OM2K_MSGT_TX_CONF_REQ_REJ = 0x00b3, |
| 189 | OM2K_MSGT_TX_CONF_RES_ACK = 0x00b4, |
| 190 | OM2K_MSGT_TX_CONF_RES_NACK = 0x00b5, |
| 191 | OM2K_MSGT_TX_CONF_RES = 0x00b6, |
| 192 | |
root | 4579978 | 2016-10-15 21:24:57 +0200 | [diff] [blame] | 193 | OM2K_MSGT_CAPA_REQ = 0x00e8, |
| 194 | OM2K_MSGT_CAPA_REQ_ACK = 0x00ea, |
| 195 | OM2K_MSGT_CAPA_REQ_REJ = 0x00eb, |
| 196 | OM2K_MSGT_CAPA_RES = 0x00ee, |
| 197 | OM2K_MSGT_CAPA_RES_ACK = 0x00ec, |
| 198 | OM2K_MSGT_CAPA_RES_NACK = 0x00ed, |
| 199 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 200 | OM2K_MSGT_NEGOT_REQ_ACK = 0x0104, |
| 201 | OM2K_MSGT_NEGOT_REQ_NACK = 0x0105, |
| 202 | OM2K_MSGT_NEGOT_REQ = 0x0106, |
| 203 | }; |
| 204 | |
| 205 | enum abis_om2k_dei { |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 206 | OM2K_DEI_ACCORDANCE_IND = 0x00, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 207 | OM2K_DEI_BCC = 0x06, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 208 | OM2K_DEI_BS_AG_BKS_RES = 0x07, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 209 | OM2K_DEI_BSIC = 0x09, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 210 | OM2K_DEI_BA_PA_MFRMS = 0x0a, |
| 211 | OM2K_DEI_CBCH_INDICATOR = 0x0b, |
| 212 | OM2K_DEI_CCCH_OPTIONS = 0x0c, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 213 | OM2K_DEI_CAL_TIME = 0x0d, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 214 | OM2K_DEI_COMBINATION = 0x0f, |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 215 | OM2K_DEI_CON_CONN_LIST = 0x10, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 216 | OM2K_DEI_DRX_DEV_MAX = 0x12, |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 217 | OM2K_DEI_END_LIST_NR = 0x13, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 218 | OM2K_DEI_EXT_COND_MAP_1 = 0x14, |
| 219 | OM2K_DEI_EXT_COND_MAP_2 = 0x15, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 220 | OM2K_DEI_FILLING_MARKER = 0x1c, |
| 221 | OM2K_DEI_FN_OFFSET = 0x1d, |
| 222 | OM2K_DEI_FREQ_LIST = 0x1e, |
| 223 | OM2K_DEI_FREQ_SPEC_RX = 0x1f, |
| 224 | OM2K_DEI_FREQ_SPEC_TX = 0x20, |
| 225 | OM2K_DEI_HSN = 0x21, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 226 | OM2K_DEI_ICM_INDICATOR = 0x22, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 227 | OM2K_DEI_INT_FAULT_MAP_1A = 0x23, |
| 228 | OM2K_DEI_INT_FAULT_MAP_1B = 0x24, |
| 229 | OM2K_DEI_INT_FAULT_MAP_2A = 0x25, |
| 230 | OM2K_DEI_INT_FAULT_MAP_2A_EXT = 0x26, |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 231 | OM2K_DEI_IS_CONN_LIST = 0x27, |
| 232 | OM2K_DEI_LIST_NR = 0x28, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 233 | OM2K_DEI_LOCAL_ACCESS = 0x2a, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 234 | OM2K_DEI_MAIO = 0x2b, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 235 | OM2K_DEI_MO_STATE = 0x2c, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 236 | OM2K_DEI_NY1 = 0x2d, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 237 | OM2K_DEI_OP_INFO = 0x2e, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 238 | OM2K_DEI_POWER = 0x2f, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 239 | OM2K_DEI_REASON_CODE = 0x32, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 240 | OM2K_DEI_RX_DIVERSITY = 0x33, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 241 | OM2K_DEI_RESULT_CODE = 0x35, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 242 | OM2K_DEI_T3105 = 0x38, |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 243 | OM2K_DEI_TF_MODE = 0x3a, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 244 | OM2K_DEI_TS_NR = 0x3c, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 245 | OM2K_DEI_TSC = 0x3d, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 246 | OM2K_DEI_BTS_VERSION = 0x40, |
| 247 | OM2K_DEI_OML_IWD_VERSION = 0x41, |
| 248 | OM2K_DEI_RSL_IWD_VERSION = 0x42, |
| 249 | OM2K_DEI_OML_FUNC_MAP_1 = 0x43, |
| 250 | OM2K_DEI_OML_FUNC_MAP_2 = 0x44, |
| 251 | OM2K_DEI_RSL_FUNC_MAP_1 = 0x45, |
| 252 | OM2K_DEI_RSL_FUNC_MAP_2 = 0x46, |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 253 | OM2K_DEI_EXT_RANGE = 0x47, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 254 | OM2K_DEI_REQ_IND = 0x48, |
| 255 | OM2K_DEI_REPL_UNIT_MAP = 0x50, |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 256 | OM2K_DEI_ICM_BOUND_PARAMS = 0x74, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 257 | OM2K_DEI_LSC = 0x79, |
| 258 | OM2K_DEI_LSC_FILT_TIME = 0x7a, |
| 259 | OM2K_DEI_CALL_SUPV_TIME = 0x7b, |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 260 | OM2K_DEI_ICM_CHAN_RATE = 0x7e, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 261 | OM2K_DEI_HW_INFO_SIG = 0x84, |
Harald Welte | ba9adbb | 2011-03-06 19:01:16 +0100 | [diff] [blame] | 262 | OM2K_DEI_TF_SYNC_SRC = 0x86, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 263 | OM2K_DEI_TTA = 0x87, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 264 | OM2K_DEI_CAPA_SIG = 0x8a, |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 265 | OM2K_DEI_NEGOT_REC1 = 0x90, |
| 266 | OM2K_DEI_NEGOT_REC2 = 0x91, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 267 | OM2K_DEI_ENCR_ALG = 0x92, |
| 268 | OM2K_DEI_INTERF_REJ_COMB = 0x94, |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 269 | OM2K_DEI_FS_OFFSET = 0x98, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 270 | OM2K_DEI_EXT_COND_MAP_2_EXT = 0x9c, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 271 | }; |
| 272 | |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 273 | const struct tlv_definition om2k_att_tlvdef = { |
| 274 | .def = { |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 275 | [OM2K_DEI_ACCORDANCE_IND] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 276 | [OM2K_DEI_BCC] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 277 | [OM2K_DEI_BS_AG_BKS_RES] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 278 | [OM2K_DEI_BSIC] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 279 | [OM2K_DEI_BA_PA_MFRMS] = { TLV_TYPE_TV }, |
| 280 | [OM2K_DEI_CBCH_INDICATOR] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 281 | [OM2K_DEI_INT_FAULT_MAP_1A] = { TLV_TYPE_FIXED, 6 }, |
| 282 | [OM2K_DEI_INT_FAULT_MAP_1B] = { TLV_TYPE_FIXED, 6 }, |
| 283 | [OM2K_DEI_INT_FAULT_MAP_2A] = { TLV_TYPE_FIXED, 6 }, |
| 284 | [OM2K_DEI_INT_FAULT_MAP_2A_EXT]={ TLV_TYPE_FIXED, 6 }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 285 | [OM2K_DEI_CCCH_OPTIONS] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 286 | [OM2K_DEI_CAL_TIME] = { TLV_TYPE_FIXED, 6 }, |
| 287 | [OM2K_DEI_COMBINATION] = { TLV_TYPE_TV }, |
| 288 | [OM2K_DEI_CON_CONN_LIST] = { TLV_TYPE_TLV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 289 | [OM2K_DEI_DRX_DEV_MAX] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 290 | [OM2K_DEI_END_LIST_NR] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 291 | [OM2K_DEI_EXT_COND_MAP_1] = { TLV_TYPE_FIXED, 2 }, |
| 292 | [OM2K_DEI_EXT_COND_MAP_2] = { TLV_TYPE_FIXED, 2 }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 293 | [OM2K_DEI_FILLING_MARKER] = { TLV_TYPE_TV }, |
| 294 | [OM2K_DEI_FN_OFFSET] = { TLV_TYPE_FIXED, 2 }, |
| 295 | [OM2K_DEI_FREQ_LIST] = { TLV_TYPE_TLV }, |
| 296 | [OM2K_DEI_FREQ_SPEC_RX] = { TLV_TYPE_FIXED, 2 }, |
| 297 | [OM2K_DEI_FREQ_SPEC_TX] = { TLV_TYPE_FIXED, 2 }, |
| 298 | [OM2K_DEI_HSN] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 299 | [OM2K_DEI_ICM_INDICATOR] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 300 | [OM2K_DEI_IS_CONN_LIST] = { TLV_TYPE_TLV }, |
| 301 | [OM2K_DEI_LIST_NR] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 302 | [OM2K_DEI_LOCAL_ACCESS] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 303 | [OM2K_DEI_MAIO] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 304 | [OM2K_DEI_MO_STATE] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 305 | [OM2K_DEI_NY1] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 306 | [OM2K_DEI_OP_INFO] = { TLV_TYPE_TV }, |
| 307 | [OM2K_DEI_POWER] = { TLV_TYPE_TV }, |
| 308 | [OM2K_DEI_REASON_CODE] = { TLV_TYPE_TV }, |
| 309 | [OM2K_DEI_RX_DIVERSITY] = { TLV_TYPE_TV }, |
| 310 | [OM2K_DEI_RESULT_CODE] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 311 | [OM2K_DEI_T3105] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 312 | [OM2K_DEI_TF_MODE] = { TLV_TYPE_TV }, |
| 313 | [OM2K_DEI_TS_NR] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 314 | [OM2K_DEI_TSC] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 315 | [OM2K_DEI_BTS_VERSION] = { TLV_TYPE_FIXED, 12 }, |
| 316 | [OM2K_DEI_OML_IWD_VERSION] = { TLV_TYPE_FIXED, 6 }, |
| 317 | [OM2K_DEI_RSL_IWD_VERSION] = { TLV_TYPE_FIXED, 6 }, |
| 318 | [OM2K_DEI_OML_FUNC_MAP_1] = { TLV_TYPE_TLV }, |
| 319 | [OM2K_DEI_OML_FUNC_MAP_2] = { TLV_TYPE_TLV }, |
| 320 | [OM2K_DEI_RSL_FUNC_MAP_1] = { TLV_TYPE_TLV }, |
| 321 | [OM2K_DEI_RSL_FUNC_MAP_2] = { TLV_TYPE_TLV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 322 | [OM2K_DEI_EXT_RANGE] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 323 | [OM2K_DEI_REQ_IND] = { TLV_TYPE_TV }, |
| 324 | [OM2K_DEI_REPL_UNIT_MAP] = { TLV_TYPE_FIXED, 6 }, |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 325 | [OM2K_DEI_ICM_BOUND_PARAMS] = { TLV_TYPE_FIXED, 5 }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 326 | [OM2K_DEI_LSC] = { TLV_TYPE_TV }, |
| 327 | [OM2K_DEI_LSC_FILT_TIME] = { TLV_TYPE_TV }, |
| 328 | [OM2K_DEI_CALL_SUPV_TIME] = { TLV_TYPE_TV }, |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 329 | [OM2K_DEI_ICM_CHAN_RATE] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 330 | [OM2K_DEI_HW_INFO_SIG] = { TLV_TYPE_FIXED, 2 }, |
Harald Welte | ba9adbb | 2011-03-06 19:01:16 +0100 | [diff] [blame] | 331 | [OM2K_DEI_TF_SYNC_SRC] = { TLV_TYPE_TV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 332 | [OM2K_DEI_TTA] = { TLV_TYPE_TV }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 333 | [OM2K_DEI_CAPA_SIG] = { TLV_TYPE_FIXED, 2 }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 334 | [OM2K_DEI_NEGOT_REC1] = { TLV_TYPE_TLV }, |
| 335 | [OM2K_DEI_NEGOT_REC2] = { TLV_TYPE_TLV }, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 336 | [OM2K_DEI_ENCR_ALG] = { TLV_TYPE_TV }, |
| 337 | [OM2K_DEI_INTERF_REJ_COMB] = { TLV_TYPE_TV }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 338 | [OM2K_DEI_FS_OFFSET] = { TLV_TYPE_FIXED, 5 }, |
Harald Welte | f6d6b21 | 2011-03-05 20:13:52 +0100 | [diff] [blame] | 339 | [OM2K_DEI_EXT_COND_MAP_2_EXT] = { TLV_TYPE_FIXED, 4 }, |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 340 | }, |
| 341 | }; |
| 342 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 343 | static const struct value_string om2k_msgcode_vals[] = { |
| 344 | { 0x0000, "Abort SP Command" }, |
| 345 | { 0x0002, "Abort SP Complete" }, |
| 346 | { 0x0004, "Alarm Report ACK" }, |
| 347 | { 0x0005, "Alarm Report NACK" }, |
| 348 | { 0x0006, "Alarm Report" }, |
| 349 | { 0x0008, "Alarm Status Request" }, |
| 350 | { 0x000a, "Alarm Status Request Accept" }, |
| 351 | { 0x000b, "Alarm Status Request Reject" }, |
| 352 | { 0x000c, "Alarm Status Result ACK" }, |
| 353 | { 0x000d, "Alarm Status Result NACK" }, |
| 354 | { 0x000e, "Alarm Status Result" }, |
| 355 | { 0x0010, "Calendar Time Response" }, |
| 356 | { 0x0011, "Calendar Time Reject" }, |
| 357 | { 0x0012, "Calendar Time Request" }, |
| 358 | { 0x0014, "CON Configuration Request" }, |
| 359 | { 0x0016, "CON Configuration Request Accept" }, |
| 360 | { 0x0017, "CON Configuration Request Reject" }, |
| 361 | { 0x0018, "CON Configuration Result ACK" }, |
| 362 | { 0x0019, "CON Configuration Result NACK" }, |
| 363 | { 0x001a, "CON Configuration Result" }, |
| 364 | { 0x001c, "Connect Command" }, |
| 365 | { 0x001e, "Connect Complete" }, |
Harald Welte | 3ede723 | 2011-03-05 17:58:13 +0100 | [diff] [blame] | 366 | { 0x001f, "Connect Reject" }, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 367 | { 0x0028, "Disable Request" }, |
| 368 | { 0x002a, "Disable Request Accept" }, |
| 369 | { 0x002b, "Disable Request Reject" }, |
| 370 | { 0x002c, "Disable Result ACK" }, |
| 371 | { 0x002d, "Disable Result NACK" }, |
| 372 | { 0x002e, "Disable Result" }, |
| 373 | { 0x0030, "Disconnect Command" }, |
| 374 | { 0x0032, "Disconnect Complete" }, |
| 375 | { 0x0033, "Disconnect Reject" }, |
| 376 | { 0x0034, "Enable Request" }, |
| 377 | { 0x0036, "Enable Request Accept" }, |
| 378 | { 0x0037, "Enable Request Reject" }, |
| 379 | { 0x0038, "Enable Result ACK" }, |
| 380 | { 0x0039, "Enable Result NACK" }, |
| 381 | { 0x003a, "Enable Result" }, |
| 382 | { 0x003c, "Escape Downlink Normal" }, |
| 383 | { 0x003d, "Escape Downlink NACK" }, |
| 384 | { 0x003e, "Escape Uplink Normal" }, |
| 385 | { 0x003f, "Escape Uplink NACK" }, |
| 386 | { 0x0040, "Fault Report ACK" }, |
| 387 | { 0x0041, "Fault Report NACK" }, |
| 388 | { 0x0042, "Fault Report" }, |
| 389 | { 0x0044, "File Package End Command" }, |
| 390 | { 0x0046, "File Package End Result" }, |
| 391 | { 0x0047, "File Package End Reject" }, |
| 392 | { 0x0048, "File Relation Request" }, |
| 393 | { 0x004a, "File Relation Response" }, |
| 394 | { 0x004b, "File Relation Request Reject" }, |
| 395 | { 0x004c, "File Segment Transfer" }, |
| 396 | { 0x004e, "File Segment Transfer Complete" }, |
| 397 | { 0x004f, "File Segment Transfer Reject" }, |
| 398 | { 0x0050, "HW Information Request" }, |
| 399 | { 0x0052, "HW Information Request Accept" }, |
| 400 | { 0x0053, "HW Information Request Reject" }, |
| 401 | { 0x0054, "HW Information Result ACK" }, |
| 402 | { 0x0055, "HW Information Result NACK" }, |
| 403 | { 0x0056, "HW Information Result" }, |
| 404 | { 0x0060, "IS Configuration Request" }, |
| 405 | { 0x0062, "IS Configuration Request Accept" }, |
| 406 | { 0x0063, "IS Configuration Request Reject" }, |
| 407 | { 0x0064, "IS Configuration Result ACK" }, |
| 408 | { 0x0065, "IS Configuration Result NACK" }, |
| 409 | { 0x0066, "IS Configuration Result" }, |
| 410 | { 0x0068, "Load Data End" }, |
| 411 | { 0x006a, "Load Data End Result" }, |
| 412 | { 0x006b, "Load Data End Reject" }, |
| 413 | { 0x006c, "Load Data Init" }, |
| 414 | { 0x006e, "Load Data Init Accept" }, |
| 415 | { 0x006f, "Load Data Init Reject" }, |
| 416 | { 0x0070, "Loop Control Command" }, |
| 417 | { 0x0072, "Loop Control Complete" }, |
| 418 | { 0x0073, "Loop Control Reject" }, |
| 419 | { 0x0074, "Operational Information" }, |
| 420 | { 0x0076, "Operational Information Accept" }, |
| 421 | { 0x0077, "Operational Information Reject" }, |
| 422 | { 0x0078, "Reset Command" }, |
| 423 | { 0x007a, "Reset Complete" }, |
| 424 | { 0x007b, "Reset Reject" }, |
| 425 | { 0x007c, "RX Configuration Request" }, |
| 426 | { 0x007e, "RX Configuration Request Accept" }, |
| 427 | { 0x007f, "RX Configuration Request Reject" }, |
| 428 | { 0x0080, "RX Configuration Result ACK" }, |
| 429 | { 0x0081, "RX Configuration Result NACK" }, |
| 430 | { 0x0082, "RX Configuration Result" }, |
| 431 | { 0x0084, "Start Request" }, |
| 432 | { 0x0086, "Start Request Accept" }, |
| 433 | { 0x0087, "Start Request Reject" }, |
| 434 | { 0x0088, "Start Result ACK" }, |
| 435 | { 0x0089, "Start Result NACK" }, |
| 436 | { 0x008a, "Start Result" }, |
| 437 | { 0x008c, "Status Request" }, |
| 438 | { 0x008e, "Status Response" }, |
| 439 | { 0x008f, "Status Reject" }, |
| 440 | { 0x0094, "Test Request" }, |
| 441 | { 0x0096, "Test Request Accept" }, |
| 442 | { 0x0097, "Test Request Reject" }, |
| 443 | { 0x0098, "Test Result ACK" }, |
| 444 | { 0x0099, "Test Result NACK" }, |
| 445 | { 0x009a, "Test Result" }, |
| 446 | { 0x00a0, "TF Configuration Request" }, |
| 447 | { 0x00a2, "TF Configuration Request Accept" }, |
| 448 | { 0x00a3, "TF Configuration Request Reject" }, |
| 449 | { 0x00a4, "TF Configuration Result ACK" }, |
| 450 | { 0x00a5, "TF Configuration Result NACK" }, |
| 451 | { 0x00a6, "TF Configuration Result" }, |
| 452 | { 0x00a8, "TS Configuration Request" }, |
| 453 | { 0x00aa, "TS Configuration Request Accept" }, |
| 454 | { 0x00ab, "TS Configuration Request Reject" }, |
| 455 | { 0x00ac, "TS Configuration Result ACK" }, |
| 456 | { 0x00ad, "TS Configuration Result NACK" }, |
| 457 | { 0x00ae, "TS Configuration Result" }, |
| 458 | { 0x00b0, "TX Configuration Request" }, |
| 459 | { 0x00b2, "TX Configuration Request Accept" }, |
| 460 | { 0x00b3, "TX Configuration Request Reject" }, |
| 461 | { 0x00b4, "TX Configuration Result ACK" }, |
| 462 | { 0x00b5, "TX Configuration Result NACK" }, |
| 463 | { 0x00b6, "TX Configuration Result" }, |
| 464 | { 0x00bc, "DIP Alarm Report ACK" }, |
| 465 | { 0x00bd, "DIP Alarm Report NACK" }, |
| 466 | { 0x00be, "DIP Alarm Report" }, |
| 467 | { 0x00c0, "DIP Alarm Status Request" }, |
| 468 | { 0x00c2, "DIP Alarm Status Response" }, |
| 469 | { 0x00c3, "DIP Alarm Status Reject" }, |
| 470 | { 0x00c4, "DIP Quality Report I ACK" }, |
| 471 | { 0x00c5, "DIP Quality Report I NACK" }, |
| 472 | { 0x00c6, "DIP Quality Report I" }, |
| 473 | { 0x00c8, "DIP Quality Report II ACK" }, |
| 474 | { 0x00c9, "DIP Quality Report II NACK" }, |
| 475 | { 0x00ca, "DIP Quality Report II" }, |
| 476 | { 0x00dc, "DP Configuration Request" }, |
| 477 | { 0x00de, "DP Configuration Request Accept" }, |
| 478 | { 0x00df, "DP Configuration Request Reject" }, |
| 479 | { 0x00e0, "DP Configuration Result ACK" }, |
| 480 | { 0x00e1, "DP Configuration Result NACK" }, |
| 481 | { 0x00e2, "DP Configuration Result" }, |
| 482 | { 0x00e4, "Capabilities HW Info Report ACK" }, |
| 483 | { 0x00e5, "Capabilities HW Info Report NACK" }, |
| 484 | { 0x00e6, "Capabilities HW Info Report" }, |
| 485 | { 0x00e8, "Capabilities Request" }, |
| 486 | { 0x00ea, "Capabilities Request Accept" }, |
| 487 | { 0x00eb, "Capabilities Request Reject" }, |
| 488 | { 0x00ec, "Capabilities Result ACK" }, |
| 489 | { 0x00ed, "Capabilities Result NACK" }, |
| 490 | { 0x00ee, "Capabilities Result" }, |
| 491 | { 0x00f0, "FM Configuration Request" }, |
| 492 | { 0x00f2, "FM Configuration Request Accept" }, |
| 493 | { 0x00f3, "FM Configuration Request Reject" }, |
| 494 | { 0x00f4, "FM Configuration Result ACK" }, |
| 495 | { 0x00f5, "FM Configuration Result NACK" }, |
| 496 | { 0x00f6, "FM Configuration Result" }, |
| 497 | { 0x00f8, "FM Report Request" }, |
| 498 | { 0x00fa, "FM Report Response" }, |
| 499 | { 0x00fb, "FM Report Reject" }, |
| 500 | { 0x00fc, "FM Start Command" }, |
| 501 | { 0x00fe, "FM Start Complete" }, |
| 502 | { 0x00ff, "FM Start Reject" }, |
| 503 | { 0x0100, "FM Stop Command" }, |
| 504 | { 0x0102, "FM Stop Complete" }, |
| 505 | { 0x0103, "FM Stop Reject" }, |
| 506 | { 0x0104, "Negotiation Request ACK" }, |
| 507 | { 0x0105, "Negotiation Request NACK" }, |
| 508 | { 0x0106, "Negotiation Request" }, |
| 509 | { 0x0108, "BTS Initiated Request ACK" }, |
| 510 | { 0x0109, "BTS Initiated Request NACK" }, |
| 511 | { 0x010a, "BTS Initiated Request" }, |
| 512 | { 0x010c, "Radio Channels Release Command" }, |
| 513 | { 0x010e, "Radio Channels Release Complete" }, |
| 514 | { 0x010f, "Radio Channels Release Reject" }, |
| 515 | { 0x0118, "Feature Control Command" }, |
| 516 | { 0x011a, "Feature Control Complete" }, |
| 517 | { 0x011b, "Feature Control Reject" }, |
| 518 | |
| 519 | { 0, NULL } |
| 520 | }; |
| 521 | |
| 522 | /* TS 12.21 Section 9.4: Attributes */ |
| 523 | static const struct value_string om2k_attr_vals[] = { |
| 524 | { 0x00, "Accordance indication" }, |
| 525 | { 0x01, "Alarm Id" }, |
| 526 | { 0x02, "Alarm Data" }, |
| 527 | { 0x03, "Alarm Severity" }, |
| 528 | { 0x04, "Alarm Status" }, |
| 529 | { 0x05, "Alarm Status Type" }, |
| 530 | { 0x06, "BCC" }, |
| 531 | { 0x07, "BS_AG_BKS_RES" }, |
| 532 | { 0x09, "BSIC" }, |
| 533 | { 0x0a, "BA_PA_MFRMS" }, |
| 534 | { 0x0b, "CBCH Indicator" }, |
| 535 | { 0x0c, "CCCH Options" }, |
| 536 | { 0x0d, "Calendar Time" }, |
| 537 | { 0x0f, "Channel Combination" }, |
| 538 | { 0x10, "CON Connection List" }, |
| 539 | { 0x11, "Data End Indication" }, |
| 540 | { 0x12, "DRX_DEV_MAX" }, |
| 541 | { 0x13, "End List Number" }, |
| 542 | { 0x14, "External Condition Map Class 1" }, |
| 543 | { 0x15, "External Condition Map Class 2" }, |
| 544 | { 0x16, "File Relation Indication" }, |
| 545 | { 0x17, "File Revision" }, |
| 546 | { 0x18, "File Segment Data" }, |
| 547 | { 0x19, "File Segment Length" }, |
| 548 | { 0x1a, "File Segment Sequence Number" }, |
| 549 | { 0x1b, "File Size" }, |
| 550 | { 0x1c, "Filling Marker" }, |
| 551 | { 0x1d, "FN Offset" }, |
| 552 | { 0x1e, "Frequency List" }, |
| 553 | { 0x1f, "Frequency Specifier RX" }, |
| 554 | { 0x20, "Frequency Specifier TX" }, |
| 555 | { 0x21, "HSN" }, |
| 556 | { 0x22, "ICM Indicator" }, |
| 557 | { 0x23, "Internal Fault Map Class 1A" }, |
| 558 | { 0x24, "Internal Fault Map Class 1B" }, |
| 559 | { 0x25, "Internal Fault Map Class 2A" }, |
| 560 | { 0x26, "Internal Fault Map Class 2A Extension" }, |
| 561 | { 0x27, "IS Connection List" }, |
| 562 | { 0x28, "List Number" }, |
| 563 | { 0x29, "File Package State Indication" }, |
| 564 | { 0x2a, "Local Access State" }, |
| 565 | { 0x2b, "MAIO" }, |
| 566 | { 0x2c, "MO State" }, |
| 567 | { 0x2d, "Ny1" }, |
| 568 | { 0x2e, "Operational Information" }, |
| 569 | { 0x2f, "Power" }, |
| 570 | { 0x30, "RU Position Data" }, |
| 571 | { 0x31, "Protocol Error" }, |
| 572 | { 0x32, "Reason Code" }, |
| 573 | { 0x33, "Receiver Diversity" }, |
| 574 | { 0x34, "Replacement Unit Map" }, |
| 575 | { 0x35, "Result Code" }, |
| 576 | { 0x36, "RU Revision Data" }, |
| 577 | { 0x38, "T3105" }, |
| 578 | { 0x39, "Test Loop Setting" }, |
| 579 | { 0x3a, "TF Mode" }, |
| 580 | { 0x3b, "TF Compensation Value" }, |
| 581 | { 0x3c, "Time Slot Number" }, |
| 582 | { 0x3d, "TSC" }, |
| 583 | { 0x3e, "RU Logical Id" }, |
| 584 | { 0x3f, "RU Serial Number Data" }, |
| 585 | { 0x40, "BTS Version" }, |
| 586 | { 0x41, "OML IWD Version" }, |
| 587 | { 0x42, "RWL IWD Version" }, |
| 588 | { 0x43, "OML Function Map 1" }, |
| 589 | { 0x44, "OML Function Map 2" }, |
| 590 | { 0x45, "RSL Function Map 1" }, |
| 591 | { 0x46, "RSL Function Map 2" }, |
| 592 | { 0x47, "Extended Range Indicator" }, |
| 593 | { 0x48, "Request Indicators" }, |
| 594 | { 0x49, "DIP Alarm Condition Map" }, |
| 595 | { 0x4a, "ES Incoming" }, |
| 596 | { 0x4b, "ES Outgoing" }, |
| 597 | { 0x4e, "SES Incoming" }, |
| 598 | { 0x4f, "SES Outgoing" }, |
| 599 | { 0x50, "Replacement Unit Map Extension" }, |
| 600 | { 0x52, "UAS Incoming" }, |
| 601 | { 0x53, "UAS Outgoing" }, |
| 602 | { 0x58, "DF Incoming" }, |
| 603 | { 0x5a, "DF Outgoing" }, |
| 604 | { 0x5c, "SF" }, |
| 605 | { 0x60, "S Bits Setting" }, |
| 606 | { 0x61, "CRC-4 Use Option" }, |
| 607 | { 0x62, "T Parameter" }, |
| 608 | { 0x63, "N Parameter" }, |
| 609 | { 0x64, "N1 Parameter" }, |
| 610 | { 0x65, "N3 Parameter" }, |
| 611 | { 0x66, "N4 Parameter" }, |
| 612 | { 0x67, "P Parameter" }, |
| 613 | { 0x68, "Q Parameter" }, |
| 614 | { 0x69, "BI_Q1" }, |
| 615 | { 0x6a, "BI_Q2" }, |
| 616 | { 0x74, "ICM Boundary Parameters" }, |
| 617 | { 0x77, "AFT" }, |
| 618 | { 0x78, "AFT RAI" }, |
| 619 | { 0x79, "Link Supervision Control" }, |
| 620 | { 0x7a, "Link Supervision Filtering Time" }, |
| 621 | { 0x7b, "Call Supervision Time" }, |
| 622 | { 0x7c, "Interval Length UAS Incoming" }, |
| 623 | { 0x7d, "Interval Length UAS Outgoing" }, |
| 624 | { 0x7e, "ICM Channel Rate" }, |
| 625 | { 0x7f, "Attribute Identifier" }, |
| 626 | { 0x80, "FM Frequency List" }, |
| 627 | { 0x81, "FM Frequency Report" }, |
| 628 | { 0x82, "FM Percentile" }, |
| 629 | { 0x83, "FM Clear Indication" }, |
| 630 | { 0x84, "HW Info Signature" }, |
| 631 | { 0x85, "MO Record" }, |
| 632 | { 0x86, "TF Synchronisation Source" }, |
| 633 | { 0x87, "TTA" }, |
| 634 | { 0x88, "End Segment Number" }, |
| 635 | { 0x89, "Segment Number" }, |
| 636 | { 0x8a, "Capabilities Signature" }, |
| 637 | { 0x8c, "File Relation List" }, |
| 638 | { 0x90, "Negotiation Record I" }, |
| 639 | { 0x91, "Negotiation Record II" }, |
| 640 | { 0x92, "Encryption Algorithm" }, |
| 641 | { 0x94, "Interference Rejection Combining" }, |
| 642 | { 0x95, "Dedication Information" }, |
| 643 | { 0x97, "Feature Code" }, |
| 644 | { 0x98, "FS Offset" }, |
| 645 | { 0x99, "ESB Timeslot" }, |
| 646 | { 0x9a, "Master TG Instance" }, |
| 647 | { 0x9b, "Master TX Chain Delay" }, |
| 648 | { 0x9c, "External Condition Class 2 Extension" }, |
| 649 | { 0x9d, "TSs MO State" }, |
| 650 | { 0, NULL } |
| 651 | }; |
| 652 | |
Harald Welte | e1d5eca | 2011-02-12 14:42:59 +0100 | [diff] [blame] | 653 | const struct value_string om2k_mo_class_short_vals[] = { |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 654 | { 0x01, "TRXC" }, |
| 655 | { 0x03, "TS" }, |
| 656 | { 0x04, "TF" }, |
| 657 | { 0x05, "IS" }, |
| 658 | { 0x06, "CON" }, |
| 659 | { 0x07, "DP" }, |
| 660 | { 0x0a, "CF" }, |
| 661 | { 0x0b, "TX" }, |
| 662 | { 0x0c, "RX" }, |
| 663 | { 0, NULL } |
| 664 | }; |
| 665 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 666 | const struct value_string om2k_result_strings[] = { |
| 667 | { 0x02, "Wrong state or out of sequence" }, |
| 668 | { 0x03, "File error" }, |
| 669 | { 0x04, "Fault, unspecified" }, |
| 670 | { 0x05, "Tuning fault" }, |
| 671 | { 0x06, "Protocol error" }, |
| 672 | { 0x07, "MO not connected" }, |
| 673 | { 0x08, "Parameter error" }, |
| 674 | { 0x09, "Optional function not supported" }, |
| 675 | { 0x0a, "Local access state LOCALLY DISCONNECTED" }, |
| 676 | { 0, NULL } |
| 677 | }; |
| 678 | |
| 679 | const struct value_string om2k_accordance_strings[] = { |
| 680 | { 0x00, "Data according to request" }, |
| 681 | { 0x01, "Data not according to request" }, |
| 682 | { 0x02, "Inconsistent MO data" }, |
| 683 | { 0x03, "Capability constraint violation" }, |
| 684 | { 0, NULL } |
| 685 | }; |
| 686 | |
| 687 | const struct value_string om2k_mostate_vals[] = { |
| 688 | { 0x00, "RESET" }, |
| 689 | { 0x01, "STARTED" }, |
| 690 | { 0x02, "ENABLED" }, |
| 691 | { 0x03, "DISABLED" }, |
| 692 | { 0, NULL } |
| 693 | }; |
| 694 | |
| 695 | /* entire decoded OM2K message (header + parsed TLV) */ |
| 696 | struct om2k_decoded_msg { |
| 697 | struct abis_om2k_hdr o2h; |
| 698 | uint16_t msg_type; |
| 699 | struct tlv_parsed tp; |
| 700 | }; |
| 701 | |
| 702 | /* resolve the OM2000 Managed Object by BTS + MO Address */ |
| 703 | static struct om2k_mo * |
| 704 | get_om2k_mo(struct gsm_bts *bts, const struct abis_om2k_mo *abis_mo) |
| 705 | { |
| 706 | struct om2k_mo *mo = NULL; |
| 707 | struct gsm_bts_trx *trx; |
| 708 | |
| 709 | switch (abis_mo->class) { |
| 710 | case OM2K_MO_CLS_CF: |
| 711 | mo = &bts->rbs2000.cf.om2k_mo; |
| 712 | break; |
| 713 | case OM2K_MO_CLS_CON: |
| 714 | mo = &bts->rbs2000.con.om2k_mo; |
| 715 | break; |
| 716 | case OM2K_MO_CLS_IS: |
| 717 | mo = &bts->rbs2000.is.om2k_mo; |
| 718 | break; |
| 719 | case OM2K_MO_CLS_TF: |
| 720 | mo = &bts->rbs2000.tf.om2k_mo; |
| 721 | break; |
| 722 | |
| 723 | case OM2K_MO_CLS_TRXC: |
| 724 | trx = gsm_bts_trx_num(bts, abis_mo->inst); |
| 725 | if (!trx) |
| 726 | return NULL; |
| 727 | mo = &trx->rbs2000.trxc.om2k_mo; |
| 728 | break; |
| 729 | case OM2K_MO_CLS_TX: |
| 730 | trx = gsm_bts_trx_num(bts, abis_mo->inst); |
| 731 | if (!trx) |
| 732 | return NULL; |
| 733 | mo = &trx->rbs2000.tx.om2k_mo; |
| 734 | break; |
| 735 | case OM2K_MO_CLS_RX: |
| 736 | trx = gsm_bts_trx_num(bts, abis_mo->inst); |
| 737 | if (!trx) |
| 738 | return NULL; |
| 739 | mo = &trx->rbs2000.rx.om2k_mo; |
| 740 | break; |
| 741 | case OM2K_MO_CLS_TS: |
| 742 | trx = gsm_bts_trx_num(bts, abis_mo->assoc_so); |
| 743 | if (!trx) |
| 744 | return NULL; |
| 745 | if (abis_mo->inst >= ARRAY_SIZE(trx->ts)) |
| 746 | return NULL; |
| 747 | mo = &trx->ts[abis_mo->inst].rbs2000.om2k_mo; |
| 748 | break; |
| 749 | default: |
| 750 | return NULL; |
| 751 | }; |
| 752 | |
| 753 | return mo; |
| 754 | } |
| 755 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 756 | static struct msgb *om2k_msgb_alloc(void) |
| 757 | { |
| 758 | return msgb_alloc_headroom(OM_ALLOC_SIZE, OM_HEADROOM_SIZE, |
| 759 | "OM2000"); |
| 760 | } |
| 761 | |
Holger Hans Peter Freyther | c42ad8b | 2011-04-18 17:04:00 +0200 | [diff] [blame] | 762 | static int abis_om2k_tlv_parse(struct tlv_parsed *tp, const uint8_t *buf, int len) |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 763 | { |
| 764 | return tlv_parse(tp, &om2k_att_tlvdef, buf, len, 0, 0); |
| 765 | } |
| 766 | |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 767 | static int abis_om2k_msg_tlv_parse(struct tlv_parsed *tp, struct abis_om2k_hdr *oh) |
| 768 | { |
| 769 | return abis_om2k_tlv_parse(tp, oh->data, oh->om.length - 6); |
| 770 | } |
| 771 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 772 | /* decode/parse the message */ |
| 773 | static int om2k_decode_msg(struct om2k_decoded_msg *odm, struct msgb *msg) |
| 774 | { |
| 775 | struct abis_om2k_hdr *o2h = msgb_l2(msg); |
| 776 | odm->msg_type = ntohs(o2h->msg_type); |
| 777 | odm->o2h = *o2h; |
| 778 | return abis_om2k_msg_tlv_parse(&odm->tp, o2h); |
| 779 | } |
| 780 | |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 781 | static char *om2k_mo_name(const struct abis_om2k_mo *mo) |
| 782 | { |
| 783 | static char mo_buf[64]; |
| 784 | |
| 785 | memset(mo_buf, 0, sizeof(mo_buf)); |
| 786 | snprintf(mo_buf, sizeof(mo_buf), "%s/%02x/%02x/%02x", |
| 787 | get_value_string(om2k_mo_class_short_vals, mo->class), |
| 788 | mo->bts, mo->assoc_so, mo->inst); |
| 789 | return mo_buf; |
| 790 | } |
| 791 | |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 792 | /* resolve the gsm_nm_state data structure for a given MO */ |
| 793 | static struct gsm_nm_state * |
| 794 | mo2nm_state(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 795 | { |
| 796 | struct gsm_bts_trx *trx; |
| 797 | struct gsm_nm_state *nm_state = NULL; |
| 798 | |
| 799 | switch (mo->class) { |
| 800 | case OM2K_MO_CLS_TRXC: |
| 801 | trx = gsm_bts_trx_num(bts, mo->assoc_so); |
| 802 | if (!trx) |
| 803 | return NULL; |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 804 | nm_state = &trx->mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 805 | break; |
| 806 | case OM2K_MO_CLS_TS: |
| 807 | trx = gsm_bts_trx_num(bts, mo->assoc_so); |
| 808 | if (!trx) |
| 809 | return NULL; |
| 810 | if (mo->inst >= ARRAY_SIZE(trx->ts)) |
| 811 | return NULL; |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 812 | nm_state = &trx->ts[mo->inst].mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 813 | break; |
| 814 | case OM2K_MO_CLS_TF: |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 815 | nm_state = &bts->rbs2000.tf.mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 816 | break; |
| 817 | case OM2K_MO_CLS_IS: |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 818 | nm_state = &bts->rbs2000.is.mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 819 | break; |
| 820 | case OM2K_MO_CLS_CON: |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 821 | nm_state = &bts->rbs2000.con.mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 822 | break; |
| 823 | case OM2K_MO_CLS_DP: |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 824 | nm_state = &bts->rbs2000.con.mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 825 | break; |
| 826 | case OM2K_MO_CLS_CF: |
Harald Welte | d64c0bc | 2011-05-30 12:07:53 +0200 | [diff] [blame] | 827 | nm_state = &bts->mo.nm_state; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 828 | break; |
| 829 | case OM2K_MO_CLS_TX: |
| 830 | trx = gsm_bts_trx_num(bts, mo->assoc_so); |
| 831 | if (!trx) |
| 832 | return NULL; |
| 833 | break; |
| 834 | case OM2K_MO_CLS_RX: |
| 835 | trx = gsm_bts_trx_num(bts, mo->assoc_so); |
| 836 | if (!trx) |
| 837 | return NULL; |
| 838 | break; |
| 839 | } |
| 840 | |
| 841 | return nm_state; |
| 842 | } |
| 843 | |
| 844 | static void *mo2obj(struct gsm_bts *bts, struct abis_om2k_mo *mo) |
| 845 | { |
| 846 | struct gsm_bts_trx *trx; |
| 847 | |
| 848 | switch (mo->class) { |
| 849 | case OM2K_MO_CLS_TX: |
| 850 | case OM2K_MO_CLS_RX: |
| 851 | case OM2K_MO_CLS_TRXC: |
| 852 | return gsm_bts_trx_num(bts, mo->assoc_so); |
| 853 | case OM2K_MO_CLS_TS: |
| 854 | trx = gsm_bts_trx_num(bts, mo->assoc_so); |
| 855 | if (!trx) |
| 856 | return NULL; |
| 857 | if (mo->inst >= ARRAY_SIZE(trx->ts)) |
| 858 | return NULL; |
| 859 | return &trx->ts[mo->inst]; |
| 860 | case OM2K_MO_CLS_TF: |
| 861 | case OM2K_MO_CLS_IS: |
| 862 | case OM2K_MO_CLS_CON: |
| 863 | case OM2K_MO_CLS_DP: |
| 864 | case OM2K_MO_CLS_CF: |
| 865 | return bts; |
| 866 | } |
| 867 | |
| 868 | return NULL; |
| 869 | } |
| 870 | |
| 871 | static void update_mo_state(struct gsm_bts *bts, struct abis_om2k_mo *mo, |
| 872 | uint8_t mo_state) |
| 873 | { |
| 874 | struct gsm_nm_state *nm_state = mo2nm_state(bts, mo); |
| 875 | struct gsm_nm_state new_state; |
| 876 | struct nm_statechg_signal_data nsd; |
| 877 | |
| 878 | if (!nm_state) |
| 879 | return; |
| 880 | |
| 881 | new_state = *nm_state; |
| 882 | /* NOTICE: 12.21 Availability state values != OM2000 */ |
| 883 | new_state.availability = mo_state; |
| 884 | |
| 885 | memset(&nsd, 0, sizeof(nsd)); |
| 886 | |
Harald Welte | 8b277ac | 2011-03-06 23:00:32 +0100 | [diff] [blame] | 887 | nsd.bts = bts; |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 888 | nsd.obj = mo2obj(bts, mo); |
| 889 | nsd.old_state = nm_state; |
| 890 | nsd.new_state = &new_state; |
| 891 | nsd.om2k_mo = mo; |
| 892 | |
Pablo Neira Ayuso | bbc5b99 | 2011-05-06 12:12:31 +0200 | [diff] [blame] | 893 | osmo_signal_dispatch(SS_NM, S_NM_STATECHG_ADM, &nsd); |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 894 | |
| 895 | nm_state->availability = new_state.availability; |
| 896 | } |
| 897 | |
| 898 | static void update_op_state(struct gsm_bts *bts, const struct abis_om2k_mo *mo, |
| 899 | uint8_t op_state) |
| 900 | { |
| 901 | struct gsm_nm_state *nm_state = mo2nm_state(bts, mo); |
| 902 | struct gsm_nm_state new_state; |
| 903 | |
| 904 | if (!nm_state) |
| 905 | return; |
| 906 | |
| 907 | new_state = *nm_state; |
| 908 | switch (op_state) { |
| 909 | case 1: |
| 910 | new_state.operational = NM_OPSTATE_ENABLED; |
| 911 | break; |
| 912 | case 0: |
| 913 | new_state.operational = NM_OPSTATE_DISABLED; |
| 914 | break; |
| 915 | default: |
| 916 | new_state.operational = NM_OPSTATE_NULL; |
| 917 | break; |
| 918 | } |
| 919 | |
| 920 | nm_state->operational = new_state.operational; |
| 921 | } |
| 922 | |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 923 | static int abis_om2k_sendmsg(struct gsm_bts *bts, struct msgb *msg) |
| 924 | { |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 925 | struct abis_om2k_hdr *o2h; |
Harald Welte | 15eae8d | 2011-09-26 23:43:23 +0200 | [diff] [blame] | 926 | struct gsm_bts_trx *trx; |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 927 | |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 928 | msg->l2h = msg->data; |
| 929 | o2h = (struct abis_om2k_hdr *) msg->l2h; |
| 930 | |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 931 | /* Compute the length in the OML header */ |
| 932 | o2h->om.length = 6 + msgb_l2len(msg)-sizeof(*o2h); |
| 933 | |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 934 | switch (o2h->mo.class) { |
| 935 | case OM2K_MO_CLS_TRXC: |
| 936 | case OM2K_MO_CLS_TX: |
| 937 | case OM2K_MO_CLS_RX: |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 938 | /* Route through per-TRX OML Link to the appropriate TRX */ |
Harald Welte | 15eae8d | 2011-09-26 23:43:23 +0200 | [diff] [blame] | 939 | trx = gsm_bts_trx_by_nr(bts, o2h->mo.inst); |
| 940 | if (!trx) { |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 941 | LOGP(DNM, LOGL_ERROR, "MO=%s Tx Dropping msg to " |
| 942 | "non-existing TRX\n", om2k_mo_name(&o2h->mo)); |
| 943 | return -ENODEV; |
| 944 | } |
Harald Welte | 0818f31 | 2012-09-07 19:09:46 +0200 | [diff] [blame] | 945 | msg->dst = trx->oml_link; |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 946 | break; |
Harald Welte | 8aeac19 | 2011-03-05 20:15:09 +0100 | [diff] [blame] | 947 | case OM2K_MO_CLS_TS: |
| 948 | /* Route through per-TRX OML Link to the appropriate TRX */ |
Harald Welte | 15eae8d | 2011-09-26 23:43:23 +0200 | [diff] [blame] | 949 | trx = gsm_bts_trx_by_nr(bts, o2h->mo.assoc_so); |
| 950 | if (!trx) { |
Harald Welte | 8aeac19 | 2011-03-05 20:15:09 +0100 | [diff] [blame] | 951 | LOGP(DNM, LOGL_ERROR, "MO=%s Tx Dropping msg to " |
| 952 | "non-existing TRX\n", om2k_mo_name(&o2h->mo)); |
| 953 | return -ENODEV; |
| 954 | } |
Harald Welte | 0818f31 | 2012-09-07 19:09:46 +0200 | [diff] [blame] | 955 | msg->dst = trx->oml_link; |
Harald Welte | 8aeac19 | 2011-03-05 20:15:09 +0100 | [diff] [blame] | 956 | break; |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 957 | default: |
| 958 | /* Route through the IXU/DXU OML Link */ |
Harald Welte | 0818f31 | 2012-09-07 19:09:46 +0200 | [diff] [blame] | 959 | msg->dst = bts->oml_link; |
Harald Welte | d88a387 | 2011-02-14 15:26:13 +0100 | [diff] [blame] | 960 | break; |
| 961 | } |
| 962 | |
Harald Welte | 15eae8d | 2011-09-26 23:43:23 +0200 | [diff] [blame] | 963 | return _abis_nm_sendmsg(msg); |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 964 | } |
| 965 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 966 | static void fill_om2k_hdr(struct abis_om2k_hdr *o2h, const struct abis_om2k_mo *mo, |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 967 | uint16_t msg_type) |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 968 | { |
| 969 | o2h->om.mdisc = ABIS_OM_MDISC_FOM; |
| 970 | o2h->om.placement = ABIS_OM_PLACEMENT_ONLY; |
| 971 | o2h->om.sequence = 0; |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 972 | /* We fill o2h->om.length later during om2k_sendmsg() */ |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 973 | o2h->msg_type = htons(msg_type); |
| 974 | memcpy(&o2h->mo, mo, sizeof(o2h->mo)); |
| 975 | } |
| 976 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 977 | static int abis_om2k_cal_time_resp(struct gsm_bts *bts) |
| 978 | { |
| 979 | struct msgb *msg = om2k_msgb_alloc(); |
| 980 | struct abis_om2k_hdr *o2k; |
| 981 | time_t tm_t; |
| 982 | struct tm *tm; |
| 983 | |
| 984 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 985 | fill_om2k_hdr(o2k, &bts->rbs2000.cf.om2k_mo.addr, |
| 986 | OM2K_MSGT_CAL_TIME_RESP); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 987 | |
| 988 | tm_t = time(NULL); |
| 989 | tm = localtime(&tm_t); |
| 990 | |
| 991 | msgb_put_u8(msg, OM2K_DEI_CAL_TIME); |
| 992 | msgb_put_u8(msg, tm->tm_year % 100); |
| 993 | msgb_put_u8(msg, tm->tm_mon + 1); |
| 994 | msgb_put_u8(msg, tm->tm_mday); |
| 995 | msgb_put_u8(msg, tm->tm_hour); |
| 996 | msgb_put_u8(msg, tm->tm_min); |
| 997 | msgb_put_u8(msg, tm->tm_sec); |
| 998 | |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 999 | return abis_om2k_sendmsg(bts, msg); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1000 | } |
| 1001 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1002 | static int abis_om2k_tx_simple(struct gsm_bts *bts, const struct abis_om2k_mo *mo, |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1003 | uint8_t msg_type) |
| 1004 | { |
| 1005 | struct msgb *msg = om2k_msgb_alloc(); |
| 1006 | struct abis_om2k_hdr *o2k; |
| 1007 | |
| 1008 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1009 | fill_om2k_hdr(o2k, mo, msg_type); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1010 | |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 1011 | DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo), |
| 1012 | get_value_string(om2k_msgcode_vals, msg_type)); |
| 1013 | |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 1014 | return abis_om2k_sendmsg(bts, msg); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1015 | } |
| 1016 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1017 | int abis_om2k_tx_reset_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 1018 | { |
| 1019 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_RESET_CMD); |
| 1020 | } |
| 1021 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1022 | int abis_om2k_tx_start_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 1023 | { |
| 1024 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_START_REQ); |
| 1025 | } |
| 1026 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1027 | int abis_om2k_tx_status_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
Harald Welte | e1d5eca | 2011-02-12 14:42:59 +0100 | [diff] [blame] | 1028 | { |
| 1029 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_STATUS_REQ); |
| 1030 | } |
| 1031 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1032 | int abis_om2k_tx_connect_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1033 | { |
| 1034 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_CONNECT_CMD); |
| 1035 | } |
| 1036 | |
| 1037 | int abis_om2k_tx_disconnect_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1038 | { |
| 1039 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_DISCONNECT_CMD); |
| 1040 | } |
| 1041 | |
Harald Welte | 8024d8f | 2011-02-12 15:07:30 +0100 | [diff] [blame] | 1042 | int abis_om2k_tx_test_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1043 | { |
| 1044 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_TEST_REQ); |
| 1045 | } |
| 1046 | |
Harald Welte | 0741ffe | 2011-02-12 18:48:53 +0100 | [diff] [blame] | 1047 | int abis_om2k_tx_enable_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1048 | { |
| 1049 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_ENABLE_REQ); |
| 1050 | } |
| 1051 | |
| 1052 | int abis_om2k_tx_disable_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1053 | { |
| 1054 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_DISABLE_REQ); |
| 1055 | } |
| 1056 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 1057 | int abis_om2k_tx_op_info(struct gsm_bts *bts, const struct abis_om2k_mo *mo, |
| 1058 | uint8_t operational) |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1059 | { |
| 1060 | struct msgb *msg = om2k_msgb_alloc(); |
| 1061 | struct abis_om2k_hdr *o2k; |
| 1062 | |
| 1063 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1064 | fill_om2k_hdr(o2k, mo, OM2K_MSGT_OP_INFO); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1065 | |
| 1066 | msgb_tv_put(msg, OM2K_DEI_OP_INFO, operational); |
| 1067 | |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 1068 | DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo), |
| 1069 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_OP_INFO)); |
| 1070 | |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 1071 | /* we update the state here... and send the signal at ACK */ |
| 1072 | update_op_state(bts, mo, operational); |
| 1073 | |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 1074 | return abis_om2k_sendmsg(bts, msg); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 1075 | } |
| 1076 | |
root | 4579978 | 2016-10-15 21:24:57 +0200 | [diff] [blame] | 1077 | int abis_om2k_tx_cap_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo) |
| 1078 | { |
| 1079 | return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_CAPA_REQ); |
| 1080 | } |
| 1081 | |
Harald Welte | d529db6 | 2011-03-06 21:49:21 +0100 | [diff] [blame] | 1082 | static void om2k_fill_is_conn_grp(struct om2k_is_conn_grp *grp, uint16_t icp1, |
| 1083 | uint16_t icp2, uint8_t cont_idx) |
| 1084 | { |
| 1085 | grp->icp1 = htons(icp1); |
| 1086 | grp->icp2 = htons(icp2); |
| 1087 | grp->cont_idx = cont_idx; |
| 1088 | } |
| 1089 | |
| 1090 | int abis_om2k_tx_is_conf_req(struct gsm_bts *bts) |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 1091 | { |
| 1092 | struct msgb *msg = om2k_msgb_alloc(); |
| 1093 | struct abis_om2k_hdr *o2k; |
Harald Welte | d529db6 | 2011-03-06 21:49:21 +0100 | [diff] [blame] | 1094 | struct is_conn_group *grp; |
| 1095 | unsigned int num_grps = 0, i = 0; |
| 1096 | struct om2k_is_conn_grp *cg; |
| 1097 | |
| 1098 | /* count number of groups in linked list */ |
| 1099 | llist_for_each_entry(grp, &bts->rbs2000.is.conn_groups, list) |
| 1100 | num_grps++; |
| 1101 | |
| 1102 | if (!num_grps) |
| 1103 | return -EINVAL; |
| 1104 | |
| 1105 | /* allocate buffer for oml group array */ |
| 1106 | cg = talloc_zero_array(bts, struct om2k_is_conn_grp, num_grps); |
| 1107 | |
| 1108 | /* fill array with data from linked list */ |
| 1109 | llist_for_each_entry(grp, &bts->rbs2000.is.conn_groups, list) |
| 1110 | om2k_fill_is_conn_grp(&cg[i++], grp->icp1, grp->icp2, grp->ci); |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 1111 | |
| 1112 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1113 | fill_om2k_hdr(o2k, &bts->rbs2000.is.om2k_mo.addr, |
| 1114 | OM2K_MSGT_IS_CONF_REQ); |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 1115 | |
| 1116 | msgb_tv_put(msg, OM2K_DEI_LIST_NR, 1); |
| 1117 | msgb_tv_put(msg, OM2K_DEI_END_LIST_NR, 1); |
| 1118 | |
| 1119 | msgb_tlv_put(msg, OM2K_DEI_IS_CONN_LIST, |
Harald Welte | d529db6 | 2011-03-06 21:49:21 +0100 | [diff] [blame] | 1120 | num_grps * sizeof(*cg), (uint8_t *)cg); |
| 1121 | |
| 1122 | talloc_free(cg); |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 1123 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1124 | DEBUGP(DNM, "Tx MO=%s %s\n", |
| 1125 | om2k_mo_name(&bts->rbs2000.is.om2k_mo.addr), |
Harald Welte | 79c34ff | 2012-09-07 20:15:50 +0200 | [diff] [blame] | 1126 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_IS_CONF_REQ)); |
| 1127 | |
Harald Welte | 8bcb1a0 | 2011-02-12 20:23:40 +0100 | [diff] [blame] | 1128 | return abis_om2k_sendmsg(bts, msg); |
| 1129 | } |
| 1130 | |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 1131 | int abis_om2k_tx_con_conf_req(struct gsm_bts *bts, uint8_t *data, |
| 1132 | unsigned int len) |
| 1133 | { |
| 1134 | struct msgb *msg = om2k_msgb_alloc(); |
| 1135 | struct abis_om2k_hdr *o2k; |
| 1136 | |
| 1137 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1138 | fill_om2k_hdr(o2k, &bts->rbs2000.con.om2k_mo.addr, |
| 1139 | OM2K_MSGT_CON_CONF_REQ); |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 1140 | |
| 1141 | msgb_tv_put(msg, OM2K_DEI_LIST_NR, 1); |
| 1142 | msgb_tv_put(msg, OM2K_DEI_END_LIST_NR, 1); |
| 1143 | |
| 1144 | msgb_tlv_put(msg, OM2K_DEI_CON_CONN_LIST, len, data); |
| 1145 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1146 | DEBUGP(DNM, "Tx MO=%s %s\n", |
| 1147 | om2k_mo_name(&bts->rbs2000.con.om2k_mo.addr), |
Harald Welte | 79c34ff | 2012-09-07 20:15:50 +0200 | [diff] [blame] | 1148 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_CON_CONF_REQ)); |
| 1149 | |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 1150 | return abis_om2k_sendmsg(bts, msg); |
| 1151 | } |
| 1152 | |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1153 | static void om2k_trx_to_mo(struct abis_om2k_mo *mo, |
| 1154 | const struct gsm_bts_trx *trx, |
| 1155 | enum abis_om2k_mo_cls cls) |
| 1156 | { |
| 1157 | mo->class = cls; |
| 1158 | mo->bts = 0; |
| 1159 | mo->inst = trx->nr; |
Harald Welte | 53492c8 | 2011-03-05 16:21:01 +0100 | [diff] [blame] | 1160 | mo->assoc_so = 255; |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1161 | } |
| 1162 | |
| 1163 | static void om2k_ts_to_mo(struct abis_om2k_mo *mo, |
| 1164 | const struct gsm_bts_trx_ts *ts) |
| 1165 | { |
| 1166 | mo->class = OM2K_MO_CLS_TS; |
| 1167 | mo->bts = 0; |
| 1168 | mo->inst = ts->nr; |
| 1169 | mo->assoc_so = ts->trx->nr; |
| 1170 | } |
| 1171 | |
| 1172 | /* Configure a Receiver MO */ |
| 1173 | int abis_om2k_tx_rx_conf_req(struct gsm_bts_trx *trx) |
| 1174 | { |
| 1175 | struct msgb *msg = om2k_msgb_alloc(); |
| 1176 | struct abis_om2k_hdr *o2k; |
| 1177 | struct abis_om2k_mo mo; |
| 1178 | |
| 1179 | om2k_trx_to_mo(&mo, trx, OM2K_MO_CLS_RX); |
| 1180 | |
| 1181 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1182 | fill_om2k_hdr(o2k, &mo, OM2K_MSGT_RX_CONF_REQ); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1183 | |
| 1184 | msgb_tv16_put(msg, OM2K_DEI_FREQ_SPEC_RX, trx->arfcn); |
Harald Welte | 1edc2b4 | 2011-03-06 19:01:54 +0100 | [diff] [blame] | 1185 | msgb_tv_put(msg, OM2K_DEI_RX_DIVERSITY, 0x02); /* A */ |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1186 | |
| 1187 | return abis_om2k_sendmsg(trx->bts, msg); |
| 1188 | } |
| 1189 | |
| 1190 | /* Configure a Transmitter MO */ |
| 1191 | int abis_om2k_tx_tx_conf_req(struct gsm_bts_trx *trx) |
| 1192 | { |
| 1193 | struct msgb *msg = om2k_msgb_alloc(); |
| 1194 | struct abis_om2k_hdr *o2k; |
| 1195 | struct abis_om2k_mo mo; |
| 1196 | |
| 1197 | om2k_trx_to_mo(&mo, trx, OM2K_MO_CLS_TX); |
| 1198 | |
| 1199 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1200 | fill_om2k_hdr(o2k, &mo, OM2K_MSGT_TX_CONF_REQ); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1201 | |
| 1202 | msgb_tv16_put(msg, OM2K_DEI_FREQ_SPEC_TX, trx->arfcn); |
| 1203 | msgb_tv_put(msg, OM2K_DEI_POWER, trx->nominal_power-trx->max_power_red); |
| 1204 | msgb_tv_put(msg, OM2K_DEI_FILLING_MARKER, 0); /* Filling enabled */ |
| 1205 | msgb_tv_put(msg, OM2K_DEI_BCC, trx->bts->bsic & 0x7); |
| 1206 | /* Dedication Information is optional */ |
| 1207 | |
| 1208 | return abis_om2k_sendmsg(trx->bts, msg); |
| 1209 | } |
| 1210 | |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 1211 | enum abis_om2k_tf_mode { |
| 1212 | OM2K_TF_MODE_MASTER = 0x00, |
| 1213 | OM2K_TF_MODE_STANDALONE = 0x01, |
| 1214 | OM2K_TF_MODE_SLAVE = 0x02, |
| 1215 | OM2K_TF_MODE_UNDEFINED = 0xff, |
| 1216 | }; |
| 1217 | |
| 1218 | static const uint8_t fs_offset_undef[5] = { 0xff, 0xff, 0xff, 0xff, 0xff }; |
| 1219 | |
| 1220 | int abis_om2k_tx_tf_conf_req(struct gsm_bts *bts) |
| 1221 | { |
| 1222 | struct msgb *msg = om2k_msgb_alloc(); |
| 1223 | struct abis_om2k_hdr *o2k; |
| 1224 | |
| 1225 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1226 | fill_om2k_hdr(o2k, &bts->rbs2000.tf.om2k_mo.addr, |
| 1227 | OM2K_MSGT_TF_CONF_REQ); |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 1228 | |
| 1229 | msgb_tv_put(msg, OM2K_DEI_TF_MODE, OM2K_TF_MODE_STANDALONE); |
Harald Welte | ba9adbb | 2011-03-06 19:01:16 +0100 | [diff] [blame] | 1230 | msgb_tv_put(msg, OM2K_DEI_TF_SYNC_SRC, 0x00); |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 1231 | msgb_tv_fixed_put(msg, OM2K_DEI_FS_OFFSET, |
| 1232 | sizeof(fs_offset_undef), fs_offset_undef); |
| 1233 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1234 | DEBUGP(DNM, "Tx MO=%s %s\n", |
| 1235 | om2k_mo_name(&bts->rbs2000.tf.om2k_mo.addr), |
Harald Welte | 79c34ff | 2012-09-07 20:15:50 +0200 | [diff] [blame] | 1236 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_TF_CONF_REQ)); |
| 1237 | |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 1238 | return abis_om2k_sendmsg(bts, msg); |
| 1239 | } |
| 1240 | |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1241 | static uint8_t pchan2comb(enum gsm_phys_chan_config pchan) |
| 1242 | { |
| 1243 | switch (pchan) { |
| 1244 | case GSM_PCHAN_CCCH: |
| 1245 | return 4; |
| 1246 | case GSM_PCHAN_CCCH_SDCCH4: |
| 1247 | return 5; |
| 1248 | case GSM_PCHAN_SDCCH8_SACCH8C: |
| 1249 | return 3; |
| 1250 | case GSM_PCHAN_TCH_F: |
| 1251 | case GSM_PCHAN_TCH_H: |
| 1252 | case GSM_PCHAN_PDCH: |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1253 | return 8; |
| 1254 | default: |
| 1255 | return 0; |
| 1256 | } |
| 1257 | } |
| 1258 | |
Neels Hofmeyr | 23c3aa3 | 2016-09-25 15:15:59 +0200 | [diff] [blame] | 1259 | static uint8_t ts2comb(struct gsm_bts_trx_ts *ts) |
| 1260 | { |
| 1261 | switch (ts->pchan) { |
| 1262 | case GSM_PCHAN_TCH_F_PDCH: |
| 1263 | if (ts->flags & TS_F_PDCH_ACTIVE) |
| 1264 | return pchan2comb(GSM_PCHAN_PDCH); |
| 1265 | else |
| 1266 | return pchan2comb(GSM_PCHAN_TCH_F); |
| 1267 | case GSM_PCHAN_TCH_F_TCH_H_PDCH: |
| 1268 | return pchan2comb(ts->dyn.pchan_is); |
| 1269 | default: |
| 1270 | return pchan2comb(ts->pchan); |
| 1271 | } |
| 1272 | } |
| 1273 | |
Harald Welte | 5748c20 | 2011-03-05 17:30:07 +0100 | [diff] [blame] | 1274 | static int put_freq_list(uint8_t *buf, uint16_t arfcn) |
| 1275 | { |
| 1276 | buf[0] = 0x00; /* TX/RX address */ |
| 1277 | buf[1] = (arfcn >> 8); |
| 1278 | buf[2] = (arfcn & 0xff); |
| 1279 | |
| 1280 | return 3; |
| 1281 | } |
| 1282 | |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1283 | /* Compute a frequency list in OM2000 fomrmat */ |
| 1284 | static int om2k_gen_freq_list(uint8_t *list, struct gsm_bts_trx_ts *ts) |
| 1285 | { |
| 1286 | uint8_t *cur = list; |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 1287 | int len; |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1288 | |
| 1289 | if (ts->hopping.enabled) { |
| 1290 | unsigned int i; |
| 1291 | for (i = 0; i < ts->hopping.arfcns.data_len*8; i++) { |
Harald Welte | 5748c20 | 2011-03-05 17:30:07 +0100 | [diff] [blame] | 1292 | if (bitvec_get_bit_pos(&ts->hopping.arfcns, i)) |
| 1293 | cur += put_freq_list(cur, i); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1294 | } |
Harald Welte | 5748c20 | 2011-03-05 17:30:07 +0100 | [diff] [blame] | 1295 | } else |
| 1296 | cur += put_freq_list(cur, ts->trx->arfcn); |
| 1297 | |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 1298 | len = cur - list; |
| 1299 | |
| 1300 | return len; |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1301 | } |
| 1302 | |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1303 | const uint8_t icm_bound_params[] = { 0x02, 0x06, 0x0c, 0x16, 0x06 }; |
| 1304 | |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1305 | int abis_om2k_tx_ts_conf_req(struct gsm_bts_trx_ts *ts) |
| 1306 | { |
| 1307 | struct msgb *msg = om2k_msgb_alloc(); |
| 1308 | struct abis_om2k_hdr *o2k; |
| 1309 | struct abis_om2k_mo mo; |
| 1310 | uint8_t freq_list[64*3]; /* BA max size: 64 ARFCN */ |
| 1311 | int freq_list_len; |
| 1312 | |
| 1313 | om2k_ts_to_mo(&mo, ts); |
| 1314 | |
Harald Welte | 5748c20 | 2011-03-05 17:30:07 +0100 | [diff] [blame] | 1315 | memset(freq_list, 0, sizeof(freq_list)); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1316 | freq_list_len = om2k_gen_freq_list(freq_list, ts); |
| 1317 | if (freq_list_len < 0) |
| 1318 | return freq_list_len; |
| 1319 | |
| 1320 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1321 | fill_om2k_hdr(o2k, &mo, OM2K_MSGT_TS_CONF_REQ); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1322 | |
Neels Hofmeyr | 23c3aa3 | 2016-09-25 15:15:59 +0200 | [diff] [blame] | 1323 | msgb_tv_put(msg, OM2K_DEI_COMBINATION, ts2comb(ts)); |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1324 | msgb_tv_put(msg, OM2K_DEI_TS_NR, ts->nr); |
| 1325 | msgb_tlv_put(msg, OM2K_DEI_FREQ_LIST, freq_list_len, freq_list); |
| 1326 | msgb_tv_put(msg, OM2K_DEI_HSN, ts->hopping.hsn); |
| 1327 | msgb_tv_put(msg, OM2K_DEI_MAIO, ts->hopping.maio); |
| 1328 | msgb_tv_put(msg, OM2K_DEI_BSIC, ts->trx->bts->bsic); |
Harald Welte | 1edc2b4 | 2011-03-06 19:01:54 +0100 | [diff] [blame] | 1329 | msgb_tv_put(msg, OM2K_DEI_RX_DIVERSITY, 0x02); /* A */ |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1330 | msgb_tv16_put(msg, OM2K_DEI_FN_OFFSET, 0); |
| 1331 | msgb_tv_put(msg, OM2K_DEI_EXT_RANGE, 0); /* Off */ |
| 1332 | /* Optional: Interference Rejection Combining */ |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1333 | msgb_tv_put(msg, OM2K_DEI_INTERF_REJ_COMB, 0x00); |
| 1334 | switch (ts->pchan) { |
| 1335 | case GSM_PCHAN_CCCH: |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1336 | msgb_tv_put(msg, OM2K_DEI_BA_PA_MFRMS, 0x06); |
| 1337 | msgb_tv_put(msg, OM2K_DEI_BS_AG_BKS_RES, 0x01); |
| 1338 | msgb_tv_put(msg, OM2K_DEI_DRX_DEV_MAX, 0x05); |
| 1339 | /* Repeat Paging/IMM.ASS: True, Allow Paging Type 3: Yes, Page for 5 seconds (default) */ |
| 1340 | msgb_tv_put(msg, OM2K_DEI_CCCH_OPTIONS, 0x01); |
| 1341 | break; |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1342 | case GSM_PCHAN_CCCH_SDCCH4: |
Harald Welte | 67161f2 | 2012-06-03 13:01:47 +0200 | [diff] [blame] | 1343 | msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10); |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1344 | msgb_tv_put(msg, OM2K_DEI_NY1, 35); |
| 1345 | msgb_tv_put(msg, OM2K_DEI_BA_PA_MFRMS, 0x06); |
| 1346 | msgb_tv_put(msg, OM2K_DEI_CBCH_INDICATOR, 0); |
Harald Welte | 94bc1e0 | 2014-01-19 17:19:10 +0100 | [diff] [blame] | 1347 | msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts)); |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1348 | msgb_tv_put(msg, OM2K_DEI_BS_AG_BKS_RES, 0x01); |
| 1349 | msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0); |
| 1350 | msgb_tv_put(msg, OM2K_DEI_DRX_DEV_MAX, 0x05); |
| 1351 | /* Repeat Paging/IMM.ASS: True, Allow Paging Type 3: Yes, Page for 5 seconds (default) */ |
| 1352 | msgb_tv_put(msg, OM2K_DEI_CCCH_OPTIONS, 0x01); |
| 1353 | msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS, |
| 1354 | sizeof(icm_bound_params), icm_bound_params); |
| 1355 | break; |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1356 | case GSM_PCHAN_SDCCH8_SACCH8C: |
Harald Welte | 67161f2 | 2012-06-03 13:01:47 +0200 | [diff] [blame] | 1357 | msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1358 | msgb_tv_put(msg, OM2K_DEI_NY1, 35); |
| 1359 | msgb_tv_put(msg, OM2K_DEI_CBCH_INDICATOR, 0); |
Harald Welte | 94bc1e0 | 2014-01-19 17:19:10 +0100 | [diff] [blame] | 1360 | msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1361 | /* Disable RF RESOURCE INDICATION on idle channels */ |
| 1362 | msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0); |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1363 | msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS, |
| 1364 | sizeof(icm_bound_params), icm_bound_params); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1365 | break; |
| 1366 | default: |
Harald Welte | 67161f2 | 2012-06-03 13:01:47 +0200 | [diff] [blame] | 1367 | msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1368 | msgb_tv_put(msg, OM2K_DEI_NY1, 35); |
Harald Welte | 94bc1e0 | 2014-01-19 17:19:10 +0100 | [diff] [blame] | 1369 | msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1370 | /* Disable RF RESOURCE INDICATION on idle channels */ |
| 1371 | msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0); |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1372 | msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS, |
| 1373 | sizeof(icm_bound_params), icm_bound_params); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1374 | msgb_tv_put(msg, OM2K_DEI_TTA, 10); /* Timer for Time Alignment */ |
Harald Welte | 75755c5 | 2011-03-05 20:38:35 +0100 | [diff] [blame] | 1375 | if (ts->pchan == GSM_PCHAN_TCH_H) |
| 1376 | msgb_tv_put(msg, OM2K_DEI_ICM_CHAN_RATE, 1); /* TCH/H */ |
| 1377 | else |
| 1378 | msgb_tv_put(msg, OM2K_DEI_ICM_CHAN_RATE, 0); /* TCH/F */ |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1379 | msgb_tv_put(msg, OM2K_DEI_LSC, 1); /* enabled */ |
Harald Welte | 1edc2b4 | 2011-03-06 19:01:54 +0100 | [diff] [blame] | 1380 | msgb_tv_put(msg, OM2K_DEI_LSC_FILT_TIME, 10); /* units of 100ms */ |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1381 | msgb_tv_put(msg, OM2K_DEI_CALL_SUPV_TIME, 8); |
| 1382 | msgb_tv_put(msg, OM2K_DEI_ENCR_ALG, 0x00); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 1383 | break; |
| 1384 | } |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1385 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1386 | DEBUGP(DNM, "Tx MO=%s %s\n", |
| 1387 | om2k_mo_name(&mo), |
| 1388 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_TS_CONF_REQ)); |
| 1389 | |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 1390 | return abis_om2k_sendmsg(ts->trx->bts, msg); |
| 1391 | } |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 1392 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1393 | |
| 1394 | /*********************************************************************** |
| 1395 | * OM2000 Managed Object (MO) FSM |
| 1396 | ***********************************************************************/ |
| 1397 | |
| 1398 | #define S(x) (1 << (x)) |
| 1399 | |
| 1400 | enum om2k_event_name { |
| 1401 | OM2K_MO_EVT_START, |
| 1402 | OM2K_MO_EVT_RX_CONN_COMPL, |
| 1403 | OM2K_MO_EVT_RX_RESET_COMPL, |
| 1404 | OM2K_MO_EVT_RX_START_REQ_ACCEPT, |
| 1405 | OM2K_MO_EVT_RX_START_RES, |
| 1406 | OM2K_MO_EVT_RX_CFG_REQ_ACCEPT, |
| 1407 | OM2K_MO_EVT_RX_CFG_RES, |
| 1408 | OM2K_MO_EVT_RX_ENA_REQ_ACCEPT, |
| 1409 | OM2K_MO_EVT_RX_ENA_RES, |
| 1410 | OM2K_MO_EVT_RX_OPINFO_ACC, |
| 1411 | }; |
| 1412 | |
| 1413 | static const struct value_string om2k_event_names[] = { |
| 1414 | { OM2K_MO_EVT_START, "START" }, |
| 1415 | { OM2K_MO_EVT_RX_CONN_COMPL, "RX-CONN-COMPL" }, |
| 1416 | { OM2K_MO_EVT_RX_RESET_COMPL, "RX-RESET-COMPL" }, |
| 1417 | { OM2K_MO_EVT_RX_START_REQ_ACCEPT, "RX-RESET-REQ-ACCEPT" }, |
| 1418 | { OM2K_MO_EVT_RX_START_RES, "RX-START-RESULT" }, |
| 1419 | { OM2K_MO_EVT_RX_CFG_REQ_ACCEPT, "RX-CFG-REQ-ACCEPT" }, |
| 1420 | { OM2K_MO_EVT_RX_CFG_RES, "RX-CFG-RESULT" }, |
| 1421 | { OM2K_MO_EVT_RX_ENA_REQ_ACCEPT, "RX-ENABLE-REQ-ACCEPT" }, |
| 1422 | { OM2K_MO_EVT_RX_ENA_RES, "RX-ENABLE-RESULT" }, |
| 1423 | { OM2K_MO_EVT_RX_OPINFO_ACC, "RX-OPINFO-ACCEPT" }, |
| 1424 | { 0, NULL } |
| 1425 | }; |
| 1426 | |
| 1427 | enum om2k_mo_fsm_state { |
| 1428 | OM2K_ST_INIT, |
| 1429 | OM2K_ST_WAIT_CONN_COMPL, |
| 1430 | OM2K_ST_WAIT_RES_COMPL, |
| 1431 | OM2K_ST_WAIT_START_ACCEPT, |
| 1432 | OM2K_ST_WAIT_START_RES, |
| 1433 | OM2K_ST_WAIT_CFG_ACCEPT, |
| 1434 | OM2K_ST_WAIT_CFG_RES, |
| 1435 | OM2K_ST_WAIT_ENABLE_ACCEPT, |
| 1436 | OM2K_ST_WAIT_ENABLE_RES, |
| 1437 | OM2K_ST_WAIT_OPINFO_ACCEPT, |
| 1438 | OM2K_ST_DONE, |
| 1439 | OM2K_ST_ERROR, |
| 1440 | }; |
| 1441 | |
| 1442 | struct om2k_mo_fsm_priv { |
| 1443 | struct gsm_bts_trx *trx; |
| 1444 | struct om2k_mo *mo; |
| 1445 | uint8_t ts_nr; |
| 1446 | }; |
| 1447 | |
| 1448 | static void om2k_mo_st_init(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1449 | { |
| 1450 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1451 | |
| 1452 | OSMO_ASSERT(event == OM2K_MO_EVT_START); |
| 1453 | |
| 1454 | switch (omfp->mo->addr.class) { |
| 1455 | case OM2K_MO_CLS_CF: |
| 1456 | /* no Connect required, is always connected */ |
| 1457 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT, |
| 1458 | OM2K_TIMEOUT, 0); |
| 1459 | abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr); |
| 1460 | break; |
| 1461 | case OM2K_MO_CLS_TRXC: |
| 1462 | /* no Connect required, start with Reset */ |
| 1463 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_RES_COMPL, |
| 1464 | OM2K_TIMEOUT, 0); |
| 1465 | abis_om2k_tx_reset_cmd(omfp->trx->bts, &omfp->mo->addr); |
| 1466 | break; |
| 1467 | default: |
| 1468 | /* start with Connect */ |
| 1469 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CONN_COMPL, |
| 1470 | OM2K_TIMEOUT, 0); |
| 1471 | abis_om2k_tx_connect_cmd(omfp->trx->bts, &omfp->mo->addr); |
| 1472 | break; |
| 1473 | } |
| 1474 | } |
| 1475 | |
| 1476 | static void om2k_mo_st_wait_conn_compl(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1477 | { |
| 1478 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1479 | |
| 1480 | switch (omfp->mo->addr.class) { |
| 1481 | #if 0 |
| 1482 | case OM2K_MO_CLS_TF: |
| 1483 | /* skip the reset, hope that helps */ |
| 1484 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT, |
| 1485 | OM2K_TIMEOUT, 0); |
| 1486 | abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr); |
| 1487 | break; |
| 1488 | #endif |
| 1489 | default: |
| 1490 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_RES_COMPL, |
| 1491 | OM2K_TIMEOUT, 0); |
| 1492 | abis_om2k_tx_reset_cmd(omfp->trx->bts, &omfp->mo->addr); |
| 1493 | break; |
| 1494 | } |
| 1495 | } |
| 1496 | |
| 1497 | static void om2k_mo_st_wait_res_compl(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1498 | { |
| 1499 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1500 | |
| 1501 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT, |
| 1502 | OM2K_TIMEOUT, 0); |
| 1503 | abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr); |
| 1504 | } |
| 1505 | |
| 1506 | static void om2k_mo_st_wait_start_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1507 | { |
| 1508 | struct om2k_decoded_msg *omd = data; |
| 1509 | |
| 1510 | switch (omd->msg_type) { |
| 1511 | case OM2K_MSGT_START_REQ_ACK: |
| 1512 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_RES, |
| 1513 | OM2K_TIMEOUT, 0); |
| 1514 | break; |
| 1515 | case OM2K_MSGT_START_REQ_REJ: |
| 1516 | osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0); |
| 1517 | break; |
| 1518 | } |
| 1519 | } |
| 1520 | |
| 1521 | static void om2k_mo_st_wait_start_res(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1522 | { |
| 1523 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1524 | struct gsm_bts_trx_ts *ts; |
| 1525 | |
| 1526 | switch (omfp->mo->addr.class) { |
| 1527 | case OM2K_MO_CLS_CF: |
| 1528 | case OM2K_MO_CLS_TRXC: |
| 1529 | /* Transition directly to Operational Info */ |
| 1530 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_OPINFO_ACCEPT, |
| 1531 | OM2K_TIMEOUT, 0); |
| 1532 | abis_om2k_tx_op_info(omfp->trx->bts, &omfp->mo->addr, 1); |
Harald Welte | 424656e | 2016-10-15 16:30:35 +0200 | [diff] [blame] | 1533 | return; |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 1534 | case OM2K_MO_CLS_DP: |
| 1535 | /* Transition directoy to WAIT_ENABLE_ACCEPT */ |
| 1536 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT, |
| 1537 | OM2K_TIMEOUT, 0); |
| 1538 | abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr); |
| 1539 | return; |
| 1540 | #if 0 |
| 1541 | case OM2K_MO_CLS_TF: |
| 1542 | /* skip the config, hope that helps speeding things up */ |
| 1543 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT, |
| 1544 | OM2K_TIMEOUT, 0); |
| 1545 | abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr); |
| 1546 | return; |
| 1547 | #endif |
| 1548 | } |
| 1549 | |
| 1550 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CFG_ACCEPT, |
| 1551 | OM2K_TIMEOUT, 0); |
| 1552 | switch (omfp->mo->addr.class) { |
| 1553 | case OM2K_MO_CLS_TF: |
| 1554 | abis_om2k_tx_tf_conf_req(omfp->trx->bts); |
| 1555 | break; |
| 1556 | case OM2K_MO_CLS_IS: |
| 1557 | abis_om2k_tx_is_conf_req(omfp->trx->bts); |
| 1558 | break; |
| 1559 | case OM2K_MO_CLS_CON: |
| 1560 | /* TODO */ |
| 1561 | //abis_om2k_tx_con_conf_req(omfp->trx->bts, data, len); |
| 1562 | break; |
| 1563 | case OM2K_MO_CLS_TX: |
| 1564 | abis_om2k_tx_tx_conf_req(omfp->trx); |
| 1565 | break; |
| 1566 | case OM2K_MO_CLS_RX: |
| 1567 | abis_om2k_tx_rx_conf_req(omfp->trx); |
| 1568 | break; |
| 1569 | case OM2K_MO_CLS_TS: |
| 1570 | ts = mo2obj(omfp->trx->bts, &omfp->mo->addr); |
| 1571 | abis_om2k_tx_ts_conf_req(ts); |
| 1572 | break; |
| 1573 | } |
| 1574 | } |
| 1575 | |
| 1576 | static void om2k_mo_st_wait_cfg_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1577 | { |
| 1578 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1579 | uint32_t timeout = OM2K_TIMEOUT; |
| 1580 | |
| 1581 | if (omfp->mo->addr.class == OM2K_MO_CLS_TF) |
| 1582 | timeout = 600; |
| 1583 | |
| 1584 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CFG_RES, timeout, 0); |
| 1585 | } |
| 1586 | |
| 1587 | static void om2k_mo_st_wait_cfg_res(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1588 | { |
| 1589 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1590 | struct om2k_decoded_msg *omd = data; |
| 1591 | uint8_t accordance; |
| 1592 | |
| 1593 | if (!TLVP_PRESENT(&omd->tp, OM2K_DEI_ACCORDANCE_IND)) { |
| 1594 | osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0); |
| 1595 | return; |
| 1596 | } |
| 1597 | accordance = *TLVP_VAL(&omd->tp, OM2K_DEI_ACCORDANCE_IND); |
| 1598 | |
| 1599 | if (accordance != 0) { |
| 1600 | /* accordance not OK */ |
| 1601 | osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0); |
| 1602 | return; |
| 1603 | } |
| 1604 | |
| 1605 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT, |
| 1606 | OM2K_TIMEOUT, 0); |
| 1607 | abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr); |
| 1608 | } |
| 1609 | |
| 1610 | static void om2k_mo_st_wait_enable_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1611 | { |
| 1612 | struct om2k_decoded_msg *omd = data; |
| 1613 | |
| 1614 | switch (omd->msg_type) { |
| 1615 | case OM2K_MSGT_ENABLE_REQ_REJ: |
| 1616 | osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0); |
| 1617 | break; |
| 1618 | case OM2K_MSGT_ENABLE_REQ_ACK: |
| 1619 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_RES, |
| 1620 | OM2K_TIMEOUT, 0); |
| 1621 | } |
| 1622 | } |
| 1623 | |
| 1624 | static void om2k_mo_st_wait_enable_res(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1625 | { |
| 1626 | struct om2k_mo_fsm_priv *omfp = fi->priv; |
| 1627 | //struct om2k_decoded_msg *omd = data; |
| 1628 | /* TODO: check if state is actually enabled now? */ |
| 1629 | |
| 1630 | osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_OPINFO_ACCEPT, |
| 1631 | OM2K_TIMEOUT, 0); |
| 1632 | abis_om2k_tx_op_info(omfp->trx->bts, &omfp->mo->addr, 1); |
| 1633 | } |
| 1634 | |
| 1635 | static void om2k_mo_st_wait_opinfo_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1636 | { |
| 1637 | osmo_fsm_inst_state_chg(fi, OM2K_ST_DONE, 0, 0); |
| 1638 | } |
| 1639 | |
| 1640 | static void om2k_mo_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state) |
| 1641 | { |
| 1642 | osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL); |
| 1643 | } |
| 1644 | |
| 1645 | static const struct osmo_fsm_state om2k_is_states[] = { |
| 1646 | [OM2K_ST_INIT] = { |
| 1647 | .name = "INIT", |
| 1648 | .in_event_mask = S(OM2K_MO_EVT_START), |
| 1649 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1650 | S(OM2K_ST_ERROR) | |
| 1651 | S(OM2K_ST_WAIT_CONN_COMPL) | |
| 1652 | S(OM2K_ST_WAIT_START_ACCEPT) | |
| 1653 | S(OM2K_ST_WAIT_RES_COMPL), |
| 1654 | .action = om2k_mo_st_init, |
| 1655 | }, |
| 1656 | [OM2K_ST_WAIT_CONN_COMPL] = { |
| 1657 | .name = "WAIT-CONN-COMPL", |
| 1658 | .in_event_mask = S(OM2K_MO_EVT_RX_CONN_COMPL), |
| 1659 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1660 | S(OM2K_ST_ERROR) | |
| 1661 | S(OM2K_ST_WAIT_START_ACCEPT) | |
| 1662 | S(OM2K_ST_WAIT_RES_COMPL), |
| 1663 | .action = om2k_mo_st_wait_conn_compl, |
| 1664 | }, |
| 1665 | [OM2K_ST_WAIT_RES_COMPL] = { |
| 1666 | .name = "WAIT-RES-COMPL", |
| 1667 | .in_event_mask = S(OM2K_MO_EVT_RX_RESET_COMPL), |
| 1668 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1669 | S(OM2K_ST_ERROR) | |
| 1670 | S(OM2K_ST_WAIT_START_ACCEPT), |
| 1671 | .action = om2k_mo_st_wait_res_compl, |
| 1672 | }, |
| 1673 | [OM2K_ST_WAIT_START_ACCEPT] = { |
| 1674 | .name = "WAIT-START-ACCEPT", |
| 1675 | .in_event_mask = S(OM2K_MO_EVT_RX_START_REQ_ACCEPT), |
| 1676 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1677 | S(OM2K_ST_ERROR) | |
| 1678 | S(OM2K_ST_WAIT_START_RES), |
| 1679 | .action =om2k_mo_st_wait_start_accept, |
| 1680 | }, |
| 1681 | [OM2K_ST_WAIT_START_RES] = { |
| 1682 | .name = "WAIT-START-RES", |
| 1683 | .in_event_mask = S(OM2K_MO_EVT_RX_START_RES), |
| 1684 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1685 | S(OM2K_ST_ERROR) | |
| 1686 | S(OM2K_ST_WAIT_CFG_ACCEPT) | |
| 1687 | S(OM2K_ST_WAIT_OPINFO_ACCEPT), |
| 1688 | .action = om2k_mo_st_wait_start_res, |
| 1689 | }, |
| 1690 | [OM2K_ST_WAIT_CFG_ACCEPT] = { |
| 1691 | .name = "WAIT-CFG-ACCEPT", |
| 1692 | .in_event_mask = S(OM2K_MO_EVT_RX_CFG_REQ_ACCEPT), |
| 1693 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1694 | S(OM2K_ST_ERROR) | |
| 1695 | S(OM2K_ST_WAIT_CFG_RES), |
| 1696 | .action = om2k_mo_st_wait_cfg_accept, |
| 1697 | }, |
| 1698 | [OM2K_ST_WAIT_CFG_RES] = { |
| 1699 | .name = "WAIT-CFG-RES", |
| 1700 | .in_event_mask = S(OM2K_MO_EVT_RX_CFG_RES), |
| 1701 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1702 | S(OM2K_ST_ERROR) | |
| 1703 | S(OM2K_ST_WAIT_ENABLE_ACCEPT), |
| 1704 | .action = om2k_mo_st_wait_cfg_res, |
| 1705 | }, |
| 1706 | [OM2K_ST_WAIT_ENABLE_ACCEPT] = { |
| 1707 | .name = "WAIT-ENABLE-ACCEPT", |
| 1708 | .in_event_mask = S(OM2K_MO_EVT_RX_ENA_REQ_ACCEPT), |
| 1709 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1710 | S(OM2K_ST_ERROR) | |
| 1711 | S(OM2K_ST_WAIT_ENABLE_RES), |
| 1712 | .action = om2k_mo_st_wait_enable_accept, |
| 1713 | }, |
| 1714 | [OM2K_ST_WAIT_ENABLE_RES] = { |
| 1715 | .name = "WAIT-ENABLE-RES", |
| 1716 | .in_event_mask = S(OM2K_MO_EVT_RX_ENA_RES), |
| 1717 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1718 | S(OM2K_ST_ERROR) | |
| 1719 | S(OM2K_ST_WAIT_OPINFO_ACCEPT), |
| 1720 | .action = om2k_mo_st_wait_enable_res, |
| 1721 | }, |
| 1722 | [OM2K_ST_WAIT_OPINFO_ACCEPT] = { |
| 1723 | .name = "WAIT-OPINFO-ACCEPT", |
| 1724 | .in_event_mask = S(OM2K_MO_EVT_RX_OPINFO_ACC), |
| 1725 | .out_state_mask = S(OM2K_ST_DONE) | |
| 1726 | S(OM2K_ST_ERROR), |
| 1727 | .action = om2k_mo_st_wait_opinfo_accept, |
| 1728 | }, |
| 1729 | [OM2K_ST_DONE] = { |
| 1730 | .name = "DONE", |
| 1731 | .in_event_mask = 0, |
| 1732 | .out_state_mask = 0, |
| 1733 | .onenter = om2k_mo_s_done_onenter, |
| 1734 | }, |
| 1735 | [OM2K_ST_ERROR] = { |
| 1736 | .name = "ERROR", |
| 1737 | .in_event_mask = 0, |
| 1738 | .out_state_mask = 0, |
| 1739 | .onenter = om2k_mo_s_done_onenter, |
| 1740 | }, |
| 1741 | |
| 1742 | }; |
| 1743 | |
| 1744 | static int om2k_mo_timer_cb(struct osmo_fsm_inst *fi) |
| 1745 | { |
| 1746 | osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0); |
| 1747 | return 0; |
| 1748 | } |
| 1749 | |
| 1750 | static struct osmo_fsm om2k_mo_fsm = { |
| 1751 | .name = "OM2000-MO", |
| 1752 | .states = om2k_is_states, |
| 1753 | .num_states = ARRAY_SIZE(om2k_is_states), |
| 1754 | .log_subsys = DNM, |
| 1755 | .event_names = om2k_event_names, |
| 1756 | .timer_cb = om2k_mo_timer_cb, |
| 1757 | }; |
| 1758 | |
| 1759 | struct osmo_fsm_inst *om2k_mo_fsm_start(struct osmo_fsm_inst *parent, |
| 1760 | uint32_t term_event, |
| 1761 | struct gsm_bts_trx *trx, struct om2k_mo *mo) |
| 1762 | { |
| 1763 | struct osmo_fsm_inst *fi; |
| 1764 | struct om2k_mo_fsm_priv *omfp; |
| 1765 | char idbuf[64]; |
| 1766 | |
| 1767 | snprintf(idbuf, sizeof(idbuf), "%s-%s", parent->id, |
| 1768 | om2k_mo_name(&mo->addr)); |
| 1769 | |
| 1770 | fi = osmo_fsm_inst_alloc_child_id(&om2k_mo_fsm, parent, |
| 1771 | term_event, idbuf); |
| 1772 | if (!fi) |
| 1773 | return NULL; |
| 1774 | |
| 1775 | mo->fsm = fi; |
| 1776 | omfp = talloc_zero(fi, struct om2k_mo_fsm_priv); |
| 1777 | omfp->mo = mo; |
| 1778 | omfp->trx = trx; |
| 1779 | fi->priv = omfp; |
| 1780 | |
| 1781 | osmo_fsm_inst_dispatch(fi, OM2K_MO_EVT_START, NULL); |
| 1782 | |
| 1783 | return fi; |
| 1784 | } |
| 1785 | |
| 1786 | int om2k_mo_fsm_recvmsg(struct gsm_bts *bts, struct om2k_mo *mo, |
| 1787 | struct om2k_decoded_msg *odm) |
| 1788 | { |
| 1789 | switch (odm->msg_type) { |
| 1790 | case OM2K_MSGT_CONNECT_COMPL: |
| 1791 | case OM2K_MSGT_CONNECT_REJ: |
| 1792 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1793 | OM2K_MO_EVT_RX_CONN_COMPL, odm); |
| 1794 | break; |
| 1795 | |
| 1796 | case OM2K_MSGT_RESET_COMPL: |
| 1797 | case OM2K_MSGT_RESET_REJ: |
| 1798 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1799 | OM2K_MO_EVT_RX_RESET_COMPL, odm); |
| 1800 | break; |
| 1801 | |
| 1802 | case OM2K_MSGT_START_REQ_ACK: |
| 1803 | case OM2K_MSGT_START_REQ_REJ: |
| 1804 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1805 | OM2K_MO_EVT_RX_START_REQ_ACCEPT, odm); |
| 1806 | break; |
| 1807 | |
| 1808 | case OM2K_MSGT_START_RES: |
| 1809 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1810 | OM2K_MO_EVT_RX_START_RES, odm); |
| 1811 | break; |
| 1812 | |
| 1813 | case OM2K_MSGT_CON_CONF_REQ_ACK: |
| 1814 | case OM2K_MSGT_IS_CONF_REQ_ACK: |
| 1815 | case OM2K_MSGT_RX_CONF_REQ_ACK: |
| 1816 | case OM2K_MSGT_TF_CONF_REQ_ACK: |
| 1817 | case OM2K_MSGT_TS_CONF_REQ_ACK: |
| 1818 | case OM2K_MSGT_TX_CONF_REQ_ACK: |
| 1819 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1820 | OM2K_MO_EVT_RX_CFG_REQ_ACCEPT, odm); |
| 1821 | break; |
| 1822 | |
| 1823 | case OM2K_MSGT_CON_CONF_RES: |
| 1824 | case OM2K_MSGT_IS_CONF_RES: |
| 1825 | case OM2K_MSGT_RX_CONF_RES: |
| 1826 | case OM2K_MSGT_TF_CONF_RES: |
| 1827 | case OM2K_MSGT_TS_CONF_RES: |
| 1828 | case OM2K_MSGT_TX_CONF_RES: |
| 1829 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1830 | OM2K_MO_EVT_RX_CFG_RES, odm); |
| 1831 | break; |
| 1832 | |
| 1833 | case OM2K_MSGT_ENABLE_REQ_ACK: |
| 1834 | case OM2K_MSGT_ENABLE_REQ_REJ: |
| 1835 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1836 | OM2K_MO_EVT_RX_ENA_REQ_ACCEPT, odm); |
| 1837 | break; |
| 1838 | case OM2K_MSGT_ENABLE_RES: |
| 1839 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1840 | OM2K_MO_EVT_RX_ENA_RES, odm); |
| 1841 | break; |
| 1842 | |
| 1843 | case OM2K_MSGT_OP_INFO_ACK: |
| 1844 | case OM2K_MSGT_OP_INFO_REJ: |
| 1845 | osmo_fsm_inst_dispatch(mo->fsm, |
| 1846 | OM2K_MO_EVT_RX_OPINFO_ACC, odm); |
| 1847 | break; |
| 1848 | default: |
| 1849 | return -1; |
| 1850 | } |
| 1851 | |
| 1852 | return 0; |
| 1853 | } |
| 1854 | |
| 1855 | /*********************************************************************** |
| 1856 | * OM2000 TRX Finite State Machine, initializes TRXC and all siblings |
| 1857 | ***********************************************************************/ |
| 1858 | |
| 1859 | enum om2k_trx_event { |
| 1860 | OM2K_TRX_EVT_START, |
| 1861 | OM2K_TRX_EVT_TRXC_DONE, |
| 1862 | OM2K_TRX_EVT_TX_DONE, |
| 1863 | OM2K_TRX_EVT_RX_DONE, |
| 1864 | OM2K_TRX_EVT_TS_DONE, |
| 1865 | OM2K_TRX_EVT_STOP, |
| 1866 | }; |
| 1867 | |
| 1868 | static struct value_string om2k_trx_events[] = { |
| 1869 | { OM2K_TRX_EVT_START, "START" }, |
| 1870 | { OM2K_TRX_EVT_TRXC_DONE, "TRXC-DONE" }, |
| 1871 | { OM2K_TRX_EVT_TX_DONE, "TX-DONE" }, |
| 1872 | { OM2K_TRX_EVT_RX_DONE, "RX-DONE" }, |
| 1873 | { OM2K_TRX_EVT_TS_DONE, "TS-DONE" }, |
| 1874 | { OM2K_TRX_EVT_STOP, "STOP" }, |
| 1875 | { 0, NULL } |
| 1876 | }; |
| 1877 | |
| 1878 | enum om2k_trx_state { |
| 1879 | OM2K_TRX_S_INIT, |
| 1880 | OM2K_TRX_S_WAIT_TRXC, |
| 1881 | OM2K_TRX_S_WAIT_TX, |
| 1882 | OM2K_TRX_S_WAIT_RX, |
| 1883 | OM2K_TRX_S_WAIT_TS, |
| 1884 | OM2K_TRX_S_DONE, |
| 1885 | OM2K_TRX_S_ERROR |
| 1886 | }; |
| 1887 | |
| 1888 | struct om2k_trx_fsm_priv { |
| 1889 | struct gsm_bts_trx *trx; |
| 1890 | uint8_t next_ts_nr; |
| 1891 | }; |
| 1892 | |
| 1893 | static void om2k_trx_s_init(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1894 | { |
| 1895 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1896 | |
| 1897 | /* First initialize TRXC */ |
| 1898 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TRXC, |
| 1899 | TRX_FSM_TIMEOUT, 0); |
| 1900 | om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TRXC_DONE, otfp->trx, |
| 1901 | &otfp->trx->rbs2000.trxc.om2k_mo); |
| 1902 | } |
| 1903 | |
| 1904 | static void om2k_trx_s_wait_trxc(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1905 | { |
| 1906 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1907 | |
| 1908 | /* Initialize TX after TRXC */ |
| 1909 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TX, |
| 1910 | TRX_FSM_TIMEOUT, 0); |
| 1911 | om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TX_DONE, otfp->trx, |
| 1912 | &otfp->trx->rbs2000.tx.om2k_mo); |
| 1913 | } |
| 1914 | |
| 1915 | static void om2k_trx_s_wait_tx(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1916 | { |
| 1917 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1918 | |
| 1919 | /* Initialize RX after TX */ |
| 1920 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_RX, |
| 1921 | TRX_FSM_TIMEOUT, 0); |
| 1922 | om2k_mo_fsm_start(fi, OM2K_TRX_EVT_RX_DONE, otfp->trx, |
| 1923 | &otfp->trx->rbs2000.rx.om2k_mo); |
| 1924 | } |
| 1925 | |
| 1926 | static void om2k_trx_s_wait_rx(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1927 | { |
| 1928 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1929 | struct gsm_bts_trx_ts *ts; |
| 1930 | |
| 1931 | /* Initialize Timeslots after TX */ |
| 1932 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TS, |
| 1933 | TRX_FSM_TIMEOUT, 0); |
| 1934 | otfp->next_ts_nr = 0; |
| 1935 | ts = &otfp->trx->ts[otfp->next_ts_nr++]; |
| 1936 | om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TS_DONE, otfp->trx, |
| 1937 | &ts->rbs2000.om2k_mo); |
| 1938 | } |
| 1939 | |
| 1940 | static void om2k_trx_s_wait_ts(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 1941 | { |
| 1942 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1943 | struct gsm_bts_trx_ts *ts; |
| 1944 | |
| 1945 | if (otfp->next_ts_nr < 8) { |
| 1946 | /* iterate to the next timeslot */ |
| 1947 | ts = &otfp->trx->ts[otfp->next_ts_nr++]; |
| 1948 | om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TS_DONE, otfp->trx, |
| 1949 | &ts->rbs2000.om2k_mo); |
| 1950 | } else { |
| 1951 | /* only after all 8 TS */ |
| 1952 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_DONE, 0, 0); |
| 1953 | } |
| 1954 | } |
| 1955 | |
| 1956 | static void om2k_trx_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state) |
| 1957 | { |
| 1958 | struct om2k_trx_fsm_priv *otfp = fi->priv; |
| 1959 | gsm_bts_trx_set_system_infos(otfp->trx); |
| 1960 | osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL); |
| 1961 | } |
| 1962 | |
| 1963 | static const struct osmo_fsm_state om2k_trx_states[] = { |
| 1964 | [OM2K_TRX_S_INIT] = { |
| 1965 | .in_event_mask = S(OM2K_TRX_EVT_START), |
| 1966 | .out_state_mask = S(OM2K_TRX_S_WAIT_TRXC), |
| 1967 | .name = "INIT", |
| 1968 | .action = om2k_trx_s_init, |
| 1969 | }, |
| 1970 | [OM2K_TRX_S_WAIT_TRXC] = { |
| 1971 | .in_event_mask = S(OM2K_TRX_EVT_TRXC_DONE), |
| 1972 | .out_state_mask = S(OM2K_TRX_S_ERROR) | |
| 1973 | S(OM2K_TRX_S_WAIT_TX), |
| 1974 | .name = "WAIT-TRXC", |
| 1975 | .action = om2k_trx_s_wait_trxc, |
| 1976 | }, |
| 1977 | [OM2K_TRX_S_WAIT_TX] = { |
| 1978 | .in_event_mask = S(OM2K_TRX_EVT_TX_DONE), |
| 1979 | .out_state_mask = S(OM2K_TRX_S_ERROR) | |
| 1980 | S(OM2K_TRX_S_WAIT_RX), |
| 1981 | .name = "WAIT-TX", |
| 1982 | .action = om2k_trx_s_wait_tx, |
| 1983 | }, |
| 1984 | [OM2K_TRX_S_WAIT_RX] = { |
| 1985 | .in_event_mask = S(OM2K_TRX_EVT_RX_DONE), |
| 1986 | .out_state_mask = S(OM2K_TRX_S_ERROR) | |
| 1987 | S(OM2K_TRX_S_WAIT_TS), |
| 1988 | .name = "WAIT-RX", |
| 1989 | .action = om2k_trx_s_wait_rx, |
| 1990 | }, |
| 1991 | [OM2K_TRX_S_WAIT_TS] = { |
| 1992 | .in_event_mask = S(OM2K_TRX_EVT_TS_DONE), |
| 1993 | .out_state_mask = S(OM2K_TRX_S_ERROR) | |
| 1994 | S(OM2K_TRX_S_DONE), |
| 1995 | .name = "WAIT-TS", |
| 1996 | .action = om2k_trx_s_wait_ts, |
| 1997 | }, |
| 1998 | [OM2K_TRX_S_DONE] = { |
| 1999 | .name = "DONE", |
| 2000 | .onenter = om2k_trx_s_done_onenter, |
| 2001 | }, |
| 2002 | [OM2K_TRX_S_ERROR] = { |
| 2003 | .name = "ERROR", |
| 2004 | }, |
| 2005 | }; |
| 2006 | |
| 2007 | static int om2k_trx_timer_cb(struct osmo_fsm_inst *fi) |
| 2008 | { |
| 2009 | osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_ERROR, 0, 0); |
| 2010 | return 0; |
| 2011 | } |
| 2012 | |
| 2013 | static struct osmo_fsm om2k_trx_fsm = { |
| 2014 | .name = "OM2000-TRX", |
| 2015 | .states = om2k_trx_states, |
| 2016 | .num_states = ARRAY_SIZE(om2k_trx_states), |
| 2017 | .log_subsys = DNM, |
| 2018 | .event_names = om2k_trx_events, |
| 2019 | .timer_cb = om2k_trx_timer_cb, |
| 2020 | }; |
| 2021 | |
| 2022 | struct osmo_fsm_inst *om2k_trx_fsm_start(struct osmo_fsm_inst *parent, |
| 2023 | struct gsm_bts_trx *trx, |
| 2024 | uint32_t term_event) |
| 2025 | { |
| 2026 | struct osmo_fsm_inst *fi; |
| 2027 | struct om2k_trx_fsm_priv *otfp; |
| 2028 | char idbuf[32]; |
| 2029 | |
| 2030 | snprintf(idbuf, sizeof(idbuf), "%u/%u", trx->bts->nr, trx->nr); |
| 2031 | |
| 2032 | fi = osmo_fsm_inst_alloc_child_id(&om2k_trx_fsm, parent, term_event, |
| 2033 | idbuf); |
| 2034 | if (!fi) |
| 2035 | return NULL; |
| 2036 | |
| 2037 | otfp = talloc_zero(fi, struct om2k_trx_fsm_priv); |
| 2038 | otfp->trx = trx; |
| 2039 | fi->priv = otfp; |
| 2040 | |
| 2041 | osmo_fsm_inst_dispatch(fi, OM2K_TRX_EVT_START, NULL); |
| 2042 | |
| 2043 | return fi; |
| 2044 | } |
| 2045 | |
| 2046 | |
| 2047 | /*********************************************************************** |
| 2048 | * OM2000 BTS Finite State Machine, initializes CF and all siblings |
| 2049 | ***********************************************************************/ |
| 2050 | |
| 2051 | enum om2k_bts_event { |
| 2052 | OM2K_BTS_EVT_START, |
| 2053 | OM2K_BTS_EVT_CF_DONE, |
| 2054 | OM2K_BTS_EVT_IS_DONE, |
| 2055 | OM2K_BTS_EVT_TF_DONE, |
| 2056 | OM2K_BTS_EVT_TRX_DONE, |
| 2057 | OM2K_BTS_EVT_STOP, |
| 2058 | }; |
| 2059 | |
| 2060 | static const struct value_string om2k_bts_events[] = { |
| 2061 | { OM2K_BTS_EVT_START, "START" }, |
| 2062 | { OM2K_BTS_EVT_CF_DONE, "CF-DONE" }, |
| 2063 | { OM2K_BTS_EVT_IS_DONE, "IS-DONE" }, |
| 2064 | { OM2K_BTS_EVT_TF_DONE, "TF-DONE" }, |
| 2065 | { OM2K_BTS_EVT_TRX_DONE, "TRX-DONE" }, |
| 2066 | { OM2K_BTS_EVT_STOP, "STOP" }, |
| 2067 | { 0, NULL } |
| 2068 | }; |
| 2069 | |
| 2070 | enum om2k_bts_state { |
| 2071 | OM2K_BTS_S_INIT, |
| 2072 | OM2K_BTS_S_WAIT_CF, |
| 2073 | OM2K_BTS_S_WAIT_IS, |
| 2074 | OM2K_BTS_S_WAIT_TF, |
| 2075 | OM2K_BTS_S_WAIT_TRX, |
| 2076 | OM2K_BTS_S_DONE, |
| 2077 | OM2K_BTS_S_ERROR, |
| 2078 | }; |
| 2079 | |
| 2080 | struct om2k_bts_fsm_priv { |
| 2081 | struct gsm_bts *bts; |
| 2082 | uint8_t next_trx_nr; |
| 2083 | }; |
| 2084 | |
| 2085 | static void om2k_bts_s_init(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 2086 | { |
| 2087 | struct om2k_bts_fsm_priv *obfp = fi->priv; |
| 2088 | struct gsm_bts *bts = obfp->bts; |
| 2089 | |
| 2090 | OSMO_ASSERT(event == OM2K_BTS_EVT_START); |
| 2091 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_CF, |
| 2092 | BTS_FSM_TIMEOUT, 0); |
| 2093 | om2k_mo_fsm_start(fi, OM2K_BTS_EVT_CF_DONE, bts->c0, |
| 2094 | &bts->rbs2000.cf.om2k_mo); |
| 2095 | } |
| 2096 | |
| 2097 | static void om2k_bts_s_wait_cf(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 2098 | { |
| 2099 | struct om2k_bts_fsm_priv *obfp = fi->priv; |
| 2100 | struct gsm_bts *bts = obfp->bts; |
| 2101 | |
| 2102 | OSMO_ASSERT(event == OM2K_BTS_EVT_CF_DONE); |
| 2103 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_IS, |
| 2104 | BTS_FSM_TIMEOUT, 0); |
| 2105 | om2k_mo_fsm_start(fi, OM2K_BTS_EVT_IS_DONE, bts->c0, |
| 2106 | &bts->rbs2000.is.om2k_mo); |
| 2107 | } |
| 2108 | |
| 2109 | static void om2k_bts_s_wait_is(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 2110 | { |
| 2111 | struct om2k_bts_fsm_priv *obfp = fi->priv; |
| 2112 | struct gsm_bts *bts = obfp->bts; |
| 2113 | |
| 2114 | OSMO_ASSERT(event == OM2K_BTS_EVT_IS_DONE); |
| 2115 | /* TF can take a long time to initialize, wait for 10min */ |
| 2116 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_TF, 600, 0); |
| 2117 | om2k_mo_fsm_start(fi, OM2K_BTS_EVT_TF_DONE, bts->c0, |
| 2118 | &bts->rbs2000.tf.om2k_mo); |
| 2119 | } |
| 2120 | |
| 2121 | static void om2k_bts_s_wait_tf(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 2122 | { |
| 2123 | struct om2k_bts_fsm_priv *obfp = fi->priv; |
| 2124 | struct gsm_bts_trx *trx; |
| 2125 | |
| 2126 | OSMO_ASSERT(event == OM2K_BTS_EVT_TF_DONE); |
| 2127 | |
| 2128 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_TRX, |
| 2129 | BTS_FSM_TIMEOUT, 0); |
| 2130 | obfp->next_trx_nr = 0; |
| 2131 | trx = gsm_bts_trx_num(obfp->bts, obfp->next_trx_nr++); |
| 2132 | om2k_trx_fsm_start(fi, trx, OM2K_BTS_EVT_TRX_DONE); |
| 2133 | } |
| 2134 | |
| 2135 | static void om2k_bts_s_wait_trx(struct osmo_fsm_inst *fi, uint32_t event, void *data) |
| 2136 | { |
| 2137 | struct om2k_bts_fsm_priv *obfp = fi->priv; |
| 2138 | |
| 2139 | OSMO_ASSERT(event == OM2K_BTS_EVT_TRX_DONE); |
| 2140 | |
| 2141 | if (obfp->next_trx_nr < obfp->bts->num_trx) { |
| 2142 | struct gsm_bts_trx *trx; |
| 2143 | trx = gsm_bts_trx_num(obfp->bts, obfp->next_trx_nr++); |
| 2144 | om2k_trx_fsm_start(fi, trx, OM2K_BTS_EVT_TRX_DONE); |
| 2145 | } else { |
| 2146 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_DONE, 0, 0); |
| 2147 | } |
| 2148 | } |
| 2149 | |
| 2150 | static void om2k_bts_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state) |
| 2151 | { |
| 2152 | osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL); |
| 2153 | } |
| 2154 | |
| 2155 | static const struct osmo_fsm_state om2k_bts_states[] = { |
| 2156 | [OM2K_BTS_S_INIT] = { |
| 2157 | .in_event_mask = S(OM2K_BTS_EVT_START), |
| 2158 | .out_state_mask = S(OM2K_BTS_S_WAIT_CF), |
| 2159 | .name = "INIT", |
| 2160 | .action = om2k_bts_s_init, |
| 2161 | }, |
| 2162 | [OM2K_BTS_S_WAIT_CF] = { |
| 2163 | .in_event_mask = S(OM2K_BTS_EVT_CF_DONE), |
| 2164 | .out_state_mask = S(OM2K_BTS_S_ERROR) | |
| 2165 | S(OM2K_BTS_S_WAIT_IS), |
| 2166 | .name = "WAIT-CF", |
| 2167 | .action = om2k_bts_s_wait_cf, |
| 2168 | }, |
| 2169 | [OM2K_BTS_S_WAIT_IS] = { |
| 2170 | .in_event_mask = S(OM2K_BTS_EVT_IS_DONE), |
| 2171 | .out_state_mask = S(OM2K_BTS_S_ERROR) | |
| 2172 | S(OM2K_BTS_S_WAIT_TF), |
| 2173 | .name = "WAIT-IS", |
| 2174 | .action = om2k_bts_s_wait_is, |
| 2175 | }, |
| 2176 | [OM2K_BTS_S_WAIT_TF] = { |
| 2177 | .in_event_mask = S(OM2K_BTS_EVT_TF_DONE), |
| 2178 | .out_state_mask = S(OM2K_BTS_S_ERROR) | |
| 2179 | S(OM2K_BTS_S_WAIT_TRX), |
| 2180 | .name = "WAIT-TF", |
| 2181 | .action = om2k_bts_s_wait_tf, |
| 2182 | }, |
| 2183 | [OM2K_BTS_S_WAIT_TRX] = { |
| 2184 | .in_event_mask = S(OM2K_BTS_EVT_TRX_DONE), |
| 2185 | .out_state_mask = S(OM2K_BTS_S_ERROR) | |
| 2186 | S(OM2K_BTS_S_DONE), |
| 2187 | .name = "WAIT-TRX", |
| 2188 | .action = om2k_bts_s_wait_trx, |
| 2189 | }, |
| 2190 | [OM2K_BTS_S_DONE] = { |
| 2191 | .name = "DONE", |
| 2192 | .onenter = om2k_bts_s_done_onenter, |
| 2193 | }, |
| 2194 | [OM2K_BTS_S_ERROR] = { |
| 2195 | .name = "ERROR", |
| 2196 | }, |
| 2197 | }; |
| 2198 | |
| 2199 | static int om2k_bts_timer_cb(struct osmo_fsm_inst *fi) |
| 2200 | { |
| 2201 | osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_ERROR, 0, 0); |
| 2202 | return 0; |
| 2203 | } |
| 2204 | |
| 2205 | static struct osmo_fsm om2k_bts_fsm = { |
| 2206 | .name = "OM2000-BTS", |
| 2207 | .states = om2k_bts_states, |
| 2208 | .num_states = ARRAY_SIZE(om2k_bts_states), |
| 2209 | .log_subsys = DNM, |
| 2210 | .event_names = om2k_bts_events, |
| 2211 | .timer_cb = om2k_bts_timer_cb, |
| 2212 | }; |
| 2213 | |
| 2214 | struct osmo_fsm_inst * |
| 2215 | om2k_bts_fsm_start(struct gsm_bts *bts) |
| 2216 | { |
| 2217 | struct osmo_fsm_inst *fi; |
| 2218 | struct om2k_bts_fsm_priv *obfp; |
| 2219 | char idbuf[16]; |
| 2220 | |
| 2221 | snprintf(idbuf, sizeof(idbuf), "%u", bts->nr); |
| 2222 | |
| 2223 | fi = osmo_fsm_inst_alloc(&om2k_bts_fsm, bts, NULL, |
| 2224 | LOGL_DEBUG, idbuf); |
| 2225 | if (!fi) |
| 2226 | return NULL; |
| 2227 | fi->priv = obfp = talloc_zero(fi, struct om2k_bts_fsm_priv); |
| 2228 | obfp->bts = bts; |
| 2229 | |
| 2230 | osmo_fsm_inst_dispatch(fi, OM2K_BTS_EVT_START, NULL); |
| 2231 | |
| 2232 | return fi; |
| 2233 | } |
| 2234 | |
| 2235 | |
| 2236 | /*********************************************************************** |
| 2237 | * OM2000 Negotiation |
| 2238 | ***********************************************************************/ |
| 2239 | |
Harald Welte | 6fec79d | 2011-02-12 14:57:17 +0100 | [diff] [blame] | 2240 | static int abis_om2k_tx_negot_req_ack(struct gsm_bts *bts, const struct abis_om2k_mo *mo, |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 2241 | uint8_t *data, unsigned int len) |
| 2242 | { |
| 2243 | struct msgb *msg = om2k_msgb_alloc(); |
| 2244 | struct abis_om2k_hdr *o2k; |
| 2245 | |
| 2246 | o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k)); |
Harald Welte | 1164dce | 2011-03-05 19:21:26 +0100 | [diff] [blame] | 2247 | fill_om2k_hdr(o2k, mo, OM2K_MSGT_NEGOT_REQ_ACK); |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 2248 | |
| 2249 | msgb_tlv_put(msg, OM2K_DEI_NEGOT_REC2, len, data); |
| 2250 | |
| 2251 | DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo), |
| 2252 | get_value_string(om2k_msgcode_vals, OM2K_MSGT_NEGOT_REQ_ACK)); |
| 2253 | |
| 2254 | return abis_om2k_sendmsg(bts, msg); |
| 2255 | } |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2256 | |
Harald Welte | 563d316 | 2011-02-12 18:11:16 +0100 | [diff] [blame] | 2257 | struct iwd_version { |
| 2258 | uint8_t gen_char[3+1]; |
| 2259 | uint8_t rev_char[3+1]; |
| 2260 | }; |
| 2261 | |
| 2262 | struct iwd_type { |
| 2263 | uint8_t num_vers; |
| 2264 | struct iwd_version v[8]; |
| 2265 | }; |
| 2266 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2267 | static int om2k_rx_negot_req(struct msgb *msg) |
| 2268 | { |
Pablo Neira Ayuso | 7abecfc | 2011-08-17 22:43:54 +0200 | [diff] [blame] | 2269 | struct e1inp_sign_link *sign_link = (struct e1inp_sign_link *)msg->dst; |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2270 | struct abis_om2k_hdr *o2h = msgb_l2(msg); |
Harald Welte | 563d316 | 2011-02-12 18:11:16 +0100 | [diff] [blame] | 2271 | struct iwd_type iwd_types[16]; |
| 2272 | uint8_t num_iwd_types = o2h->data[2]; |
| 2273 | uint8_t *cur = o2h->data+3; |
| 2274 | unsigned int i, v; |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2275 | |
Harald Welte | 563d316 | 2011-02-12 18:11:16 +0100 | [diff] [blame] | 2276 | uint8_t out_buf[1024]; |
| 2277 | uint8_t *out_cur = out_buf+1; |
| 2278 | uint8_t out_num_types = 0; |
| 2279 | |
| 2280 | memset(iwd_types, 0, sizeof(iwd_types)); |
| 2281 | |
| 2282 | /* Parse the RBS-supported IWD versions into iwd_types array */ |
| 2283 | for (i = 0; i < num_iwd_types; i++) { |
| 2284 | uint8_t num_versions = *cur++; |
| 2285 | uint8_t iwd_type = *cur++; |
| 2286 | |
| 2287 | iwd_types[iwd_type].num_vers = num_versions; |
| 2288 | |
| 2289 | for (v = 0; v < num_versions; v++) { |
| 2290 | struct iwd_version *iwd_v = &iwd_types[iwd_type].v[v]; |
| 2291 | |
| 2292 | memcpy(iwd_v->gen_char, cur, 3); |
Harald Welte | 56ee6b8 | 2011-02-12 18:13:37 +0100 | [diff] [blame] | 2293 | cur += 3; |
| 2294 | memcpy(iwd_v->rev_char, cur, 3); |
| 2295 | cur += 3; |
| 2296 | |
Harald Welte | 563d316 | 2011-02-12 18:11:16 +0100 | [diff] [blame] | 2297 | DEBUGP(DNM, "\tIWD Type %u Gen %s Rev %s\n", iwd_type, |
| 2298 | iwd_v->gen_char, iwd_v->rev_char); |
| 2299 | } |
| 2300 | } |
| 2301 | |
| 2302 | /* Select the last version for each IWD type */ |
| 2303 | for (i = 0; i < ARRAY_SIZE(iwd_types); i++) { |
| 2304 | struct iwd_type *type = &iwd_types[i]; |
| 2305 | struct iwd_version *last_v; |
| 2306 | |
| 2307 | if (type->num_vers == 0) |
| 2308 | continue; |
| 2309 | |
| 2310 | out_num_types++; |
| 2311 | |
| 2312 | last_v = &type->v[type->num_vers-1]; |
| 2313 | |
| 2314 | *out_cur++ = i; |
| 2315 | memcpy(out_cur, last_v->gen_char, 3); |
| 2316 | out_cur += 3; |
| 2317 | memcpy(out_cur, last_v->rev_char, 3); |
| 2318 | out_cur += 3; |
| 2319 | } |
| 2320 | |
| 2321 | out_buf[0] = out_num_types; |
| 2322 | |
Pablo Neira Ayuso | 7abecfc | 2011-08-17 22:43:54 +0200 | [diff] [blame] | 2323 | return abis_om2k_tx_negot_req_ack(sign_link->trx->bts, &o2h->mo, out_buf, out_cur - out_buf); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2324 | } |
| 2325 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2326 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2327 | /*********************************************************************** |
| 2328 | * OM2000 Receive Message Handler |
| 2329 | ***********************************************************************/ |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2330 | |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 2331 | static int om2k_rx_nack(struct msgb *msg) |
| 2332 | { |
| 2333 | struct abis_om2k_hdr *o2h = msgb_l2(msg); |
| 2334 | uint16_t msg_type = ntohs(o2h->msg_type); |
| 2335 | struct tlv_parsed tp; |
| 2336 | |
| 2337 | LOGP(DNM, LOGL_ERROR, "Rx MO=%s %s", om2k_mo_name(&o2h->mo), |
| 2338 | get_value_string(om2k_msgcode_vals, msg_type)); |
| 2339 | |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2340 | abis_om2k_msg_tlv_parse(&tp, o2h); |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 2341 | if (TLVP_PRESENT(&tp, OM2K_DEI_REASON_CODE)) |
| 2342 | LOGPC(DNM, LOGL_ERROR, ", Reason 0x%02x", |
| 2343 | *TLVP_VAL(&tp, OM2K_DEI_REASON_CODE)); |
| 2344 | |
| 2345 | if (TLVP_PRESENT(&tp, OM2K_DEI_RESULT_CODE)) |
| 2346 | LOGPC(DNM, LOGL_ERROR, ", Result %s", |
| 2347 | get_value_string(om2k_result_strings, |
| 2348 | *TLVP_VAL(&tp, OM2K_DEI_RESULT_CODE))); |
| 2349 | LOGPC(DNM, LOGL_ERROR, "\n"); |
| 2350 | |
| 2351 | return 0; |
| 2352 | } |
| 2353 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2354 | static int process_mo_state(struct gsm_bts *bts, struct om2k_decoded_msg *odm) |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2355 | { |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2356 | uint8_t mo_state; |
| 2357 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2358 | if (!TLVP_PRESENT(&odm->tp, OM2K_DEI_MO_STATE)) |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2359 | return -EIO; |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2360 | mo_state = *TLVP_VAL(&odm->tp, OM2K_DEI_MO_STATE); |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2361 | |
| 2362 | LOGP(DNM, LOGL_DEBUG, "Rx MO=%s %s, MO State: %s\n", |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2363 | om2k_mo_name(&odm->o2h.mo), |
| 2364 | get_value_string(om2k_msgcode_vals, odm->msg_type), |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2365 | get_value_string(om2k_mostate_vals, mo_state)); |
| 2366 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2367 | update_mo_state(bts, &odm->o2h.mo, mo_state); |
Harald Welte | af9b810 | 2011-03-06 21:20:38 +0100 | [diff] [blame] | 2368 | |
Harald Welte | e898ecc | 2011-03-06 19:26:11 +0100 | [diff] [blame] | 2369 | return 0; |
| 2370 | } |
| 2371 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2372 | int abis_om2k_rcvmsg(struct msgb *msg) |
| 2373 | { |
Pablo Neira Ayuso | 7abecfc | 2011-08-17 22:43:54 +0200 | [diff] [blame] | 2374 | struct e1inp_sign_link *sign_link = (struct e1inp_sign_link *)msg->dst; |
| 2375 | struct gsm_bts *bts = sign_link->trx->bts; |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2376 | struct abis_om2k_hdr *o2h = msgb_l2(msg); |
| 2377 | struct abis_om_hdr *oh = &o2h->om; |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 2378 | uint16_t msg_type = ntohs(o2h->msg_type); |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2379 | struct om2k_decoded_msg odm; |
| 2380 | struct om2k_mo *mo; |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2381 | int rc = 0; |
| 2382 | |
| 2383 | /* Various consistency checks */ |
| 2384 | if (oh->placement != ABIS_OM_PLACEMENT_ONLY) { |
| 2385 | LOGP(DNM, LOGL_ERROR, "ABIS OML placement 0x%x not supported\n", |
| 2386 | oh->placement); |
| 2387 | if (oh->placement != ABIS_OM_PLACEMENT_FIRST) |
| 2388 | return -EINVAL; |
| 2389 | } |
| 2390 | if (oh->sequence != 0) { |
| 2391 | LOGP(DNM, LOGL_ERROR, "ABIS OML sequence 0x%x != 0x00\n", |
| 2392 | oh->sequence); |
| 2393 | return -EINVAL; |
| 2394 | } |
| 2395 | |
| 2396 | msg->l3h = (unsigned char *)o2h + sizeof(*o2h); |
| 2397 | |
| 2398 | if (oh->mdisc != ABIS_OM_MDISC_FOM) { |
| 2399 | LOGP(DNM, LOGL_ERROR, "unknown ABIS OM2000 message discriminator 0x%x\n", |
| 2400 | oh->mdisc); |
| 2401 | return -EINVAL; |
| 2402 | } |
| 2403 | |
Harald Welte | 7354107 | 2011-02-12 13:44:14 +0100 | [diff] [blame] | 2404 | DEBUGP(DNM, "Rx MO=%s %s (%s)\n", om2k_mo_name(&o2h->mo), |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 2405 | get_value_string(om2k_msgcode_vals, msg_type), |
Pablo Neira Ayuso | c0d17f2 | 2011-05-07 12:12:48 +0200 | [diff] [blame] | 2406 | osmo_hexdump(msg->l2h, msgb_l2len(msg))); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2407 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2408 | om2k_decode_msg(&odm, msg); |
| 2409 | |
| 2410 | process_mo_state(bts, &odm); |
| 2411 | |
Harald Welte | bc867d9 | 2011-02-12 13:09:38 +0100 | [diff] [blame] | 2412 | switch (msg_type) { |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2413 | case OM2K_MSGT_CAL_TIME_REQ: |
| 2414 | rc = abis_om2k_cal_time_resp(bts); |
| 2415 | break; |
| 2416 | case OM2K_MSGT_FAULT_REP: |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2417 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_FAULT_REP_ACK); |
| 2418 | break; |
| 2419 | case OM2K_MSGT_NEGOT_REQ: |
| 2420 | rc = om2k_rx_negot_req(msg); |
| 2421 | break; |
| 2422 | case OM2K_MSGT_START_RES: |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2423 | /* common processing here */ |
| 2424 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_START_RES_ACK); |
| 2425 | /* below we dispatch into MO */ |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2426 | break; |
| 2427 | case OM2K_MSGT_IS_CONF_RES: |
| 2428 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_IS_CONF_RES_ACK); |
| 2429 | break; |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 2430 | case OM2K_MSGT_CON_CONF_RES: |
| 2431 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_CON_CONF_RES_ACK); |
| 2432 | break; |
Harald Welte | a0ce349 | 2011-03-05 14:13:14 +0100 | [diff] [blame] | 2433 | case OM2K_MSGT_TX_CONF_RES: |
| 2434 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TX_CONF_RES_ACK); |
| 2435 | break; |
| 2436 | case OM2K_MSGT_RX_CONF_RES: |
| 2437 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_RX_CONF_RES_ACK); |
| 2438 | break; |
| 2439 | case OM2K_MSGT_TS_CONF_RES: |
| 2440 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TS_CONF_RES_ACK); |
| 2441 | break; |
Harald Welte | f9cf961 | 2011-03-05 14:36:47 +0100 | [diff] [blame] | 2442 | case OM2K_MSGT_TF_CONF_RES: |
| 2443 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TF_CONF_RES_ACK); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2444 | break; |
Harald Welte | b3d70fd | 2011-02-13 12:43:44 +0100 | [diff] [blame] | 2445 | case OM2K_MSGT_ENABLE_RES: |
| 2446 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_ENABLE_RES_ACK); |
| 2447 | break; |
Harald Welte | fdb7194 | 2011-02-14 15:31:43 +0100 | [diff] [blame] | 2448 | case OM2K_MSGT_DISABLE_RES: |
| 2449 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_DISABLE_RES_ACK); |
| 2450 | break; |
| 2451 | case OM2K_MSGT_TEST_RES: |
| 2452 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TEST_RES_ACK); |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2453 | break; |
root | 4579978 | 2016-10-15 21:24:57 +0200 | [diff] [blame] | 2454 | case OM2K_MSGT_CAPA_RES: |
| 2455 | rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_CAPA_RES_ACK); |
| 2456 | break; |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2457 | /* ERrors */ |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 2458 | case OM2K_MSGT_START_REQ_REJ: |
Harald Welte | 3ede723 | 2011-03-05 17:58:13 +0100 | [diff] [blame] | 2459 | case OM2K_MSGT_CONNECT_REJ: |
Harald Welte | aff63bc | 2011-03-05 19:42:16 +0100 | [diff] [blame] | 2460 | case OM2K_MSGT_OP_INFO_REJ: |
Harald Welte | 3ede723 | 2011-03-05 17:58:13 +0100 | [diff] [blame] | 2461 | case OM2K_MSGT_DISCONNECT_REJ: |
Harald Welte | aff63bc | 2011-03-05 19:42:16 +0100 | [diff] [blame] | 2462 | case OM2K_MSGT_TEST_REQ_REJ: |
Harald Welte | e6e8383 | 2011-03-05 17:52:09 +0100 | [diff] [blame] | 2463 | case OM2K_MSGT_CON_CONF_REQ_REJ: |
| 2464 | case OM2K_MSGT_IS_CONF_REQ_REJ: |
| 2465 | case OM2K_MSGT_TX_CONF_REQ_REJ: |
| 2466 | case OM2K_MSGT_RX_CONF_REQ_REJ: |
| 2467 | case OM2K_MSGT_TS_CONF_REQ_REJ: |
| 2468 | case OM2K_MSGT_TF_CONF_REQ_REJ: |
| 2469 | case OM2K_MSGT_ENABLE_REQ_REJ: |
| 2470 | case OM2K_MSGT_ALARM_STATUS_REQ_REJ: |
| 2471 | case OM2K_MSGT_DISABLE_REQ_REJ: |
| 2472 | rc = om2k_rx_nack(msg); |
| 2473 | break; |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2474 | } |
| 2475 | |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2476 | /* Resolve the MO for this message */ |
| 2477 | mo = get_om2k_mo(bts, &o2h->mo); |
| 2478 | if (!mo) { |
| 2479 | LOGP(DNM, LOGL_ERROR, "Couldn't resolve MO for OM2K msg " |
| 2480 | "%s: %s\n", get_value_string(om2k_msgcode_vals, msg_type), |
| 2481 | msgb_hexdump(msg)); |
| 2482 | return 0; |
| 2483 | } |
| 2484 | |
| 2485 | /* Dispatch message to that MO */ |
| 2486 | om2k_mo_fsm_recvmsg(bts, mo, &odm); |
| 2487 | |
Harald Welte | 9a311ec | 2011-02-12 12:33:06 +0100 | [diff] [blame] | 2488 | msgb_free(msg); |
| 2489 | return rc; |
| 2490 | } |
Harald Welte | 591e1d7 | 2016-07-09 22:20:57 +0200 | [diff] [blame] | 2491 | |
| 2492 | static void om2k_mo_init(struct om2k_mo *mo, uint8_t class, |
| 2493 | uint8_t bts_nr, uint8_t assoc_so, uint8_t inst) |
| 2494 | { |
| 2495 | mo->addr.class = class; |
| 2496 | mo->addr.bts = bts_nr; |
| 2497 | mo->addr.assoc_so = assoc_so; |
| 2498 | mo->addr.inst = inst; |
| 2499 | } |
| 2500 | |
| 2501 | /* initialize the OM2K_MO members of gsm_bts_trx and its timeslots */ |
| 2502 | void abis_om2k_trx_init(struct gsm_bts_trx *trx) |
| 2503 | { |
| 2504 | struct gsm_bts *bts = trx->bts; |
| 2505 | unsigned int i; |
| 2506 | |
| 2507 | OSMO_ASSERT(bts->type == GSM_BTS_TYPE_RBS2000); |
| 2508 | |
| 2509 | om2k_mo_init(&trx->rbs2000.trxc.om2k_mo, OM2K_MO_CLS_TRXC, |
| 2510 | bts->nr, 255, trx->nr); |
| 2511 | om2k_mo_init(&trx->rbs2000.tx.om2k_mo, OM2K_MO_CLS_TX, |
| 2512 | bts->nr, 255, trx->nr); |
| 2513 | om2k_mo_init(&trx->rbs2000.rx.om2k_mo, OM2K_MO_CLS_RX, |
| 2514 | bts->nr, 255, trx->nr); |
| 2515 | |
| 2516 | for (i = 0; i < ARRAY_SIZE(trx->ts); i++) { |
| 2517 | om2k_mo_init(&trx->ts[i].rbs2000.om2k_mo, OM2K_MO_CLS_TS, |
| 2518 | bts->nr, trx->nr, i); |
| 2519 | } |
| 2520 | } |
| 2521 | |
| 2522 | /* initialize the OM2K_MO members of gsm_bts */ |
| 2523 | void abis_om2k_bts_init(struct gsm_bts *bts) |
| 2524 | { |
| 2525 | OSMO_ASSERT(bts->type == GSM_BTS_TYPE_RBS2000); |
| 2526 | |
| 2527 | om2k_mo_init(&bts->rbs2000.cf.om2k_mo, OM2K_MO_CLS_CF, |
| 2528 | bts->nr, 0xFF, 0); |
| 2529 | om2k_mo_init(&bts->rbs2000.is.om2k_mo, OM2K_MO_CLS_IS, |
| 2530 | bts->nr, 0xFF, 0); |
| 2531 | om2k_mo_init(&bts->rbs2000.con.om2k_mo, OM2K_MO_CLS_CON, |
| 2532 | bts->nr, 0xFF, 0); |
| 2533 | om2k_mo_init(&bts->rbs2000.dp.om2k_mo, OM2K_MO_CLS_DP, |
| 2534 | bts->nr, 0xFF, 0); |
| 2535 | om2k_mo_init(&bts->rbs2000.tf.om2k_mo, OM2K_MO_CLS_TF, |
| 2536 | bts->nr, 0xFF, 0); |
| 2537 | } |
| 2538 | |
| 2539 | static __attribute__((constructor)) void abis_om2k_init(void) |
| 2540 | { |
| 2541 | osmo_fsm_register(&om2k_mo_fsm); |
| 2542 | osmo_fsm_register(&om2k_bts_fsm); |
| 2543 | osmo_fsm_register(&om2k_trx_fsm); |
| 2544 | } |