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gerrit.osmocom.org / osmo-mgw / 46edbc4162634bba5247f9c0b0915ea09917d15c / . / openbsc / src / libbsc / abis_om2000.c
blob: aeac87614eb1de4e1772a58870331a00820f33a2 [file] [log] [blame]
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1/* Ericsson RBS 2xxx GSM O&M (OM2000) messages on the A-bis interface
2 * implemented based on protocol trace analysis, no formal documentation */
3
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]4/* (C) 2010-2011,2016 by Harald Welte <laforge@gnumonks.org>
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]5 *
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Affero General Public License as published by
10 * the Free Software Foundation; either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU Affero General Public License for more details.
17 *
18 * You should have received a copy of the GNU Affero General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 *
21 */
22
23
24#include <errno.h>
25#include <unistd.h>
26#include <stdio.h>
27#include <stdlib.h>
28#include <time.h>
29#include <stdint.h>
30
31#include <arpa/inet.h>
32
Pablo Neira Ayuso136f4532011-03-22 16:47:59 +0100[diff] [blame]33#include <osmocom/core/msgb.h>
34#include <osmocom/gsm/tlv.h>
35#include <osmocom/core/talloc.h>
36#include <osmocom/core/utils.h>
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]37#include <osmocom/core/fsm.h>
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]38
39#include <openbsc/gsm_data.h>
40#include <openbsc/debug.h>
41#include <openbsc/abis_nm.h>
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]42#include <openbsc/abis_om2000.h>
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]43#include <openbsc/signal.h>
Pablo Neira Ayusoed5cacb2011-08-17 22:44:07 +0200[diff] [blame]44#include <osmocom/abis/e1_input.h>
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]45
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]46/* FIXME: move to libosmocore */
47struct osmo_fsm_inst *osmo_fsm_inst_alloc_child_id(struct osmo_fsm *fsm,
48 struct osmo_fsm_inst *parent,
49 uint32_t parent_term_event,
50 const char *id)
51{
52 struct osmo_fsm_inst *fi;
53
54 fi = osmo_fsm_inst_alloc(fsm, parent, NULL, parent->log_level,
55 id ? id : parent->id);
56 if (!fi) {
57 /* indicate immediate termination to caller */
58 osmo_fsm_inst_dispatch(parent, parent_term_event, NULL);
59 return NULL;
60 }
61
62 LOGPFSM(fi, "is child of %s\n", osmo_fsm_inst_name(parent));
63
64 fi->proc.parent = parent;
65 fi->proc.parent_term_event = parent_term_event;
66 llist_add(&fi->proc.child, &parent->proc.children);
67
68 return fi;
69}
70
71
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]72#define OM_ALLOC_SIZE 1024
73#define OM_HEADROOM_SIZE 128
74
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]75#define OM2K_TIMEOUT 10
76#define TRX_FSM_TIMEOUT 60
77#define BTS_FSM_TIMEOUT 60
78
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]79/* use following functions from abis_nm.c:
80 * om2k_msgb_alloc()
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]81 * abis_om2k_sendmsg()
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]82 */
83
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]84struct abis_om2k_hdr {
85 struct abis_om_hdr om;
86 uint16_t msg_type;
87 struct abis_om2k_mo mo;
88 uint8_t data[0];
89} __attribute__ ((packed));
90
91enum abis_om2k_msgtype {
92 OM2K_MSGT_ABORT_SP_CMD = 0x0000,
93 OM2K_MSGT_ABORT_SP_COMPL = 0x0002,
94 OM2K_MSGT_ALARM_REP_ACK = 0x0004,
95 OM2K_MSGT_ALARM_REP_NACK = 0x0005,
96 OM2K_MSGT_ALARM_REP = 0x0006,
97 OM2K_MSGT_ALARM_STATUS_REQ = 0x0008,
98 OM2K_MSGT_ALARM_STATUS_REQ_ACK = 0x000a,
99 OM2K_MSGT_ALARM_STATUS_REQ_REJ = 0x000b,
100 OM2K_MSGT_ALARM_STATUS_RES_ACK = 0x000c,
101 OM2K_MSGT_ALARM_STATUS_RES_NACK = 0x000d,
102 OM2K_MSGT_ALARM_STATUS_RES = 0x000e,
103 OM2K_MSGT_CAL_TIME_RESP = 0x0010,
104 OM2K_MSGT_CAL_TIME_REJ = 0x0011,
105 OM2K_MSGT_CAL_TIME_REQ = 0x0012,
106
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]107 OM2K_MSGT_CON_CONF_REQ = 0x0014,
108 OM2K_MSGT_CON_CONF_REQ_ACK = 0x0016,
109 OM2K_MSGT_CON_CONF_REQ_REJ = 0x0017,
110 OM2K_MSGT_CON_CONF_RES_ACK = 0x0018,
111 OM2K_MSGT_CON_CONF_RES_NACK = 0x0019,
112 OM2K_MSGT_CON_CONF_RES = 0x001a,
113
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]114 OM2K_MSGT_CONNECT_CMD = 0x001c,
115 OM2K_MSGT_CONNECT_COMPL = 0x001e,
116 OM2K_MSGT_CONNECT_REJ = 0x001f,
117
Harald Welte0741ffe2011-02-12 18:48:53 +0100[diff] [blame]118 OM2K_MSGT_DISABLE_REQ = 0x0028,
119 OM2K_MSGT_DISABLE_REQ_ACK = 0x002a,
120 OM2K_MSGT_DISABLE_REQ_REJ = 0x002b,
121 OM2K_MSGT_DISABLE_RES_ACK = 0x002c,
122 OM2K_MSGT_DISABLE_RES_NACK = 0x002d,
123 OM2K_MSGT_DISABLE_RES = 0x002e,
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]124 OM2K_MSGT_DISCONNECT_CMD = 0x0030,
125 OM2K_MSGT_DISCONNECT_COMPL = 0x0032,
126 OM2K_MSGT_DISCONNECT_REJ = 0x0033,
Harald Welte0741ffe2011-02-12 18:48:53 +0100[diff] [blame]127 OM2K_MSGT_ENABLE_REQ = 0x0034,
128 OM2K_MSGT_ENABLE_REQ_ACK = 0x0036,
129 OM2K_MSGT_ENABLE_REQ_REJ = 0x0037,
130 OM2K_MSGT_ENABLE_RES_ACK = 0x0038,
131 OM2K_MSGT_ENABLE_RES_NACK = 0x0039,
132 OM2K_MSGT_ENABLE_RES = 0x003a,
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]133
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]134 OM2K_MSGT_FAULT_REP_ACK = 0x0040,
135 OM2K_MSGT_FAULT_REP_NACK = 0x0041,
136 OM2K_MSGT_FAULT_REP = 0x0042,
137
138 OM2K_MSGT_IS_CONF_REQ = 0x0060,
139 OM2K_MSGT_IS_CONF_REQ_ACK = 0x0062,
140 OM2K_MSGT_IS_CONF_REQ_REJ = 0x0063,
141 OM2K_MSGT_IS_CONF_RES_ACK = 0x0064,
142 OM2K_MSGT_IS_CONF_RES_NACK = 0x0065,
143 OM2K_MSGT_IS_CONF_RES = 0x0066,
144
145 OM2K_MSGT_OP_INFO = 0x0074,
146 OM2K_MSGT_OP_INFO_ACK = 0x0076,
147 OM2K_MSGT_OP_INFO_REJ = 0x0077,
148 OM2K_MSGT_RESET_CMD = 0x0078,
149 OM2K_MSGT_RESET_COMPL = 0x007a,
150 OM2K_MSGT_RESET_REJ = 0x007b,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]151 OM2K_MSGT_RX_CONF_REQ = 0x007c,
152 OM2K_MSGT_RX_CONF_REQ_ACK = 0x007e,
153 OM2K_MSGT_RX_CONF_REQ_REJ = 0x007f,
154 OM2K_MSGT_RX_CONF_RES_ACK = 0x0080,
155 OM2K_MSGT_RX_CONF_RES_NACK = 0x0081,
156 OM2K_MSGT_RX_CONF_RES = 0x0082,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]157 OM2K_MSGT_START_REQ = 0x0084,
158 OM2K_MSGT_START_REQ_ACK = 0x0086,
159 OM2K_MSGT_START_REQ_REJ = 0x0087,
160 OM2K_MSGT_START_RES_ACK = 0x0088,
161 OM2K_MSGT_START_RES_NACK = 0x0089,
162 OM2K_MSGT_START_RES = 0x008a,
Harald Weltee1d5eca2011-02-12 14:42:59 +0100[diff] [blame]163 OM2K_MSGT_STATUS_REQ = 0x008c,
164 OM2K_MSGT_STATUS_RESP = 0x008e,
165 OM2K_MSGT_STATUS_REJ = 0x008f,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]166
Harald Welte8024d8f2011-02-12 15:07:30 +0100[diff] [blame]167 OM2K_MSGT_TEST_REQ = 0x0094,
168 OM2K_MSGT_TEST_REQ_ACK = 0x0096,
169 OM2K_MSGT_TEST_REQ_REJ = 0x0097,
170 OM2K_MSGT_TEST_RES_ACK = 0x0098,
171 OM2K_MSGT_TEST_RES_NACK = 0x0099,
172 OM2K_MSGT_TEST_RES = 0x009a,
173
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]174 OM2K_MSGT_TF_CONF_REQ = 0x00a0,
175 OM2K_MSGT_TF_CONF_REQ_ACK = 0x00a2,
176 OM2K_MSGT_TF_CONF_REQ_REJ = 0x00a3,
177 OM2K_MSGT_TF_CONF_RES_ACK = 0x00a4,
178 OM2K_MSGT_TF_CONF_RES_NACK = 0x00a5,
179 OM2K_MSGT_TF_CONF_RES = 0x00a6,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]180 OM2K_MSGT_TS_CONF_REQ = 0x00a8,
181 OM2K_MSGT_TS_CONF_REQ_ACK = 0x00aa,
182 OM2K_MSGT_TS_CONF_REQ_REJ = 0x00ab,
183 OM2K_MSGT_TS_CONF_RES_ACK = 0x00ac,
184 OM2K_MSGT_TS_CONF_RES_NACK = 0x00ad,
185 OM2K_MSGT_TS_CONF_RES = 0x00ae,
186 OM2K_MSGT_TX_CONF_REQ = 0x00b0,
187 OM2K_MSGT_TX_CONF_REQ_ACK = 0x00b2,
188 OM2K_MSGT_TX_CONF_REQ_REJ = 0x00b3,
189 OM2K_MSGT_TX_CONF_RES_ACK = 0x00b4,
190 OM2K_MSGT_TX_CONF_RES_NACK = 0x00b5,
191 OM2K_MSGT_TX_CONF_RES = 0x00b6,
192
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]193 OM2K_MSGT_NEGOT_REQ_ACK = 0x0104,
194 OM2K_MSGT_NEGOT_REQ_NACK = 0x0105,
195 OM2K_MSGT_NEGOT_REQ = 0x0106,
196};
197
198enum abis_om2k_dei {
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]199 OM2K_DEI_ACCORDANCE_IND = 0x00,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]200 OM2K_DEI_BCC = 0x06,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]201 OM2K_DEI_BS_AG_BKS_RES = 0x07,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]202 OM2K_DEI_BSIC = 0x09,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]203 OM2K_DEI_BA_PA_MFRMS = 0x0a,
204 OM2K_DEI_CBCH_INDICATOR = 0x0b,
205 OM2K_DEI_CCCH_OPTIONS = 0x0c,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]206 OM2K_DEI_CAL_TIME = 0x0d,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]207 OM2K_DEI_COMBINATION = 0x0f,
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]208 OM2K_DEI_CON_CONN_LIST = 0x10,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]209 OM2K_DEI_DRX_DEV_MAX = 0x12,
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]210 OM2K_DEI_END_LIST_NR = 0x13,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]211 OM2K_DEI_EXT_COND_MAP_1 = 0x14,
212 OM2K_DEI_EXT_COND_MAP_2 = 0x15,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]213 OM2K_DEI_FILLING_MARKER = 0x1c,
214 OM2K_DEI_FN_OFFSET = 0x1d,
215 OM2K_DEI_FREQ_LIST = 0x1e,
216 OM2K_DEI_FREQ_SPEC_RX = 0x1f,
217 OM2K_DEI_FREQ_SPEC_TX = 0x20,
218 OM2K_DEI_HSN = 0x21,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]219 OM2K_DEI_ICM_INDICATOR = 0x22,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]220 OM2K_DEI_INT_FAULT_MAP_1A = 0x23,
221 OM2K_DEI_INT_FAULT_MAP_1B = 0x24,
222 OM2K_DEI_INT_FAULT_MAP_2A = 0x25,
223 OM2K_DEI_INT_FAULT_MAP_2A_EXT = 0x26,
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]224 OM2K_DEI_IS_CONN_LIST = 0x27,
225 OM2K_DEI_LIST_NR = 0x28,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]226 OM2K_DEI_LOCAL_ACCESS = 0x2a,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]227 OM2K_DEI_MAIO = 0x2b,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]228 OM2K_DEI_MO_STATE = 0x2c,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]229 OM2K_DEI_NY1 = 0x2d,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]230 OM2K_DEI_OP_INFO = 0x2e,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]231 OM2K_DEI_POWER = 0x2f,
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]232 OM2K_DEI_REASON_CODE = 0x32,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]233 OM2K_DEI_RX_DIVERSITY = 0x33,
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]234 OM2K_DEI_RESULT_CODE = 0x35,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]235 OM2K_DEI_T3105 = 0x38,
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]236 OM2K_DEI_TF_MODE = 0x3a,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]237 OM2K_DEI_TS_NR = 0x3c,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]238 OM2K_DEI_TSC = 0x3d,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]239 OM2K_DEI_BTS_VERSION = 0x40,
240 OM2K_DEI_OML_IWD_VERSION = 0x41,
241 OM2K_DEI_RSL_IWD_VERSION = 0x42,
242 OM2K_DEI_OML_FUNC_MAP_1 = 0x43,
243 OM2K_DEI_OML_FUNC_MAP_2 = 0x44,
244 OM2K_DEI_RSL_FUNC_MAP_1 = 0x45,
245 OM2K_DEI_RSL_FUNC_MAP_2 = 0x46,
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]246 OM2K_DEI_EXT_RANGE = 0x47,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]247 OM2K_DEI_REQ_IND = 0x48,
248 OM2K_DEI_REPL_UNIT_MAP = 0x50,
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]249 OM2K_DEI_ICM_BOUND_PARAMS = 0x74,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]250 OM2K_DEI_LSC = 0x79,
251 OM2K_DEI_LSC_FILT_TIME = 0x7a,
252 OM2K_DEI_CALL_SUPV_TIME = 0x7b,
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]253 OM2K_DEI_ICM_CHAN_RATE = 0x7e,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]254 OM2K_DEI_HW_INFO_SIG = 0x84,
Harald Welteba9adbb2011-03-06 19:01:16 +0100[diff] [blame]255 OM2K_DEI_TF_SYNC_SRC = 0x86,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]256 OM2K_DEI_TTA = 0x87,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]257 OM2K_DEI_CAPA_SIG = 0x8a,
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]258 OM2K_DEI_NEGOT_REC1 = 0x90,
259 OM2K_DEI_NEGOT_REC2 = 0x91,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]260 OM2K_DEI_ENCR_ALG = 0x92,
261 OM2K_DEI_INTERF_REJ_COMB = 0x94,
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]262 OM2K_DEI_FS_OFFSET = 0x98,
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]263 OM2K_DEI_EXT_COND_MAP_2_EXT = 0x9c,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]264};
265
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]266const struct tlv_definition om2k_att_tlvdef = {
267 .def = {
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]268 [OM2K_DEI_ACCORDANCE_IND] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]269 [OM2K_DEI_BCC] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]270 [OM2K_DEI_BS_AG_BKS_RES] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]271 [OM2K_DEI_BSIC] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]272 [OM2K_DEI_BA_PA_MFRMS] = { TLV_TYPE_TV },
273 [OM2K_DEI_CBCH_INDICATOR] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]274 [OM2K_DEI_INT_FAULT_MAP_1A] = { TLV_TYPE_FIXED, 6 },
275 [OM2K_DEI_INT_FAULT_MAP_1B] = { TLV_TYPE_FIXED, 6 },
276 [OM2K_DEI_INT_FAULT_MAP_2A] = { TLV_TYPE_FIXED, 6 },
277 [OM2K_DEI_INT_FAULT_MAP_2A_EXT]={ TLV_TYPE_FIXED, 6 },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]278 [OM2K_DEI_CCCH_OPTIONS] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]279 [OM2K_DEI_CAL_TIME] = { TLV_TYPE_FIXED, 6 },
280 [OM2K_DEI_COMBINATION] = { TLV_TYPE_TV },
281 [OM2K_DEI_CON_CONN_LIST] = { TLV_TYPE_TLV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]282 [OM2K_DEI_DRX_DEV_MAX] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]283 [OM2K_DEI_END_LIST_NR] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]284 [OM2K_DEI_EXT_COND_MAP_1] = { TLV_TYPE_FIXED, 2 },
285 [OM2K_DEI_EXT_COND_MAP_2] = { TLV_TYPE_FIXED, 2 },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]286 [OM2K_DEI_FILLING_MARKER] = { TLV_TYPE_TV },
287 [OM2K_DEI_FN_OFFSET] = { TLV_TYPE_FIXED, 2 },
288 [OM2K_DEI_FREQ_LIST] = { TLV_TYPE_TLV },
289 [OM2K_DEI_FREQ_SPEC_RX] = { TLV_TYPE_FIXED, 2 },
290 [OM2K_DEI_FREQ_SPEC_TX] = { TLV_TYPE_FIXED, 2 },
291 [OM2K_DEI_HSN] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]292 [OM2K_DEI_ICM_INDICATOR] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]293 [OM2K_DEI_IS_CONN_LIST] = { TLV_TYPE_TLV },
294 [OM2K_DEI_LIST_NR] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]295 [OM2K_DEI_LOCAL_ACCESS] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]296 [OM2K_DEI_MAIO] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]297 [OM2K_DEI_MO_STATE] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]298 [OM2K_DEI_NY1] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]299 [OM2K_DEI_OP_INFO] = { TLV_TYPE_TV },
300 [OM2K_DEI_POWER] = { TLV_TYPE_TV },
301 [OM2K_DEI_REASON_CODE] = { TLV_TYPE_TV },
302 [OM2K_DEI_RX_DIVERSITY] = { TLV_TYPE_TV },
303 [OM2K_DEI_RESULT_CODE] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]304 [OM2K_DEI_T3105] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]305 [OM2K_DEI_TF_MODE] = { TLV_TYPE_TV },
306 [OM2K_DEI_TS_NR] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]307 [OM2K_DEI_TSC] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]308 [OM2K_DEI_BTS_VERSION] = { TLV_TYPE_FIXED, 12 },
309 [OM2K_DEI_OML_IWD_VERSION] = { TLV_TYPE_FIXED, 6 },
310 [OM2K_DEI_RSL_IWD_VERSION] = { TLV_TYPE_FIXED, 6 },
311 [OM2K_DEI_OML_FUNC_MAP_1] = { TLV_TYPE_TLV },
312 [OM2K_DEI_OML_FUNC_MAP_2] = { TLV_TYPE_TLV },
313 [OM2K_DEI_RSL_FUNC_MAP_1] = { TLV_TYPE_TLV },
314 [OM2K_DEI_RSL_FUNC_MAP_2] = { TLV_TYPE_TLV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]315 [OM2K_DEI_EXT_RANGE] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]316 [OM2K_DEI_REQ_IND] = { TLV_TYPE_TV },
317 [OM2K_DEI_REPL_UNIT_MAP] = { TLV_TYPE_FIXED, 6 },
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]318 [OM2K_DEI_ICM_BOUND_PARAMS] = { TLV_TYPE_FIXED, 5 },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]319 [OM2K_DEI_LSC] = { TLV_TYPE_TV },
320 [OM2K_DEI_LSC_FILT_TIME] = { TLV_TYPE_TV },
321 [OM2K_DEI_CALL_SUPV_TIME] = { TLV_TYPE_TV },
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]322 [OM2K_DEI_ICM_CHAN_RATE] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]323 [OM2K_DEI_HW_INFO_SIG] = { TLV_TYPE_FIXED, 2 },
Harald Welteba9adbb2011-03-06 19:01:16 +0100[diff] [blame]324 [OM2K_DEI_TF_SYNC_SRC] = { TLV_TYPE_TV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]325 [OM2K_DEI_TTA] = { TLV_TYPE_TV },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]326 [OM2K_DEI_CAPA_SIG] = { TLV_TYPE_FIXED, 2 },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]327 [OM2K_DEI_NEGOT_REC1] = { TLV_TYPE_TLV },
328 [OM2K_DEI_NEGOT_REC2] = { TLV_TYPE_TLV },
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]329 [OM2K_DEI_ENCR_ALG] = { TLV_TYPE_TV },
330 [OM2K_DEI_INTERF_REJ_COMB] = { TLV_TYPE_TV },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]331 [OM2K_DEI_FS_OFFSET] = { TLV_TYPE_FIXED, 5 },
Harald Weltef6d6b212011-03-05 20:13:52 +0100[diff] [blame]332 [OM2K_DEI_EXT_COND_MAP_2_EXT] = { TLV_TYPE_FIXED, 4 },
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]333 },
334};
335
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]336static const struct value_string om2k_msgcode_vals[] = {
337 { 0x0000, "Abort SP Command" },
338 { 0x0002, "Abort SP Complete" },
339 { 0x0004, "Alarm Report ACK" },
340 { 0x0005, "Alarm Report NACK" },
341 { 0x0006, "Alarm Report" },
342 { 0x0008, "Alarm Status Request" },
343 { 0x000a, "Alarm Status Request Accept" },
344 { 0x000b, "Alarm Status Request Reject" },
345 { 0x000c, "Alarm Status Result ACK" },
346 { 0x000d, "Alarm Status Result NACK" },
347 { 0x000e, "Alarm Status Result" },
348 { 0x0010, "Calendar Time Response" },
349 { 0x0011, "Calendar Time Reject" },
350 { 0x0012, "Calendar Time Request" },
351 { 0x0014, "CON Configuration Request" },
352 { 0x0016, "CON Configuration Request Accept" },
353 { 0x0017, "CON Configuration Request Reject" },
354 { 0x0018, "CON Configuration Result ACK" },
355 { 0x0019, "CON Configuration Result NACK" },
356 { 0x001a, "CON Configuration Result" },
357 { 0x001c, "Connect Command" },
358 { 0x001e, "Connect Complete" },
Harald Welte3ede7232011-03-05 17:58:13 +0100[diff] [blame]359 { 0x001f, "Connect Reject" },
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]360 { 0x0028, "Disable Request" },
361 { 0x002a, "Disable Request Accept" },
362 { 0x002b, "Disable Request Reject" },
363 { 0x002c, "Disable Result ACK" },
364 { 0x002d, "Disable Result NACK" },
365 { 0x002e, "Disable Result" },
366 { 0x0030, "Disconnect Command" },
367 { 0x0032, "Disconnect Complete" },
368 { 0x0033, "Disconnect Reject" },
369 { 0x0034, "Enable Request" },
370 { 0x0036, "Enable Request Accept" },
371 { 0x0037, "Enable Request Reject" },
372 { 0x0038, "Enable Result ACK" },
373 { 0x0039, "Enable Result NACK" },
374 { 0x003a, "Enable Result" },
375 { 0x003c, "Escape Downlink Normal" },
376 { 0x003d, "Escape Downlink NACK" },
377 { 0x003e, "Escape Uplink Normal" },
378 { 0x003f, "Escape Uplink NACK" },
379 { 0x0040, "Fault Report ACK" },
380 { 0x0041, "Fault Report NACK" },
381 { 0x0042, "Fault Report" },
382 { 0x0044, "File Package End Command" },
383 { 0x0046, "File Package End Result" },
384 { 0x0047, "File Package End Reject" },
385 { 0x0048, "File Relation Request" },
386 { 0x004a, "File Relation Response" },
387 { 0x004b, "File Relation Request Reject" },
388 { 0x004c, "File Segment Transfer" },
389 { 0x004e, "File Segment Transfer Complete" },
390 { 0x004f, "File Segment Transfer Reject" },
391 { 0x0050, "HW Information Request" },
392 { 0x0052, "HW Information Request Accept" },
393 { 0x0053, "HW Information Request Reject" },
394 { 0x0054, "HW Information Result ACK" },
395 { 0x0055, "HW Information Result NACK" },
396 { 0x0056, "HW Information Result" },
397 { 0x0060, "IS Configuration Request" },
398 { 0x0062, "IS Configuration Request Accept" },
399 { 0x0063, "IS Configuration Request Reject" },
400 { 0x0064, "IS Configuration Result ACK" },
401 { 0x0065, "IS Configuration Result NACK" },
402 { 0x0066, "IS Configuration Result" },
403 { 0x0068, "Load Data End" },
404 { 0x006a, "Load Data End Result" },
405 { 0x006b, "Load Data End Reject" },
406 { 0x006c, "Load Data Init" },
407 { 0x006e, "Load Data Init Accept" },
408 { 0x006f, "Load Data Init Reject" },
409 { 0x0070, "Loop Control Command" },
410 { 0x0072, "Loop Control Complete" },
411 { 0x0073, "Loop Control Reject" },
412 { 0x0074, "Operational Information" },
413 { 0x0076, "Operational Information Accept" },
414 { 0x0077, "Operational Information Reject" },
415 { 0x0078, "Reset Command" },
416 { 0x007a, "Reset Complete" },
417 { 0x007b, "Reset Reject" },
418 { 0x007c, "RX Configuration Request" },
419 { 0x007e, "RX Configuration Request Accept" },
420 { 0x007f, "RX Configuration Request Reject" },
421 { 0x0080, "RX Configuration Result ACK" },
422 { 0x0081, "RX Configuration Result NACK" },
423 { 0x0082, "RX Configuration Result" },
424 { 0x0084, "Start Request" },
425 { 0x0086, "Start Request Accept" },
426 { 0x0087, "Start Request Reject" },
427 { 0x0088, "Start Result ACK" },
428 { 0x0089, "Start Result NACK" },
429 { 0x008a, "Start Result" },
430 { 0x008c, "Status Request" },
431 { 0x008e, "Status Response" },
432 { 0x008f, "Status Reject" },
433 { 0x0094, "Test Request" },
434 { 0x0096, "Test Request Accept" },
435 { 0x0097, "Test Request Reject" },
436 { 0x0098, "Test Result ACK" },
437 { 0x0099, "Test Result NACK" },
438 { 0x009a, "Test Result" },
439 { 0x00a0, "TF Configuration Request" },
440 { 0x00a2, "TF Configuration Request Accept" },
441 { 0x00a3, "TF Configuration Request Reject" },
442 { 0x00a4, "TF Configuration Result ACK" },
443 { 0x00a5, "TF Configuration Result NACK" },
444 { 0x00a6, "TF Configuration Result" },
445 { 0x00a8, "TS Configuration Request" },
446 { 0x00aa, "TS Configuration Request Accept" },
447 { 0x00ab, "TS Configuration Request Reject" },
448 { 0x00ac, "TS Configuration Result ACK" },
449 { 0x00ad, "TS Configuration Result NACK" },
450 { 0x00ae, "TS Configuration Result" },
451 { 0x00b0, "TX Configuration Request" },
452 { 0x00b2, "TX Configuration Request Accept" },
453 { 0x00b3, "TX Configuration Request Reject" },
454 { 0x00b4, "TX Configuration Result ACK" },
455 { 0x00b5, "TX Configuration Result NACK" },
456 { 0x00b6, "TX Configuration Result" },
457 { 0x00bc, "DIP Alarm Report ACK" },
458 { 0x00bd, "DIP Alarm Report NACK" },
459 { 0x00be, "DIP Alarm Report" },
460 { 0x00c0, "DIP Alarm Status Request" },
461 { 0x00c2, "DIP Alarm Status Response" },
462 { 0x00c3, "DIP Alarm Status Reject" },
463 { 0x00c4, "DIP Quality Report I ACK" },
464 { 0x00c5, "DIP Quality Report I NACK" },
465 { 0x00c6, "DIP Quality Report I" },
466 { 0x00c8, "DIP Quality Report II ACK" },
467 { 0x00c9, "DIP Quality Report II NACK" },
468 { 0x00ca, "DIP Quality Report II" },
469 { 0x00dc, "DP Configuration Request" },
470 { 0x00de, "DP Configuration Request Accept" },
471 { 0x00df, "DP Configuration Request Reject" },
472 { 0x00e0, "DP Configuration Result ACK" },
473 { 0x00e1, "DP Configuration Result NACK" },
474 { 0x00e2, "DP Configuration Result" },
475 { 0x00e4, "Capabilities HW Info Report ACK" },
476 { 0x00e5, "Capabilities HW Info Report NACK" },
477 { 0x00e6, "Capabilities HW Info Report" },
478 { 0x00e8, "Capabilities Request" },
479 { 0x00ea, "Capabilities Request Accept" },
480 { 0x00eb, "Capabilities Request Reject" },
481 { 0x00ec, "Capabilities Result ACK" },
482 { 0x00ed, "Capabilities Result NACK" },
483 { 0x00ee, "Capabilities Result" },
484 { 0x00f0, "FM Configuration Request" },
485 { 0x00f2, "FM Configuration Request Accept" },
486 { 0x00f3, "FM Configuration Request Reject" },
487 { 0x00f4, "FM Configuration Result ACK" },
488 { 0x00f5, "FM Configuration Result NACK" },
489 { 0x00f6, "FM Configuration Result" },
490 { 0x00f8, "FM Report Request" },
491 { 0x00fa, "FM Report Response" },
492 { 0x00fb, "FM Report Reject" },
493 { 0x00fc, "FM Start Command" },
494 { 0x00fe, "FM Start Complete" },
495 { 0x00ff, "FM Start Reject" },
496 { 0x0100, "FM Stop Command" },
497 { 0x0102, "FM Stop Complete" },
498 { 0x0103, "FM Stop Reject" },
499 { 0x0104, "Negotiation Request ACK" },
500 { 0x0105, "Negotiation Request NACK" },
501 { 0x0106, "Negotiation Request" },
502 { 0x0108, "BTS Initiated Request ACK" },
503 { 0x0109, "BTS Initiated Request NACK" },
504 { 0x010a, "BTS Initiated Request" },
505 { 0x010c, "Radio Channels Release Command" },
506 { 0x010e, "Radio Channels Release Complete" },
507 { 0x010f, "Radio Channels Release Reject" },
508 { 0x0118, "Feature Control Command" },
509 { 0x011a, "Feature Control Complete" },
510 { 0x011b, "Feature Control Reject" },
511
512 { 0, NULL }
513};
514
515/* TS 12.21 Section 9.4: Attributes */
516static const struct value_string om2k_attr_vals[] = {
517 { 0x00, "Accordance indication" },
518 { 0x01, "Alarm Id" },
519 { 0x02, "Alarm Data" },
520 { 0x03, "Alarm Severity" },
521 { 0x04, "Alarm Status" },
522 { 0x05, "Alarm Status Type" },
523 { 0x06, "BCC" },
524 { 0x07, "BS_AG_BKS_RES" },
525 { 0x09, "BSIC" },
526 { 0x0a, "BA_PA_MFRMS" },
527 { 0x0b, "CBCH Indicator" },
528 { 0x0c, "CCCH Options" },
529 { 0x0d, "Calendar Time" },
530 { 0x0f, "Channel Combination" },
531 { 0x10, "CON Connection List" },
532 { 0x11, "Data End Indication" },
533 { 0x12, "DRX_DEV_MAX" },
534 { 0x13, "End List Number" },
535 { 0x14, "External Condition Map Class 1" },
536 { 0x15, "External Condition Map Class 2" },
537 { 0x16, "File Relation Indication" },
538 { 0x17, "File Revision" },
539 { 0x18, "File Segment Data" },
540 { 0x19, "File Segment Length" },
541 { 0x1a, "File Segment Sequence Number" },
542 { 0x1b, "File Size" },
543 { 0x1c, "Filling Marker" },
544 { 0x1d, "FN Offset" },
545 { 0x1e, "Frequency List" },
546 { 0x1f, "Frequency Specifier RX" },
547 { 0x20, "Frequency Specifier TX" },
548 { 0x21, "HSN" },
549 { 0x22, "ICM Indicator" },
550 { 0x23, "Internal Fault Map Class 1A" },
551 { 0x24, "Internal Fault Map Class 1B" },
552 { 0x25, "Internal Fault Map Class 2A" },
553 { 0x26, "Internal Fault Map Class 2A Extension" },
554 { 0x27, "IS Connection List" },
555 { 0x28, "List Number" },
556 { 0x29, "File Package State Indication" },
557 { 0x2a, "Local Access State" },
558 { 0x2b, "MAIO" },
559 { 0x2c, "MO State" },
560 { 0x2d, "Ny1" },
561 { 0x2e, "Operational Information" },
562 { 0x2f, "Power" },
563 { 0x30, "RU Position Data" },
564 { 0x31, "Protocol Error" },
565 { 0x32, "Reason Code" },
566 { 0x33, "Receiver Diversity" },
567 { 0x34, "Replacement Unit Map" },
568 { 0x35, "Result Code" },
569 { 0x36, "RU Revision Data" },
570 { 0x38, "T3105" },
571 { 0x39, "Test Loop Setting" },
572 { 0x3a, "TF Mode" },
573 { 0x3b, "TF Compensation Value" },
574 { 0x3c, "Time Slot Number" },
575 { 0x3d, "TSC" },
576 { 0x3e, "RU Logical Id" },
577 { 0x3f, "RU Serial Number Data" },
578 { 0x40, "BTS Version" },
579 { 0x41, "OML IWD Version" },
580 { 0x42, "RWL IWD Version" },
581 { 0x43, "OML Function Map 1" },
582 { 0x44, "OML Function Map 2" },
583 { 0x45, "RSL Function Map 1" },
584 { 0x46, "RSL Function Map 2" },
585 { 0x47, "Extended Range Indicator" },
586 { 0x48, "Request Indicators" },
587 { 0x49, "DIP Alarm Condition Map" },
588 { 0x4a, "ES Incoming" },
589 { 0x4b, "ES Outgoing" },
590 { 0x4e, "SES Incoming" },
591 { 0x4f, "SES Outgoing" },
592 { 0x50, "Replacement Unit Map Extension" },
593 { 0x52, "UAS Incoming" },
594 { 0x53, "UAS Outgoing" },
595 { 0x58, "DF Incoming" },
596 { 0x5a, "DF Outgoing" },
597 { 0x5c, "SF" },
598 { 0x60, "S Bits Setting" },
599 { 0x61, "CRC-4 Use Option" },
600 { 0x62, "T Parameter" },
601 { 0x63, "N Parameter" },
602 { 0x64, "N1 Parameter" },
603 { 0x65, "N3 Parameter" },
604 { 0x66, "N4 Parameter" },
605 { 0x67, "P Parameter" },
606 { 0x68, "Q Parameter" },
607 { 0x69, "BI_Q1" },
608 { 0x6a, "BI_Q2" },
609 { 0x74, "ICM Boundary Parameters" },
610 { 0x77, "AFT" },
611 { 0x78, "AFT RAI" },
612 { 0x79, "Link Supervision Control" },
613 { 0x7a, "Link Supervision Filtering Time" },
614 { 0x7b, "Call Supervision Time" },
615 { 0x7c, "Interval Length UAS Incoming" },
616 { 0x7d, "Interval Length UAS Outgoing" },
617 { 0x7e, "ICM Channel Rate" },
618 { 0x7f, "Attribute Identifier" },
619 { 0x80, "FM Frequency List" },
620 { 0x81, "FM Frequency Report" },
621 { 0x82, "FM Percentile" },
622 { 0x83, "FM Clear Indication" },
623 { 0x84, "HW Info Signature" },
624 { 0x85, "MO Record" },
625 { 0x86, "TF Synchronisation Source" },
626 { 0x87, "TTA" },
627 { 0x88, "End Segment Number" },
628 { 0x89, "Segment Number" },
629 { 0x8a, "Capabilities Signature" },
630 { 0x8c, "File Relation List" },
631 { 0x90, "Negotiation Record I" },
632 { 0x91, "Negotiation Record II" },
633 { 0x92, "Encryption Algorithm" },
634 { 0x94, "Interference Rejection Combining" },
635 { 0x95, "Dedication Information" },
636 { 0x97, "Feature Code" },
637 { 0x98, "FS Offset" },
638 { 0x99, "ESB Timeslot" },
639 { 0x9a, "Master TG Instance" },
640 { 0x9b, "Master TX Chain Delay" },
641 { 0x9c, "External Condition Class 2 Extension" },
642 { 0x9d, "TSs MO State" },
643 { 0, NULL }
644};
645
Harald Weltee1d5eca2011-02-12 14:42:59 +0100[diff] [blame]646const struct value_string om2k_mo_class_short_vals[] = {
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]647 { 0x01, "TRXC" },
648 { 0x03, "TS" },
649 { 0x04, "TF" },
650 { 0x05, "IS" },
651 { 0x06, "CON" },
652 { 0x07, "DP" },
653 { 0x0a, "CF" },
654 { 0x0b, "TX" },
655 { 0x0c, "RX" },
656 { 0, NULL }
657};
658
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]659const struct value_string om2k_result_strings[] = {
660 { 0x02, "Wrong state or out of sequence" },
661 { 0x03, "File error" },
662 { 0x04, "Fault, unspecified" },
663 { 0x05, "Tuning fault" },
664 { 0x06, "Protocol error" },
665 { 0x07, "MO not connected" },
666 { 0x08, "Parameter error" },
667 { 0x09, "Optional function not supported" },
668 { 0x0a, "Local access state LOCALLY DISCONNECTED" },
669 { 0, NULL }
670};
671
672const struct value_string om2k_accordance_strings[] = {
673 { 0x00, "Data according to request" },
674 { 0x01, "Data not according to request" },
675 { 0x02, "Inconsistent MO data" },
676 { 0x03, "Capability constraint violation" },
677 { 0, NULL }
678};
679
680const struct value_string om2k_mostate_vals[] = {
681 { 0x00, "RESET" },
682 { 0x01, "STARTED" },
683 { 0x02, "ENABLED" },
684 { 0x03, "DISABLED" },
685 { 0, NULL }
686};
687
688/* entire decoded OM2K message (header + parsed TLV) */
689struct om2k_decoded_msg {
690 struct abis_om2k_hdr o2h;
691 uint16_t msg_type;
692 struct tlv_parsed tp;
693};
694
695/* resolve the OM2000 Managed Object by BTS + MO Address */
696static struct om2k_mo *
697get_om2k_mo(struct gsm_bts *bts, const struct abis_om2k_mo *abis_mo)
698{
699 struct om2k_mo *mo = NULL;
700 struct gsm_bts_trx *trx;
701
702 switch (abis_mo->class) {
703 case OM2K_MO_CLS_CF:
704 mo = &bts->rbs2000.cf.om2k_mo;
705 break;
706 case OM2K_MO_CLS_CON:
707 mo = &bts->rbs2000.con.om2k_mo;
708 break;
709 case OM2K_MO_CLS_IS:
710 mo = &bts->rbs2000.is.om2k_mo;
711 break;
712 case OM2K_MO_CLS_TF:
713 mo = &bts->rbs2000.tf.om2k_mo;
714 break;
715
716 case OM2K_MO_CLS_TRXC:
717 trx = gsm_bts_trx_num(bts, abis_mo->inst);
718 if (!trx)
719 return NULL;
720 mo = &trx->rbs2000.trxc.om2k_mo;
721 break;
722 case OM2K_MO_CLS_TX:
723 trx = gsm_bts_trx_num(bts, abis_mo->inst);
724 if (!trx)
725 return NULL;
726 mo = &trx->rbs2000.tx.om2k_mo;
727 break;
728 case OM2K_MO_CLS_RX:
729 trx = gsm_bts_trx_num(bts, abis_mo->inst);
730 if (!trx)
731 return NULL;
732 mo = &trx->rbs2000.rx.om2k_mo;
733 break;
734 case OM2K_MO_CLS_TS:
735 trx = gsm_bts_trx_num(bts, abis_mo->assoc_so);
736 if (!trx)
737 return NULL;
738 if (abis_mo->inst >= ARRAY_SIZE(trx->ts))
739 return NULL;
740 mo = &trx->ts[abis_mo->inst].rbs2000.om2k_mo;
741 break;
742 default:
743 return NULL;
744 };
745
746 return mo;
747}
748
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]749static struct msgb *om2k_msgb_alloc(void)
750{
751 return msgb_alloc_headroom(OM_ALLOC_SIZE, OM_HEADROOM_SIZE,
752 "OM2000");
753}
754
Holger Hans Peter Freytherc42ad8b2011-04-18 17:04:00 +0200[diff] [blame]755static int abis_om2k_tlv_parse(struct tlv_parsed *tp, const uint8_t *buf, int len)
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]756{
757 return tlv_parse(tp, &om2k_att_tlvdef, buf, len, 0, 0);
758}
759
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]760static int abis_om2k_msg_tlv_parse(struct tlv_parsed *tp, struct abis_om2k_hdr *oh)
761{
762 return abis_om2k_tlv_parse(tp, oh->data, oh->om.length - 6);
763}
764
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]765/* decode/parse the message */
766static int om2k_decode_msg(struct om2k_decoded_msg *odm, struct msgb *msg)
767{
768 struct abis_om2k_hdr *o2h = msgb_l2(msg);
769 odm->msg_type = ntohs(o2h->msg_type);
770 odm->o2h = *o2h;
771 return abis_om2k_msg_tlv_parse(&odm->tp, o2h);
772}
773
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]774static char *om2k_mo_name(const struct abis_om2k_mo *mo)
775{
776 static char mo_buf[64];
777
778 memset(mo_buf, 0, sizeof(mo_buf));
779 snprintf(mo_buf, sizeof(mo_buf), "%s/%02x/%02x/%02x",
780 get_value_string(om2k_mo_class_short_vals, mo->class),
781 mo->bts, mo->assoc_so, mo->inst);
782 return mo_buf;
783}
784
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]785/* resolve the gsm_nm_state data structure for a given MO */
786static struct gsm_nm_state *
787mo2nm_state(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
788{
789 struct gsm_bts_trx *trx;
790 struct gsm_nm_state *nm_state = NULL;
791
792 switch (mo->class) {
793 case OM2K_MO_CLS_TRXC:
794 trx = gsm_bts_trx_num(bts, mo->assoc_so);
795 if (!trx)
796 return NULL;
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]797 nm_state = &trx->mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]798 break;
799 case OM2K_MO_CLS_TS:
800 trx = gsm_bts_trx_num(bts, mo->assoc_so);
801 if (!trx)
802 return NULL;
803 if (mo->inst >= ARRAY_SIZE(trx->ts))
804 return NULL;
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]805 nm_state = &trx->ts[mo->inst].mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]806 break;
807 case OM2K_MO_CLS_TF:
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]808 nm_state = &bts->rbs2000.tf.mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]809 break;
810 case OM2K_MO_CLS_IS:
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]811 nm_state = &bts->rbs2000.is.mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]812 break;
813 case OM2K_MO_CLS_CON:
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]814 nm_state = &bts->rbs2000.con.mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]815 break;
816 case OM2K_MO_CLS_DP:
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]817 nm_state = &bts->rbs2000.con.mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]818 break;
819 case OM2K_MO_CLS_CF:
Harald Welted64c0bc2011-05-30 12:07:53 +0200[diff] [blame]820 nm_state = &bts->mo.nm_state;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]821 break;
822 case OM2K_MO_CLS_TX:
823 trx = gsm_bts_trx_num(bts, mo->assoc_so);
824 if (!trx)
825 return NULL;
826 break;
827 case OM2K_MO_CLS_RX:
828 trx = gsm_bts_trx_num(bts, mo->assoc_so);
829 if (!trx)
830 return NULL;
831 break;
832 }
833
834 return nm_state;
835}
836
837static void *mo2obj(struct gsm_bts *bts, struct abis_om2k_mo *mo)
838{
839 struct gsm_bts_trx *trx;
840
841 switch (mo->class) {
842 case OM2K_MO_CLS_TX:
843 case OM2K_MO_CLS_RX:
844 case OM2K_MO_CLS_TRXC:
845 return gsm_bts_trx_num(bts, mo->assoc_so);
846 case OM2K_MO_CLS_TS:
847 trx = gsm_bts_trx_num(bts, mo->assoc_so);
848 if (!trx)
849 return NULL;
850 if (mo->inst >= ARRAY_SIZE(trx->ts))
851 return NULL;
852 return &trx->ts[mo->inst];
853 case OM2K_MO_CLS_TF:
854 case OM2K_MO_CLS_IS:
855 case OM2K_MO_CLS_CON:
856 case OM2K_MO_CLS_DP:
857 case OM2K_MO_CLS_CF:
858 return bts;
859 }
860
861 return NULL;
862}
863
864static void update_mo_state(struct gsm_bts *bts, struct abis_om2k_mo *mo,
865 uint8_t mo_state)
866{
867 struct gsm_nm_state *nm_state = mo2nm_state(bts, mo);
868 struct gsm_nm_state new_state;
869 struct nm_statechg_signal_data nsd;
870
871 if (!nm_state)
872 return;
873
874 new_state = *nm_state;
875 /* NOTICE: 12.21 Availability state values != OM2000 */
876 new_state.availability = mo_state;
877
878 memset(&nsd, 0, sizeof(nsd));
879
Harald Welte8b277ac2011-03-06 23:00:32 +0100[diff] [blame]880 nsd.bts = bts;
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]881 nsd.obj = mo2obj(bts, mo);
882 nsd.old_state = nm_state;
883 nsd.new_state = &new_state;
884 nsd.om2k_mo = mo;
885
Pablo Neira Ayusobbc5b992011-05-06 12:12:31 +0200[diff] [blame]886 osmo_signal_dispatch(SS_NM, S_NM_STATECHG_ADM, &nsd);
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]887
888 nm_state->availability = new_state.availability;
889}
890
891static void update_op_state(struct gsm_bts *bts, const struct abis_om2k_mo *mo,
892 uint8_t op_state)
893{
894 struct gsm_nm_state *nm_state = mo2nm_state(bts, mo);
895 struct gsm_nm_state new_state;
896
897 if (!nm_state)
898 return;
899
900 new_state = *nm_state;
901 switch (op_state) {
902 case 1:
903 new_state.operational = NM_OPSTATE_ENABLED;
904 break;
905 case 0:
906 new_state.operational = NM_OPSTATE_DISABLED;
907 break;
908 default:
909 new_state.operational = NM_OPSTATE_NULL;
910 break;
911 }
912
913 nm_state->operational = new_state.operational;
914}
915
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]916static int abis_om2k_sendmsg(struct gsm_bts *bts, struct msgb *msg)
917{
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]918 struct abis_om2k_hdr *o2h;
Harald Welte15eae8d2011-09-26 23:43:23 +0200[diff] [blame]919 struct gsm_bts_trx *trx;
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]920
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]921 msg->l2h = msg->data;
922 o2h = (struct abis_om2k_hdr *) msg->l2h;
923
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]924 /* Compute the length in the OML header */
925 o2h->om.length = 6 + msgb_l2len(msg)-sizeof(*o2h);
926
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]927 switch (o2h->mo.class) {
928 case OM2K_MO_CLS_TRXC:
929 case OM2K_MO_CLS_TX:
930 case OM2K_MO_CLS_RX:
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]931 /* Route through per-TRX OML Link to the appropriate TRX */
Harald Welte15eae8d2011-09-26 23:43:23 +0200[diff] [blame]932 trx = gsm_bts_trx_by_nr(bts, o2h->mo.inst);
933 if (!trx) {
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]934 LOGP(DNM, LOGL_ERROR, "MO=%s Tx Dropping msg to "
935 "non-existing TRX\n", om2k_mo_name(&o2h->mo));
936 return -ENODEV;
937 }
Harald Welte0818f312012-09-07 19:09:46 +0200[diff] [blame]938 msg->dst = trx->oml_link;
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]939 break;
Harald Welte8aeac192011-03-05 20:15:09 +0100[diff] [blame]940 case OM2K_MO_CLS_TS:
941 /* Route through per-TRX OML Link to the appropriate TRX */
Harald Welte15eae8d2011-09-26 23:43:23 +0200[diff] [blame]942 trx = gsm_bts_trx_by_nr(bts, o2h->mo.assoc_so);
943 if (!trx) {
Harald Welte8aeac192011-03-05 20:15:09 +0100[diff] [blame]944 LOGP(DNM, LOGL_ERROR, "MO=%s Tx Dropping msg to "
945 "non-existing TRX\n", om2k_mo_name(&o2h->mo));
946 return -ENODEV;
947 }
Harald Welte0818f312012-09-07 19:09:46 +0200[diff] [blame]948 msg->dst = trx->oml_link;
Harald Welte8aeac192011-03-05 20:15:09 +0100[diff] [blame]949 break;
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]950 default:
951 /* Route through the IXU/DXU OML Link */
Harald Welte0818f312012-09-07 19:09:46 +0200[diff] [blame]952 msg->dst = bts->oml_link;
Harald Welted88a3872011-02-14 15:26:13 +0100[diff] [blame]953 break;
954 }
955
Harald Welte15eae8d2011-09-26 23:43:23 +0200[diff] [blame]956 return _abis_nm_sendmsg(msg);
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]957}
958
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]959static void fill_om2k_hdr(struct abis_om2k_hdr *o2h, const struct abis_om2k_mo *mo,
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]960 uint16_t msg_type)
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]961{
962 o2h->om.mdisc = ABIS_OM_MDISC_FOM;
963 o2h->om.placement = ABIS_OM_PLACEMENT_ONLY;
964 o2h->om.sequence = 0;
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]965 /* We fill o2h->om.length later during om2k_sendmsg() */
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]966 o2h->msg_type = htons(msg_type);
967 memcpy(&o2h->mo, mo, sizeof(o2h->mo));
968}
969
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]970static int abis_om2k_cal_time_resp(struct gsm_bts *bts)
971{
972 struct msgb *msg = om2k_msgb_alloc();
973 struct abis_om2k_hdr *o2k;
974 time_t tm_t;
975 struct tm *tm;
976
977 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]978 fill_om2k_hdr(o2k, &bts->rbs2000.cf.om2k_mo.addr,
979 OM2K_MSGT_CAL_TIME_RESP);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]980
981 tm_t = time(NULL);
982 tm = localtime(&tm_t);
983
984 msgb_put_u8(msg, OM2K_DEI_CAL_TIME);
985 msgb_put_u8(msg, tm->tm_year % 100);
986 msgb_put_u8(msg, tm->tm_mon + 1);
987 msgb_put_u8(msg, tm->tm_mday);
988 msgb_put_u8(msg, tm->tm_hour);
989 msgb_put_u8(msg, tm->tm_min);
990 msgb_put_u8(msg, tm->tm_sec);
991
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]992 return abis_om2k_sendmsg(bts, msg);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]993}
994
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]995static int abis_om2k_tx_simple(struct gsm_bts *bts, const struct abis_om2k_mo *mo,
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]996 uint8_t msg_type)
997{
998 struct msgb *msg = om2k_msgb_alloc();
999 struct abis_om2k_hdr *o2k;
1000
1001 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1002 fill_om2k_hdr(o2k, mo, msg_type);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1003
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]1004 DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo),
1005 get_value_string(om2k_msgcode_vals, msg_type));
1006
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]1007 return abis_om2k_sendmsg(bts, msg);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1008}
1009
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]1010int abis_om2k_tx_reset_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]1011{
1012 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_RESET_CMD);
1013}
1014
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]1015int abis_om2k_tx_start_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]1016{
1017 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_START_REQ);
1018}
1019
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]1020int abis_om2k_tx_status_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
Harald Weltee1d5eca2011-02-12 14:42:59 +0100[diff] [blame]1021{
1022 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_STATUS_REQ);
1023}
1024
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]1025int abis_om2k_tx_connect_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
1026{
1027 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_CONNECT_CMD);
1028}
1029
1030int abis_om2k_tx_disconnect_cmd(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
1031{
1032 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_DISCONNECT_CMD);
1033}
1034
Harald Welte8024d8f2011-02-12 15:07:30 +0100[diff] [blame]1035int abis_om2k_tx_test_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
1036{
1037 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_TEST_REQ);
1038}
1039
Harald Welte0741ffe2011-02-12 18:48:53 +0100[diff] [blame]1040int abis_om2k_tx_enable_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
1041{
1042 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_ENABLE_REQ);
1043}
1044
1045int abis_om2k_tx_disable_req(struct gsm_bts *bts, const struct abis_om2k_mo *mo)
1046{
1047 return abis_om2k_tx_simple(bts, mo, OM2K_MSGT_DISABLE_REQ);
1048}
1049
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]1050int abis_om2k_tx_op_info(struct gsm_bts *bts, const struct abis_om2k_mo *mo,
1051 uint8_t operational)
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1052{
1053 struct msgb *msg = om2k_msgb_alloc();
1054 struct abis_om2k_hdr *o2k;
1055
1056 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1057 fill_om2k_hdr(o2k, mo, OM2K_MSGT_OP_INFO);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1058
1059 msgb_tv_put(msg, OM2K_DEI_OP_INFO, operational);
1060
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]1061 DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo),
1062 get_value_string(om2k_msgcode_vals, OM2K_MSGT_OP_INFO));
1063
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]1064 /* we update the state here... and send the signal at ACK */
1065 update_op_state(bts, mo, operational);
1066
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]1067 return abis_om2k_sendmsg(bts, msg);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]1068}
1069
Harald Welted529db62011-03-06 21:49:21 +0100[diff] [blame]1070static void om2k_fill_is_conn_grp(struct om2k_is_conn_grp *grp, uint16_t icp1,
1071 uint16_t icp2, uint8_t cont_idx)
1072{
1073 grp->icp1 = htons(icp1);
1074 grp->icp2 = htons(icp2);
1075 grp->cont_idx = cont_idx;
1076}
1077
1078int abis_om2k_tx_is_conf_req(struct gsm_bts *bts)
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]1079{
1080 struct msgb *msg = om2k_msgb_alloc();
1081 struct abis_om2k_hdr *o2k;
Harald Welted529db62011-03-06 21:49:21 +0100[diff] [blame]1082 struct is_conn_group *grp;
1083 unsigned int num_grps = 0, i = 0;
1084 struct om2k_is_conn_grp *cg;
1085
1086 /* count number of groups in linked list */
1087 llist_for_each_entry(grp, &bts->rbs2000.is.conn_groups, list)
1088 num_grps++;
1089
1090 if (!num_grps)
1091 return -EINVAL;
1092
1093 /* allocate buffer for oml group array */
1094 cg = talloc_zero_array(bts, struct om2k_is_conn_grp, num_grps);
1095
1096 /* fill array with data from linked list */
1097 llist_for_each_entry(grp, &bts->rbs2000.is.conn_groups, list)
1098 om2k_fill_is_conn_grp(&cg[i++], grp->icp1, grp->icp2, grp->ci);
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]1099
1100 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1101 fill_om2k_hdr(o2k, &bts->rbs2000.is.om2k_mo.addr,
1102 OM2K_MSGT_IS_CONF_REQ);
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]1103
1104 msgb_tv_put(msg, OM2K_DEI_LIST_NR, 1);
1105 msgb_tv_put(msg, OM2K_DEI_END_LIST_NR, 1);
1106
1107 msgb_tlv_put(msg, OM2K_DEI_IS_CONN_LIST,
Harald Welted529db62011-03-06 21:49:21 +0100[diff] [blame]1108 num_grps * sizeof(*cg), (uint8_t *)cg);
1109
1110 talloc_free(cg);
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]1111
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1112 DEBUGP(DNM, "Tx MO=%s %s\n",
1113 om2k_mo_name(&bts->rbs2000.is.om2k_mo.addr),
Harald Welte79c34ff2012-09-07 20:15:50 +0200[diff] [blame]1114 get_value_string(om2k_msgcode_vals, OM2K_MSGT_IS_CONF_REQ));
1115
Harald Welte8bcb1a02011-02-12 20:23:40 +0100[diff] [blame]1116 return abis_om2k_sendmsg(bts, msg);
1117}
1118
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]1119int abis_om2k_tx_con_conf_req(struct gsm_bts *bts, uint8_t *data,
1120 unsigned int len)
1121{
1122 struct msgb *msg = om2k_msgb_alloc();
1123 struct abis_om2k_hdr *o2k;
1124
1125 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1126 fill_om2k_hdr(o2k, &bts->rbs2000.con.om2k_mo.addr,
1127 OM2K_MSGT_CON_CONF_REQ);
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]1128
1129 msgb_tv_put(msg, OM2K_DEI_LIST_NR, 1);
1130 msgb_tv_put(msg, OM2K_DEI_END_LIST_NR, 1);
1131
1132 msgb_tlv_put(msg, OM2K_DEI_CON_CONN_LIST, len, data);
1133
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1134 DEBUGP(DNM, "Tx MO=%s %s\n",
1135 om2k_mo_name(&bts->rbs2000.con.om2k_mo.addr),
Harald Welte79c34ff2012-09-07 20:15:50 +0200[diff] [blame]1136 get_value_string(om2k_msgcode_vals, OM2K_MSGT_CON_CONF_REQ));
1137
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]1138 return abis_om2k_sendmsg(bts, msg);
1139}
1140
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1141static void om2k_trx_to_mo(struct abis_om2k_mo *mo,
1142 const struct gsm_bts_trx *trx,
1143 enum abis_om2k_mo_cls cls)
1144{
1145 mo->class = cls;
1146 mo->bts = 0;
1147 mo->inst = trx->nr;
Harald Welte53492c82011-03-05 16:21:01 +0100[diff] [blame]1148 mo->assoc_so = 255;
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1149}
1150
1151static void om2k_ts_to_mo(struct abis_om2k_mo *mo,
1152 const struct gsm_bts_trx_ts *ts)
1153{
1154 mo->class = OM2K_MO_CLS_TS;
1155 mo->bts = 0;
1156 mo->inst = ts->nr;
1157 mo->assoc_so = ts->trx->nr;
1158}
1159
1160/* Configure a Receiver MO */
1161int abis_om2k_tx_rx_conf_req(struct gsm_bts_trx *trx)
1162{
1163 struct msgb *msg = om2k_msgb_alloc();
1164 struct abis_om2k_hdr *o2k;
1165 struct abis_om2k_mo mo;
1166
1167 om2k_trx_to_mo(&mo, trx, OM2K_MO_CLS_RX);
1168
1169 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1170 fill_om2k_hdr(o2k, &mo, OM2K_MSGT_RX_CONF_REQ);
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1171
1172 msgb_tv16_put(msg, OM2K_DEI_FREQ_SPEC_RX, trx->arfcn);
Harald Welte1edc2b42011-03-06 19:01:54 +0100[diff] [blame]1173 msgb_tv_put(msg, OM2K_DEI_RX_DIVERSITY, 0x02); /* A */
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1174
1175 return abis_om2k_sendmsg(trx->bts, msg);
1176}
1177
1178/* Configure a Transmitter MO */
1179int abis_om2k_tx_tx_conf_req(struct gsm_bts_trx *trx)
1180{
1181 struct msgb *msg = om2k_msgb_alloc();
1182 struct abis_om2k_hdr *o2k;
1183 struct abis_om2k_mo mo;
1184
1185 om2k_trx_to_mo(&mo, trx, OM2K_MO_CLS_TX);
1186
1187 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1188 fill_om2k_hdr(o2k, &mo, OM2K_MSGT_TX_CONF_REQ);
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1189
1190 msgb_tv16_put(msg, OM2K_DEI_FREQ_SPEC_TX, trx->arfcn);
1191 msgb_tv_put(msg, OM2K_DEI_POWER, trx->nominal_power-trx->max_power_red);
1192 msgb_tv_put(msg, OM2K_DEI_FILLING_MARKER, 0); /* Filling enabled */
1193 msgb_tv_put(msg, OM2K_DEI_BCC, trx->bts->bsic & 0x7);
1194 /* Dedication Information is optional */
1195
1196 return abis_om2k_sendmsg(trx->bts, msg);
1197}
1198
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]1199enum abis_om2k_tf_mode {
1200 OM2K_TF_MODE_MASTER = 0x00,
1201 OM2K_TF_MODE_STANDALONE = 0x01,
1202 OM2K_TF_MODE_SLAVE = 0x02,
1203 OM2K_TF_MODE_UNDEFINED = 0xff,
1204};
1205
1206static const uint8_t fs_offset_undef[5] = { 0xff, 0xff, 0xff, 0xff, 0xff };
1207
1208int abis_om2k_tx_tf_conf_req(struct gsm_bts *bts)
1209{
1210 struct msgb *msg = om2k_msgb_alloc();
1211 struct abis_om2k_hdr *o2k;
1212
1213 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1214 fill_om2k_hdr(o2k, &bts->rbs2000.tf.om2k_mo.addr,
1215 OM2K_MSGT_TF_CONF_REQ);
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]1216
1217 msgb_tv_put(msg, OM2K_DEI_TF_MODE, OM2K_TF_MODE_STANDALONE);
Harald Welteba9adbb2011-03-06 19:01:16 +0100[diff] [blame]1218 msgb_tv_put(msg, OM2K_DEI_TF_SYNC_SRC, 0x00);
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]1219 msgb_tv_fixed_put(msg, OM2K_DEI_FS_OFFSET,
1220 sizeof(fs_offset_undef), fs_offset_undef);
1221
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1222 DEBUGP(DNM, "Tx MO=%s %s\n",
1223 om2k_mo_name(&bts->rbs2000.tf.om2k_mo.addr),
Harald Welte79c34ff2012-09-07 20:15:50 +0200[diff] [blame]1224 get_value_string(om2k_msgcode_vals, OM2K_MSGT_TF_CONF_REQ));
1225
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]1226 return abis_om2k_sendmsg(bts, msg);
1227}
1228
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1229static uint8_t pchan2comb(enum gsm_phys_chan_config pchan)
1230{
1231 switch (pchan) {
1232 case GSM_PCHAN_CCCH:
1233 return 4;
1234 case GSM_PCHAN_CCCH_SDCCH4:
1235 return 5;
1236 case GSM_PCHAN_SDCCH8_SACCH8C:
1237 return 3;
1238 case GSM_PCHAN_TCH_F:
1239 case GSM_PCHAN_TCH_H:
1240 case GSM_PCHAN_PDCH:
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1241 return 8;
1242 default:
1243 return 0;
1244 }
1245}
1246
Neels Hofmeyr23c3aa32016-09-25 15:15:59 +0200[diff] [blame]1247static uint8_t ts2comb(struct gsm_bts_trx_ts *ts)
1248{
1249 switch (ts->pchan) {
1250 case GSM_PCHAN_TCH_F_PDCH:
1251 if (ts->flags & TS_F_PDCH_ACTIVE)
1252 return pchan2comb(GSM_PCHAN_PDCH);
1253 else
1254 return pchan2comb(GSM_PCHAN_TCH_F);
1255 case GSM_PCHAN_TCH_F_TCH_H_PDCH:
1256 return pchan2comb(ts->dyn.pchan_is);
1257 default:
1258 return pchan2comb(ts->pchan);
1259 }
1260}
1261
Harald Welte5748c202011-03-05 17:30:07 +0100[diff] [blame]1262static int put_freq_list(uint8_t *buf, uint16_t arfcn)
1263{
1264 buf[0] = 0x00; /* TX/RX address */
1265 buf[1] = (arfcn >> 8);
1266 buf[2] = (arfcn & 0xff);
1267
1268 return 3;
1269}
1270
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1271/* Compute a frequency list in OM2000 fomrmat */
1272static int om2k_gen_freq_list(uint8_t *list, struct gsm_bts_trx_ts *ts)
1273{
1274 uint8_t *cur = list;
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]1275 int len;
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1276
1277 if (ts->hopping.enabled) {
1278 unsigned int i;
1279 for (i = 0; i < ts->hopping.arfcns.data_len*8; i++) {
Harald Welte5748c202011-03-05 17:30:07 +0100[diff] [blame]1280 if (bitvec_get_bit_pos(&ts->hopping.arfcns, i))
1281 cur += put_freq_list(cur, i);
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1282 }
Harald Welte5748c202011-03-05 17:30:07 +0100[diff] [blame]1283 } else
1284 cur += put_freq_list(cur, ts->trx->arfcn);
1285
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]1286 len = cur - list;
1287
1288 return len;
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1289}
1290
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1291const uint8_t icm_bound_params[] = { 0x02, 0x06, 0x0c, 0x16, 0x06 };
1292
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1293int abis_om2k_tx_ts_conf_req(struct gsm_bts_trx_ts *ts)
1294{
1295 struct msgb *msg = om2k_msgb_alloc();
1296 struct abis_om2k_hdr *o2k;
1297 struct abis_om2k_mo mo;
1298 uint8_t freq_list[64*3]; /* BA max size: 64 ARFCN */
1299 int freq_list_len;
1300
1301 om2k_ts_to_mo(&mo, ts);
1302
Harald Welte5748c202011-03-05 17:30:07 +0100[diff] [blame]1303 memset(freq_list, 0, sizeof(freq_list));
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1304 freq_list_len = om2k_gen_freq_list(freq_list, ts);
1305 if (freq_list_len < 0)
1306 return freq_list_len;
1307
1308 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1309 fill_om2k_hdr(o2k, &mo, OM2K_MSGT_TS_CONF_REQ);
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1310
Neels Hofmeyr23c3aa32016-09-25 15:15:59 +0200[diff] [blame]1311 msgb_tv_put(msg, OM2K_DEI_COMBINATION, ts2comb(ts));
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1312 msgb_tv_put(msg, OM2K_DEI_TS_NR, ts->nr);
1313 msgb_tlv_put(msg, OM2K_DEI_FREQ_LIST, freq_list_len, freq_list);
1314 msgb_tv_put(msg, OM2K_DEI_HSN, ts->hopping.hsn);
1315 msgb_tv_put(msg, OM2K_DEI_MAIO, ts->hopping.maio);
1316 msgb_tv_put(msg, OM2K_DEI_BSIC, ts->trx->bts->bsic);
Harald Welte1edc2b42011-03-06 19:01:54 +0100[diff] [blame]1317 msgb_tv_put(msg, OM2K_DEI_RX_DIVERSITY, 0x02); /* A */
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1318 msgb_tv16_put(msg, OM2K_DEI_FN_OFFSET, 0);
1319 msgb_tv_put(msg, OM2K_DEI_EXT_RANGE, 0); /* Off */
1320 /* Optional: Interference Rejection Combining */
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1321 msgb_tv_put(msg, OM2K_DEI_INTERF_REJ_COMB, 0x00);
1322 switch (ts->pchan) {
1323 case GSM_PCHAN_CCCH:
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1324 msgb_tv_put(msg, OM2K_DEI_BA_PA_MFRMS, 0x06);
1325 msgb_tv_put(msg, OM2K_DEI_BS_AG_BKS_RES, 0x01);
1326 msgb_tv_put(msg, OM2K_DEI_DRX_DEV_MAX, 0x05);
1327 /* Repeat Paging/IMM.ASS: True, Allow Paging Type 3: Yes, Page for 5 seconds (default) */
1328 msgb_tv_put(msg, OM2K_DEI_CCCH_OPTIONS, 0x01);
1329 break;
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1330 case GSM_PCHAN_CCCH_SDCCH4:
Harald Welte67161f22012-06-03 13:01:47 +0200[diff] [blame]1331 msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10);
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1332 msgb_tv_put(msg, OM2K_DEI_NY1, 35);
1333 msgb_tv_put(msg, OM2K_DEI_BA_PA_MFRMS, 0x06);
1334 msgb_tv_put(msg, OM2K_DEI_CBCH_INDICATOR, 0);
Harald Welte94bc1e02014-01-19 17:19:10 +0100[diff] [blame]1335 msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts));
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1336 msgb_tv_put(msg, OM2K_DEI_BS_AG_BKS_RES, 0x01);
1337 msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0);
1338 msgb_tv_put(msg, OM2K_DEI_DRX_DEV_MAX, 0x05);
1339 /* Repeat Paging/IMM.ASS: True, Allow Paging Type 3: Yes, Page for 5 seconds (default) */
1340 msgb_tv_put(msg, OM2K_DEI_CCCH_OPTIONS, 0x01);
1341 msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS,
1342 sizeof(icm_bound_params), icm_bound_params);
1343 break;
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1344 case GSM_PCHAN_SDCCH8_SACCH8C:
Harald Welte67161f22012-06-03 13:01:47 +0200[diff] [blame]1345 msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10);
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1346 msgb_tv_put(msg, OM2K_DEI_NY1, 35);
1347 msgb_tv_put(msg, OM2K_DEI_CBCH_INDICATOR, 0);
Harald Welte94bc1e02014-01-19 17:19:10 +0100[diff] [blame]1348 msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1349 /* Disable RF RESOURCE INDICATION on idle channels */
1350 msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0);
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1351 msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS,
1352 sizeof(icm_bound_params), icm_bound_params);
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1353 break;
1354 default:
Harald Welte67161f22012-06-03 13:01:47 +0200[diff] [blame]1355 msgb_tv_put(msg, OM2K_DEI_T3105, ts->trx->bts->network->T3105 / 10);
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1356 msgb_tv_put(msg, OM2K_DEI_NY1, 35);
Harald Welte94bc1e02014-01-19 17:19:10 +0100[diff] [blame]1357 msgb_tv_put(msg, OM2K_DEI_TSC, gsm_ts_tsc(ts));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1358 /* Disable RF RESOURCE INDICATION on idle channels */
1359 msgb_tv_put(msg, OM2K_DEI_ICM_INDICATOR, 0);
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1360 msgb_tv_fixed_put(msg, OM2K_DEI_ICM_BOUND_PARAMS,
1361 sizeof(icm_bound_params), icm_bound_params);
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1362 msgb_tv_put(msg, OM2K_DEI_TTA, 10); /* Timer for Time Alignment */
Harald Welte75755c52011-03-05 20:38:35 +0100[diff] [blame]1363 if (ts->pchan == GSM_PCHAN_TCH_H)
1364 msgb_tv_put(msg, OM2K_DEI_ICM_CHAN_RATE, 1); /* TCH/H */
1365 else
1366 msgb_tv_put(msg, OM2K_DEI_ICM_CHAN_RATE, 0); /* TCH/F */
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1367 msgb_tv_put(msg, OM2K_DEI_LSC, 1); /* enabled */
Harald Welte1edc2b42011-03-06 19:01:54 +0100[diff] [blame]1368 msgb_tv_put(msg, OM2K_DEI_LSC_FILT_TIME, 10); /* units of 100ms */
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1369 msgb_tv_put(msg, OM2K_DEI_CALL_SUPV_TIME, 8);
1370 msgb_tv_put(msg, OM2K_DEI_ENCR_ALG, 0x00);
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]1371 break;
1372 }
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1373
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1374 DEBUGP(DNM, "Tx MO=%s %s\n",
1375 om2k_mo_name(&mo),
1376 get_value_string(om2k_msgcode_vals, OM2K_MSGT_TS_CONF_REQ));
1377
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]1378 return abis_om2k_sendmsg(ts->trx->bts, msg);
1379}
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]1380
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1381
1382/***********************************************************************
1383 * OM2000 Managed Object (MO) FSM
1384 ***********************************************************************/
1385
1386#define S(x) (1 << (x))
1387
1388enum om2k_event_name {
1389 OM2K_MO_EVT_START,
1390 OM2K_MO_EVT_RX_CONN_COMPL,
1391 OM2K_MO_EVT_RX_RESET_COMPL,
1392 OM2K_MO_EVT_RX_START_REQ_ACCEPT,
1393 OM2K_MO_EVT_RX_START_RES,
1394 OM2K_MO_EVT_RX_CFG_REQ_ACCEPT,
1395 OM2K_MO_EVT_RX_CFG_RES,
1396 OM2K_MO_EVT_RX_ENA_REQ_ACCEPT,
1397 OM2K_MO_EVT_RX_ENA_RES,
1398 OM2K_MO_EVT_RX_OPINFO_ACC,
1399};
1400
1401static const struct value_string om2k_event_names[] = {
1402 { OM2K_MO_EVT_START, "START" },
1403 { OM2K_MO_EVT_RX_CONN_COMPL, "RX-CONN-COMPL" },
1404 { OM2K_MO_EVT_RX_RESET_COMPL, "RX-RESET-COMPL" },
1405 { OM2K_MO_EVT_RX_START_REQ_ACCEPT, "RX-RESET-REQ-ACCEPT" },
1406 { OM2K_MO_EVT_RX_START_RES, "RX-START-RESULT" },
1407 { OM2K_MO_EVT_RX_CFG_REQ_ACCEPT, "RX-CFG-REQ-ACCEPT" },
1408 { OM2K_MO_EVT_RX_CFG_RES, "RX-CFG-RESULT" },
1409 { OM2K_MO_EVT_RX_ENA_REQ_ACCEPT, "RX-ENABLE-REQ-ACCEPT" },
1410 { OM2K_MO_EVT_RX_ENA_RES, "RX-ENABLE-RESULT" },
1411 { OM2K_MO_EVT_RX_OPINFO_ACC, "RX-OPINFO-ACCEPT" },
1412 { 0, NULL }
1413};
1414
1415enum om2k_mo_fsm_state {
1416 OM2K_ST_INIT,
1417 OM2K_ST_WAIT_CONN_COMPL,
1418 OM2K_ST_WAIT_RES_COMPL,
1419 OM2K_ST_WAIT_START_ACCEPT,
1420 OM2K_ST_WAIT_START_RES,
1421 OM2K_ST_WAIT_CFG_ACCEPT,
1422 OM2K_ST_WAIT_CFG_RES,
1423 OM2K_ST_WAIT_ENABLE_ACCEPT,
1424 OM2K_ST_WAIT_ENABLE_RES,
1425 OM2K_ST_WAIT_OPINFO_ACCEPT,
1426 OM2K_ST_DONE,
1427 OM2K_ST_ERROR,
1428};
1429
1430struct om2k_mo_fsm_priv {
1431 struct gsm_bts_trx *trx;
1432 struct om2k_mo *mo;
1433 uint8_t ts_nr;
1434};
1435
1436static void om2k_mo_st_init(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1437{
1438 struct om2k_mo_fsm_priv *omfp = fi->priv;
1439
1440 OSMO_ASSERT(event == OM2K_MO_EVT_START);
1441
1442 switch (omfp->mo->addr.class) {
1443 case OM2K_MO_CLS_CF:
1444 /* no Connect required, is always connected */
1445 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT,
1446 OM2K_TIMEOUT, 0);
1447 abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr);
1448 break;
1449 case OM2K_MO_CLS_TRXC:
1450 /* no Connect required, start with Reset */
1451 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_RES_COMPL,
1452 OM2K_TIMEOUT, 0);
1453 abis_om2k_tx_reset_cmd(omfp->trx->bts, &omfp->mo->addr);
1454 break;
1455 default:
1456 /* start with Connect */
1457 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CONN_COMPL,
1458 OM2K_TIMEOUT, 0);
1459 abis_om2k_tx_connect_cmd(omfp->trx->bts, &omfp->mo->addr);
1460 break;
1461 }
1462}
1463
1464static void om2k_mo_st_wait_conn_compl(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1465{
1466 struct om2k_mo_fsm_priv *omfp = fi->priv;
1467
1468 switch (omfp->mo->addr.class) {
1469#if 0
1470 case OM2K_MO_CLS_TF:
1471 /* skip the reset, hope that helps */
1472 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT,
1473 OM2K_TIMEOUT, 0);
1474 abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr);
1475 break;
1476#endif
1477 default:
1478 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_RES_COMPL,
1479 OM2K_TIMEOUT, 0);
1480 abis_om2k_tx_reset_cmd(omfp->trx->bts, &omfp->mo->addr);
1481 break;
1482 }
1483}
1484
1485static void om2k_mo_st_wait_res_compl(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1486{
1487 struct om2k_mo_fsm_priv *omfp = fi->priv;
1488
1489 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_ACCEPT,
1490 OM2K_TIMEOUT, 0);
1491 abis_om2k_tx_start_req(omfp->trx->bts, &omfp->mo->addr);
1492}
1493
1494static void om2k_mo_st_wait_start_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1495{
1496 struct om2k_decoded_msg *omd = data;
1497
1498 switch (omd->msg_type) {
1499 case OM2K_MSGT_START_REQ_ACK:
1500 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_START_RES,
1501 OM2K_TIMEOUT, 0);
1502 break;
1503 case OM2K_MSGT_START_REQ_REJ:
1504 osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0);
1505 break;
1506 }
1507}
1508
1509static void om2k_mo_st_wait_start_res(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1510{
1511 struct om2k_mo_fsm_priv *omfp = fi->priv;
1512 struct gsm_bts_trx_ts *ts;
1513
1514 switch (omfp->mo->addr.class) {
1515 case OM2K_MO_CLS_CF:
1516 case OM2K_MO_CLS_TRXC:
1517 /* Transition directly to Operational Info */
1518 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_OPINFO_ACCEPT,
1519 OM2K_TIMEOUT, 0);
1520 abis_om2k_tx_op_info(omfp->trx->bts, &omfp->mo->addr, 1);
Harald Welte424656e2016-10-15 16:30:35 +0200[diff] [blame]1521 return;
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]1522 case OM2K_MO_CLS_DP:
1523 /* Transition directoy to WAIT_ENABLE_ACCEPT */
1524 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT,
1525 OM2K_TIMEOUT, 0);
1526 abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr);
1527 return;
1528#if 0
1529 case OM2K_MO_CLS_TF:
1530 /* skip the config, hope that helps speeding things up */
1531 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT,
1532 OM2K_TIMEOUT, 0);
1533 abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr);
1534 return;
1535#endif
1536 }
1537
1538 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CFG_ACCEPT,
1539 OM2K_TIMEOUT, 0);
1540 switch (omfp->mo->addr.class) {
1541 case OM2K_MO_CLS_TF:
1542 abis_om2k_tx_tf_conf_req(omfp->trx->bts);
1543 break;
1544 case OM2K_MO_CLS_IS:
1545 abis_om2k_tx_is_conf_req(omfp->trx->bts);
1546 break;
1547 case OM2K_MO_CLS_CON:
1548 /* TODO */
1549 //abis_om2k_tx_con_conf_req(omfp->trx->bts, data, len);
1550 break;
1551 case OM2K_MO_CLS_TX:
1552 abis_om2k_tx_tx_conf_req(omfp->trx);
1553 break;
1554 case OM2K_MO_CLS_RX:
1555 abis_om2k_tx_rx_conf_req(omfp->trx);
1556 break;
1557 case OM2K_MO_CLS_TS:
1558 ts = mo2obj(omfp->trx->bts, &omfp->mo->addr);
1559 abis_om2k_tx_ts_conf_req(ts);
1560 break;
1561 }
1562}
1563
1564static void om2k_mo_st_wait_cfg_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1565{
1566 struct om2k_mo_fsm_priv *omfp = fi->priv;
1567 uint32_t timeout = OM2K_TIMEOUT;
1568
1569 if (omfp->mo->addr.class == OM2K_MO_CLS_TF)
1570 timeout = 600;
1571
1572 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_CFG_RES, timeout, 0);
1573}
1574
1575static void om2k_mo_st_wait_cfg_res(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1576{
1577 struct om2k_mo_fsm_priv *omfp = fi->priv;
1578 struct om2k_decoded_msg *omd = data;
1579 uint8_t accordance;
1580
1581 if (!TLVP_PRESENT(&omd->tp, OM2K_DEI_ACCORDANCE_IND)) {
1582 osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0);
1583 return;
1584 }
1585 accordance = *TLVP_VAL(&omd->tp, OM2K_DEI_ACCORDANCE_IND);
1586
1587 if (accordance != 0) {
1588 /* accordance not OK */
1589 osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0);
1590 return;
1591 }
1592
1593 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_ACCEPT,
1594 OM2K_TIMEOUT, 0);
1595 abis_om2k_tx_enable_req(omfp->trx->bts, &omfp->mo->addr);
1596}
1597
1598static void om2k_mo_st_wait_enable_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1599{
1600 struct om2k_decoded_msg *omd = data;
1601
1602 switch (omd->msg_type) {
1603 case OM2K_MSGT_ENABLE_REQ_REJ:
1604 osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0);
1605 break;
1606 case OM2K_MSGT_ENABLE_REQ_ACK:
1607 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_ENABLE_RES,
1608 OM2K_TIMEOUT, 0);
1609 }
1610}
1611
1612static void om2k_mo_st_wait_enable_res(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1613{
1614 struct om2k_mo_fsm_priv *omfp = fi->priv;
1615 //struct om2k_decoded_msg *omd = data;
1616 /* TODO: check if state is actually enabled now? */
1617
1618 osmo_fsm_inst_state_chg(fi, OM2K_ST_WAIT_OPINFO_ACCEPT,
1619 OM2K_TIMEOUT, 0);
1620 abis_om2k_tx_op_info(omfp->trx->bts, &omfp->mo->addr, 1);
1621}
1622
1623static void om2k_mo_st_wait_opinfo_accept(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1624{
1625 osmo_fsm_inst_state_chg(fi, OM2K_ST_DONE, 0, 0);
1626}
1627
1628static void om2k_mo_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state)
1629{
1630 osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL);
1631}
1632
1633static const struct osmo_fsm_state om2k_is_states[] = {
1634 [OM2K_ST_INIT] = {
1635 .name = "INIT",
1636 .in_event_mask = S(OM2K_MO_EVT_START),
1637 .out_state_mask = S(OM2K_ST_DONE) |
1638 S(OM2K_ST_ERROR) |
1639 S(OM2K_ST_WAIT_CONN_COMPL) |
1640 S(OM2K_ST_WAIT_START_ACCEPT) |
1641 S(OM2K_ST_WAIT_RES_COMPL),
1642 .action = om2k_mo_st_init,
1643 },
1644 [OM2K_ST_WAIT_CONN_COMPL] = {
1645 .name = "WAIT-CONN-COMPL",
1646 .in_event_mask = S(OM2K_MO_EVT_RX_CONN_COMPL),
1647 .out_state_mask = S(OM2K_ST_DONE) |
1648 S(OM2K_ST_ERROR) |
1649 S(OM2K_ST_WAIT_START_ACCEPT) |
1650 S(OM2K_ST_WAIT_RES_COMPL),
1651 .action = om2k_mo_st_wait_conn_compl,
1652 },
1653 [OM2K_ST_WAIT_RES_COMPL] = {
1654 .name = "WAIT-RES-COMPL",
1655 .in_event_mask = S(OM2K_MO_EVT_RX_RESET_COMPL),
1656 .out_state_mask = S(OM2K_ST_DONE) |
1657 S(OM2K_ST_ERROR) |
1658 S(OM2K_ST_WAIT_START_ACCEPT),
1659 .action = om2k_mo_st_wait_res_compl,
1660 },
1661 [OM2K_ST_WAIT_START_ACCEPT] = {
1662 .name = "WAIT-START-ACCEPT",
1663 .in_event_mask = S(OM2K_MO_EVT_RX_START_REQ_ACCEPT),
1664 .out_state_mask = S(OM2K_ST_DONE) |
1665 S(OM2K_ST_ERROR) |
1666 S(OM2K_ST_WAIT_START_RES),
1667 .action =om2k_mo_st_wait_start_accept,
1668 },
1669 [OM2K_ST_WAIT_START_RES] = {
1670 .name = "WAIT-START-RES",
1671 .in_event_mask = S(OM2K_MO_EVT_RX_START_RES),
1672 .out_state_mask = S(OM2K_ST_DONE) |
1673 S(OM2K_ST_ERROR) |
1674 S(OM2K_ST_WAIT_CFG_ACCEPT) |
1675 S(OM2K_ST_WAIT_OPINFO_ACCEPT),
1676 .action = om2k_mo_st_wait_start_res,
1677 },
1678 [OM2K_ST_WAIT_CFG_ACCEPT] = {
1679 .name = "WAIT-CFG-ACCEPT",
1680 .in_event_mask = S(OM2K_MO_EVT_RX_CFG_REQ_ACCEPT),
1681 .out_state_mask = S(OM2K_ST_DONE) |
1682 S(OM2K_ST_ERROR) |
1683 S(OM2K_ST_WAIT_CFG_RES),
1684 .action = om2k_mo_st_wait_cfg_accept,
1685 },
1686 [OM2K_ST_WAIT_CFG_RES] = {
1687 .name = "WAIT-CFG-RES",
1688 .in_event_mask = S(OM2K_MO_EVT_RX_CFG_RES),
1689 .out_state_mask = S(OM2K_ST_DONE) |
1690 S(OM2K_ST_ERROR) |
1691 S(OM2K_ST_WAIT_ENABLE_ACCEPT),
1692 .action = om2k_mo_st_wait_cfg_res,
1693 },
1694 [OM2K_ST_WAIT_ENABLE_ACCEPT] = {
1695 .name = "WAIT-ENABLE-ACCEPT",
1696 .in_event_mask = S(OM2K_MO_EVT_RX_ENA_REQ_ACCEPT),
1697 .out_state_mask = S(OM2K_ST_DONE) |
1698 S(OM2K_ST_ERROR) |
1699 S(OM2K_ST_WAIT_ENABLE_RES),
1700 .action = om2k_mo_st_wait_enable_accept,
1701 },
1702 [OM2K_ST_WAIT_ENABLE_RES] = {
1703 .name = "WAIT-ENABLE-RES",
1704 .in_event_mask = S(OM2K_MO_EVT_RX_ENA_RES),
1705 .out_state_mask = S(OM2K_ST_DONE) |
1706 S(OM2K_ST_ERROR) |
1707 S(OM2K_ST_WAIT_OPINFO_ACCEPT),
1708 .action = om2k_mo_st_wait_enable_res,
1709 },
1710 [OM2K_ST_WAIT_OPINFO_ACCEPT] = {
1711 .name = "WAIT-OPINFO-ACCEPT",
1712 .in_event_mask = S(OM2K_MO_EVT_RX_OPINFO_ACC),
1713 .out_state_mask = S(OM2K_ST_DONE) |
1714 S(OM2K_ST_ERROR),
1715 .action = om2k_mo_st_wait_opinfo_accept,
1716 },
1717 [OM2K_ST_DONE] = {
1718 .name = "DONE",
1719 .in_event_mask = 0,
1720 .out_state_mask = 0,
1721 .onenter = om2k_mo_s_done_onenter,
1722 },
1723 [OM2K_ST_ERROR] = {
1724 .name = "ERROR",
1725 .in_event_mask = 0,
1726 .out_state_mask = 0,
1727 .onenter = om2k_mo_s_done_onenter,
1728 },
1729
1730};
1731
1732static int om2k_mo_timer_cb(struct osmo_fsm_inst *fi)
1733{
1734 osmo_fsm_inst_state_chg(fi, OM2K_ST_ERROR, 0, 0);
1735 return 0;
1736}
1737
1738static struct osmo_fsm om2k_mo_fsm = {
1739 .name = "OM2000-MO",
1740 .states = om2k_is_states,
1741 .num_states = ARRAY_SIZE(om2k_is_states),
1742 .log_subsys = DNM,
1743 .event_names = om2k_event_names,
1744 .timer_cb = om2k_mo_timer_cb,
1745};
1746
1747struct osmo_fsm_inst *om2k_mo_fsm_start(struct osmo_fsm_inst *parent,
1748 uint32_t term_event,
1749 struct gsm_bts_trx *trx, struct om2k_mo *mo)
1750{
1751 struct osmo_fsm_inst *fi;
1752 struct om2k_mo_fsm_priv *omfp;
1753 char idbuf[64];
1754
1755 snprintf(idbuf, sizeof(idbuf), "%s-%s", parent->id,
1756 om2k_mo_name(&mo->addr));
1757
1758 fi = osmo_fsm_inst_alloc_child_id(&om2k_mo_fsm, parent,
1759 term_event, idbuf);
1760 if (!fi)
1761 return NULL;
1762
1763 mo->fsm = fi;
1764 omfp = talloc_zero(fi, struct om2k_mo_fsm_priv);
1765 omfp->mo = mo;
1766 omfp->trx = trx;
1767 fi->priv = omfp;
1768
1769 osmo_fsm_inst_dispatch(fi, OM2K_MO_EVT_START, NULL);
1770
1771 return fi;
1772}
1773
1774int om2k_mo_fsm_recvmsg(struct gsm_bts *bts, struct om2k_mo *mo,
1775 struct om2k_decoded_msg *odm)
1776{
1777 switch (odm->msg_type) {
1778 case OM2K_MSGT_CONNECT_COMPL:
1779 case OM2K_MSGT_CONNECT_REJ:
1780 osmo_fsm_inst_dispatch(mo->fsm,
1781 OM2K_MO_EVT_RX_CONN_COMPL, odm);
1782 break;
1783
1784 case OM2K_MSGT_RESET_COMPL:
1785 case OM2K_MSGT_RESET_REJ:
1786 osmo_fsm_inst_dispatch(mo->fsm,
1787 OM2K_MO_EVT_RX_RESET_COMPL, odm);
1788 break;
1789
1790 case OM2K_MSGT_START_REQ_ACK:
1791 case OM2K_MSGT_START_REQ_REJ:
1792 osmo_fsm_inst_dispatch(mo->fsm,
1793 OM2K_MO_EVT_RX_START_REQ_ACCEPT, odm);
1794 break;
1795
1796 case OM2K_MSGT_START_RES:
1797 osmo_fsm_inst_dispatch(mo->fsm,
1798 OM2K_MO_EVT_RX_START_RES, odm);
1799 break;
1800
1801 case OM2K_MSGT_CON_CONF_REQ_ACK:
1802 case OM2K_MSGT_IS_CONF_REQ_ACK:
1803 case OM2K_MSGT_RX_CONF_REQ_ACK:
1804 case OM2K_MSGT_TF_CONF_REQ_ACK:
1805 case OM2K_MSGT_TS_CONF_REQ_ACK:
1806 case OM2K_MSGT_TX_CONF_REQ_ACK:
1807 osmo_fsm_inst_dispatch(mo->fsm,
1808 OM2K_MO_EVT_RX_CFG_REQ_ACCEPT, odm);
1809 break;
1810
1811 case OM2K_MSGT_CON_CONF_RES:
1812 case OM2K_MSGT_IS_CONF_RES:
1813 case OM2K_MSGT_RX_CONF_RES:
1814 case OM2K_MSGT_TF_CONF_RES:
1815 case OM2K_MSGT_TS_CONF_RES:
1816 case OM2K_MSGT_TX_CONF_RES:
1817 osmo_fsm_inst_dispatch(mo->fsm,
1818 OM2K_MO_EVT_RX_CFG_RES, odm);
1819 break;
1820
1821 case OM2K_MSGT_ENABLE_REQ_ACK:
1822 case OM2K_MSGT_ENABLE_REQ_REJ:
1823 osmo_fsm_inst_dispatch(mo->fsm,
1824 OM2K_MO_EVT_RX_ENA_REQ_ACCEPT, odm);
1825 break;
1826 case OM2K_MSGT_ENABLE_RES:
1827 osmo_fsm_inst_dispatch(mo->fsm,
1828 OM2K_MO_EVT_RX_ENA_RES, odm);
1829 break;
1830
1831 case OM2K_MSGT_OP_INFO_ACK:
1832 case OM2K_MSGT_OP_INFO_REJ:
1833 osmo_fsm_inst_dispatch(mo->fsm,
1834 OM2K_MO_EVT_RX_OPINFO_ACC, odm);
1835 break;
1836 default:
1837 return -1;
1838 }
1839
1840 return 0;
1841}
1842
1843/***********************************************************************
1844 * OM2000 TRX Finite State Machine, initializes TRXC and all siblings
1845 ***********************************************************************/
1846
1847enum om2k_trx_event {
1848 OM2K_TRX_EVT_START,
1849 OM2K_TRX_EVT_TRXC_DONE,
1850 OM2K_TRX_EVT_TX_DONE,
1851 OM2K_TRX_EVT_RX_DONE,
1852 OM2K_TRX_EVT_TS_DONE,
1853 OM2K_TRX_EVT_STOP,
1854};
1855
1856static struct value_string om2k_trx_events[] = {
1857 { OM2K_TRX_EVT_START, "START" },
1858 { OM2K_TRX_EVT_TRXC_DONE, "TRXC-DONE" },
1859 { OM2K_TRX_EVT_TX_DONE, "TX-DONE" },
1860 { OM2K_TRX_EVT_RX_DONE, "RX-DONE" },
1861 { OM2K_TRX_EVT_TS_DONE, "TS-DONE" },
1862 { OM2K_TRX_EVT_STOP, "STOP" },
1863 { 0, NULL }
1864};
1865
1866enum om2k_trx_state {
1867 OM2K_TRX_S_INIT,
1868 OM2K_TRX_S_WAIT_TRXC,
1869 OM2K_TRX_S_WAIT_TX,
1870 OM2K_TRX_S_WAIT_RX,
1871 OM2K_TRX_S_WAIT_TS,
1872 OM2K_TRX_S_DONE,
1873 OM2K_TRX_S_ERROR
1874};
1875
1876struct om2k_trx_fsm_priv {
1877 struct gsm_bts_trx *trx;
1878 uint8_t next_ts_nr;
1879};
1880
1881static void om2k_trx_s_init(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1882{
1883 struct om2k_trx_fsm_priv *otfp = fi->priv;
1884
1885 /* First initialize TRXC */
1886 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TRXC,
1887 TRX_FSM_TIMEOUT, 0);
1888 om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TRXC_DONE, otfp->trx,
1889 &otfp->trx->rbs2000.trxc.om2k_mo);
1890}
1891
1892static void om2k_trx_s_wait_trxc(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1893{
1894 struct om2k_trx_fsm_priv *otfp = fi->priv;
1895
1896 /* Initialize TX after TRXC */
1897 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TX,
1898 TRX_FSM_TIMEOUT, 0);
1899 om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TX_DONE, otfp->trx,
1900 &otfp->trx->rbs2000.tx.om2k_mo);
1901}
1902
1903static void om2k_trx_s_wait_tx(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1904{
1905 struct om2k_trx_fsm_priv *otfp = fi->priv;
1906
1907 /* Initialize RX after TX */
1908 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_RX,
1909 TRX_FSM_TIMEOUT, 0);
1910 om2k_mo_fsm_start(fi, OM2K_TRX_EVT_RX_DONE, otfp->trx,
1911 &otfp->trx->rbs2000.rx.om2k_mo);
1912}
1913
1914static void om2k_trx_s_wait_rx(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1915{
1916 struct om2k_trx_fsm_priv *otfp = fi->priv;
1917 struct gsm_bts_trx_ts *ts;
1918
1919 /* Initialize Timeslots after TX */
1920 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_WAIT_TS,
1921 TRX_FSM_TIMEOUT, 0);
1922 otfp->next_ts_nr = 0;
1923 ts = &otfp->trx->ts[otfp->next_ts_nr++];
1924 om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TS_DONE, otfp->trx,
1925 &ts->rbs2000.om2k_mo);
1926}
1927
1928static void om2k_trx_s_wait_ts(struct osmo_fsm_inst *fi, uint32_t event, void *data)
1929{
1930 struct om2k_trx_fsm_priv *otfp = fi->priv;
1931 struct gsm_bts_trx_ts *ts;
1932
1933 if (otfp->next_ts_nr < 8) {
1934 /* iterate to the next timeslot */
1935 ts = &otfp->trx->ts[otfp->next_ts_nr++];
1936 om2k_mo_fsm_start(fi, OM2K_TRX_EVT_TS_DONE, otfp->trx,
1937 &ts->rbs2000.om2k_mo);
1938 } else {
1939 /* only after all 8 TS */
1940 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_DONE, 0, 0);
1941 }
1942}
1943
1944static void om2k_trx_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state)
1945{
1946 struct om2k_trx_fsm_priv *otfp = fi->priv;
1947 gsm_bts_trx_set_system_infos(otfp->trx);
1948 osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL);
1949}
1950
1951static const struct osmo_fsm_state om2k_trx_states[] = {
1952 [OM2K_TRX_S_INIT] = {
1953 .in_event_mask = S(OM2K_TRX_EVT_START),
1954 .out_state_mask = S(OM2K_TRX_S_WAIT_TRXC),
1955 .name = "INIT",
1956 .action = om2k_trx_s_init,
1957 },
1958 [OM2K_TRX_S_WAIT_TRXC] = {
1959 .in_event_mask = S(OM2K_TRX_EVT_TRXC_DONE),
1960 .out_state_mask = S(OM2K_TRX_S_ERROR) |
1961 S(OM2K_TRX_S_WAIT_TX),
1962 .name = "WAIT-TRXC",
1963 .action = om2k_trx_s_wait_trxc,
1964 },
1965 [OM2K_TRX_S_WAIT_TX] = {
1966 .in_event_mask = S(OM2K_TRX_EVT_TX_DONE),
1967 .out_state_mask = S(OM2K_TRX_S_ERROR) |
1968 S(OM2K_TRX_S_WAIT_RX),
1969 .name = "WAIT-TX",
1970 .action = om2k_trx_s_wait_tx,
1971 },
1972 [OM2K_TRX_S_WAIT_RX] = {
1973 .in_event_mask = S(OM2K_TRX_EVT_RX_DONE),
1974 .out_state_mask = S(OM2K_TRX_S_ERROR) |
1975 S(OM2K_TRX_S_WAIT_TS),
1976 .name = "WAIT-RX",
1977 .action = om2k_trx_s_wait_rx,
1978 },
1979 [OM2K_TRX_S_WAIT_TS] = {
1980 .in_event_mask = S(OM2K_TRX_EVT_TS_DONE),
1981 .out_state_mask = S(OM2K_TRX_S_ERROR) |
1982 S(OM2K_TRX_S_DONE),
1983 .name = "WAIT-TS",
1984 .action = om2k_trx_s_wait_ts,
1985 },
1986 [OM2K_TRX_S_DONE] = {
1987 .name = "DONE",
1988 .onenter = om2k_trx_s_done_onenter,
1989 },
1990 [OM2K_TRX_S_ERROR] = {
1991 .name = "ERROR",
1992 },
1993};
1994
1995static int om2k_trx_timer_cb(struct osmo_fsm_inst *fi)
1996{
1997 osmo_fsm_inst_state_chg(fi, OM2K_TRX_S_ERROR, 0, 0);
1998 return 0;
1999}
2000
2001static struct osmo_fsm om2k_trx_fsm = {
2002 .name = "OM2000-TRX",
2003 .states = om2k_trx_states,
2004 .num_states = ARRAY_SIZE(om2k_trx_states),
2005 .log_subsys = DNM,
2006 .event_names = om2k_trx_events,
2007 .timer_cb = om2k_trx_timer_cb,
2008};
2009
2010struct osmo_fsm_inst *om2k_trx_fsm_start(struct osmo_fsm_inst *parent,
2011 struct gsm_bts_trx *trx,
2012 uint32_t term_event)
2013{
2014 struct osmo_fsm_inst *fi;
2015 struct om2k_trx_fsm_priv *otfp;
2016 char idbuf[32];
2017
2018 snprintf(idbuf, sizeof(idbuf), "%u/%u", trx->bts->nr, trx->nr);
2019
2020 fi = osmo_fsm_inst_alloc_child_id(&om2k_trx_fsm, parent, term_event,
2021 idbuf);
2022 if (!fi)
2023 return NULL;
2024
2025 otfp = talloc_zero(fi, struct om2k_trx_fsm_priv);
2026 otfp->trx = trx;
2027 fi->priv = otfp;
2028
2029 osmo_fsm_inst_dispatch(fi, OM2K_TRX_EVT_START, NULL);
2030
2031 return fi;
2032}
2033
2034
2035/***********************************************************************
2036 * OM2000 BTS Finite State Machine, initializes CF and all siblings
2037 ***********************************************************************/
2038
2039enum om2k_bts_event {
2040 OM2K_BTS_EVT_START,
2041 OM2K_BTS_EVT_CF_DONE,
2042 OM2K_BTS_EVT_IS_DONE,
2043 OM2K_BTS_EVT_TF_DONE,
2044 OM2K_BTS_EVT_TRX_DONE,
2045 OM2K_BTS_EVT_STOP,
2046};
2047
2048static const struct value_string om2k_bts_events[] = {
2049 { OM2K_BTS_EVT_START, "START" },
2050 { OM2K_BTS_EVT_CF_DONE, "CF-DONE" },
2051 { OM2K_BTS_EVT_IS_DONE, "IS-DONE" },
2052 { OM2K_BTS_EVT_TF_DONE, "TF-DONE" },
2053 { OM2K_BTS_EVT_TRX_DONE, "TRX-DONE" },
2054 { OM2K_BTS_EVT_STOP, "STOP" },
2055 { 0, NULL }
2056};
2057
2058enum om2k_bts_state {
2059 OM2K_BTS_S_INIT,
2060 OM2K_BTS_S_WAIT_CF,
2061 OM2K_BTS_S_WAIT_IS,
2062 OM2K_BTS_S_WAIT_TF,
2063 OM2K_BTS_S_WAIT_TRX,
2064 OM2K_BTS_S_DONE,
2065 OM2K_BTS_S_ERROR,
2066};
2067
2068struct om2k_bts_fsm_priv {
2069 struct gsm_bts *bts;
2070 uint8_t next_trx_nr;
2071};
2072
2073static void om2k_bts_s_init(struct osmo_fsm_inst *fi, uint32_t event, void *data)
2074{
2075 struct om2k_bts_fsm_priv *obfp = fi->priv;
2076 struct gsm_bts *bts = obfp->bts;
2077
2078 OSMO_ASSERT(event == OM2K_BTS_EVT_START);
2079 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_CF,
2080 BTS_FSM_TIMEOUT, 0);
2081 om2k_mo_fsm_start(fi, OM2K_BTS_EVT_CF_DONE, bts->c0,
2082 &bts->rbs2000.cf.om2k_mo);
2083}
2084
2085static void om2k_bts_s_wait_cf(struct osmo_fsm_inst *fi, uint32_t event, void *data)
2086{
2087 struct om2k_bts_fsm_priv *obfp = fi->priv;
2088 struct gsm_bts *bts = obfp->bts;
2089
2090 OSMO_ASSERT(event == OM2K_BTS_EVT_CF_DONE);
2091 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_IS,
2092 BTS_FSM_TIMEOUT, 0);
2093 om2k_mo_fsm_start(fi, OM2K_BTS_EVT_IS_DONE, bts->c0,
2094 &bts->rbs2000.is.om2k_mo);
2095}
2096
2097static void om2k_bts_s_wait_is(struct osmo_fsm_inst *fi, uint32_t event, void *data)
2098{
2099 struct om2k_bts_fsm_priv *obfp = fi->priv;
2100 struct gsm_bts *bts = obfp->bts;
2101
2102 OSMO_ASSERT(event == OM2K_BTS_EVT_IS_DONE);
2103 /* TF can take a long time to initialize, wait for 10min */
2104 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_TF, 600, 0);
2105 om2k_mo_fsm_start(fi, OM2K_BTS_EVT_TF_DONE, bts->c0,
2106 &bts->rbs2000.tf.om2k_mo);
2107}
2108
2109static void om2k_bts_s_wait_tf(struct osmo_fsm_inst *fi, uint32_t event, void *data)
2110{
2111 struct om2k_bts_fsm_priv *obfp = fi->priv;
2112 struct gsm_bts_trx *trx;
2113
2114 OSMO_ASSERT(event == OM2K_BTS_EVT_TF_DONE);
2115
2116 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_WAIT_TRX,
2117 BTS_FSM_TIMEOUT, 0);
2118 obfp->next_trx_nr = 0;
2119 trx = gsm_bts_trx_num(obfp->bts, obfp->next_trx_nr++);
2120 om2k_trx_fsm_start(fi, trx, OM2K_BTS_EVT_TRX_DONE);
2121}
2122
2123static void om2k_bts_s_wait_trx(struct osmo_fsm_inst *fi, uint32_t event, void *data)
2124{
2125 struct om2k_bts_fsm_priv *obfp = fi->priv;
2126
2127 OSMO_ASSERT(event == OM2K_BTS_EVT_TRX_DONE);
2128
2129 if (obfp->next_trx_nr < obfp->bts->num_trx) {
2130 struct gsm_bts_trx *trx;
2131 trx = gsm_bts_trx_num(obfp->bts, obfp->next_trx_nr++);
2132 om2k_trx_fsm_start(fi, trx, OM2K_BTS_EVT_TRX_DONE);
2133 } else {
2134 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_DONE, 0, 0);
2135 }
2136}
2137
2138static void om2k_bts_s_done_onenter(struct osmo_fsm_inst *fi, uint32_t prev_state)
2139{
2140 osmo_fsm_inst_term(fi, OSMO_FSM_TERM_REGULAR, NULL);
2141}
2142
2143static const struct osmo_fsm_state om2k_bts_states[] = {
2144 [OM2K_BTS_S_INIT] = {
2145 .in_event_mask = S(OM2K_BTS_EVT_START),
2146 .out_state_mask = S(OM2K_BTS_S_WAIT_CF),
2147 .name = "INIT",
2148 .action = om2k_bts_s_init,
2149 },
2150 [OM2K_BTS_S_WAIT_CF] = {
2151 .in_event_mask = S(OM2K_BTS_EVT_CF_DONE),
2152 .out_state_mask = S(OM2K_BTS_S_ERROR) |
2153 S(OM2K_BTS_S_WAIT_IS),
2154 .name = "WAIT-CF",
2155 .action = om2k_bts_s_wait_cf,
2156 },
2157 [OM2K_BTS_S_WAIT_IS] = {
2158 .in_event_mask = S(OM2K_BTS_EVT_IS_DONE),
2159 .out_state_mask = S(OM2K_BTS_S_ERROR) |
2160 S(OM2K_BTS_S_WAIT_TF),
2161 .name = "WAIT-IS",
2162 .action = om2k_bts_s_wait_is,
2163 },
2164 [OM2K_BTS_S_WAIT_TF] = {
2165 .in_event_mask = S(OM2K_BTS_EVT_TF_DONE),
2166 .out_state_mask = S(OM2K_BTS_S_ERROR) |
2167 S(OM2K_BTS_S_WAIT_TRX),
2168 .name = "WAIT-TF",
2169 .action = om2k_bts_s_wait_tf,
2170 },
2171 [OM2K_BTS_S_WAIT_TRX] = {
2172 .in_event_mask = S(OM2K_BTS_EVT_TRX_DONE),
2173 .out_state_mask = S(OM2K_BTS_S_ERROR) |
2174 S(OM2K_BTS_S_DONE),
2175 .name = "WAIT-TRX",
2176 .action = om2k_bts_s_wait_trx,
2177 },
2178 [OM2K_BTS_S_DONE] = {
2179 .name = "DONE",
2180 .onenter = om2k_bts_s_done_onenter,
2181 },
2182 [OM2K_BTS_S_ERROR] = {
2183 .name = "ERROR",
2184 },
2185};
2186
2187static int om2k_bts_timer_cb(struct osmo_fsm_inst *fi)
2188{
2189 osmo_fsm_inst_state_chg(fi, OM2K_BTS_S_ERROR, 0, 0);
2190 return 0;
2191}
2192
2193static struct osmo_fsm om2k_bts_fsm = {
2194 .name = "OM2000-BTS",
2195 .states = om2k_bts_states,
2196 .num_states = ARRAY_SIZE(om2k_bts_states),
2197 .log_subsys = DNM,
2198 .event_names = om2k_bts_events,
2199 .timer_cb = om2k_bts_timer_cb,
2200};
2201
2202struct osmo_fsm_inst *
2203om2k_bts_fsm_start(struct gsm_bts *bts)
2204{
2205 struct osmo_fsm_inst *fi;
2206 struct om2k_bts_fsm_priv *obfp;
2207 char idbuf[16];
2208
2209 snprintf(idbuf, sizeof(idbuf), "%u", bts->nr);
2210
2211 fi = osmo_fsm_inst_alloc(&om2k_bts_fsm, bts, NULL,
2212 LOGL_DEBUG, idbuf);
2213 if (!fi)
2214 return NULL;
2215 fi->priv = obfp = talloc_zero(fi, struct om2k_bts_fsm_priv);
2216 obfp->bts = bts;
2217
2218 osmo_fsm_inst_dispatch(fi, OM2K_BTS_EVT_START, NULL);
2219
2220 return fi;
2221}
2222
2223
2224/***********************************************************************
2225 * OM2000 Negotiation
2226 ***********************************************************************/
2227
Harald Welte6fec79d2011-02-12 14:57:17 +0100[diff] [blame]2228static int abis_om2k_tx_negot_req_ack(struct gsm_bts *bts, const struct abis_om2k_mo *mo,
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]2229 uint8_t *data, unsigned int len)
2230{
2231 struct msgb *msg = om2k_msgb_alloc();
2232 struct abis_om2k_hdr *o2k;
2233
2234 o2k = (struct abis_om2k_hdr *) msgb_put(msg, sizeof(*o2k));
Harald Welte1164dce2011-03-05 19:21:26 +0100[diff] [blame]2235 fill_om2k_hdr(o2k, mo, OM2K_MSGT_NEGOT_REQ_ACK);
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]2236
2237 msgb_tlv_put(msg, OM2K_DEI_NEGOT_REC2, len, data);
2238
2239 DEBUGP(DNM, "Tx MO=%s %s\n", om2k_mo_name(mo),
2240 get_value_string(om2k_msgcode_vals, OM2K_MSGT_NEGOT_REQ_ACK));
2241
2242 return abis_om2k_sendmsg(bts, msg);
2243}
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2244
Harald Welte563d3162011-02-12 18:11:16 +0100[diff] [blame]2245struct iwd_version {
2246 uint8_t gen_char[3+1];
2247 uint8_t rev_char[3+1];
2248};
2249
2250struct iwd_type {
2251 uint8_t num_vers;
2252 struct iwd_version v[8];
2253};
2254
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2255static int om2k_rx_negot_req(struct msgb *msg)
2256{
Pablo Neira Ayuso7abecfc2011-08-17 22:43:54 +0200[diff] [blame]2257 struct e1inp_sign_link *sign_link = (struct e1inp_sign_link *)msg->dst;
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2258 struct abis_om2k_hdr *o2h = msgb_l2(msg);
Harald Welte563d3162011-02-12 18:11:16 +0100[diff] [blame]2259 struct iwd_type iwd_types[16];
2260 uint8_t num_iwd_types = o2h->data[2];
2261 uint8_t *cur = o2h->data+3;
2262 unsigned int i, v;
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2263
Harald Welte563d3162011-02-12 18:11:16 +0100[diff] [blame]2264 uint8_t out_buf[1024];
2265 uint8_t *out_cur = out_buf+1;
2266 uint8_t out_num_types = 0;
2267
2268 memset(iwd_types, 0, sizeof(iwd_types));
2269
2270 /* Parse the RBS-supported IWD versions into iwd_types array */
2271 for (i = 0; i < num_iwd_types; i++) {
2272 uint8_t num_versions = *cur++;
2273 uint8_t iwd_type = *cur++;
2274
2275 iwd_types[iwd_type].num_vers = num_versions;
2276
2277 for (v = 0; v < num_versions; v++) {
2278 struct iwd_version *iwd_v = &iwd_types[iwd_type].v[v];
2279
2280 memcpy(iwd_v->gen_char, cur, 3);
Harald Welte56ee6b82011-02-12 18:13:37 +0100[diff] [blame]2281 cur += 3;
2282 memcpy(iwd_v->rev_char, cur, 3);
2283 cur += 3;
2284
Harald Welte563d3162011-02-12 18:11:16 +0100[diff] [blame]2285 DEBUGP(DNM, "\tIWD Type %u Gen %s Rev %s\n", iwd_type,
2286 iwd_v->gen_char, iwd_v->rev_char);
2287 }
2288 }
2289
2290 /* Select the last version for each IWD type */
2291 for (i = 0; i < ARRAY_SIZE(iwd_types); i++) {
2292 struct iwd_type *type = &iwd_types[i];
2293 struct iwd_version *last_v;
2294
2295 if (type->num_vers == 0)
2296 continue;
2297
2298 out_num_types++;
2299
2300 last_v = &type->v[type->num_vers-1];
2301
2302 *out_cur++ = i;
2303 memcpy(out_cur, last_v->gen_char, 3);
2304 out_cur += 3;
2305 memcpy(out_cur, last_v->rev_char, 3);
2306 out_cur += 3;
2307 }
2308
2309 out_buf[0] = out_num_types;
2310
Pablo Neira Ayuso7abecfc2011-08-17 22:43:54 +0200[diff] [blame]2311 return abis_om2k_tx_negot_req_ack(sign_link->trx->bts, &o2h->mo, out_buf, out_cur - out_buf);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2312}
2313
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2314
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2315/***********************************************************************
2316 * OM2000 Receive Message Handler
2317 ***********************************************************************/
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2318
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]2319static int om2k_rx_nack(struct msgb *msg)
2320{
2321 struct abis_om2k_hdr *o2h = msgb_l2(msg);
2322 uint16_t msg_type = ntohs(o2h->msg_type);
2323 struct tlv_parsed tp;
2324
2325 LOGP(DNM, LOGL_ERROR, "Rx MO=%s %s", om2k_mo_name(&o2h->mo),
2326 get_value_string(om2k_msgcode_vals, msg_type));
2327
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2328 abis_om2k_msg_tlv_parse(&tp, o2h);
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]2329 if (TLVP_PRESENT(&tp, OM2K_DEI_REASON_CODE))
2330 LOGPC(DNM, LOGL_ERROR, ", Reason 0x%02x",
2331 *TLVP_VAL(&tp, OM2K_DEI_REASON_CODE));
2332
2333 if (TLVP_PRESENT(&tp, OM2K_DEI_RESULT_CODE))
2334 LOGPC(DNM, LOGL_ERROR, ", Result %s",
2335 get_value_string(om2k_result_strings,
2336 *TLVP_VAL(&tp, OM2K_DEI_RESULT_CODE)));
2337 LOGPC(DNM, LOGL_ERROR, "\n");
2338
2339 return 0;
2340}
2341
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2342static int process_mo_state(struct gsm_bts *bts, struct om2k_decoded_msg *odm)
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2343{
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2344 uint8_t mo_state;
2345
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2346 if (!TLVP_PRESENT(&odm->tp, OM2K_DEI_MO_STATE))
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2347 return -EIO;
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2348 mo_state = *TLVP_VAL(&odm->tp, OM2K_DEI_MO_STATE);
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2349
2350 LOGP(DNM, LOGL_DEBUG, "Rx MO=%s %s, MO State: %s\n",
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2351 om2k_mo_name(&odm->o2h.mo),
2352 get_value_string(om2k_msgcode_vals, odm->msg_type),
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2353 get_value_string(om2k_mostate_vals, mo_state));
2354
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2355 update_mo_state(bts, &odm->o2h.mo, mo_state);
Harald Welteaf9b8102011-03-06 21:20:38 +0100[diff] [blame]2356
Harald Weltee898ecc2011-03-06 19:26:11 +0100[diff] [blame]2357 return 0;
2358}
2359
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2360int abis_om2k_rcvmsg(struct msgb *msg)
2361{
Pablo Neira Ayuso7abecfc2011-08-17 22:43:54 +0200[diff] [blame]2362 struct e1inp_sign_link *sign_link = (struct e1inp_sign_link *)msg->dst;
2363 struct gsm_bts *bts = sign_link->trx->bts;
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2364 struct abis_om2k_hdr *o2h = msgb_l2(msg);
2365 struct abis_om_hdr *oh = &o2h->om;
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]2366 uint16_t msg_type = ntohs(o2h->msg_type);
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2367 struct om2k_decoded_msg odm;
2368 struct om2k_mo *mo;
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2369 int rc = 0;
2370
2371 /* Various consistency checks */
2372 if (oh->placement != ABIS_OM_PLACEMENT_ONLY) {
2373 LOGP(DNM, LOGL_ERROR, "ABIS OML placement 0x%x not supported\n",
2374 oh->placement);
2375 if (oh->placement != ABIS_OM_PLACEMENT_FIRST)
2376 return -EINVAL;
2377 }
2378 if (oh->sequence != 0) {
2379 LOGP(DNM, LOGL_ERROR, "ABIS OML sequence 0x%x != 0x00\n",
2380 oh->sequence);
2381 return -EINVAL;
2382 }
2383
2384 msg->l3h = (unsigned char *)o2h + sizeof(*o2h);
2385
2386 if (oh->mdisc != ABIS_OM_MDISC_FOM) {
2387 LOGP(DNM, LOGL_ERROR, "unknown ABIS OM2000 message discriminator 0x%x\n",
2388 oh->mdisc);
2389 return -EINVAL;
2390 }
2391
Harald Welte73541072011-02-12 13:44:14 +0100[diff] [blame]2392 DEBUGP(DNM, "Rx MO=%s %s (%s)\n", om2k_mo_name(&o2h->mo),
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]2393 get_value_string(om2k_msgcode_vals, msg_type),
Pablo Neira Ayusoc0d17f22011-05-07 12:12:48 +0200[diff] [blame]2394 osmo_hexdump(msg->l2h, msgb_l2len(msg)));
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2395
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2396 om2k_decode_msg(&odm, msg);
2397
2398 process_mo_state(bts, &odm);
2399
Harald Weltebc867d92011-02-12 13:09:38 +0100[diff] [blame]2400 switch (msg_type) {
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2401 case OM2K_MSGT_CAL_TIME_REQ:
2402 rc = abis_om2k_cal_time_resp(bts);
2403 break;
2404 case OM2K_MSGT_FAULT_REP:
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2405 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_FAULT_REP_ACK);
2406 break;
2407 case OM2K_MSGT_NEGOT_REQ:
2408 rc = om2k_rx_negot_req(msg);
2409 break;
2410 case OM2K_MSGT_START_RES:
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2411 /* common processing here */
2412 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_START_RES_ACK);
2413 /* below we dispatch into MO */
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2414 break;
2415 case OM2K_MSGT_IS_CONF_RES:
2416 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_IS_CONF_RES_ACK);
2417 break;
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]2418 case OM2K_MSGT_CON_CONF_RES:
2419 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_CON_CONF_RES_ACK);
2420 break;
Harald Weltea0ce3492011-03-05 14:13:14 +0100[diff] [blame]2421 case OM2K_MSGT_TX_CONF_RES:
2422 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TX_CONF_RES_ACK);
2423 break;
2424 case OM2K_MSGT_RX_CONF_RES:
2425 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_RX_CONF_RES_ACK);
2426 break;
2427 case OM2K_MSGT_TS_CONF_RES:
2428 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TS_CONF_RES_ACK);
2429 break;
Harald Weltef9cf9612011-03-05 14:36:47 +0100[diff] [blame]2430 case OM2K_MSGT_TF_CONF_RES:
2431 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TF_CONF_RES_ACK);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2432 break;
Harald Welteb3d70fd2011-02-13 12:43:44 +0100[diff] [blame]2433 case OM2K_MSGT_ENABLE_RES:
2434 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_ENABLE_RES_ACK);
2435 break;
Harald Weltefdb71942011-02-14 15:31:43 +0100[diff] [blame]2436 case OM2K_MSGT_DISABLE_RES:
2437 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_DISABLE_RES_ACK);
2438 break;
2439 case OM2K_MSGT_TEST_RES:
2440 rc = abis_om2k_tx_simple(bts, &o2h->mo, OM2K_MSGT_TEST_RES_ACK);
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2441 break;
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2442 /* ERrors */
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]2443 case OM2K_MSGT_START_REQ_REJ:
Harald Welte3ede7232011-03-05 17:58:13 +0100[diff] [blame]2444 case OM2K_MSGT_CONNECT_REJ:
Harald Welteaff63bc2011-03-05 19:42:16 +0100[diff] [blame]2445 case OM2K_MSGT_OP_INFO_REJ:
Harald Welte3ede7232011-03-05 17:58:13 +0100[diff] [blame]2446 case OM2K_MSGT_DISCONNECT_REJ:
Harald Welteaff63bc2011-03-05 19:42:16 +0100[diff] [blame]2447 case OM2K_MSGT_TEST_REQ_REJ:
Harald Weltee6e83832011-03-05 17:52:09 +0100[diff] [blame]2448 case OM2K_MSGT_CON_CONF_REQ_REJ:
2449 case OM2K_MSGT_IS_CONF_REQ_REJ:
2450 case OM2K_MSGT_TX_CONF_REQ_REJ:
2451 case OM2K_MSGT_RX_CONF_REQ_REJ:
2452 case OM2K_MSGT_TS_CONF_REQ_REJ:
2453 case OM2K_MSGT_TF_CONF_REQ_REJ:
2454 case OM2K_MSGT_ENABLE_REQ_REJ:
2455 case OM2K_MSGT_ALARM_STATUS_REQ_REJ:
2456 case OM2K_MSGT_DISABLE_REQ_REJ:
2457 rc = om2k_rx_nack(msg);
2458 break;
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2459 }
2460
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2461 /* Resolve the MO for this message */
2462 mo = get_om2k_mo(bts, &o2h->mo);
2463 if (!mo) {
2464 LOGP(DNM, LOGL_ERROR, "Couldn't resolve MO for OM2K msg "
2465 "%s: %s\n", get_value_string(om2k_msgcode_vals, msg_type),
2466 msgb_hexdump(msg));
2467 return 0;
2468 }
2469
2470 /* Dispatch message to that MO */
2471 om2k_mo_fsm_recvmsg(bts, mo, &odm);
2472
Harald Welte9a311ec2011-02-12 12:33:06 +0100[diff] [blame]2473 msgb_free(msg);
2474 return rc;
2475}
Harald Welte591e1d72016-07-09 22:20:57 +0200[diff] [blame]2476
2477static void om2k_mo_init(struct om2k_mo *mo, uint8_t class,
2478 uint8_t bts_nr, uint8_t assoc_so, uint8_t inst)
2479{
2480 mo->addr.class = class;
2481 mo->addr.bts = bts_nr;
2482 mo->addr.assoc_so = assoc_so;
2483 mo->addr.inst = inst;
2484}
2485
2486/* initialize the OM2K_MO members of gsm_bts_trx and its timeslots */
2487void abis_om2k_trx_init(struct gsm_bts_trx *trx)
2488{
2489 struct gsm_bts *bts = trx->bts;
2490 unsigned int i;
2491
2492 OSMO_ASSERT(bts->type == GSM_BTS_TYPE_RBS2000);
2493
2494 om2k_mo_init(&trx->rbs2000.trxc.om2k_mo, OM2K_MO_CLS_TRXC,
2495 bts->nr, 255, trx->nr);
2496 om2k_mo_init(&trx->rbs2000.tx.om2k_mo, OM2K_MO_CLS_TX,
2497 bts->nr, 255, trx->nr);
2498 om2k_mo_init(&trx->rbs2000.rx.om2k_mo, OM2K_MO_CLS_RX,
2499 bts->nr, 255, trx->nr);
2500
2501 for (i = 0; i < ARRAY_SIZE(trx->ts); i++) {
2502 om2k_mo_init(&trx->ts[i].rbs2000.om2k_mo, OM2K_MO_CLS_TS,
2503 bts->nr, trx->nr, i);
2504 }
2505}
2506
2507/* initialize the OM2K_MO members of gsm_bts */
2508void abis_om2k_bts_init(struct gsm_bts *bts)
2509{
2510 OSMO_ASSERT(bts->type == GSM_BTS_TYPE_RBS2000);
2511
2512 om2k_mo_init(&bts->rbs2000.cf.om2k_mo, OM2K_MO_CLS_CF,
2513 bts->nr, 0xFF, 0);
2514 om2k_mo_init(&bts->rbs2000.is.om2k_mo, OM2K_MO_CLS_IS,
2515 bts->nr, 0xFF, 0);
2516 om2k_mo_init(&bts->rbs2000.con.om2k_mo, OM2K_MO_CLS_CON,
2517 bts->nr, 0xFF, 0);
2518 om2k_mo_init(&bts->rbs2000.dp.om2k_mo, OM2K_MO_CLS_DP,
2519 bts->nr, 0xFF, 0);
2520 om2k_mo_init(&bts->rbs2000.tf.om2k_mo, OM2K_MO_CLS_TF,
2521 bts->nr, 0xFF, 0);
2522}
2523
2524static __attribute__((constructor)) void abis_om2k_init(void)
2525{
2526 osmo_fsm_register(&om2k_mo_fsm);
2527 osmo_fsm_register(&om2k_bts_fsm);
2528 osmo_fsm_register(&om2k_trx_fsm);
2529}