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Sylvain Munautff0ab3e2020-10-03 20:15:28 +02001/*
2 * capcnt_sb_mac16.v
3 *
4 * Helper to use the SB_MAC16 as simple capture/counter blocks
5 *
6 * vim: ts=4 sw=4
7 *
8 * Copyright (C) 2020 Sylvain Munaut <tnt@246tNt.com>
9 * SPDX-License-Identifier: CERN-OHL-P-2.0
10 */
11
12`default_nettype none
13
14module capcnt16_sb_mac16 (
15 output wire [15:0] cnt_cur,
16 output wire [15:0] cnt_cap,
17 input wire inc,
18 input wire cap,
19 input wire clk,
20 input wire rst
21);
22
23 // TOP = Count
24 // Top unit configured as 16 bit accumulator with fixed carry=1 input.
25 // Most of input/registers are HOLD=1 and forced to reset. The output
26 // register HOLD input is used for conditional increment.
27 //
28 // BOT = Capture
29 // Bottom unit is configured for the output register to do fixed loading
30 // from D input which is wired to the current counter value. HOLD input
31 // used for capture.
32
33 SB_MAC16 #(
34 .NEG_TRIGGER (1'b0),
35 .C_REG (1'b1),
36 .A_REG (1'b1),
37 .B_REG (1'b1),
38 .D_REG (1'b0),
39 .TOP_8x8_MULT_REG (1'b1),
40 .BOT_8x8_MULT_REG (1'b1),
41 .PIPELINE_16x16_MULT_REG1(1'b1),
42 .PIPELINE_16x16_MULT_REG2(1'b1),
43 .TOPOUTPUT_SELECT (2'b01),
44 .TOPADDSUB_LOWERINPUT (2'b00),
45 .TOPADDSUB_UPPERINPUT (1'b0),
46 .TOPADDSUB_CARRYSELECT (2'b01),
47 .BOTOUTPUT_SELECT (2'b01),
48 .BOTADDSUB_LOWERINPUT (2'b00),
49 .BOTADDSUB_UPPERINPUT (1'b0),
50 .BOTADDSUB_CARRYSELECT (2'b00),
51 .MODE_8x8 (1'b1),
52 .A_SIGNED (1'b0),
53 .B_SIGNED (1'b0)
54 ) mac_I (
55 .CLK (clk),
56 .CE (1'b1),
57 .C (16'h0000),
58 .A (16'h0000),
59 .B (16'h0000),
60 .D (cnt_cur),
61 .AHOLD (1'b1),
62 .BHOLD (1'b1),
63 .CHOLD (1'b1),
64 .DHOLD (1'b1),
65 .IRSTTOP (1'b1),
66 .IRSTBOT (1'b1),
67 .ORSTTOP (rst),
68 .ORSTBOT (rst),
69 .OLOADTOP (1'b0),
70 .OLOADBOT (1'b1),
71 .ADDSUBTOP (1'b0),
72 .ADDSUBBOT (1'b0),
73 .OHOLDTOP (~inc),
74 .OHOLDBOT (~cap),
75 .CI (),
76 .ACCUMCI (),
77 .SIGNEXTIN (),
78 .O ({cnt_cur, cnt_cap}),
79 .CO (),
80 .ACCUMCO (),
81 .SIGNEXTOUT ()
82 );
83
84endmodule // capcnt16_sb_mac16
85
86
87module capcnt32_sb_mac16 (
88 output wire [31:0] cnt_cur,
89 output wire [31:0] cnt_cap,
90 input wire inc,
91 input wire cap,
92 input wire clk,
93 input wire rst
94);
95
96 // Counting
97 // --------
98 // Hi/Lo configured as 32 bit accumulator adding a constant carry=1
99 // at every cycle. Most register are held in reset and with HOLD=1.
100 // HOLD input on Output reg used to implement conditional 'increment'.
101
102 SB_MAC16 #(
103 .NEG_TRIGGER (1'b0),
104 .C_REG (1'b1),
105 .A_REG (1'b1),
106 .B_REG (1'b1),
107 .D_REG (1'b1),
108 .TOP_8x8_MULT_REG (1'b1),
109 .BOT_8x8_MULT_REG (1'b1),
110 .PIPELINE_16x16_MULT_REG1(1'b1),
111 .PIPELINE_16x16_MULT_REG2(1'b1),
112 .TOPOUTPUT_SELECT (2'b01),
113 .TOPADDSUB_LOWERINPUT (2'b00),
114 .TOPADDSUB_UPPERINPUT (1'b0),
115 .TOPADDSUB_CARRYSELECT (2'b10),
116 .BOTOUTPUT_SELECT (2'b01),
117 .BOTADDSUB_LOWERINPUT (2'b00),
118 .BOTADDSUB_UPPERINPUT (1'b0),
119 .BOTADDSUB_CARRYSELECT (2'b01),
120 .MODE_8x8 (1'b1),
121 .A_SIGNED (1'b0),
122 .B_SIGNED (1'b0)
123 ) cnt_mac_I (
124 .CLK (clk),
125 .CE (1'b1),
126 .C (16'h0000),
127 .A (16'h0000),
128 .B (16'h0000),
129 .D (16'h0000),
130 .AHOLD (1'b1),
131 .BHOLD (1'b1),
132 .CHOLD (1'b1),
133 .DHOLD (1'b1),
134 .IRSTTOP (1'b1),
135 .IRSTBOT (1'b1),
136 .ORSTTOP (rst),
137 .ORSTBOT (rst),
138 .OLOADTOP (1'b0),
139 .OLOADBOT (1'b0),
140 .ADDSUBTOP (1'b0),
141 .ADDSUBBOT (1'b0),
142 .OHOLDTOP (~inc),
143 .OHOLDBOT (~inc),
144 .CI (),
145 .ACCUMCI (),
146 .SIGNEXTIN (),
147 .O (cnt_cur),
148 .CO (),
149 .ACCUMCO (),
150 .SIGNEXTOUT ()
151 );
152
153
154 // Capture
155 // -------
156 // Output register is used to capture the value.
157 // It's loaded from {C,D} and using HOLD on the output
158 // register to implement capture trigger.
159
160 SB_MAC16 #(
161 .NEG_TRIGGER (1'b0),
162 .C_REG (1'b0),
163 .A_REG (1'b1),
164 .B_REG (1'b1),
165 .D_REG (1'b0),
166 .TOP_8x8_MULT_REG (1'b1),
167 .BOT_8x8_MULT_REG (1'b1),
168 .PIPELINE_16x16_MULT_REG1(1'b1),
169 .PIPELINE_16x16_MULT_REG2(1'b1),
170 .TOPOUTPUT_SELECT (2'b01),
171 .TOPADDSUB_LOWERINPUT (2'b00),
172 .TOPADDSUB_UPPERINPUT (1'b0),
173 .TOPADDSUB_CARRYSELECT (2'b00),
174 .BOTOUTPUT_SELECT (2'b01),
175 .BOTADDSUB_LOWERINPUT (2'b00),
176 .BOTADDSUB_UPPERINPUT (1'b0),
177 .BOTADDSUB_CARRYSELECT (2'b00),
178 .MODE_8x8 (1'b1),
179 .A_SIGNED (1'b0),
180 .B_SIGNED (1'b0)
181 ) cap_mac_I (
182 .CLK (clk),
183 .CE (1'b1),
184 .C (cnt_cur[31:16]),
185 .A (16'h0000),
186 .B (16'h0000),
187 .D (cnt_cur[15:0]),
188 .AHOLD (1'b1),
189 .BHOLD (1'b1),
190 .CHOLD (1'b1),
191 .DHOLD (1'b1),
192 .IRSTTOP (1'b1),
193 .IRSTBOT (1'b1),
194 .ORSTTOP (rst),
195 .ORSTBOT (rst),
196 .OLOADTOP (1'b1),
197 .OLOADBOT (1'b1),
198 .ADDSUBTOP (1'b0),
199 .ADDSUBBOT (1'b0),
200 .OHOLDTOP (~cap),
201 .OHOLDBOT (~cap),
202 .CI (),
203 .ACCUMCI (),
204 .SIGNEXTIN (),
205 .O (cnt_cap),
206 .CO (),
207 .ACCUMCO (),
208 .SIGNEXTOUT ()
209 );
210
211endmodule // capcnt32_sb_mac16