| Harald Welte | a3750db | 2020-09-04 15:13:26 +0200 | [diff] [blame] | 1 | osmo-e1-hardware - Collection of various E1/TDM hardware projects |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 2 | ====================================================================== |
| 3 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 4 | This repository hosts three different sub-projects: |
| 5 | |
| 6 | * osmo-e1-xcvr (E1 LIU + magnetics) |
| 7 | https://osmocom.org/projects/e1-t1-adapter/wiki/Osmo-e1-xcvr |
| 8 | * osmo-e1-tracer (fully integrated passive raw bitstream tracer) |
| 9 | https://osmocom.org/projects/e1-t1-adapter/wiki/E1_tracer |
| 10 | * osmo-e1-tap (passive high-impedance tap) |
| 11 | |
| 12 | == osmo-e1-xcvr == |
| 13 | |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 14 | This is a simple hardware project that aims to generate a reusable module |
| 15 | for interfacing E1/T1/J1 lines from various custom FPGA/CPLD/microcontroller |
| 16 | projects. |
| 17 | |
| 18 | The board contains tranformers, the analog circuitry, the LIU (line interface |
| 19 | unit), an oscillator as well as an integrated transceiver chip. |
| 20 | |
| 21 | It exposes the control interface (SPI) as well as the decoded synchronous |
| 22 | Rx/Tx bitstreams each on a 2x5pin header. |
| 23 | |
| 24 | Framer, Multiplexe,r HDLC decoder or anything like that is out-of-scope for |
| 25 | now. The idea relaly is to provide an interface as low-level as possible. |
| 26 | |
| 27 | One of the ideas is to create a "soft E1" interface, where the Rx/Tx bitstreams |
| 28 | are interfaced with the SSC of an AT91SAM3S and subsequently passed into a PC |
| 29 | via USB. The 2Mbps signal is very low-bandwidth, so that a pure software |
| 30 | implementation should be absolutely no problem for todays computing power. |
| 31 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 32 | See https://osmocom.org/projects/e1-t1-adapter/wiki/Osmo-e1-xcvr for more details |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 33 | |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 34 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 35 | == osmo-e1-tap == |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 36 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 37 | This is a small passive board that allows you to perform high-impedance tracing on an E1 |
| 38 | or T1 line. |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 39 | |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 40 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 41 | == osmo-e1-tracer == |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 42 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 43 | This is a fully integrated design that allows you to obtainm bi-directional high-impedance |
| 44 | bitstream E1 traces. It features an iCE40 FPGA with USB + E1 cores from Sylvain Munaut, |
| 45 | as well as two E1 LIUs. |
| Harald Welte | 2f4c472 | 2011-12-24 00:36:06 +0100 | [diff] [blame] | 46 | |
| Harald Welte | c652b7c | 2020-08-30 17:45:09 +0200 | [diff] [blame] | 47 | See https://osmocom.org/projects/e1-t1-adapter/wiki/E1_tracer for more details. |