blob: ca1698ace509621498b7a125850dc223f1a328b5 [file] [log] [blame]
Sylvain Munautbd83e532020-09-15 22:11:29 +02001# Project config
2PROJ=icE1usb
3
4PROJ_DEPS := no2e1 no2ice40 no2misc no2usb
5PROJ_RTL_SRCS := $(addprefix rtl/, \
6 i2c_master.v \
7 i2c_master_wb.v \
8 led_blinker.v \
9 misc.v \
10 sr_btn_if.v \
11 sysmgr.v \
12)
13PROJ_RTL_SRCS += $(addprefix ../common/rtl/, \
14 dfu_helper.v \
15 picorv32.v \
Sylvain Munautc75f71e2020-10-03 20:01:58 +020016 picorv32_ice40_regs.v \
Sylvain Munautbd83e532020-09-15 22:11:29 +020017 soc_base.v \
18 soc_bram.v \
19 soc_iobuf.v \
20 soc_picorv32_bridge.v \
21 soc_spram.v \
22 wb_arbiter.v \
23 wb_dma.v \
24 wb_epbuf.v \
25)
26PROJ_PREREQ = \
27 $(BUILD_TMP)/boot.hex \
28 $(NULL)
29PROJ_TOP_SRC := rtl/top.v
30PROJ_TOP_MOD := top
31
32# Target config
33BOARD ?= ice1usb
34DEVICE = up5k
35PACKAGE = sg48
36
37YOSYS_SYNTH_ARGS = -dffe_min_ce_use 4
38NEXTPNR_ARGS = --pre-pack data/clocks.py --no-promote-globals --seed 2
39
40# Include default rules
41NO2BUILD_DIR := ../build
42include $(NO2BUILD_DIR)/project-rules.mk
43
44# Custom rules
45../common/fw/boot.hex:
46 make -C ../common/fw boot.hex
47
48$(BUILD_TMP)/boot.hex: ../common/fw/boot.hex
49 cp $< $@