Harald Welte | f74dad7 | 2020-12-15 23:32:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * e1_hw.h |
| 3 | * |
| 4 | * Copyright (C) 2019-2020 Sylvain Munaut <tnt@246tNt.com> |
| 5 | * SPDX-License-Identifier: GPL-3.0-or-later |
| 6 | */ |
| 7 | |
| 8 | #pragma once |
| 9 | |
| 10 | #include <stdint.h> |
| 11 | |
| 12 | //TODO: Should latre go into the no2e1 git repo |
| 13 | |
| 14 | struct e1_chan { |
| 15 | uint32_t csr; |
| 16 | uint32_t bd; |
| 17 | } __attribute__((packed,aligned(4))); |
| 18 | |
| 19 | struct e1_core { |
| 20 | struct e1_chan rx; |
| 21 | struct e1_chan tx; |
| 22 | } __attribute__((packed,aligned(4))); |
| 23 | |
| 24 | /* E1 receiver control register */ |
| 25 | #define E1_RX_CR_ENABLE (1 << 0) /* Enable receiver */ |
| 26 | #define E1_RX_CR_MODE_TRSP (0 << 1) /* Request no alignment at all */ |
| 27 | #define E1_RX_CR_MODE_BYTE (1 << 1) /* Request byte-level alignment */ |
| 28 | #define E1_RX_CR_MODE_BFA (2 << 1) /* Request Basic Frame Alignment */ |
| 29 | #define E1_RX_CR_MODE_MFA (3 << 1) /* Request Multi-Frame Alignment */ |
| 30 | #define E1_RX_CR_OVFL_CLR (1 << 12) /* Clear Rx overflow condition */ |
| 31 | |
| 32 | /* E1 receiver status register */ |
| 33 | #define E1_RX_SR_ENABLED (1 << 0) /* Indicate Rx is enabled */ |
| 34 | #define E1_RX_SR_ALIGNED (1 << 1) /* Indicate Alignment achieved */ |
| 35 | #define E1_RX_SR_BD_IN_EMPTY (1 << 8) |
| 36 | #define E1_RX_SR_BD_IN_FULL (1 << 9) |
| 37 | #define E1_RX_SR_BD_OUT_EMPTY (1 << 10) |
| 38 | #define E1_RX_SR_BD_OUT_FULL (1 << 11) |
| 39 | #define E1_RX_SR_OVFL (1 << 12) /* Indicate Rx overflow */ |
| 40 | |
| 41 | /* E1 transmitter control register */ |
| 42 | #define E1_TX_CR_ENABLE (1 << 0) /* Enable transmitter */ |
| 43 | #define E1_TX_CR_MODE_TRSP (0 << 1) /* Transparent bit-stream mode */ |
| 44 | #define E1_TX_CR_MODE_TS0 (1 << 1) /* Generate TS0 in framer */ |
| 45 | #define E1_TX_CR_MODE_TS0_CRC (2 << 1) /* Generate TS0 + CRC4 in framer */ |
| 46 | #define E1_TX_CR_MODE_TS0_CRC_E (3 << 1) /* Generate TS0 + CRC4 + E-bits (based on Rx) in framer */ |
| 47 | #define E1_TX_CR_TICK_LOCAL (0 << 3) /* use local clock for Tx */ |
| 48 | #define E1_TX_CR_TICK_REMOTE (1 << 3) /* use recovered remote clock for Tx */ |
| 49 | #define E1_TX_CR_ALARM (1 << 4) /* indicate ALARM to remote */ |
| 50 | #define E1_TX_CR_LOOPBACK (1 << 5) /* external loopback enable/diasble */ |
| 51 | #define E1_TX_CR_LOOPBACK_CROSS (1 << 6) /* source of loopback: local (0) or other (1) port */ |
| 52 | #define E1_TX_CR_UNFL_CLR (1 << 12) /* Clear Tx underflow condition */ |
| 53 | |
| 54 | /* E1 transmitter status register */ |
| 55 | #define E1_TX_SR_ENABLED (1 << 0) /* Indicate Tx is enabled */ |
| 56 | #define E1_TX_SR_BD_IN_EMPTY (1 << 8) |
| 57 | #define E1_TX_SR_BD_IN_FULL (1 << 9) |
| 58 | #define E1_TX_SR_BD_OUT_EMPTY (1 << 10) |
| 59 | #define E1_TX_SR_BD_OUT_FULL (1 << 11) |
| 60 | #define E1_TX_SR_UNFL (1 << 12) /* Indicate Tx underflow */ |
| 61 | |
| 62 | /* E1 buffer descriptor flags */ |
| 63 | #define E1_BD_VALID (1 << 15) |
| 64 | #define E1_BD_CRC1 (1 << 14) |
| 65 | #define E1_BD_CRC0 (1 << 13) |
| 66 | #define E1_BD_ADDR(x) ((x) & 0x7f) |
| 67 | #define E1_BD_ADDR_MSK 0x7f |
| 68 | #define E1_BD_ADDR_SHFT 0 |