Sylvain Munaut | 21b03ba | 2020-09-14 10:01:45 +0200 | [diff] [blame] | 1 | /* |
| 2 | * soc_spram.v |
| 3 | * |
| 4 | * vim: ts=4 sw=4 |
| 5 | * |
| 6 | * Copyright (C) 2020 Sylvain Munaut <tnt@246tNt.com> |
| 7 | * SPDX-License-Identifier: CERN-OHL-P-2.0 |
| 8 | */ |
| 9 | |
| 10 | `default_nettype none |
| 11 | |
| 12 | module soc_spram #( |
| 13 | parameter integer AW = 14 |
| 14 | )( |
| 15 | input wire [AW-1:0] addr, |
| 16 | output wire [31:0] rdata, |
| 17 | input wire [31:0] wdata, |
| 18 | input wire [ 3:0] wmsk, |
| 19 | input wire we, |
| 20 | input wire clk |
| 21 | ); |
| 22 | |
| 23 | wire [7:0] msk_nibble = { |
| 24 | wmsk[3], wmsk[3], |
| 25 | wmsk[2], wmsk[2], |
| 26 | wmsk[1], wmsk[1], |
| 27 | wmsk[0], wmsk[0] |
| 28 | }; |
| 29 | |
| 30 | ice40_spram_gen #( |
| 31 | .ADDR_WIDTH(AW), |
| 32 | .DATA_WIDTH(32) |
| 33 | ) spram_I ( |
| 34 | .addr(addr), |
| 35 | .rd_data(rdata), |
| 36 | .rd_ena(1'b1), |
| 37 | .wr_data(wdata), |
| 38 | .wr_mask(msk_nibble), |
| 39 | .wr_ena(we), |
| 40 | .clk(clk) |
| 41 | ); |
| 42 | |
| 43 | endmodule // soc_spram |