| commit | c75664420505478ce746a471d899e47e4af33512 | [log] [tgz] |
|---|---|---|
| author | Sylvain Munaut <tnt@246tNt.com> | Tue Oct 04 21:34:56 2022 +0200 |
| committer | Sylvain Munaut <tnt@246tNt.com> | Tue Oct 04 21:34:56 2022 +0200 |
| tree | 3f0950fcdff4cc222fbe36f3a1b8ed887b6e1337 | |
| parent | 9b3f2c4a6bd19d3398677a1a5f357984deafd5c2 [diff] |
gateware: no_rw_check fixes to cope with new yosys BRAM inferrence Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Change-Id: Ic27dc22112f6603982126d447689dbe2202039c4
diff --git a/gateware/common/rtl/soc_bram.v b/gateware/common/rtl/soc_bram.v index 72f1d7f..ae8ccc2 100644 --- a/gateware/common/rtl/soc_bram.v +++ b/gateware/common/rtl/soc_bram.v
@@ -21,6 +21,7 @@ input wire clk ); + (* no_rw_check *) reg [31:0] mem [0:(1<<AW)-1]; initial
diff --git a/gateware/cores/no2misc b/gateware/cores/no2misc index f9d1d47..59350da 160000 --- a/gateware/cores/no2misc +++ b/gateware/cores/no2misc
@@ -1 +1 @@ -Subproject commit f9d1d47620ce81e9545287c585a5e8f0873b1661 +Subproject commit 59350da954e78424117ed01c55b5c7a12e524397