Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief Instance description for HMATRIX |
| 5 | * |
| 6 | * Copyright (c) 2018 Microchip Technology Inc. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * SPDX-License-Identifier: Apache-2.0 |
| 13 | * |
| 14 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
| 15 | * not use this file except in compliance with the License. |
| 16 | * You may obtain a copy of the Licence at |
| 17 | * |
| 18 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 19 | * |
| 20 | * Unless required by applicable law or agreed to in writing, software |
| 21 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 22 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 23 | * See the License for the specific language governing permissions and |
| 24 | * limitations under the License. |
| 25 | * |
| 26 | * \asf_license_stop |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #ifndef _SAME54_HMATRIX_INSTANCE_ |
| 31 | #define _SAME54_HMATRIX_INSTANCE_ |
| 32 | |
| 33 | /* ========== Register definition for HMATRIX peripheral ========== */ |
| 34 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| 35 | #define REG_HMATRIX_PRAS0 (0x4100C080) /**< \brief (HMATRIX) Priority A for Slave 0 */ |
| 36 | #define REG_HMATRIX_PRBS0 (0x4100C084) /**< \brief (HMATRIX) Priority B for Slave 0 */ |
| 37 | #define REG_HMATRIX_PRAS1 (0x4100C088) /**< \brief (HMATRIX) Priority A for Slave 1 */ |
| 38 | #define REG_HMATRIX_PRBS1 (0x4100C08C) /**< \brief (HMATRIX) Priority B for Slave 1 */ |
| 39 | #define REG_HMATRIX_PRAS2 (0x4100C090) /**< \brief (HMATRIX) Priority A for Slave 2 */ |
| 40 | #define REG_HMATRIX_PRBS2 (0x4100C094) /**< \brief (HMATRIX) Priority B for Slave 2 */ |
| 41 | #define REG_HMATRIX_PRAS3 (0x4100C098) /**< \brief (HMATRIX) Priority A for Slave 3 */ |
| 42 | #define REG_HMATRIX_PRBS3 (0x4100C09C) /**< \brief (HMATRIX) Priority B for Slave 3 */ |
| 43 | #define REG_HMATRIX_PRAS4 (0x4100C0A0) /**< \brief (HMATRIX) Priority A for Slave 4 */ |
| 44 | #define REG_HMATRIX_PRBS4 (0x4100C0A4) /**< \brief (HMATRIX) Priority B for Slave 4 */ |
| 45 | #define REG_HMATRIX_PRAS5 (0x4100C0A8) /**< \brief (HMATRIX) Priority A for Slave 5 */ |
| 46 | #define REG_HMATRIX_PRBS5 (0x4100C0AC) /**< \brief (HMATRIX) Priority B for Slave 5 */ |
| 47 | #define REG_HMATRIX_PRAS6 (0x4100C0B0) /**< \brief (HMATRIX) Priority A for Slave 6 */ |
| 48 | #define REG_HMATRIX_PRBS6 (0x4100C0B4) /**< \brief (HMATRIX) Priority B for Slave 6 */ |
| 49 | #define REG_HMATRIX_PRAS7 (0x4100C0B8) /**< \brief (HMATRIX) Priority A for Slave 7 */ |
| 50 | #define REG_HMATRIX_PRBS7 (0x4100C0BC) /**< \brief (HMATRIX) Priority B for Slave 7 */ |
| 51 | #define REG_HMATRIX_PRAS8 (0x4100C0C0) /**< \brief (HMATRIX) Priority A for Slave 8 */ |
| 52 | #define REG_HMATRIX_PRBS8 (0x4100C0C4) /**< \brief (HMATRIX) Priority B for Slave 8 */ |
| 53 | #define REG_HMATRIX_PRAS9 (0x4100C0C8) /**< \brief (HMATRIX) Priority A for Slave 9 */ |
| 54 | #define REG_HMATRIX_PRBS9 (0x4100C0CC) /**< \brief (HMATRIX) Priority B for Slave 9 */ |
| 55 | #define REG_HMATRIX_PRAS10 (0x4100C0D0) /**< \brief (HMATRIX) Priority A for Slave 10 */ |
| 56 | #define REG_HMATRIX_PRBS10 (0x4100C0D4) /**< \brief (HMATRIX) Priority B for Slave 10 */ |
| 57 | #define REG_HMATRIX_PRAS11 (0x4100C0D8) /**< \brief (HMATRIX) Priority A for Slave 11 */ |
| 58 | #define REG_HMATRIX_PRBS11 (0x4100C0DC) /**< \brief (HMATRIX) Priority B for Slave 11 */ |
| 59 | #define REG_HMATRIX_PRAS12 (0x4100C0E0) /**< \brief (HMATRIX) Priority A for Slave 12 */ |
| 60 | #define REG_HMATRIX_PRBS12 (0x4100C0E4) /**< \brief (HMATRIX) Priority B for Slave 12 */ |
| 61 | #define REG_HMATRIX_PRAS13 (0x4100C0E8) /**< \brief (HMATRIX) Priority A for Slave 13 */ |
| 62 | #define REG_HMATRIX_PRBS13 (0x4100C0EC) /**< \brief (HMATRIX) Priority B for Slave 13 */ |
| 63 | #define REG_HMATRIX_PRAS14 (0x4100C0F0) /**< \brief (HMATRIX) Priority A for Slave 14 */ |
| 64 | #define REG_HMATRIX_PRBS14 (0x4100C0F4) /**< \brief (HMATRIX) Priority B for Slave 14 */ |
| 65 | #define REG_HMATRIX_PRAS15 (0x4100C0F8) /**< \brief (HMATRIX) Priority A for Slave 15 */ |
| 66 | #define REG_HMATRIX_PRBS15 (0x4100C0FC) /**< \brief (HMATRIX) Priority B for Slave 15 */ |
| 67 | #else |
| 68 | #define REG_HMATRIX_PRAS0 (*(RwReg *)0x4100C080UL) /**< \brief (HMATRIX) Priority A for Slave 0 */ |
| 69 | #define REG_HMATRIX_PRBS0 (*(RwReg *)0x4100C084UL) /**< \brief (HMATRIX) Priority B for Slave 0 */ |
| 70 | #define REG_HMATRIX_PRAS1 (*(RwReg *)0x4100C088UL) /**< \brief (HMATRIX) Priority A for Slave 1 */ |
| 71 | #define REG_HMATRIX_PRBS1 (*(RwReg *)0x4100C08CUL) /**< \brief (HMATRIX) Priority B for Slave 1 */ |
| 72 | #define REG_HMATRIX_PRAS2 (*(RwReg *)0x4100C090UL) /**< \brief (HMATRIX) Priority A for Slave 2 */ |
| 73 | #define REG_HMATRIX_PRBS2 (*(RwReg *)0x4100C094UL) /**< \brief (HMATRIX) Priority B for Slave 2 */ |
| 74 | #define REG_HMATRIX_PRAS3 (*(RwReg *)0x4100C098UL) /**< \brief (HMATRIX) Priority A for Slave 3 */ |
| 75 | #define REG_HMATRIX_PRBS3 (*(RwReg *)0x4100C09CUL) /**< \brief (HMATRIX) Priority B for Slave 3 */ |
| 76 | #define REG_HMATRIX_PRAS4 (*(RwReg *)0x4100C0A0UL) /**< \brief (HMATRIX) Priority A for Slave 4 */ |
| 77 | #define REG_HMATRIX_PRBS4 (*(RwReg *)0x4100C0A4UL) /**< \brief (HMATRIX) Priority B for Slave 4 */ |
| 78 | #define REG_HMATRIX_PRAS5 (*(RwReg *)0x4100C0A8UL) /**< \brief (HMATRIX) Priority A for Slave 5 */ |
| 79 | #define REG_HMATRIX_PRBS5 (*(RwReg *)0x4100C0ACUL) /**< \brief (HMATRIX) Priority B for Slave 5 */ |
| 80 | #define REG_HMATRIX_PRAS6 (*(RwReg *)0x4100C0B0UL) /**< \brief (HMATRIX) Priority A for Slave 6 */ |
| 81 | #define REG_HMATRIX_PRBS6 (*(RwReg *)0x4100C0B4UL) /**< \brief (HMATRIX) Priority B for Slave 6 */ |
| 82 | #define REG_HMATRIX_PRAS7 (*(RwReg *)0x4100C0B8UL) /**< \brief (HMATRIX) Priority A for Slave 7 */ |
| 83 | #define REG_HMATRIX_PRBS7 (*(RwReg *)0x4100C0BCUL) /**< \brief (HMATRIX) Priority B for Slave 7 */ |
| 84 | #define REG_HMATRIX_PRAS8 (*(RwReg *)0x4100C0C0UL) /**< \brief (HMATRIX) Priority A for Slave 8 */ |
| 85 | #define REG_HMATRIX_PRBS8 (*(RwReg *)0x4100C0C4UL) /**< \brief (HMATRIX) Priority B for Slave 8 */ |
| 86 | #define REG_HMATRIX_PRAS9 (*(RwReg *)0x4100C0C8UL) /**< \brief (HMATRIX) Priority A for Slave 9 */ |
| 87 | #define REG_HMATRIX_PRBS9 (*(RwReg *)0x4100C0CCUL) /**< \brief (HMATRIX) Priority B for Slave 9 */ |
| 88 | #define REG_HMATRIX_PRAS10 (*(RwReg *)0x4100C0D0UL) /**< \brief (HMATRIX) Priority A for Slave 10 */ |
| 89 | #define REG_HMATRIX_PRBS10 (*(RwReg *)0x4100C0D4UL) /**< \brief (HMATRIX) Priority B for Slave 10 */ |
| 90 | #define REG_HMATRIX_PRAS11 (*(RwReg *)0x4100C0D8UL) /**< \brief (HMATRIX) Priority A for Slave 11 */ |
| 91 | #define REG_HMATRIX_PRBS11 (*(RwReg *)0x4100C0DCUL) /**< \brief (HMATRIX) Priority B for Slave 11 */ |
| 92 | #define REG_HMATRIX_PRAS12 (*(RwReg *)0x4100C0E0UL) /**< \brief (HMATRIX) Priority A for Slave 12 */ |
| 93 | #define REG_HMATRIX_PRBS12 (*(RwReg *)0x4100C0E4UL) /**< \brief (HMATRIX) Priority B for Slave 12 */ |
| 94 | #define REG_HMATRIX_PRAS13 (*(RwReg *)0x4100C0E8UL) /**< \brief (HMATRIX) Priority A for Slave 13 */ |
| 95 | #define REG_HMATRIX_PRBS13 (*(RwReg *)0x4100C0ECUL) /**< \brief (HMATRIX) Priority B for Slave 13 */ |
| 96 | #define REG_HMATRIX_PRAS14 (*(RwReg *)0x4100C0F0UL) /**< \brief (HMATRIX) Priority A for Slave 14 */ |
| 97 | #define REG_HMATRIX_PRBS14 (*(RwReg *)0x4100C0F4UL) /**< \brief (HMATRIX) Priority B for Slave 14 */ |
| 98 | #define REG_HMATRIX_PRAS15 (*(RwReg *)0x4100C0F8UL) /**< \brief (HMATRIX) Priority A for Slave 15 */ |
| 99 | #define REG_HMATRIX_PRBS15 (*(RwReg *)0x4100C0FCUL) /**< \brief (HMATRIX) Priority B for Slave 15 */ |
| 100 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| 101 | |
| 102 | /* ========== Instance parameters for HMATRIX peripheral ========== */ |
| 103 | #define HMATRIX_CLK_AHB_ID 5 // Index of AHB Clock in MCLK.AHBMASK register (MASK may be tied to 1 depending on chip integration) |
| 104 | #define HMATRIX_DEFINED |
| 105 | /* ========== Instance parameters for HMATRIX ========== */ |
| 106 | #define HMATRIX_SLAVE_FLASH 0 |
| 107 | #define HMATRIX_SLAVE_FLASH_ALT 1 |
| 108 | #define HMATRIX_SLAVE_SEEPROM 2 |
| 109 | #define HMATRIX_SLAVE_RAMCM4S 3 |
| 110 | #define HMATRIX_SLAVE_RAMPPPDSU 4 |
| 111 | #define HMATRIX_SLAVE_RAMDMAWR 5 |
| 112 | #define HMATRIX_SLAVE_RAMDMACICM 6 |
| 113 | #define HMATRIX_SLAVE_HPB0 7 |
| 114 | #define HMATRIX_SLAVE_HPB1 8 |
| 115 | #define HMATRIX_SLAVE_HPB2 9 |
| 116 | #define HMATRIX_SLAVE_HPB3 10 |
| 117 | #define HMATRIX_SLAVE_SDHC0 12 |
| 118 | #define HMATRIX_SLAVE_SDHC1 13 |
| 119 | #define HMATRIX_SLAVE_QSPI 14 |
| 120 | #define HMATRIX_SLAVE_BKUPRAM 15 |
| 121 | #define HMATRIX_SLAVE_NUM 16 |
| 122 | |
| 123 | #define HMATRIX_MASTER_CM4_S 0 |
| 124 | #define HMATRIX_MASTER_CMCC 1 |
| 125 | #define HMATRIX_MASTER_PICOP_MEM 2 |
| 126 | #define HMATRIX_MASTER_PICOP_IO 3 |
| 127 | #define HMATRIX_MASTER_DMAC_DTWR 4 |
| 128 | #define HMATRIX_MASTER_DMAC_DTRD 5 |
| 129 | #define HMATRIX_MASTER_ICM 6 |
| 130 | #define HMATRIX_MASTER_DSU 7 |
| 131 | #define HMATRIX_MASTER_NUM 8 |
| 132 | |
| 133 | #endif /* _SAME54_HMATRIX_INSTANCE_ */ |