blob: d198cf22aa716051cd9405d3c4146108ecfcfa0f [file] [log] [blame]
Kévin Redonf0411362019-06-06 17:42:44 +02001/**
2 * \file
3 *
4 * \brief Instance description for TRNG
5 *
6 * Copyright (c) 2019 Microchip Technology Inc.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * SPDX-License-Identifier: Apache-2.0
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License"); you may
15 * not use this file except in compliance with the License.
16 * You may obtain a copy of the Licence at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 * \asf_license_stop
27 *
28 */
29
30#ifndef _SAME54_TRNG_INSTANCE_
31#define _SAME54_TRNG_INSTANCE_
32
33/* ========== Register definition for TRNG peripheral ========== */
34#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35#define REG_TRNG_CTRLA (0x42002800) /**< \brief (TRNG) Control A */
36#define REG_TRNG_EVCTRL (0x42002804) /**< \brief (TRNG) Event Control */
37#define REG_TRNG_INTENCLR (0x42002808) /**< \brief (TRNG) Interrupt Enable Clear */
38#define REG_TRNG_INTENSET (0x42002809) /**< \brief (TRNG) Interrupt Enable Set */
39#define REG_TRNG_INTFLAG (0x4200280A) /**< \brief (TRNG) Interrupt Flag Status and Clear */
40#define REG_TRNG_DATA (0x42002820) /**< \brief (TRNG) Output Data */
41#else
42#define REG_TRNG_CTRLA (*(RwReg8 *)0x42002800UL) /**< \brief (TRNG) Control A */
43#define REG_TRNG_EVCTRL (*(RwReg8 *)0x42002804UL) /**< \brief (TRNG) Event Control */
44#define REG_TRNG_INTENCLR (*(RwReg8 *)0x42002808UL) /**< \brief (TRNG) Interrupt Enable Clear */
45#define REG_TRNG_INTENSET (*(RwReg8 *)0x42002809UL) /**< \brief (TRNG) Interrupt Enable Set */
46#define REG_TRNG_INTFLAG (*(RwReg8 *)0x4200280AUL) /**< \brief (TRNG) Interrupt Flag Status and Clear */
47#define REG_TRNG_DATA (*(RoReg *)0x42002820UL) /**< \brief (TRNG) Output Data */
48#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
49
50
51#endif /* _SAME54_TRNG_INSTANCE_ */