Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief SAM RSTC |
| 5 | * |
| 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * Subject to your compliance with these terms, you may use Microchip |
| 13 | * software and any derivatives exclusively with Microchip products. |
| 14 | * It is your responsibility to comply with third party license terms applicable |
| 15 | * to your use of third party software (including open source software) that |
| 16 | * may accompany Microchip software. |
| 17 | * |
| 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, |
| 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, |
| 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, |
| 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE |
| 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL |
| 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE |
| 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE |
| 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT |
| 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY |
| 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, |
| 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. |
| 29 | * |
| 30 | * \asf_license_stop |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #ifdef _SAME54_RSTC_COMPONENT_ |
| 35 | #ifndef _HRI_RSTC_E54_H_INCLUDED_ |
| 36 | #define _HRI_RSTC_E54_H_INCLUDED_ |
| 37 | |
| 38 | #ifdef __cplusplus |
| 39 | extern "C" { |
| 40 | #endif |
| 41 | |
| 42 | #include <stdbool.h> |
| 43 | #include <hal_atomic.h> |
| 44 | |
| 45 | #if defined(ENABLE_RSTC_CRITICAL_SECTIONS) |
| 46 | #define RSTC_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() |
| 47 | #define RSTC_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() |
| 48 | #else |
| 49 | #define RSTC_CRITICAL_SECTION_ENTER() |
| 50 | #define RSTC_CRITICAL_SECTION_LEAVE() |
| 51 | #endif |
| 52 | |
| 53 | typedef uint8_t hri_rstc_bkupexit_reg_t; |
| 54 | typedef uint8_t hri_rstc_rcause_reg_t; |
| 55 | |
| 56 | static inline bool hri_rstc_get_RCAUSE_POR_bit(const void *const hw) |
| 57 | { |
| 58 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_POR) >> RSTC_RCAUSE_POR_Pos; |
| 59 | } |
| 60 | |
| 61 | static inline bool hri_rstc_get_RCAUSE_BODCORE_bit(const void *const hw) |
| 62 | { |
| 63 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_BODCORE) >> RSTC_RCAUSE_BODCORE_Pos; |
| 64 | } |
| 65 | |
| 66 | static inline bool hri_rstc_get_RCAUSE_BODVDD_bit(const void *const hw) |
| 67 | { |
| 68 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_BODVDD) >> RSTC_RCAUSE_BODVDD_Pos; |
| 69 | } |
| 70 | |
| 71 | static inline bool hri_rstc_get_RCAUSE_NVM_bit(const void *const hw) |
| 72 | { |
| 73 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_NVM) >> RSTC_RCAUSE_NVM_Pos; |
| 74 | } |
| 75 | |
| 76 | static inline bool hri_rstc_get_RCAUSE_EXT_bit(const void *const hw) |
| 77 | { |
| 78 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_EXT) >> RSTC_RCAUSE_EXT_Pos; |
| 79 | } |
| 80 | |
| 81 | static inline bool hri_rstc_get_RCAUSE_WDT_bit(const void *const hw) |
| 82 | { |
| 83 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_WDT) >> RSTC_RCAUSE_WDT_Pos; |
| 84 | } |
| 85 | |
| 86 | static inline bool hri_rstc_get_RCAUSE_SYST_bit(const void *const hw) |
| 87 | { |
| 88 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_SYST) >> RSTC_RCAUSE_SYST_Pos; |
| 89 | } |
| 90 | |
| 91 | static inline bool hri_rstc_get_RCAUSE_BACKUP_bit(const void *const hw) |
| 92 | { |
| 93 | return (((Rstc *)hw)->RCAUSE.reg & RSTC_RCAUSE_BACKUP) >> RSTC_RCAUSE_BACKUP_Pos; |
| 94 | } |
| 95 | |
| 96 | static inline hri_rstc_rcause_reg_t hri_rstc_get_RCAUSE_reg(const void *const hw, hri_rstc_rcause_reg_t mask) |
| 97 | { |
| 98 | uint8_t tmp; |
| 99 | tmp = ((Rstc *)hw)->RCAUSE.reg; |
| 100 | tmp &= mask; |
| 101 | return tmp; |
| 102 | } |
| 103 | |
| 104 | static inline hri_rstc_rcause_reg_t hri_rstc_read_RCAUSE_reg(const void *const hw) |
| 105 | { |
| 106 | return ((Rstc *)hw)->RCAUSE.reg; |
| 107 | } |
| 108 | |
| 109 | static inline bool hri_rstc_get_BKUPEXIT_RTC_bit(const void *const hw) |
| 110 | { |
| 111 | return (((Rstc *)hw)->BKUPEXIT.reg & RSTC_BKUPEXIT_RTC) >> RSTC_BKUPEXIT_RTC_Pos; |
| 112 | } |
| 113 | |
| 114 | static inline bool hri_rstc_get_BKUPEXIT_BBPS_bit(const void *const hw) |
| 115 | { |
| 116 | return (((Rstc *)hw)->BKUPEXIT.reg & RSTC_BKUPEXIT_BBPS) >> RSTC_BKUPEXIT_BBPS_Pos; |
| 117 | } |
| 118 | |
| 119 | static inline bool hri_rstc_get_BKUPEXIT_HIB_bit(const void *const hw) |
| 120 | { |
| 121 | return (((Rstc *)hw)->BKUPEXIT.reg & RSTC_BKUPEXIT_HIB) >> RSTC_BKUPEXIT_HIB_Pos; |
| 122 | } |
| 123 | |
| 124 | static inline hri_rstc_bkupexit_reg_t hri_rstc_get_BKUPEXIT_reg(const void *const hw, hri_rstc_bkupexit_reg_t mask) |
| 125 | { |
| 126 | uint8_t tmp; |
| 127 | tmp = ((Rstc *)hw)->BKUPEXIT.reg; |
| 128 | tmp &= mask; |
| 129 | return tmp; |
| 130 | } |
| 131 | |
| 132 | static inline hri_rstc_bkupexit_reg_t hri_rstc_read_BKUPEXIT_reg(const void *const hw) |
| 133 | { |
| 134 | return ((Rstc *)hw)->BKUPEXIT.reg; |
| 135 | } |
| 136 | |
| 137 | #ifdef __cplusplus |
| 138 | } |
| 139 | #endif |
| 140 | |
| 141 | #endif /* _HRI_RSTC_E54_H_INCLUDED */ |
| 142 | #endif /* _SAME54_RSTC_COMPONENT_ */ |