blob: a0c99b9117aa708de4739517eb29181244b90324 [file] [log] [blame]
Kévin Redon69b92d92019-01-24 16:39:20 +01001/**
2 * \file
3 *
4 * \brief Component description for HMATRIXB
5 *
6 * Copyright (c) 2018 Microchip Technology Inc.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * SPDX-License-Identifier: Apache-2.0
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License"); you may
15 * not use this file except in compliance with the License.
16 * You may obtain a copy of the Licence at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 * \asf_license_stop
27 *
28 */
29
30#ifndef _SAME54_HMATRIXB_COMPONENT_
31#define _SAME54_HMATRIXB_COMPONENT_
32
33/* ========================================================================== */
34/** SOFTWARE API DEFINITION FOR HMATRIXB */
35/* ========================================================================== */
36/** \addtogroup SAME54_HMATRIXB HSB Matrix */
37/*@{*/
38
39#define HMATRIXB_I7638
40#define REV_HMATRIXB 0x214
41
42/* -------- HMATRIXB_PRAS : (HMATRIXB Offset: 0x080) (R/W 32) PRS Priority A for Slave -------- */
43#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
44typedef union {
45 uint32_t reg; /*!< Type used for register access */
46} HMATRIXB_PRAS_Type;
47#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
48
49#define HMATRIXB_PRAS_OFFSET 0x080 /**< \brief (HMATRIXB_PRAS offset) Priority A for Slave */
50#define HMATRIXB_PRAS_RESETVALUE _U_(0x00000000) /**< \brief (HMATRIXB_PRAS reset_value) Priority A for Slave */
51
52#define HMATRIXB_PRAS_MASK _U_(0x00000000) /**< \brief (HMATRIXB_PRAS) MASK Register */
53
54/* -------- HMATRIXB_PRBS : (HMATRIXB Offset: 0x084) (R/W 32) PRS Priority B for Slave -------- */
55#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
56typedef union {
57 uint32_t reg; /*!< Type used for register access */
58} HMATRIXB_PRBS_Type;
59#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
60
61#define HMATRIXB_PRBS_OFFSET 0x084 /**< \brief (HMATRIXB_PRBS offset) Priority B for Slave */
62#define HMATRIXB_PRBS_RESETVALUE _U_(0x00000000) /**< \brief (HMATRIXB_PRBS reset_value) Priority B for Slave */
63
64#define HMATRIXB_PRBS_MASK _U_(0x00000000) /**< \brief (HMATRIXB_PRBS) MASK Register */
65
66/** \brief HmatrixbPrs hardware registers */
67#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
68typedef struct {
69 __IO HMATRIXB_PRAS_Type PRAS; /**< \brief Offset: 0x000 (R/W 32) Priority A for Slave */
70 __IO HMATRIXB_PRBS_Type PRBS; /**< \brief Offset: 0x004 (R/W 32) Priority B for Slave */
71} HmatrixbPrs;
72#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
73
74/** \brief HMATRIXB hardware registers */
75#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
76typedef struct {
77 RoReg8 Reserved1[0x80];
78 HmatrixbPrs Prs[16]; /**< \brief Offset: 0x080 HmatrixbPrs groups */
79} Hmatrixb;
80#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
81
82/*@}*/
83
84#endif /* _SAME54_HMATRIXB_COMPONENT_ */