| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief HPL initialization related functionality implementation. |
| 5 | * |
| 6 | * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * Subject to your compliance with these terms, you may use Microchip |
| 13 | * software and any derivatives exclusively with Microchip products. |
| 14 | * It is your responsibility to comply with third party license terms applicable |
| 15 | * to your use of third party software (including open source software) that |
| 16 | * may accompany Microchip software. |
| 17 | * |
| 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, |
| 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, |
| 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, |
| 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE |
| 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL |
| 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE |
| 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE |
| 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT |
| 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY |
| 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, |
| 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. |
| 29 | * |
| 30 | * \asf_license_stop |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #include <hpl_gpio.h> |
| 35 | #include <hpl_init.h> |
| 36 | #include <hpl_gclk_base.h> |
| 37 | #include <hpl_mclk_config.h> |
| 38 | |
| 39 | #include <hpl_dma.h> |
| 40 | #include <hpl_dmac_config.h> |
| 41 | #include <hpl_cmcc_config.h> |
| 42 | #include <hal_cache.h> |
| 43 | |
| 44 | /* Referenced GCLKs (out of 0~11), should be initialized firstly |
| 45 | */ |
| 46 | #define _GCLK_INIT_1ST 0x00000000 |
| 47 | /* Not referenced GCLKs, initialized last */ |
| 48 | #define _GCLK_INIT_LAST 0x00000FFF |
| 49 | |
| 50 | /** |
| 51 | * \brief Initialize the hardware abstraction layer |
| 52 | */ |
| 53 | void _init_chip(void) |
| 54 | { |
| 55 | hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE); |
| 56 | |
| 57 | _osc32kctrl_init_sources(); |
| 58 | _oscctrl_init_sources(); |
| 59 | _mclk_init(); |
| 60 | #if _GCLK_INIT_1ST |
| 61 | _gclk_init_generators_by_fref(_GCLK_INIT_1ST); |
| 62 | #endif |
| 63 | _oscctrl_init_referenced_generators(); |
| 64 | _gclk_init_generators_by_fref(_GCLK_INIT_LAST); |
| 65 | |
| 66 | #if CONF_DMAC_ENABLE |
| 67 | hri_mclk_set_AHBMASK_DMAC_bit(MCLK); |
| 68 | _dma_init(); |
| 69 | #endif |
| 70 | |
| 71 | #if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3) |
| 72 | _port_event_init(); |
| 73 | #endif |
| 74 | |
| 75 | #if CONF_CMCC_ENABLE |
| 76 | cache_init(); |
| 77 | #endif |
| 78 | } |