Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * \file |
| 3 | * |
| 4 | * \brief SAM USB |
| 5 | * |
| 6 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. |
| 7 | * |
| 8 | * \asf_license_start |
| 9 | * |
| 10 | * \page License |
| 11 | * |
| 12 | * Subject to your compliance with these terms, you may use Microchip |
| 13 | * software and any derivatives exclusively with Microchip products. |
| 14 | * It is your responsibility to comply with third party license terms applicable |
| 15 | * to your use of third party software (including open source software) that |
| 16 | * may accompany Microchip software. |
| 17 | * |
| 18 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, |
| 19 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, |
| 20 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, |
| 21 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE |
| 22 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL |
| 23 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE |
| 24 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE |
| 25 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT |
| 26 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY |
| 27 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, |
| 28 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. |
| 29 | * |
| 30 | * \asf_license_stop |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #ifdef _SAME54_USB_COMPONENT_ |
| 35 | #ifndef _HRI_USB_E54_H_INCLUDED_ |
| 36 | #define _HRI_USB_E54_H_INCLUDED_ |
| 37 | |
| 38 | #ifdef __cplusplus |
| 39 | extern "C" { |
| 40 | #endif |
| 41 | |
| 42 | #include <stdbool.h> |
| 43 | #include <hal_atomic.h> |
| 44 | |
| 45 | #if defined(ENABLE_USB_CRITICAL_SECTIONS) |
| 46 | #define USB_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() |
| 47 | #define USB_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() |
| 48 | #else |
| 49 | #define USB_CRITICAL_SECTION_ENTER() |
| 50 | #define USB_CRITICAL_SECTION_LEAVE() |
| 51 | #endif |
| 52 | |
| 53 | typedef uint16_t hri_usb_padcal_reg_t; |
| 54 | typedef uint16_t hri_usbdesc_bank_ctrl_pipe_reg_t; |
| 55 | typedef uint16_t hri_usbdesc_bank_extreg_reg_t; |
| 56 | typedef uint16_t hri_usbdesc_bank_status_pipe_reg_t; |
| 57 | typedef uint16_t hri_usbdescriptordevice_extreg_reg_t; |
| 58 | typedef uint16_t hri_usbdescriptorhost_ctrl_pipe_reg_t; |
| 59 | typedef uint16_t hri_usbdescriptorhost_extreg_reg_t; |
| 60 | typedef uint16_t hri_usbdescriptorhost_status_pipe_reg_t; |
| 61 | typedef uint16_t hri_usbdevice_ctrlb_reg_t; |
| 62 | typedef uint16_t hri_usbdevice_epintsmry_reg_t; |
| 63 | typedef uint16_t hri_usbdevice_fnum_reg_t; |
| 64 | typedef uint16_t hri_usbdevice_intenset_reg_t; |
| 65 | typedef uint16_t hri_usbdevice_intflag_reg_t; |
| 66 | typedef uint16_t hri_usbhost_ctrlb_reg_t; |
| 67 | typedef uint16_t hri_usbhost_fnum_reg_t; |
| 68 | typedef uint16_t hri_usbhost_intenset_reg_t; |
| 69 | typedef uint16_t hri_usbhost_intflag_reg_t; |
| 70 | typedef uint16_t hri_usbhost_pintsmry_reg_t; |
| 71 | typedef uint32_t hri_usb_descadd_reg_t; |
| 72 | typedef uint32_t hri_usbdesc_bank_addr_reg_t; |
| 73 | typedef uint32_t hri_usbdesc_bank_pcksize_reg_t; |
| 74 | typedef uint32_t hri_usbdescriptordevice_addr_reg_t; |
| 75 | typedef uint32_t hri_usbdescriptordevice_pcksize_reg_t; |
| 76 | typedef uint32_t hri_usbdescriptorhost_addr_reg_t; |
| 77 | typedef uint32_t hri_usbdescriptorhost_pcksize_reg_t; |
| 78 | typedef uint8_t hri_usb_ctrla_reg_t; |
| 79 | typedef uint8_t hri_usb_fsmstatus_reg_t; |
| 80 | typedef uint8_t hri_usb_qosctrl_reg_t; |
| 81 | typedef uint8_t hri_usb_syncbusy_reg_t; |
| 82 | typedef uint8_t hri_usbdesc_bank_status_bk_reg_t; |
| 83 | typedef uint8_t hri_usbdescriptordevice_status_bk_reg_t; |
| 84 | typedef uint8_t hri_usbdescriptorhost_status_bk_reg_t; |
| 85 | typedef uint8_t hri_usbdevice_dadd_reg_t; |
| 86 | typedef uint8_t hri_usbdevice_epcfg_reg_t; |
| 87 | typedef uint8_t hri_usbdevice_epintenset_reg_t; |
| 88 | typedef uint8_t hri_usbdevice_epintflag_reg_t; |
| 89 | typedef uint8_t hri_usbdevice_epstatus_reg_t; |
| 90 | typedef uint8_t hri_usbdevice_status_reg_t; |
| 91 | typedef uint8_t hri_usbendpoint_epcfg_reg_t; |
| 92 | typedef uint8_t hri_usbendpoint_epintenset_reg_t; |
| 93 | typedef uint8_t hri_usbendpoint_epintflag_reg_t; |
| 94 | typedef uint8_t hri_usbendpoint_epstatus_reg_t; |
| 95 | typedef uint8_t hri_usbhost_binterval_reg_t; |
| 96 | typedef uint8_t hri_usbhost_flenhigh_reg_t; |
| 97 | typedef uint8_t hri_usbhost_hsofc_reg_t; |
| 98 | typedef uint8_t hri_usbhost_pcfg_reg_t; |
| 99 | typedef uint8_t hri_usbhost_pintenset_reg_t; |
| 100 | typedef uint8_t hri_usbhost_pintflag_reg_t; |
| 101 | typedef uint8_t hri_usbhost_pstatus_reg_t; |
| 102 | typedef uint8_t hri_usbhost_status_reg_t; |
| 103 | typedef uint8_t hri_usbpipe_binterval_reg_t; |
| 104 | typedef uint8_t hri_usbpipe_pcfg_reg_t; |
| 105 | typedef uint8_t hri_usbpipe_pintenset_reg_t; |
| 106 | typedef uint8_t hri_usbpipe_pintflag_reg_t; |
| 107 | typedef uint8_t hri_usbpipe_pstatus_reg_t; |
| 108 | |
| 109 | static inline void hri_usb_wait_for_sync(const void *const hw, hri_usb_syncbusy_reg_t reg) |
| 110 | { |
| 111 | while (((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg) { |
| 112 | }; |
| 113 | } |
| 114 | |
| 115 | static inline bool hri_usb_is_syncing(const void *const hw, hri_usb_syncbusy_reg_t reg) |
| 116 | { |
| 117 | return ((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg; |
| 118 | } |
| 119 | |
| 120 | static inline bool hri_usbpipe_get_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 121 | { |
| 122 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0) |
| 123 | >> USB_HOST_PINTFLAG_TRCPT0_Pos; |
| 124 | } |
| 125 | |
| 126 | static inline void hri_usbpipe_clear_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 127 | { |
| 128 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0; |
| 129 | } |
| 130 | |
| 131 | static inline bool hri_usbpipe_get_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 132 | { |
| 133 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1) |
| 134 | >> USB_HOST_PINTFLAG_TRCPT1_Pos; |
| 135 | } |
| 136 | |
| 137 | static inline void hri_usbpipe_clear_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 138 | { |
| 139 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1; |
| 140 | } |
| 141 | |
| 142 | static inline bool hri_usbpipe_get_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 143 | { |
| 144 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL) |
| 145 | >> USB_HOST_PINTFLAG_TRFAIL_Pos; |
| 146 | } |
| 147 | |
| 148 | static inline void hri_usbpipe_clear_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 149 | { |
| 150 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL; |
| 151 | } |
| 152 | |
| 153 | static inline bool hri_usbpipe_get_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 154 | { |
| 155 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR) |
| 156 | >> USB_HOST_PINTFLAG_PERR_Pos; |
| 157 | } |
| 158 | |
| 159 | static inline void hri_usbpipe_clear_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 160 | { |
| 161 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR; |
| 162 | } |
| 163 | |
| 164 | static inline bool hri_usbpipe_get_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 165 | { |
| 166 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP) |
| 167 | >> USB_HOST_PINTFLAG_TXSTP_Pos; |
| 168 | } |
| 169 | |
| 170 | static inline void hri_usbpipe_clear_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 171 | { |
| 172 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP; |
| 173 | } |
| 174 | |
| 175 | static inline bool hri_usbpipe_get_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 176 | { |
| 177 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL) |
| 178 | >> USB_HOST_PINTFLAG_STALL_Pos; |
| 179 | } |
| 180 | |
| 181 | static inline void hri_usbpipe_clear_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 182 | { |
| 183 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL; |
| 184 | } |
| 185 | |
| 186 | static inline bool hri_usbpipe_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 187 | { |
| 188 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0) |
| 189 | >> USB_HOST_PINTFLAG_TRCPT0_Pos; |
| 190 | } |
| 191 | |
| 192 | static inline void hri_usbpipe_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 193 | { |
| 194 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0; |
| 195 | } |
| 196 | |
| 197 | static inline bool hri_usbpipe_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 198 | { |
| 199 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1) |
| 200 | >> USB_HOST_PINTFLAG_TRCPT1_Pos; |
| 201 | } |
| 202 | |
| 203 | static inline void hri_usbpipe_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 204 | { |
| 205 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1; |
| 206 | } |
| 207 | |
| 208 | static inline bool hri_usbpipe_get_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 209 | { |
| 210 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL) |
| 211 | >> USB_HOST_PINTFLAG_TRFAIL_Pos; |
| 212 | } |
| 213 | |
| 214 | static inline void hri_usbpipe_clear_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 215 | { |
| 216 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL; |
| 217 | } |
| 218 | |
| 219 | static inline bool hri_usbpipe_get_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 220 | { |
| 221 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR) |
| 222 | >> USB_HOST_PINTFLAG_PERR_Pos; |
| 223 | } |
| 224 | |
| 225 | static inline void hri_usbpipe_clear_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 226 | { |
| 227 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR; |
| 228 | } |
| 229 | |
| 230 | static inline bool hri_usbpipe_get_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 231 | { |
| 232 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP) |
| 233 | >> USB_HOST_PINTFLAG_TXSTP_Pos; |
| 234 | } |
| 235 | |
| 236 | static inline void hri_usbpipe_clear_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 237 | { |
| 238 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP; |
| 239 | } |
| 240 | |
| 241 | static inline bool hri_usbpipe_get_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 242 | { |
| 243 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL) |
| 244 | >> USB_HOST_PINTFLAG_STALL_Pos; |
| 245 | } |
| 246 | |
| 247 | static inline void hri_usbpipe_clear_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 248 | { |
| 249 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL; |
| 250 | } |
| 251 | |
| 252 | static inline hri_usbpipe_pintflag_reg_t hri_usbpipe_get_PINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 253 | hri_usbpipe_pintflag_reg_t mask) |
| 254 | { |
| 255 | uint8_t tmp; |
| 256 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg; |
| 257 | tmp &= mask; |
| 258 | return tmp; |
| 259 | } |
| 260 | |
| 261 | static inline hri_usbpipe_pintflag_reg_t hri_usbpipe_read_PINTFLAG_reg(const void *const hw, uint8_t submodule_index) |
| 262 | { |
| 263 | return ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg; |
| 264 | } |
| 265 | |
| 266 | static inline void hri_usbpipe_clear_PINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 267 | hri_usbpipe_pintflag_reg_t mask) |
| 268 | { |
| 269 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = mask; |
| 270 | } |
| 271 | |
| 272 | static inline void hri_usbpipe_set_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 273 | { |
| 274 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL; |
| 275 | } |
| 276 | |
| 277 | static inline bool hri_usbpipe_get_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 278 | { |
| 279 | return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_DTGL) |
| 280 | >> USB_HOST_PSTATUS_DTGL_Pos; |
| 281 | } |
| 282 | |
| 283 | static inline void hri_usbpipe_write_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 284 | { |
| 285 | if (value == 0x0) { |
| 286 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL; |
| 287 | } else { |
| 288 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL; |
| 289 | } |
| 290 | } |
| 291 | |
| 292 | static inline void hri_usbpipe_clear_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 293 | { |
| 294 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL; |
| 295 | } |
| 296 | |
| 297 | static inline void hri_usbpipe_set_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 298 | { |
| 299 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK; |
| 300 | } |
| 301 | |
| 302 | static inline bool hri_usbpipe_get_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 303 | { |
| 304 | return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_CURBK) |
| 305 | >> USB_HOST_PSTATUS_CURBK_Pos; |
| 306 | } |
| 307 | |
| 308 | static inline void hri_usbpipe_write_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 309 | { |
| 310 | if (value == 0x0) { |
| 311 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK; |
| 312 | } else { |
| 313 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK; |
| 314 | } |
| 315 | } |
| 316 | |
| 317 | static inline void hri_usbpipe_clear_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 318 | { |
| 319 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK; |
| 320 | } |
| 321 | |
| 322 | static inline void hri_usbpipe_set_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 323 | { |
| 324 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE; |
| 325 | } |
| 326 | |
| 327 | static inline bool hri_usbpipe_get_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 328 | { |
| 329 | return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_PFREEZE) |
| 330 | >> USB_HOST_PSTATUS_PFREEZE_Pos; |
| 331 | } |
| 332 | |
| 333 | static inline void hri_usbpipe_write_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 334 | { |
| 335 | if (value == 0x0) { |
| 336 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE; |
| 337 | } else { |
| 338 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE; |
| 339 | } |
| 340 | } |
| 341 | |
| 342 | static inline void hri_usbpipe_clear_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 343 | { |
| 344 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE; |
| 345 | } |
| 346 | |
| 347 | static inline void hri_usbpipe_set_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 348 | { |
| 349 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY; |
| 350 | } |
| 351 | |
| 352 | static inline bool hri_usbpipe_get_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 353 | { |
| 354 | return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK0RDY) |
| 355 | >> USB_HOST_PSTATUS_BK0RDY_Pos; |
| 356 | } |
| 357 | |
| 358 | static inline void hri_usbpipe_write_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 359 | { |
| 360 | if (value == 0x0) { |
| 361 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY; |
| 362 | } else { |
| 363 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY; |
| 364 | } |
| 365 | } |
| 366 | |
| 367 | static inline void hri_usbpipe_clear_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 368 | { |
| 369 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY; |
| 370 | } |
| 371 | |
| 372 | static inline void hri_usbpipe_set_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 373 | { |
| 374 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY; |
| 375 | } |
| 376 | |
| 377 | static inline bool hri_usbpipe_get_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 378 | { |
| 379 | return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK1RDY) |
| 380 | >> USB_HOST_PSTATUS_BK1RDY_Pos; |
| 381 | } |
| 382 | |
| 383 | static inline void hri_usbpipe_write_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 384 | { |
| 385 | if (value == 0x0) { |
| 386 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY; |
| 387 | } else { |
| 388 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY; |
| 389 | } |
| 390 | } |
| 391 | |
| 392 | static inline void hri_usbpipe_clear_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 393 | { |
| 394 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY; |
| 395 | } |
| 396 | |
| 397 | static inline void hri_usbpipe_set_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 398 | hri_usbpipe_pstatus_reg_t mask) |
| 399 | { |
| 400 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = mask; |
| 401 | } |
| 402 | |
| 403 | static inline hri_usbpipe_pstatus_reg_t hri_usbpipe_get_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 404 | hri_usbpipe_pstatus_reg_t mask) |
| 405 | { |
| 406 | uint8_t tmp; |
| 407 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg; |
| 408 | tmp &= mask; |
| 409 | return tmp; |
| 410 | } |
| 411 | |
| 412 | static inline hri_usbpipe_pstatus_reg_t hri_usbpipe_read_PSTATUS_reg(const void *const hw, uint8_t submodule_index) |
| 413 | { |
| 414 | return ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg; |
| 415 | } |
| 416 | |
| 417 | static inline void hri_usbpipe_write_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 418 | hri_usbpipe_pstatus_reg_t data) |
| 419 | { |
| 420 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = data; |
| 421 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = ~data; |
| 422 | } |
| 423 | |
| 424 | static inline void hri_usbpipe_clear_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 425 | hri_usbpipe_pstatus_reg_t mask) |
| 426 | { |
| 427 | ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = mask; |
| 428 | } |
| 429 | |
| 430 | static inline void hri_usbpipe_set_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 431 | { |
| 432 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0; |
| 433 | } |
| 434 | |
| 435 | static inline bool hri_usbpipe_get_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 436 | { |
| 437 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT0) |
| 438 | >> USB_HOST_PINTENSET_TRCPT0_Pos; |
| 439 | } |
| 440 | |
| 441 | static inline void hri_usbpipe_write_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 442 | { |
| 443 | if (value == 0x0) { |
| 444 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0; |
| 445 | } else { |
| 446 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0; |
| 447 | } |
| 448 | } |
| 449 | |
| 450 | static inline void hri_usbpipe_clear_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 451 | { |
| 452 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0; |
| 453 | } |
| 454 | |
| 455 | static inline void hri_usbpipe_set_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 456 | { |
| 457 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1; |
| 458 | } |
| 459 | |
| 460 | static inline bool hri_usbpipe_get_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 461 | { |
| 462 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT1) |
| 463 | >> USB_HOST_PINTENSET_TRCPT1_Pos; |
| 464 | } |
| 465 | |
| 466 | static inline void hri_usbpipe_write_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 467 | { |
| 468 | if (value == 0x0) { |
| 469 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1; |
| 470 | } else { |
| 471 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1; |
| 472 | } |
| 473 | } |
| 474 | |
| 475 | static inline void hri_usbpipe_clear_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 476 | { |
| 477 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1; |
| 478 | } |
| 479 | |
| 480 | static inline void hri_usbpipe_set_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 481 | { |
| 482 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL; |
| 483 | } |
| 484 | |
| 485 | static inline bool hri_usbpipe_get_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 486 | { |
| 487 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRFAIL) |
| 488 | >> USB_HOST_PINTENSET_TRFAIL_Pos; |
| 489 | } |
| 490 | |
| 491 | static inline void hri_usbpipe_write_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 492 | { |
| 493 | if (value == 0x0) { |
| 494 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL; |
| 495 | } else { |
| 496 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL; |
| 497 | } |
| 498 | } |
| 499 | |
| 500 | static inline void hri_usbpipe_clear_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 501 | { |
| 502 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL; |
| 503 | } |
| 504 | |
| 505 | static inline void hri_usbpipe_set_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 506 | { |
| 507 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR; |
| 508 | } |
| 509 | |
| 510 | static inline bool hri_usbpipe_get_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 511 | { |
| 512 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_PERR) |
| 513 | >> USB_HOST_PINTENSET_PERR_Pos; |
| 514 | } |
| 515 | |
| 516 | static inline void hri_usbpipe_write_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 517 | { |
| 518 | if (value == 0x0) { |
| 519 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR; |
| 520 | } else { |
| 521 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR; |
| 522 | } |
| 523 | } |
| 524 | |
| 525 | static inline void hri_usbpipe_clear_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 526 | { |
| 527 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR; |
| 528 | } |
| 529 | |
| 530 | static inline void hri_usbpipe_set_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 531 | { |
| 532 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP; |
| 533 | } |
| 534 | |
| 535 | static inline bool hri_usbpipe_get_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 536 | { |
| 537 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TXSTP) |
| 538 | >> USB_HOST_PINTENSET_TXSTP_Pos; |
| 539 | } |
| 540 | |
| 541 | static inline void hri_usbpipe_write_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 542 | { |
| 543 | if (value == 0x0) { |
| 544 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP; |
| 545 | } else { |
| 546 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP; |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | static inline void hri_usbpipe_clear_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 551 | { |
| 552 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP; |
| 553 | } |
| 554 | |
| 555 | static inline void hri_usbpipe_set_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 556 | { |
| 557 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL; |
| 558 | } |
| 559 | |
| 560 | static inline bool hri_usbpipe_get_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 561 | { |
| 562 | return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_STALL) |
| 563 | >> USB_HOST_PINTENSET_STALL_Pos; |
| 564 | } |
| 565 | |
| 566 | static inline void hri_usbpipe_write_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 567 | { |
| 568 | if (value == 0x0) { |
| 569 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL; |
| 570 | } else { |
| 571 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL; |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | static inline void hri_usbpipe_clear_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 576 | { |
| 577 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL; |
| 578 | } |
| 579 | |
| 580 | static inline void hri_usbpipe_set_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 581 | hri_usbpipe_pintenset_reg_t mask) |
| 582 | { |
| 583 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = mask; |
| 584 | } |
| 585 | |
| 586 | static inline hri_usbpipe_pintenset_reg_t hri_usbpipe_get_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 587 | hri_usbpipe_pintenset_reg_t mask) |
| 588 | { |
| 589 | uint8_t tmp; |
| 590 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg; |
| 591 | tmp &= mask; |
| 592 | return tmp; |
| 593 | } |
| 594 | |
| 595 | static inline hri_usbpipe_pintenset_reg_t hri_usbpipe_read_PINTEN_reg(const void *const hw, uint8_t submodule_index) |
| 596 | { |
| 597 | return ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg; |
| 598 | } |
| 599 | |
| 600 | static inline void hri_usbpipe_write_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 601 | hri_usbpipe_pintenset_reg_t data) |
| 602 | { |
| 603 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = data; |
| 604 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = ~data; |
| 605 | } |
| 606 | |
| 607 | static inline void hri_usbpipe_clear_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 608 | hri_usbpipe_pintenset_reg_t mask) |
| 609 | { |
| 610 | ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = mask; |
| 611 | } |
| 612 | |
| 613 | static inline void hri_usbpipe_set_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 614 | { |
| 615 | USB_CRITICAL_SECTION_ENTER(); |
| 616 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_BK; |
| 617 | USB_CRITICAL_SECTION_LEAVE(); |
| 618 | } |
| 619 | |
| 620 | static inline bool hri_usbpipe_get_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 621 | { |
| 622 | uint8_t tmp; |
| 623 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 624 | tmp = (tmp & USB_HOST_PCFG_BK) >> USB_HOST_PCFG_BK_Pos; |
| 625 | return (bool)tmp; |
| 626 | } |
| 627 | |
| 628 | static inline void hri_usbpipe_write_PCFG_BK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 629 | { |
| 630 | uint8_t tmp; |
| 631 | USB_CRITICAL_SECTION_ENTER(); |
| 632 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 633 | tmp &= ~USB_HOST_PCFG_BK; |
| 634 | tmp |= value << USB_HOST_PCFG_BK_Pos; |
| 635 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp; |
| 636 | USB_CRITICAL_SECTION_LEAVE(); |
| 637 | } |
| 638 | |
| 639 | static inline void hri_usbpipe_clear_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 640 | { |
| 641 | USB_CRITICAL_SECTION_ENTER(); |
| 642 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_BK; |
| 643 | USB_CRITICAL_SECTION_LEAVE(); |
| 644 | } |
| 645 | |
| 646 | static inline void hri_usbpipe_toggle_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 647 | { |
| 648 | USB_CRITICAL_SECTION_ENTER(); |
| 649 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_BK; |
| 650 | USB_CRITICAL_SECTION_LEAVE(); |
| 651 | } |
| 652 | |
| 653 | static inline void hri_usbpipe_set_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 654 | hri_usbpipe_pcfg_reg_t mask) |
| 655 | { |
| 656 | USB_CRITICAL_SECTION_ENTER(); |
| 657 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTOKEN(mask); |
| 658 | USB_CRITICAL_SECTION_LEAVE(); |
| 659 | } |
| 660 | |
| 661 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 662 | hri_usbpipe_pcfg_reg_t mask) |
| 663 | { |
| 664 | uint8_t tmp; |
| 665 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 666 | tmp = (tmp & USB_HOST_PCFG_PTOKEN(mask)) >> USB_HOST_PCFG_PTOKEN_Pos; |
| 667 | return tmp; |
| 668 | } |
| 669 | |
| 670 | static inline void hri_usbpipe_write_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 671 | hri_usbpipe_pcfg_reg_t data) |
| 672 | { |
| 673 | uint8_t tmp; |
| 674 | USB_CRITICAL_SECTION_ENTER(); |
| 675 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 676 | tmp &= ~USB_HOST_PCFG_PTOKEN_Msk; |
| 677 | tmp |= USB_HOST_PCFG_PTOKEN(data); |
| 678 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp; |
| 679 | USB_CRITICAL_SECTION_LEAVE(); |
| 680 | } |
| 681 | |
| 682 | static inline void hri_usbpipe_clear_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 683 | hri_usbpipe_pcfg_reg_t mask) |
| 684 | { |
| 685 | USB_CRITICAL_SECTION_ENTER(); |
| 686 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTOKEN(mask); |
| 687 | USB_CRITICAL_SECTION_LEAVE(); |
| 688 | } |
| 689 | |
| 690 | static inline void hri_usbpipe_toggle_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 691 | hri_usbpipe_pcfg_reg_t mask) |
| 692 | { |
| 693 | USB_CRITICAL_SECTION_ENTER(); |
| 694 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTOKEN(mask); |
| 695 | USB_CRITICAL_SECTION_LEAVE(); |
| 696 | } |
| 697 | |
| 698 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index) |
| 699 | { |
| 700 | uint8_t tmp; |
| 701 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 702 | tmp = (tmp & USB_HOST_PCFG_PTOKEN_Msk) >> USB_HOST_PCFG_PTOKEN_Pos; |
| 703 | return tmp; |
| 704 | } |
| 705 | |
| 706 | static inline void hri_usbpipe_set_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 707 | hri_usbpipe_pcfg_reg_t mask) |
| 708 | { |
| 709 | USB_CRITICAL_SECTION_ENTER(); |
| 710 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTYPE(mask); |
| 711 | USB_CRITICAL_SECTION_LEAVE(); |
| 712 | } |
| 713 | |
| 714 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 715 | hri_usbpipe_pcfg_reg_t mask) |
| 716 | { |
| 717 | uint8_t tmp; |
| 718 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 719 | tmp = (tmp & USB_HOST_PCFG_PTYPE(mask)) >> USB_HOST_PCFG_PTYPE_Pos; |
| 720 | return tmp; |
| 721 | } |
| 722 | |
| 723 | static inline void hri_usbpipe_write_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 724 | hri_usbpipe_pcfg_reg_t data) |
| 725 | { |
| 726 | uint8_t tmp; |
| 727 | USB_CRITICAL_SECTION_ENTER(); |
| 728 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 729 | tmp &= ~USB_HOST_PCFG_PTYPE_Msk; |
| 730 | tmp |= USB_HOST_PCFG_PTYPE(data); |
| 731 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp; |
| 732 | USB_CRITICAL_SECTION_LEAVE(); |
| 733 | } |
| 734 | |
| 735 | static inline void hri_usbpipe_clear_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 736 | hri_usbpipe_pcfg_reg_t mask) |
| 737 | { |
| 738 | USB_CRITICAL_SECTION_ENTER(); |
| 739 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTYPE(mask); |
| 740 | USB_CRITICAL_SECTION_LEAVE(); |
| 741 | } |
| 742 | |
| 743 | static inline void hri_usbpipe_toggle_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 744 | hri_usbpipe_pcfg_reg_t mask) |
| 745 | { |
| 746 | USB_CRITICAL_SECTION_ENTER(); |
| 747 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTYPE(mask); |
| 748 | USB_CRITICAL_SECTION_LEAVE(); |
| 749 | } |
| 750 | |
| 751 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index) |
| 752 | { |
| 753 | uint8_t tmp; |
| 754 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 755 | tmp = (tmp & USB_HOST_PCFG_PTYPE_Msk) >> USB_HOST_PCFG_PTYPE_Pos; |
| 756 | return tmp; |
| 757 | } |
| 758 | |
| 759 | static inline void hri_usbpipe_set_PCFG_reg(const void *const hw, uint8_t submodule_index, hri_usbpipe_pcfg_reg_t mask) |
| 760 | { |
| 761 | USB_CRITICAL_SECTION_ENTER(); |
| 762 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= mask; |
| 763 | USB_CRITICAL_SECTION_LEAVE(); |
| 764 | } |
| 765 | |
| 766 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 767 | hri_usbpipe_pcfg_reg_t mask) |
| 768 | { |
| 769 | uint8_t tmp; |
| 770 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 771 | tmp &= mask; |
| 772 | return tmp; |
| 773 | } |
| 774 | |
| 775 | static inline void hri_usbpipe_write_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 776 | hri_usbpipe_pcfg_reg_t data) |
| 777 | { |
| 778 | USB_CRITICAL_SECTION_ENTER(); |
| 779 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = data; |
| 780 | USB_CRITICAL_SECTION_LEAVE(); |
| 781 | } |
| 782 | |
| 783 | static inline void hri_usbpipe_clear_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 784 | hri_usbpipe_pcfg_reg_t mask) |
| 785 | { |
| 786 | USB_CRITICAL_SECTION_ENTER(); |
| 787 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~mask; |
| 788 | USB_CRITICAL_SECTION_LEAVE(); |
| 789 | } |
| 790 | |
| 791 | static inline void hri_usbpipe_toggle_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 792 | hri_usbpipe_pcfg_reg_t mask) |
| 793 | { |
| 794 | USB_CRITICAL_SECTION_ENTER(); |
| 795 | ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= mask; |
| 796 | USB_CRITICAL_SECTION_LEAVE(); |
| 797 | } |
| 798 | |
| 799 | static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_reg(const void *const hw, uint8_t submodule_index) |
| 800 | { |
| 801 | return ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg; |
| 802 | } |
| 803 | |
| 804 | static inline void hri_usbpipe_set_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 805 | hri_usbpipe_binterval_reg_t mask) |
| 806 | { |
| 807 | USB_CRITICAL_SECTION_ENTER(); |
| 808 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg |= USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 809 | USB_CRITICAL_SECTION_LEAVE(); |
| 810 | } |
| 811 | |
| 812 | static inline hri_usbpipe_binterval_reg_t hri_usbpipe_get_BINTERVAL_BITINTERVAL_bf(const void *const hw, |
| 813 | uint8_t submodule_index, |
| 814 | hri_usbpipe_binterval_reg_t mask) |
| 815 | { |
| 816 | uint8_t tmp; |
| 817 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg; |
| 818 | tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL(mask)) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos; |
| 819 | return tmp; |
| 820 | } |
| 821 | |
| 822 | static inline void hri_usbpipe_write_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 823 | hri_usbpipe_binterval_reg_t data) |
| 824 | { |
| 825 | uint8_t tmp; |
| 826 | USB_CRITICAL_SECTION_ENTER(); |
| 827 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg; |
| 828 | tmp &= ~USB_HOST_BINTERVAL_BITINTERVAL_Msk; |
| 829 | tmp |= USB_HOST_BINTERVAL_BITINTERVAL(data); |
| 830 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg = tmp; |
| 831 | USB_CRITICAL_SECTION_LEAVE(); |
| 832 | } |
| 833 | |
| 834 | static inline void hri_usbpipe_clear_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 835 | hri_usbpipe_binterval_reg_t mask) |
| 836 | { |
| 837 | USB_CRITICAL_SECTION_ENTER(); |
| 838 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg &= ~USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 839 | USB_CRITICAL_SECTION_LEAVE(); |
| 840 | } |
| 841 | |
| 842 | static inline void hri_usbpipe_toggle_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 843 | hri_usbpipe_binterval_reg_t mask) |
| 844 | { |
| 845 | USB_CRITICAL_SECTION_ENTER(); |
| 846 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg ^= USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 847 | USB_CRITICAL_SECTION_LEAVE(); |
| 848 | } |
| 849 | |
| 850 | static inline hri_usbpipe_binterval_reg_t hri_usbpipe_read_BINTERVAL_BITINTERVAL_bf(const void *const hw, |
| 851 | uint8_t submodule_index) |
| 852 | { |
| 853 | uint8_t tmp; |
| 854 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg; |
| 855 | tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL_Msk) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos; |
| 856 | return tmp; |
| 857 | } |
| 858 | |
| 859 | static inline void hri_usbpipe_set_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 860 | hri_usbpipe_binterval_reg_t mask) |
| 861 | { |
| 862 | USB_CRITICAL_SECTION_ENTER(); |
| 863 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg |= mask; |
| 864 | USB_CRITICAL_SECTION_LEAVE(); |
| 865 | } |
| 866 | |
| 867 | static inline hri_usbpipe_binterval_reg_t hri_usbpipe_get_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 868 | hri_usbpipe_binterval_reg_t mask) |
| 869 | { |
| 870 | uint8_t tmp; |
| 871 | tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg; |
| 872 | tmp &= mask; |
| 873 | return tmp; |
| 874 | } |
| 875 | |
| 876 | static inline void hri_usbpipe_write_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 877 | hri_usbpipe_binterval_reg_t data) |
| 878 | { |
| 879 | USB_CRITICAL_SECTION_ENTER(); |
| 880 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg = data; |
| 881 | USB_CRITICAL_SECTION_LEAVE(); |
| 882 | } |
| 883 | |
| 884 | static inline void hri_usbpipe_clear_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 885 | hri_usbpipe_binterval_reg_t mask) |
| 886 | { |
| 887 | USB_CRITICAL_SECTION_ENTER(); |
| 888 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg &= ~mask; |
| 889 | USB_CRITICAL_SECTION_LEAVE(); |
| 890 | } |
| 891 | |
| 892 | static inline void hri_usbpipe_toggle_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 893 | hri_usbpipe_binterval_reg_t mask) |
| 894 | { |
| 895 | USB_CRITICAL_SECTION_ENTER(); |
| 896 | ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg ^= mask; |
| 897 | USB_CRITICAL_SECTION_LEAVE(); |
| 898 | } |
| 899 | |
| 900 | static inline hri_usbpipe_binterval_reg_t hri_usbpipe_read_BINTERVAL_reg(const void *const hw, uint8_t submodule_index) |
| 901 | { |
| 902 | return ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg; |
| 903 | } |
| 904 | |
| 905 | static inline bool hri_usbhost_get_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 906 | { |
| 907 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0) |
| 908 | >> USB_HOST_PINTFLAG_TRCPT0_Pos; |
| 909 | } |
| 910 | |
| 911 | static inline void hri_usbhost_clear_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 912 | { |
| 913 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0; |
| 914 | } |
| 915 | |
| 916 | static inline bool hri_usbhost_get_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 917 | { |
| 918 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1) |
| 919 | >> USB_HOST_PINTFLAG_TRCPT1_Pos; |
| 920 | } |
| 921 | |
| 922 | static inline void hri_usbhost_clear_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 923 | { |
| 924 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1; |
| 925 | } |
| 926 | |
| 927 | static inline bool hri_usbhost_get_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 928 | { |
| 929 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL) |
| 930 | >> USB_HOST_PINTFLAG_TRFAIL_Pos; |
| 931 | } |
| 932 | |
| 933 | static inline void hri_usbhost_clear_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 934 | { |
| 935 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL; |
| 936 | } |
| 937 | |
| 938 | static inline bool hri_usbhost_get_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 939 | { |
| 940 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR) |
| 941 | >> USB_HOST_PINTFLAG_PERR_Pos; |
| 942 | } |
| 943 | |
| 944 | static inline void hri_usbhost_clear_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 945 | { |
| 946 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR; |
| 947 | } |
| 948 | |
| 949 | static inline bool hri_usbhost_get_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 950 | { |
| 951 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP) |
| 952 | >> USB_HOST_PINTFLAG_TXSTP_Pos; |
| 953 | } |
| 954 | |
| 955 | static inline void hri_usbhost_clear_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 956 | { |
| 957 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP; |
| 958 | } |
| 959 | |
| 960 | static inline bool hri_usbhost_get_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 961 | { |
| 962 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL) |
| 963 | >> USB_HOST_PINTFLAG_STALL_Pos; |
| 964 | } |
| 965 | |
| 966 | static inline void hri_usbhost_clear_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 967 | { |
| 968 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL; |
| 969 | } |
| 970 | |
| 971 | static inline bool hri_usbhost_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 972 | { |
| 973 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0) |
| 974 | >> USB_HOST_PINTFLAG_TRCPT0_Pos; |
| 975 | } |
| 976 | |
| 977 | static inline void hri_usbhost_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 978 | { |
| 979 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0; |
| 980 | } |
| 981 | |
| 982 | static inline bool hri_usbhost_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 983 | { |
| 984 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1) |
| 985 | >> USB_HOST_PINTFLAG_TRCPT1_Pos; |
| 986 | } |
| 987 | |
| 988 | static inline void hri_usbhost_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 989 | { |
| 990 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1; |
| 991 | } |
| 992 | |
| 993 | static inline bool hri_usbhost_get_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 994 | { |
| 995 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL) |
| 996 | >> USB_HOST_PINTFLAG_TRFAIL_Pos; |
| 997 | } |
| 998 | |
| 999 | static inline void hri_usbhost_clear_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 1000 | { |
| 1001 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL; |
| 1002 | } |
| 1003 | |
| 1004 | static inline bool hri_usbhost_get_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 1005 | { |
| 1006 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR) |
| 1007 | >> USB_HOST_PINTFLAG_PERR_Pos; |
| 1008 | } |
| 1009 | |
| 1010 | static inline void hri_usbhost_clear_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 1011 | { |
| 1012 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR; |
| 1013 | } |
| 1014 | |
| 1015 | static inline bool hri_usbhost_get_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 1016 | { |
| 1017 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP) |
| 1018 | >> USB_HOST_PINTFLAG_TXSTP_Pos; |
| 1019 | } |
| 1020 | |
| 1021 | static inline void hri_usbhost_clear_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 1022 | { |
| 1023 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP; |
| 1024 | } |
| 1025 | |
| 1026 | static inline bool hri_usbhost_get_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 1027 | { |
| 1028 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL) |
| 1029 | >> USB_HOST_PINTFLAG_STALL_Pos; |
| 1030 | } |
| 1031 | |
| 1032 | static inline void hri_usbhost_clear_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 1033 | { |
| 1034 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL; |
| 1035 | } |
| 1036 | |
| 1037 | static inline hri_usbhost_pintflag_reg_t hri_usbhost_get_PINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 1038 | hri_usbhost_pintflag_reg_t mask) |
| 1039 | { |
| 1040 | uint8_t tmp; |
| 1041 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg; |
| 1042 | tmp &= mask; |
| 1043 | return tmp; |
| 1044 | } |
| 1045 | |
| 1046 | static inline hri_usbhost_pintflag_reg_t hri_usbhost_read_PINTFLAG_reg(const void *const hw, uint8_t submodule_index) |
| 1047 | { |
| 1048 | return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg; |
| 1049 | } |
| 1050 | |
| 1051 | static inline void hri_usbhost_clear_PINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 1052 | hri_usbhost_pintflag_reg_t mask) |
| 1053 | { |
| 1054 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask; |
| 1055 | } |
| 1056 | |
| 1057 | static inline void hri_usbhost_set_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 1058 | { |
| 1059 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL; |
| 1060 | } |
| 1061 | |
| 1062 | static inline bool hri_usbhost_get_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 1063 | { |
| 1064 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_DTGL) |
| 1065 | >> USB_HOST_PSTATUS_DTGL_Pos; |
| 1066 | } |
| 1067 | |
| 1068 | static inline void hri_usbhost_write_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1069 | { |
| 1070 | if (value == 0x0) { |
| 1071 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL; |
| 1072 | } else { |
| 1073 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL; |
| 1074 | } |
| 1075 | } |
| 1076 | |
| 1077 | static inline void hri_usbhost_clear_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index) |
| 1078 | { |
| 1079 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL; |
| 1080 | } |
| 1081 | |
| 1082 | static inline void hri_usbhost_set_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 1083 | { |
| 1084 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK; |
| 1085 | } |
| 1086 | |
| 1087 | static inline bool hri_usbhost_get_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 1088 | { |
| 1089 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_CURBK) |
| 1090 | >> USB_HOST_PSTATUS_CURBK_Pos; |
| 1091 | } |
| 1092 | |
| 1093 | static inline void hri_usbhost_write_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1094 | { |
| 1095 | if (value == 0x0) { |
| 1096 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK; |
| 1097 | } else { |
| 1098 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK; |
| 1099 | } |
| 1100 | } |
| 1101 | |
| 1102 | static inline void hri_usbhost_clear_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 1103 | { |
| 1104 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK; |
| 1105 | } |
| 1106 | |
| 1107 | static inline void hri_usbhost_set_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 1108 | { |
| 1109 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE; |
| 1110 | } |
| 1111 | |
| 1112 | static inline bool hri_usbhost_get_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 1113 | { |
| 1114 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_PFREEZE) |
| 1115 | >> USB_HOST_PSTATUS_PFREEZE_Pos; |
| 1116 | } |
| 1117 | |
| 1118 | static inline void hri_usbhost_write_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1119 | { |
| 1120 | if (value == 0x0) { |
| 1121 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE; |
| 1122 | } else { |
| 1123 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE; |
| 1124 | } |
| 1125 | } |
| 1126 | |
| 1127 | static inline void hri_usbhost_clear_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index) |
| 1128 | { |
| 1129 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE; |
| 1130 | } |
| 1131 | |
| 1132 | static inline void hri_usbhost_set_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1133 | { |
| 1134 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY; |
| 1135 | } |
| 1136 | |
| 1137 | static inline bool hri_usbhost_get_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1138 | { |
| 1139 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK0RDY) |
| 1140 | >> USB_HOST_PSTATUS_BK0RDY_Pos; |
| 1141 | } |
| 1142 | |
| 1143 | static inline void hri_usbhost_write_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1144 | { |
| 1145 | if (value == 0x0) { |
| 1146 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY; |
| 1147 | } else { |
| 1148 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY; |
| 1149 | } |
| 1150 | } |
| 1151 | |
| 1152 | static inline void hri_usbhost_clear_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1153 | { |
| 1154 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY; |
| 1155 | } |
| 1156 | |
| 1157 | static inline void hri_usbhost_set_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1158 | { |
| 1159 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY; |
| 1160 | } |
| 1161 | |
| 1162 | static inline bool hri_usbhost_get_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1163 | { |
| 1164 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK1RDY) |
| 1165 | >> USB_HOST_PSTATUS_BK1RDY_Pos; |
| 1166 | } |
| 1167 | |
| 1168 | static inline void hri_usbhost_write_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1169 | { |
| 1170 | if (value == 0x0) { |
| 1171 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY; |
| 1172 | } else { |
| 1173 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY; |
| 1174 | } |
| 1175 | } |
| 1176 | |
| 1177 | static inline void hri_usbhost_clear_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 1178 | { |
| 1179 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY; |
| 1180 | } |
| 1181 | |
| 1182 | static inline void hri_usbhost_set_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 1183 | hri_usbhost_pstatus_reg_t mask) |
| 1184 | { |
| 1185 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = mask; |
| 1186 | } |
| 1187 | |
| 1188 | static inline hri_usbhost_pstatus_reg_t hri_usbhost_get_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 1189 | hri_usbhost_pstatus_reg_t mask) |
| 1190 | { |
| 1191 | uint8_t tmp; |
| 1192 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg; |
| 1193 | tmp &= mask; |
| 1194 | return tmp; |
| 1195 | } |
| 1196 | |
| 1197 | static inline hri_usbhost_pstatus_reg_t hri_usbhost_read_PSTATUS_reg(const void *const hw, uint8_t submodule_index) |
| 1198 | { |
| 1199 | return ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg; |
| 1200 | } |
| 1201 | |
| 1202 | static inline void hri_usbhost_write_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 1203 | hri_usbhost_pstatus_reg_t data) |
| 1204 | { |
| 1205 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = data; |
| 1206 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = ~data; |
| 1207 | } |
| 1208 | |
| 1209 | static inline void hri_usbhost_clear_PSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 1210 | hri_usbhost_pstatus_reg_t mask) |
| 1211 | { |
| 1212 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = mask; |
| 1213 | } |
| 1214 | |
| 1215 | static inline void hri_usbhost_set_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 1216 | { |
| 1217 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0; |
| 1218 | } |
| 1219 | |
| 1220 | static inline bool hri_usbhost_get_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 1221 | { |
| 1222 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT0) |
| 1223 | >> USB_HOST_PINTENSET_TRCPT0_Pos; |
| 1224 | } |
| 1225 | |
| 1226 | static inline void hri_usbhost_write_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1227 | { |
| 1228 | if (value == 0x0) { |
| 1229 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0; |
| 1230 | } else { |
| 1231 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0; |
| 1232 | } |
| 1233 | } |
| 1234 | |
| 1235 | static inline void hri_usbhost_clear_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 1236 | { |
| 1237 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0; |
| 1238 | } |
| 1239 | |
| 1240 | static inline void hri_usbhost_set_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 1241 | { |
| 1242 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1; |
| 1243 | } |
| 1244 | |
| 1245 | static inline bool hri_usbhost_get_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 1246 | { |
| 1247 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT1) |
| 1248 | >> USB_HOST_PINTENSET_TRCPT1_Pos; |
| 1249 | } |
| 1250 | |
| 1251 | static inline void hri_usbhost_write_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1252 | { |
| 1253 | if (value == 0x0) { |
| 1254 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1; |
| 1255 | } else { |
| 1256 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1; |
| 1257 | } |
| 1258 | } |
| 1259 | |
| 1260 | static inline void hri_usbhost_clear_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 1261 | { |
| 1262 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1; |
| 1263 | } |
| 1264 | |
| 1265 | static inline void hri_usbhost_set_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 1266 | { |
| 1267 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL; |
| 1268 | } |
| 1269 | |
| 1270 | static inline bool hri_usbhost_get_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 1271 | { |
| 1272 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRFAIL) |
| 1273 | >> USB_HOST_PINTENSET_TRFAIL_Pos; |
| 1274 | } |
| 1275 | |
| 1276 | static inline void hri_usbhost_write_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1277 | { |
| 1278 | if (value == 0x0) { |
| 1279 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL; |
| 1280 | } else { |
| 1281 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL; |
| 1282 | } |
| 1283 | } |
| 1284 | |
| 1285 | static inline void hri_usbhost_clear_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index) |
| 1286 | { |
| 1287 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL; |
| 1288 | } |
| 1289 | |
| 1290 | static inline void hri_usbhost_set_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 1291 | { |
| 1292 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR; |
| 1293 | } |
| 1294 | |
| 1295 | static inline bool hri_usbhost_get_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 1296 | { |
| 1297 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_PERR) |
| 1298 | >> USB_HOST_PINTENSET_PERR_Pos; |
| 1299 | } |
| 1300 | |
| 1301 | static inline void hri_usbhost_write_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1302 | { |
| 1303 | if (value == 0x0) { |
| 1304 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR; |
| 1305 | } else { |
| 1306 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR; |
| 1307 | } |
| 1308 | } |
| 1309 | |
| 1310 | static inline void hri_usbhost_clear_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index) |
| 1311 | { |
| 1312 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR; |
| 1313 | } |
| 1314 | |
| 1315 | static inline void hri_usbhost_set_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 1316 | { |
| 1317 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP; |
| 1318 | } |
| 1319 | |
| 1320 | static inline bool hri_usbhost_get_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 1321 | { |
| 1322 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TXSTP) |
| 1323 | >> USB_HOST_PINTENSET_TXSTP_Pos; |
| 1324 | } |
| 1325 | |
| 1326 | static inline void hri_usbhost_write_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1327 | { |
| 1328 | if (value == 0x0) { |
| 1329 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP; |
| 1330 | } else { |
| 1331 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP; |
| 1332 | } |
| 1333 | } |
| 1334 | |
| 1335 | static inline void hri_usbhost_clear_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 1336 | { |
| 1337 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP; |
| 1338 | } |
| 1339 | |
| 1340 | static inline void hri_usbhost_set_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 1341 | { |
| 1342 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL; |
| 1343 | } |
| 1344 | |
| 1345 | static inline bool hri_usbhost_get_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 1346 | { |
| 1347 | return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_STALL) |
| 1348 | >> USB_HOST_PINTENSET_STALL_Pos; |
| 1349 | } |
| 1350 | |
| 1351 | static inline void hri_usbhost_write_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1352 | { |
| 1353 | if (value == 0x0) { |
| 1354 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL; |
| 1355 | } else { |
| 1356 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL; |
| 1357 | } |
| 1358 | } |
| 1359 | |
| 1360 | static inline void hri_usbhost_clear_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index) |
| 1361 | { |
| 1362 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL; |
| 1363 | } |
| 1364 | |
| 1365 | static inline void hri_usbhost_set_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 1366 | hri_usbhost_pintenset_reg_t mask) |
| 1367 | { |
| 1368 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask; |
| 1369 | } |
| 1370 | |
| 1371 | static inline hri_usbhost_pintenset_reg_t hri_usbhost_get_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 1372 | hri_usbhost_pintenset_reg_t mask) |
| 1373 | { |
| 1374 | uint8_t tmp; |
| 1375 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg; |
| 1376 | tmp &= mask; |
| 1377 | return tmp; |
| 1378 | } |
| 1379 | |
| 1380 | static inline hri_usbhost_pintenset_reg_t hri_usbhost_read_PINTEN_reg(const void *const hw, uint8_t submodule_index) |
| 1381 | { |
| 1382 | return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg; |
| 1383 | } |
| 1384 | |
| 1385 | static inline void hri_usbhost_write_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 1386 | hri_usbhost_pintenset_reg_t data) |
| 1387 | { |
| 1388 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = data; |
| 1389 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = ~data; |
| 1390 | } |
| 1391 | |
| 1392 | static inline void hri_usbhost_clear_PINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 1393 | hri_usbhost_pintenset_reg_t mask) |
| 1394 | { |
| 1395 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = mask; |
| 1396 | } |
| 1397 | |
| 1398 | static inline void hri_usbhost_set_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 1399 | { |
| 1400 | USB_CRITICAL_SECTION_ENTER(); |
| 1401 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_BK; |
| 1402 | USB_CRITICAL_SECTION_LEAVE(); |
| 1403 | } |
| 1404 | |
| 1405 | static inline bool hri_usbhost_get_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 1406 | { |
| 1407 | uint8_t tmp; |
| 1408 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1409 | tmp = (tmp & USB_HOST_PCFG_BK) >> USB_HOST_PCFG_BK_Pos; |
| 1410 | return (bool)tmp; |
| 1411 | } |
| 1412 | |
| 1413 | static inline void hri_usbhost_write_PCFG_BK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 1414 | { |
| 1415 | uint8_t tmp; |
| 1416 | USB_CRITICAL_SECTION_ENTER(); |
| 1417 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1418 | tmp &= ~USB_HOST_PCFG_BK; |
| 1419 | tmp |= value << USB_HOST_PCFG_BK_Pos; |
| 1420 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp; |
| 1421 | USB_CRITICAL_SECTION_LEAVE(); |
| 1422 | } |
| 1423 | |
| 1424 | static inline void hri_usbhost_clear_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 1425 | { |
| 1426 | USB_CRITICAL_SECTION_ENTER(); |
| 1427 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_BK; |
| 1428 | USB_CRITICAL_SECTION_LEAVE(); |
| 1429 | } |
| 1430 | |
| 1431 | static inline void hri_usbhost_toggle_PCFG_BK_bit(const void *const hw, uint8_t submodule_index) |
| 1432 | { |
| 1433 | USB_CRITICAL_SECTION_ENTER(); |
| 1434 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_BK; |
| 1435 | USB_CRITICAL_SECTION_LEAVE(); |
| 1436 | } |
| 1437 | |
| 1438 | static inline void hri_usbhost_set_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 1439 | hri_usbhost_pcfg_reg_t mask) |
| 1440 | { |
| 1441 | USB_CRITICAL_SECTION_ENTER(); |
| 1442 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTOKEN(mask); |
| 1443 | USB_CRITICAL_SECTION_LEAVE(); |
| 1444 | } |
| 1445 | |
| 1446 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 1447 | hri_usbhost_pcfg_reg_t mask) |
| 1448 | { |
| 1449 | uint8_t tmp; |
| 1450 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1451 | tmp = (tmp & USB_HOST_PCFG_PTOKEN(mask)) >> USB_HOST_PCFG_PTOKEN_Pos; |
| 1452 | return tmp; |
| 1453 | } |
| 1454 | |
| 1455 | static inline void hri_usbhost_write_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 1456 | hri_usbhost_pcfg_reg_t data) |
| 1457 | { |
| 1458 | uint8_t tmp; |
| 1459 | USB_CRITICAL_SECTION_ENTER(); |
| 1460 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1461 | tmp &= ~USB_HOST_PCFG_PTOKEN_Msk; |
| 1462 | tmp |= USB_HOST_PCFG_PTOKEN(data); |
| 1463 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp; |
| 1464 | USB_CRITICAL_SECTION_LEAVE(); |
| 1465 | } |
| 1466 | |
| 1467 | static inline void hri_usbhost_clear_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 1468 | hri_usbhost_pcfg_reg_t mask) |
| 1469 | { |
| 1470 | USB_CRITICAL_SECTION_ENTER(); |
| 1471 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTOKEN(mask); |
| 1472 | USB_CRITICAL_SECTION_LEAVE(); |
| 1473 | } |
| 1474 | |
| 1475 | static inline void hri_usbhost_toggle_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index, |
| 1476 | hri_usbhost_pcfg_reg_t mask) |
| 1477 | { |
| 1478 | USB_CRITICAL_SECTION_ENTER(); |
| 1479 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTOKEN(mask); |
| 1480 | USB_CRITICAL_SECTION_LEAVE(); |
| 1481 | } |
| 1482 | |
| 1483 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index) |
| 1484 | { |
| 1485 | uint8_t tmp; |
| 1486 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1487 | tmp = (tmp & USB_HOST_PCFG_PTOKEN_Msk) >> USB_HOST_PCFG_PTOKEN_Pos; |
| 1488 | return tmp; |
| 1489 | } |
| 1490 | |
| 1491 | static inline void hri_usbhost_set_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 1492 | hri_usbhost_pcfg_reg_t mask) |
| 1493 | { |
| 1494 | USB_CRITICAL_SECTION_ENTER(); |
| 1495 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTYPE(mask); |
| 1496 | USB_CRITICAL_SECTION_LEAVE(); |
| 1497 | } |
| 1498 | |
| 1499 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 1500 | hri_usbhost_pcfg_reg_t mask) |
| 1501 | { |
| 1502 | uint8_t tmp; |
| 1503 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1504 | tmp = (tmp & USB_HOST_PCFG_PTYPE(mask)) >> USB_HOST_PCFG_PTYPE_Pos; |
| 1505 | return tmp; |
| 1506 | } |
| 1507 | |
| 1508 | static inline void hri_usbhost_write_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 1509 | hri_usbhost_pcfg_reg_t data) |
| 1510 | { |
| 1511 | uint8_t tmp; |
| 1512 | USB_CRITICAL_SECTION_ENTER(); |
| 1513 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1514 | tmp &= ~USB_HOST_PCFG_PTYPE_Msk; |
| 1515 | tmp |= USB_HOST_PCFG_PTYPE(data); |
| 1516 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp; |
| 1517 | USB_CRITICAL_SECTION_LEAVE(); |
| 1518 | } |
| 1519 | |
| 1520 | static inline void hri_usbhost_clear_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 1521 | hri_usbhost_pcfg_reg_t mask) |
| 1522 | { |
| 1523 | USB_CRITICAL_SECTION_ENTER(); |
| 1524 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTYPE(mask); |
| 1525 | USB_CRITICAL_SECTION_LEAVE(); |
| 1526 | } |
| 1527 | |
| 1528 | static inline void hri_usbhost_toggle_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index, |
| 1529 | hri_usbhost_pcfg_reg_t mask) |
| 1530 | { |
| 1531 | USB_CRITICAL_SECTION_ENTER(); |
| 1532 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTYPE(mask); |
| 1533 | USB_CRITICAL_SECTION_LEAVE(); |
| 1534 | } |
| 1535 | |
| 1536 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index) |
| 1537 | { |
| 1538 | uint8_t tmp; |
| 1539 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1540 | tmp = (tmp & USB_HOST_PCFG_PTYPE_Msk) >> USB_HOST_PCFG_PTYPE_Pos; |
| 1541 | return tmp; |
| 1542 | } |
| 1543 | |
| 1544 | static inline void hri_usbhost_set_PCFG_reg(const void *const hw, uint8_t submodule_index, hri_usbhost_pcfg_reg_t mask) |
| 1545 | { |
| 1546 | USB_CRITICAL_SECTION_ENTER(); |
| 1547 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= mask; |
| 1548 | USB_CRITICAL_SECTION_LEAVE(); |
| 1549 | } |
| 1550 | |
| 1551 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 1552 | hri_usbhost_pcfg_reg_t mask) |
| 1553 | { |
| 1554 | uint8_t tmp; |
| 1555 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1556 | tmp &= mask; |
| 1557 | return tmp; |
| 1558 | } |
| 1559 | |
| 1560 | static inline void hri_usbhost_write_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 1561 | hri_usbhost_pcfg_reg_t data) |
| 1562 | { |
| 1563 | USB_CRITICAL_SECTION_ENTER(); |
| 1564 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = data; |
| 1565 | USB_CRITICAL_SECTION_LEAVE(); |
| 1566 | } |
| 1567 | |
| 1568 | static inline void hri_usbhost_clear_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 1569 | hri_usbhost_pcfg_reg_t mask) |
| 1570 | { |
| 1571 | USB_CRITICAL_SECTION_ENTER(); |
| 1572 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~mask; |
| 1573 | USB_CRITICAL_SECTION_LEAVE(); |
| 1574 | } |
| 1575 | |
| 1576 | static inline void hri_usbhost_toggle_PCFG_reg(const void *const hw, uint8_t submodule_index, |
| 1577 | hri_usbhost_pcfg_reg_t mask) |
| 1578 | { |
| 1579 | USB_CRITICAL_SECTION_ENTER(); |
| 1580 | ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= mask; |
| 1581 | USB_CRITICAL_SECTION_LEAVE(); |
| 1582 | } |
| 1583 | |
| 1584 | static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_reg(const void *const hw, uint8_t submodule_index) |
| 1585 | { |
| 1586 | return ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg; |
| 1587 | } |
| 1588 | |
| 1589 | static inline void hri_usbhost_set_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 1590 | hri_usbhost_binterval_reg_t mask) |
| 1591 | { |
| 1592 | USB_CRITICAL_SECTION_ENTER(); |
| 1593 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg |= USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 1594 | USB_CRITICAL_SECTION_LEAVE(); |
| 1595 | } |
| 1596 | |
| 1597 | static inline hri_usbhost_binterval_reg_t hri_usbhost_get_BINTERVAL_BITINTERVAL_bf(const void *const hw, |
| 1598 | uint8_t submodule_index, |
| 1599 | hri_usbhost_binterval_reg_t mask) |
| 1600 | { |
| 1601 | uint8_t tmp; |
| 1602 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg; |
| 1603 | tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL(mask)) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos; |
| 1604 | return tmp; |
| 1605 | } |
| 1606 | |
| 1607 | static inline void hri_usbhost_write_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 1608 | hri_usbhost_binterval_reg_t data) |
| 1609 | { |
| 1610 | uint8_t tmp; |
| 1611 | USB_CRITICAL_SECTION_ENTER(); |
| 1612 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg; |
| 1613 | tmp &= ~USB_HOST_BINTERVAL_BITINTERVAL_Msk; |
| 1614 | tmp |= USB_HOST_BINTERVAL_BITINTERVAL(data); |
| 1615 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = tmp; |
| 1616 | USB_CRITICAL_SECTION_LEAVE(); |
| 1617 | } |
| 1618 | |
| 1619 | static inline void hri_usbhost_clear_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 1620 | hri_usbhost_binterval_reg_t mask) |
| 1621 | { |
| 1622 | USB_CRITICAL_SECTION_ENTER(); |
| 1623 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg &= ~USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 1624 | USB_CRITICAL_SECTION_LEAVE(); |
| 1625 | } |
| 1626 | |
| 1627 | static inline void hri_usbhost_toggle_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index, |
| 1628 | hri_usbhost_binterval_reg_t mask) |
| 1629 | { |
| 1630 | USB_CRITICAL_SECTION_ENTER(); |
| 1631 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg ^= USB_HOST_BINTERVAL_BITINTERVAL(mask); |
| 1632 | USB_CRITICAL_SECTION_LEAVE(); |
| 1633 | } |
| 1634 | |
| 1635 | static inline hri_usbhost_binterval_reg_t hri_usbhost_read_BINTERVAL_BITINTERVAL_bf(const void *const hw, |
| 1636 | uint8_t submodule_index) |
| 1637 | { |
| 1638 | uint8_t tmp; |
| 1639 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg; |
| 1640 | tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL_Msk) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos; |
| 1641 | return tmp; |
| 1642 | } |
| 1643 | |
| 1644 | static inline void hri_usbhost_set_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 1645 | hri_usbhost_binterval_reg_t mask) |
| 1646 | { |
| 1647 | USB_CRITICAL_SECTION_ENTER(); |
| 1648 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg |= mask; |
| 1649 | USB_CRITICAL_SECTION_LEAVE(); |
| 1650 | } |
| 1651 | |
| 1652 | static inline hri_usbhost_binterval_reg_t hri_usbhost_get_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 1653 | hri_usbhost_binterval_reg_t mask) |
| 1654 | { |
| 1655 | uint8_t tmp; |
| 1656 | tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg; |
| 1657 | tmp &= mask; |
| 1658 | return tmp; |
| 1659 | } |
| 1660 | |
| 1661 | static inline void hri_usbhost_write_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 1662 | hri_usbhost_binterval_reg_t data) |
| 1663 | { |
| 1664 | USB_CRITICAL_SECTION_ENTER(); |
| 1665 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = data; |
| 1666 | USB_CRITICAL_SECTION_LEAVE(); |
| 1667 | } |
| 1668 | |
| 1669 | static inline void hri_usbhost_clear_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 1670 | hri_usbhost_binterval_reg_t mask) |
| 1671 | { |
| 1672 | USB_CRITICAL_SECTION_ENTER(); |
| 1673 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg &= ~mask; |
| 1674 | USB_CRITICAL_SECTION_LEAVE(); |
| 1675 | } |
| 1676 | |
| 1677 | static inline void hri_usbhost_toggle_BINTERVAL_reg(const void *const hw, uint8_t submodule_index, |
| 1678 | hri_usbhost_binterval_reg_t mask) |
| 1679 | { |
| 1680 | USB_CRITICAL_SECTION_ENTER(); |
| 1681 | ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg ^= mask; |
| 1682 | USB_CRITICAL_SECTION_LEAVE(); |
| 1683 | } |
| 1684 | |
| 1685 | static inline hri_usbhost_binterval_reg_t hri_usbhost_read_BINTERVAL_reg(const void *const hw, uint8_t submodule_index) |
| 1686 | { |
| 1687 | return ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg; |
| 1688 | } |
| 1689 | |
| 1690 | static inline void hri_usbhostdescbank_set_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1691 | { |
| 1692 | USB_CRITICAL_SECTION_ENTER(); |
| 1693 | ((UsbHostDescBank *)hw)->ADDR.reg |= USB_HOST_ADDR_ADDR(mask); |
| 1694 | USB_CRITICAL_SECTION_LEAVE(); |
| 1695 | } |
| 1696 | |
| 1697 | static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_get_ADDR_ADDR_bf(const void *const hw, |
| 1698 | hri_usbdesc_bank_addr_reg_t mask) |
| 1699 | { |
| 1700 | uint32_t tmp; |
| 1701 | tmp = ((UsbHostDescBank *)hw)->ADDR.reg; |
| 1702 | tmp = (tmp & USB_HOST_ADDR_ADDR(mask)) >> USB_HOST_ADDR_ADDR_Pos; |
| 1703 | return tmp; |
| 1704 | } |
| 1705 | |
| 1706 | static inline void hri_usbhostdescbank_write_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t data) |
| 1707 | { |
| 1708 | uint32_t tmp; |
| 1709 | USB_CRITICAL_SECTION_ENTER(); |
| 1710 | tmp = ((UsbHostDescBank *)hw)->ADDR.reg; |
| 1711 | tmp &= ~USB_HOST_ADDR_ADDR_Msk; |
| 1712 | tmp |= USB_HOST_ADDR_ADDR(data); |
| 1713 | ((UsbHostDescBank *)hw)->ADDR.reg = tmp; |
| 1714 | USB_CRITICAL_SECTION_LEAVE(); |
| 1715 | } |
| 1716 | |
| 1717 | static inline void hri_usbhostdescbank_clear_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1718 | { |
| 1719 | USB_CRITICAL_SECTION_ENTER(); |
| 1720 | ((UsbHostDescBank *)hw)->ADDR.reg &= ~USB_HOST_ADDR_ADDR(mask); |
| 1721 | USB_CRITICAL_SECTION_LEAVE(); |
| 1722 | } |
| 1723 | |
| 1724 | static inline void hri_usbhostdescbank_toggle_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1725 | { |
| 1726 | USB_CRITICAL_SECTION_ENTER(); |
| 1727 | ((UsbHostDescBank *)hw)->ADDR.reg ^= USB_HOST_ADDR_ADDR(mask); |
| 1728 | USB_CRITICAL_SECTION_LEAVE(); |
| 1729 | } |
| 1730 | |
| 1731 | static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_read_ADDR_ADDR_bf(const void *const hw) |
| 1732 | { |
| 1733 | uint32_t tmp; |
| 1734 | tmp = ((UsbHostDescBank *)hw)->ADDR.reg; |
| 1735 | tmp = (tmp & USB_HOST_ADDR_ADDR_Msk) >> USB_HOST_ADDR_ADDR_Pos; |
| 1736 | return tmp; |
| 1737 | } |
| 1738 | |
| 1739 | static inline void hri_usbhostdescbank_set_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1740 | { |
| 1741 | USB_CRITICAL_SECTION_ENTER(); |
| 1742 | ((UsbHostDescBank *)hw)->ADDR.reg |= mask; |
| 1743 | USB_CRITICAL_SECTION_LEAVE(); |
| 1744 | } |
| 1745 | |
| 1746 | static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_get_ADDR_reg(const void *const hw, |
| 1747 | hri_usbdesc_bank_addr_reg_t mask) |
| 1748 | { |
| 1749 | uint32_t tmp; |
| 1750 | tmp = ((UsbHostDescBank *)hw)->ADDR.reg; |
| 1751 | tmp &= mask; |
| 1752 | return tmp; |
| 1753 | } |
| 1754 | |
| 1755 | static inline void hri_usbhostdescbank_write_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t data) |
| 1756 | { |
| 1757 | USB_CRITICAL_SECTION_ENTER(); |
| 1758 | ((UsbHostDescBank *)hw)->ADDR.reg = data; |
| 1759 | USB_CRITICAL_SECTION_LEAVE(); |
| 1760 | } |
| 1761 | |
| 1762 | static inline void hri_usbhostdescbank_clear_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1763 | { |
| 1764 | USB_CRITICAL_SECTION_ENTER(); |
| 1765 | ((UsbHostDescBank *)hw)->ADDR.reg &= ~mask; |
| 1766 | USB_CRITICAL_SECTION_LEAVE(); |
| 1767 | } |
| 1768 | |
| 1769 | static inline void hri_usbhostdescbank_toggle_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 1770 | { |
| 1771 | USB_CRITICAL_SECTION_ENTER(); |
| 1772 | ((UsbHostDescBank *)hw)->ADDR.reg ^= mask; |
| 1773 | USB_CRITICAL_SECTION_LEAVE(); |
| 1774 | } |
| 1775 | |
| 1776 | static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_read_ADDR_reg(const void *const hw) |
| 1777 | { |
| 1778 | return ((UsbHostDescBank *)hw)->ADDR.reg; |
| 1779 | } |
| 1780 | |
| 1781 | static inline void hri_usbhostdescbank_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 1782 | { |
| 1783 | USB_CRITICAL_SECTION_ENTER(); |
| 1784 | ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_AUTO_ZLP; |
| 1785 | USB_CRITICAL_SECTION_LEAVE(); |
| 1786 | } |
| 1787 | |
| 1788 | static inline bool hri_usbhostdescbank_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 1789 | { |
| 1790 | uint32_t tmp; |
| 1791 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1792 | tmp = (tmp & USB_HOST_PCKSIZE_AUTO_ZLP) >> USB_HOST_PCKSIZE_AUTO_ZLP_Pos; |
| 1793 | return (bool)tmp; |
| 1794 | } |
| 1795 | |
| 1796 | static inline void hri_usbhostdescbank_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, bool value) |
| 1797 | { |
| 1798 | uint32_t tmp; |
| 1799 | USB_CRITICAL_SECTION_ENTER(); |
| 1800 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1801 | tmp &= ~USB_HOST_PCKSIZE_AUTO_ZLP; |
| 1802 | tmp |= value << USB_HOST_PCKSIZE_AUTO_ZLP_Pos; |
| 1803 | ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp; |
| 1804 | USB_CRITICAL_SECTION_LEAVE(); |
| 1805 | } |
| 1806 | |
| 1807 | static inline void hri_usbhostdescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 1808 | { |
| 1809 | USB_CRITICAL_SECTION_ENTER(); |
| 1810 | ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_AUTO_ZLP; |
| 1811 | USB_CRITICAL_SECTION_LEAVE(); |
| 1812 | } |
| 1813 | |
| 1814 | static inline void hri_usbhostdescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 1815 | { |
| 1816 | USB_CRITICAL_SECTION_ENTER(); |
| 1817 | ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_AUTO_ZLP; |
| 1818 | USB_CRITICAL_SECTION_LEAVE(); |
| 1819 | } |
| 1820 | |
| 1821 | static inline void hri_usbhostdescbank_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 1822 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1823 | { |
| 1824 | USB_CRITICAL_SECTION_ENTER(); |
| 1825 | ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 1826 | USB_CRITICAL_SECTION_LEAVE(); |
| 1827 | } |
| 1828 | |
| 1829 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 1830 | hri_usbhostdescbank_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1831 | { |
| 1832 | uint32_t tmp; |
| 1833 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1834 | tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT(mask)) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos; |
| 1835 | return tmp; |
| 1836 | } |
| 1837 | |
| 1838 | static inline void hri_usbhostdescbank_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 1839 | hri_usbdesc_bank_pcksize_reg_t data) |
| 1840 | { |
| 1841 | uint32_t tmp; |
| 1842 | USB_CRITICAL_SECTION_ENTER(); |
| 1843 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1844 | tmp &= ~USB_HOST_PCKSIZE_BYTE_COUNT_Msk; |
| 1845 | tmp |= USB_HOST_PCKSIZE_BYTE_COUNT(data); |
| 1846 | ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp; |
| 1847 | USB_CRITICAL_SECTION_LEAVE(); |
| 1848 | } |
| 1849 | |
| 1850 | static inline void hri_usbhostdescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 1851 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1852 | { |
| 1853 | USB_CRITICAL_SECTION_ENTER(); |
| 1854 | ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 1855 | USB_CRITICAL_SECTION_LEAVE(); |
| 1856 | } |
| 1857 | |
| 1858 | static inline void hri_usbhostdescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 1859 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1860 | { |
| 1861 | USB_CRITICAL_SECTION_ENTER(); |
| 1862 | ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 1863 | USB_CRITICAL_SECTION_LEAVE(); |
| 1864 | } |
| 1865 | |
| 1866 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw) |
| 1867 | { |
| 1868 | uint32_t tmp; |
| 1869 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1870 | tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT_Msk) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos; |
| 1871 | return tmp; |
| 1872 | } |
| 1873 | |
| 1874 | static inline void hri_usbhostdescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 1875 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1876 | { |
| 1877 | USB_CRITICAL_SECTION_ENTER(); |
| 1878 | ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 1879 | USB_CRITICAL_SECTION_LEAVE(); |
| 1880 | } |
| 1881 | |
| 1882 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 1883 | hri_usbhostdescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1884 | { |
| 1885 | uint32_t tmp; |
| 1886 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1887 | tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 1888 | return tmp; |
| 1889 | } |
| 1890 | |
| 1891 | static inline void hri_usbhostdescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 1892 | hri_usbdesc_bank_pcksize_reg_t data) |
| 1893 | { |
| 1894 | uint32_t tmp; |
| 1895 | USB_CRITICAL_SECTION_ENTER(); |
| 1896 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1897 | tmp &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk; |
| 1898 | tmp |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(data); |
| 1899 | ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp; |
| 1900 | USB_CRITICAL_SECTION_LEAVE(); |
| 1901 | } |
| 1902 | |
| 1903 | static inline void hri_usbhostdescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 1904 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1905 | { |
| 1906 | USB_CRITICAL_SECTION_ENTER(); |
| 1907 | ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 1908 | USB_CRITICAL_SECTION_LEAVE(); |
| 1909 | } |
| 1910 | |
| 1911 | static inline void hri_usbhostdescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 1912 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1913 | { |
| 1914 | USB_CRITICAL_SECTION_ENTER(); |
| 1915 | ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 1916 | USB_CRITICAL_SECTION_LEAVE(); |
| 1917 | } |
| 1918 | |
| 1919 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw) |
| 1920 | { |
| 1921 | uint32_t tmp; |
| 1922 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1923 | tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 1924 | return tmp; |
| 1925 | } |
| 1926 | |
| 1927 | static inline void hri_usbhostdescbank_set_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1928 | { |
| 1929 | USB_CRITICAL_SECTION_ENTER(); |
| 1930 | ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_SIZE(mask); |
| 1931 | USB_CRITICAL_SECTION_LEAVE(); |
| 1932 | } |
| 1933 | |
| 1934 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 1935 | hri_usbhostdescbank_get_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1936 | { |
| 1937 | uint32_t tmp; |
| 1938 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1939 | tmp = (tmp & USB_HOST_PCKSIZE_SIZE(mask)) >> USB_HOST_PCKSIZE_SIZE_Pos; |
| 1940 | return tmp; |
| 1941 | } |
| 1942 | |
| 1943 | static inline void hri_usbhostdescbank_write_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data) |
| 1944 | { |
| 1945 | uint32_t tmp; |
| 1946 | USB_CRITICAL_SECTION_ENTER(); |
| 1947 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1948 | tmp &= ~USB_HOST_PCKSIZE_SIZE_Msk; |
| 1949 | tmp |= USB_HOST_PCKSIZE_SIZE(data); |
| 1950 | ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp; |
| 1951 | USB_CRITICAL_SECTION_LEAVE(); |
| 1952 | } |
| 1953 | |
| 1954 | static inline void hri_usbhostdescbank_clear_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1955 | { |
| 1956 | USB_CRITICAL_SECTION_ENTER(); |
| 1957 | ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_SIZE(mask); |
| 1958 | USB_CRITICAL_SECTION_LEAVE(); |
| 1959 | } |
| 1960 | |
| 1961 | static inline void hri_usbhostdescbank_toggle_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1962 | { |
| 1963 | USB_CRITICAL_SECTION_ENTER(); |
| 1964 | ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_SIZE(mask); |
| 1965 | USB_CRITICAL_SECTION_LEAVE(); |
| 1966 | } |
| 1967 | |
| 1968 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_SIZE_bf(const void *const hw) |
| 1969 | { |
| 1970 | uint32_t tmp; |
| 1971 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1972 | tmp = (tmp & USB_HOST_PCKSIZE_SIZE_Msk) >> USB_HOST_PCKSIZE_SIZE_Pos; |
| 1973 | return tmp; |
| 1974 | } |
| 1975 | |
| 1976 | static inline void hri_usbhostdescbank_set_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 1977 | { |
| 1978 | USB_CRITICAL_SECTION_ENTER(); |
| 1979 | ((UsbHostDescBank *)hw)->PCKSIZE.reg |= mask; |
| 1980 | USB_CRITICAL_SECTION_LEAVE(); |
| 1981 | } |
| 1982 | |
| 1983 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_get_PCKSIZE_reg(const void *const hw, |
| 1984 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 1985 | { |
| 1986 | uint32_t tmp; |
| 1987 | tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 1988 | tmp &= mask; |
| 1989 | return tmp; |
| 1990 | } |
| 1991 | |
| 1992 | static inline void hri_usbhostdescbank_write_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data) |
| 1993 | { |
| 1994 | USB_CRITICAL_SECTION_ENTER(); |
| 1995 | ((UsbHostDescBank *)hw)->PCKSIZE.reg = data; |
| 1996 | USB_CRITICAL_SECTION_LEAVE(); |
| 1997 | } |
| 1998 | |
| 1999 | static inline void hri_usbhostdescbank_clear_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 2000 | { |
| 2001 | USB_CRITICAL_SECTION_ENTER(); |
| 2002 | ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~mask; |
| 2003 | USB_CRITICAL_SECTION_LEAVE(); |
| 2004 | } |
| 2005 | |
| 2006 | static inline void hri_usbhostdescbank_toggle_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 2007 | { |
| 2008 | USB_CRITICAL_SECTION_ENTER(); |
| 2009 | ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= mask; |
| 2010 | USB_CRITICAL_SECTION_LEAVE(); |
| 2011 | } |
| 2012 | |
| 2013 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_reg(const void *const hw) |
| 2014 | { |
| 2015 | return ((UsbHostDescBank *)hw)->PCKSIZE.reg; |
| 2016 | } |
| 2017 | |
| 2018 | static inline void hri_usbhostdescbank_set_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2019 | { |
| 2020 | USB_CRITICAL_SECTION_ENTER(); |
| 2021 | ((UsbHostDescBank *)hw)->EXTREG.reg |= USB_HOST_EXTREG_SUBPID(mask); |
| 2022 | USB_CRITICAL_SECTION_LEAVE(); |
| 2023 | } |
| 2024 | |
| 2025 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_get_EXTREG_SUBPID_bf(const void *const hw, |
| 2026 | hri_usbdesc_bank_extreg_reg_t mask) |
| 2027 | { |
| 2028 | uint16_t tmp; |
| 2029 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2030 | tmp = (tmp & USB_HOST_EXTREG_SUBPID(mask)) >> USB_HOST_EXTREG_SUBPID_Pos; |
| 2031 | return tmp; |
| 2032 | } |
| 2033 | |
| 2034 | static inline void hri_usbhostdescbank_write_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t data) |
| 2035 | { |
| 2036 | uint16_t tmp; |
| 2037 | USB_CRITICAL_SECTION_ENTER(); |
| 2038 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2039 | tmp &= ~USB_HOST_EXTREG_SUBPID_Msk; |
| 2040 | tmp |= USB_HOST_EXTREG_SUBPID(data); |
| 2041 | ((UsbHostDescBank *)hw)->EXTREG.reg = tmp; |
| 2042 | USB_CRITICAL_SECTION_LEAVE(); |
| 2043 | } |
| 2044 | |
| 2045 | static inline void hri_usbhostdescbank_clear_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2046 | { |
| 2047 | USB_CRITICAL_SECTION_ENTER(); |
| 2048 | ((UsbHostDescBank *)hw)->EXTREG.reg &= ~USB_HOST_EXTREG_SUBPID(mask); |
| 2049 | USB_CRITICAL_SECTION_LEAVE(); |
| 2050 | } |
| 2051 | |
| 2052 | static inline void hri_usbhostdescbank_toggle_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2053 | { |
| 2054 | USB_CRITICAL_SECTION_ENTER(); |
| 2055 | ((UsbHostDescBank *)hw)->EXTREG.reg ^= USB_HOST_EXTREG_SUBPID(mask); |
| 2056 | USB_CRITICAL_SECTION_LEAVE(); |
| 2057 | } |
| 2058 | |
| 2059 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_SUBPID_bf(const void *const hw) |
| 2060 | { |
| 2061 | uint16_t tmp; |
| 2062 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2063 | tmp = (tmp & USB_HOST_EXTREG_SUBPID_Msk) >> USB_HOST_EXTREG_SUBPID_Pos; |
| 2064 | return tmp; |
| 2065 | } |
| 2066 | |
| 2067 | static inline void hri_usbhostdescbank_set_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2068 | { |
| 2069 | USB_CRITICAL_SECTION_ENTER(); |
| 2070 | ((UsbHostDescBank *)hw)->EXTREG.reg |= USB_HOST_EXTREG_VARIABLE(mask); |
| 2071 | USB_CRITICAL_SECTION_LEAVE(); |
| 2072 | } |
| 2073 | |
| 2074 | static inline hri_usbdesc_bank_extreg_reg_t |
| 2075 | hri_usbhostdescbank_get_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2076 | { |
| 2077 | uint16_t tmp; |
| 2078 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2079 | tmp = (tmp & USB_HOST_EXTREG_VARIABLE(mask)) >> USB_HOST_EXTREG_VARIABLE_Pos; |
| 2080 | return tmp; |
| 2081 | } |
| 2082 | |
| 2083 | static inline void hri_usbhostdescbank_write_EXTREG_VARIABLE_bf(const void *const hw, |
| 2084 | hri_usbdesc_bank_extreg_reg_t data) |
| 2085 | { |
| 2086 | uint16_t tmp; |
| 2087 | USB_CRITICAL_SECTION_ENTER(); |
| 2088 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2089 | tmp &= ~USB_HOST_EXTREG_VARIABLE_Msk; |
| 2090 | tmp |= USB_HOST_EXTREG_VARIABLE(data); |
| 2091 | ((UsbHostDescBank *)hw)->EXTREG.reg = tmp; |
| 2092 | USB_CRITICAL_SECTION_LEAVE(); |
| 2093 | } |
| 2094 | |
| 2095 | static inline void hri_usbhostdescbank_clear_EXTREG_VARIABLE_bf(const void *const hw, |
| 2096 | hri_usbdesc_bank_extreg_reg_t mask) |
| 2097 | { |
| 2098 | USB_CRITICAL_SECTION_ENTER(); |
| 2099 | ((UsbHostDescBank *)hw)->EXTREG.reg &= ~USB_HOST_EXTREG_VARIABLE(mask); |
| 2100 | USB_CRITICAL_SECTION_LEAVE(); |
| 2101 | } |
| 2102 | |
| 2103 | static inline void hri_usbhostdescbank_toggle_EXTREG_VARIABLE_bf(const void *const hw, |
| 2104 | hri_usbdesc_bank_extreg_reg_t mask) |
| 2105 | { |
| 2106 | USB_CRITICAL_SECTION_ENTER(); |
| 2107 | ((UsbHostDescBank *)hw)->EXTREG.reg ^= USB_HOST_EXTREG_VARIABLE(mask); |
| 2108 | USB_CRITICAL_SECTION_LEAVE(); |
| 2109 | } |
| 2110 | |
| 2111 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_VARIABLE_bf(const void *const hw) |
| 2112 | { |
| 2113 | uint16_t tmp; |
| 2114 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2115 | tmp = (tmp & USB_HOST_EXTREG_VARIABLE_Msk) >> USB_HOST_EXTREG_VARIABLE_Pos; |
| 2116 | return tmp; |
| 2117 | } |
| 2118 | |
| 2119 | static inline void hri_usbhostdescbank_set_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2120 | { |
| 2121 | USB_CRITICAL_SECTION_ENTER(); |
| 2122 | ((UsbHostDescBank *)hw)->EXTREG.reg |= mask; |
| 2123 | USB_CRITICAL_SECTION_LEAVE(); |
| 2124 | } |
| 2125 | |
| 2126 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_get_EXTREG_reg(const void *const hw, |
| 2127 | hri_usbdesc_bank_extreg_reg_t mask) |
| 2128 | { |
| 2129 | uint16_t tmp; |
| 2130 | tmp = ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2131 | tmp &= mask; |
| 2132 | return tmp; |
| 2133 | } |
| 2134 | |
| 2135 | static inline void hri_usbhostdescbank_write_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t data) |
| 2136 | { |
| 2137 | USB_CRITICAL_SECTION_ENTER(); |
| 2138 | ((UsbHostDescBank *)hw)->EXTREG.reg = data; |
| 2139 | USB_CRITICAL_SECTION_LEAVE(); |
| 2140 | } |
| 2141 | |
| 2142 | static inline void hri_usbhostdescbank_clear_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2143 | { |
| 2144 | USB_CRITICAL_SECTION_ENTER(); |
| 2145 | ((UsbHostDescBank *)hw)->EXTREG.reg &= ~mask; |
| 2146 | USB_CRITICAL_SECTION_LEAVE(); |
| 2147 | } |
| 2148 | |
| 2149 | static inline void hri_usbhostdescbank_toggle_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 2150 | { |
| 2151 | USB_CRITICAL_SECTION_ENTER(); |
| 2152 | ((UsbHostDescBank *)hw)->EXTREG.reg ^= mask; |
| 2153 | USB_CRITICAL_SECTION_LEAVE(); |
| 2154 | } |
| 2155 | |
| 2156 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_reg(const void *const hw) |
| 2157 | { |
| 2158 | return ((UsbHostDescBank *)hw)->EXTREG.reg; |
| 2159 | } |
| 2160 | |
| 2161 | static inline void hri_usbhostdescbank_set_CTRL_PIPE_PDADDR_bf(const void *const hw, |
| 2162 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2163 | { |
| 2164 | USB_CRITICAL_SECTION_ENTER(); |
| 2165 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 2166 | USB_CRITICAL_SECTION_LEAVE(); |
| 2167 | } |
| 2168 | |
| 2169 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t |
| 2170 | hri_usbhostdescbank_get_CTRL_PIPE_PDADDR_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2171 | { |
| 2172 | uint16_t tmp; |
| 2173 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2174 | tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR(mask)) >> USB_HOST_CTRL_PIPE_PDADDR_Pos; |
| 2175 | return tmp; |
| 2176 | } |
| 2177 | |
| 2178 | static inline void hri_usbhostdescbank_write_CTRL_PIPE_PDADDR_bf(const void *const hw, |
| 2179 | hri_usbdesc_bank_ctrl_pipe_reg_t data) |
| 2180 | { |
| 2181 | uint16_t tmp; |
| 2182 | USB_CRITICAL_SECTION_ENTER(); |
| 2183 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2184 | tmp &= ~USB_HOST_CTRL_PIPE_PDADDR_Msk; |
| 2185 | tmp |= USB_HOST_CTRL_PIPE_PDADDR(data); |
| 2186 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp; |
| 2187 | USB_CRITICAL_SECTION_LEAVE(); |
| 2188 | } |
| 2189 | |
| 2190 | static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PDADDR_bf(const void *const hw, |
| 2191 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2192 | { |
| 2193 | USB_CRITICAL_SECTION_ENTER(); |
| 2194 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 2195 | USB_CRITICAL_SECTION_LEAVE(); |
| 2196 | } |
| 2197 | |
| 2198 | static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PDADDR_bf(const void *const hw, |
| 2199 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2200 | { |
| 2201 | USB_CRITICAL_SECTION_ENTER(); |
| 2202 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 2203 | USB_CRITICAL_SECTION_LEAVE(); |
| 2204 | } |
| 2205 | |
| 2206 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PDADDR_bf(const void *const hw) |
| 2207 | { |
| 2208 | uint16_t tmp; |
| 2209 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2210 | tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR_Msk) >> USB_HOST_CTRL_PIPE_PDADDR_Pos; |
| 2211 | return tmp; |
| 2212 | } |
| 2213 | |
| 2214 | static inline void hri_usbhostdescbank_set_CTRL_PIPE_PEPNUM_bf(const void *const hw, |
| 2215 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2216 | { |
| 2217 | USB_CRITICAL_SECTION_ENTER(); |
| 2218 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 2219 | USB_CRITICAL_SECTION_LEAVE(); |
| 2220 | } |
| 2221 | |
| 2222 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t |
| 2223 | hri_usbhostdescbank_get_CTRL_PIPE_PEPNUM_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2224 | { |
| 2225 | uint16_t tmp; |
| 2226 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2227 | tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM(mask)) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos; |
| 2228 | return tmp; |
| 2229 | } |
| 2230 | |
| 2231 | static inline void hri_usbhostdescbank_write_CTRL_PIPE_PEPNUM_bf(const void *const hw, |
| 2232 | hri_usbdesc_bank_ctrl_pipe_reg_t data) |
| 2233 | { |
| 2234 | uint16_t tmp; |
| 2235 | USB_CRITICAL_SECTION_ENTER(); |
| 2236 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2237 | tmp &= ~USB_HOST_CTRL_PIPE_PEPNUM_Msk; |
| 2238 | tmp |= USB_HOST_CTRL_PIPE_PEPNUM(data); |
| 2239 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp; |
| 2240 | USB_CRITICAL_SECTION_LEAVE(); |
| 2241 | } |
| 2242 | |
| 2243 | static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PEPNUM_bf(const void *const hw, |
| 2244 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2245 | { |
| 2246 | USB_CRITICAL_SECTION_ENTER(); |
| 2247 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 2248 | USB_CRITICAL_SECTION_LEAVE(); |
| 2249 | } |
| 2250 | |
| 2251 | static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PEPNUM_bf(const void *const hw, |
| 2252 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2253 | { |
| 2254 | USB_CRITICAL_SECTION_ENTER(); |
| 2255 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 2256 | USB_CRITICAL_SECTION_LEAVE(); |
| 2257 | } |
| 2258 | |
| 2259 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PEPNUM_bf(const void *const hw) |
| 2260 | { |
| 2261 | uint16_t tmp; |
| 2262 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2263 | tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM_Msk) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos; |
| 2264 | return tmp; |
| 2265 | } |
| 2266 | |
| 2267 | static inline void hri_usbhostdescbank_set_CTRL_PIPE_PERMAX_bf(const void *const hw, |
| 2268 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2269 | { |
| 2270 | USB_CRITICAL_SECTION_ENTER(); |
| 2271 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 2272 | USB_CRITICAL_SECTION_LEAVE(); |
| 2273 | } |
| 2274 | |
| 2275 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t |
| 2276 | hri_usbhostdescbank_get_CTRL_PIPE_PERMAX_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2277 | { |
| 2278 | uint16_t tmp; |
| 2279 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2280 | tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX(mask)) >> USB_HOST_CTRL_PIPE_PERMAX_Pos; |
| 2281 | return tmp; |
| 2282 | } |
| 2283 | |
| 2284 | static inline void hri_usbhostdescbank_write_CTRL_PIPE_PERMAX_bf(const void *const hw, |
| 2285 | hri_usbdesc_bank_ctrl_pipe_reg_t data) |
| 2286 | { |
| 2287 | uint16_t tmp; |
| 2288 | USB_CRITICAL_SECTION_ENTER(); |
| 2289 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2290 | tmp &= ~USB_HOST_CTRL_PIPE_PERMAX_Msk; |
| 2291 | tmp |= USB_HOST_CTRL_PIPE_PERMAX(data); |
| 2292 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp; |
| 2293 | USB_CRITICAL_SECTION_LEAVE(); |
| 2294 | } |
| 2295 | |
| 2296 | static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PERMAX_bf(const void *const hw, |
| 2297 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2298 | { |
| 2299 | USB_CRITICAL_SECTION_ENTER(); |
| 2300 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 2301 | USB_CRITICAL_SECTION_LEAVE(); |
| 2302 | } |
| 2303 | |
| 2304 | static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PERMAX_bf(const void *const hw, |
| 2305 | hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2306 | { |
| 2307 | USB_CRITICAL_SECTION_ENTER(); |
| 2308 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 2309 | USB_CRITICAL_SECTION_LEAVE(); |
| 2310 | } |
| 2311 | |
| 2312 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PERMAX_bf(const void *const hw) |
| 2313 | { |
| 2314 | uint16_t tmp; |
| 2315 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2316 | tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX_Msk) >> USB_HOST_CTRL_PIPE_PERMAX_Pos; |
| 2317 | return tmp; |
| 2318 | } |
| 2319 | |
| 2320 | static inline void hri_usbhostdescbank_set_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2321 | { |
| 2322 | USB_CRITICAL_SECTION_ENTER(); |
| 2323 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= mask; |
| 2324 | USB_CRITICAL_SECTION_LEAVE(); |
| 2325 | } |
| 2326 | |
| 2327 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t |
| 2328 | hri_usbhostdescbank_get_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2329 | { |
| 2330 | uint16_t tmp; |
| 2331 | tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2332 | tmp &= mask; |
| 2333 | return tmp; |
| 2334 | } |
| 2335 | |
| 2336 | static inline void hri_usbhostdescbank_write_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t data) |
| 2337 | { |
| 2338 | USB_CRITICAL_SECTION_ENTER(); |
| 2339 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = data; |
| 2340 | USB_CRITICAL_SECTION_LEAVE(); |
| 2341 | } |
| 2342 | |
| 2343 | static inline void hri_usbhostdescbank_clear_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2344 | { |
| 2345 | USB_CRITICAL_SECTION_ENTER(); |
| 2346 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~mask; |
| 2347 | USB_CRITICAL_SECTION_LEAVE(); |
| 2348 | } |
| 2349 | |
| 2350 | static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask) |
| 2351 | { |
| 2352 | USB_CRITICAL_SECTION_ENTER(); |
| 2353 | ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= mask; |
| 2354 | USB_CRITICAL_SECTION_LEAVE(); |
| 2355 | } |
| 2356 | |
| 2357 | static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_reg(const void *const hw) |
| 2358 | { |
| 2359 | return ((UsbHostDescBank *)hw)->CTRL_PIPE.reg; |
| 2360 | } |
| 2361 | |
| 2362 | static inline bool hri_usbhostdescbank_get_STATUS_BK_CRCERR_bit(const void *const hw) |
| 2363 | { |
| 2364 | return (((UsbHostDescBank *)hw)->STATUS_BK.reg & USB_HOST_STATUS_BK_CRCERR) >> USB_HOST_STATUS_BK_CRCERR_Pos; |
| 2365 | } |
| 2366 | |
| 2367 | static inline void hri_usbhostdescbank_clear_STATUS_BK_CRCERR_bit(const void *const hw) |
| 2368 | { |
| 2369 | USB_CRITICAL_SECTION_ENTER(); |
| 2370 | ((UsbHostDescBank *)hw)->STATUS_BK.reg = USB_HOST_STATUS_BK_CRCERR; |
| 2371 | USB_CRITICAL_SECTION_LEAVE(); |
| 2372 | } |
| 2373 | |
| 2374 | static inline bool hri_usbhostdescbank_get_STATUS_BK_ERRORFLOW_bit(const void *const hw) |
| 2375 | { |
| 2376 | return (((UsbHostDescBank *)hw)->STATUS_BK.reg & USB_HOST_STATUS_BK_ERRORFLOW) >> USB_HOST_STATUS_BK_ERRORFLOW_Pos; |
| 2377 | } |
| 2378 | |
| 2379 | static inline void hri_usbhostdescbank_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw) |
| 2380 | { |
| 2381 | USB_CRITICAL_SECTION_ENTER(); |
| 2382 | ((UsbHostDescBank *)hw)->STATUS_BK.reg = USB_HOST_STATUS_BK_ERRORFLOW; |
| 2383 | USB_CRITICAL_SECTION_LEAVE(); |
| 2384 | } |
| 2385 | |
| 2386 | static inline hri_usbdesc_bank_status_bk_reg_t |
| 2387 | hri_usbhostdescbank_get_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask) |
| 2388 | { |
| 2389 | uint8_t tmp; |
| 2390 | tmp = ((UsbHostDescBank *)hw)->STATUS_BK.reg; |
| 2391 | tmp &= mask; |
| 2392 | return tmp; |
| 2393 | } |
| 2394 | |
| 2395 | static inline void hri_usbhostdescbank_clear_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask) |
| 2396 | { |
| 2397 | USB_CRITICAL_SECTION_ENTER(); |
| 2398 | ((UsbHostDescBank *)hw)->STATUS_BK.reg = mask; |
| 2399 | USB_CRITICAL_SECTION_LEAVE(); |
| 2400 | } |
| 2401 | |
| 2402 | static inline hri_usbdesc_bank_status_bk_reg_t hri_usbhostdescbank_read_STATUS_BK_reg(const void *const hw) |
| 2403 | { |
| 2404 | return ((UsbHostDescBank *)hw)->STATUS_BK.reg; |
| 2405 | } |
| 2406 | |
| 2407 | static inline bool hri_usbhostdescbank_get_STATUS_PIPE_DTGLER_bit(const void *const hw) |
| 2408 | { |
| 2409 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DTGLER) >> USB_HOST_STATUS_PIPE_DTGLER_Pos; |
| 2410 | } |
| 2411 | |
| 2412 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_DTGLER_bit(const void *const hw) |
| 2413 | { |
| 2414 | USB_CRITICAL_SECTION_ENTER(); |
| 2415 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DTGLER; |
| 2416 | USB_CRITICAL_SECTION_LEAVE(); |
| 2417 | } |
| 2418 | |
| 2419 | static inline bool hri_usbhostdescbank_get_STATUS_PIPE_DAPIDER_bit(const void *const hw) |
| 2420 | { |
| 2421 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DAPIDER) |
| 2422 | >> USB_HOST_STATUS_PIPE_DAPIDER_Pos; |
| 2423 | } |
| 2424 | |
| 2425 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_DAPIDER_bit(const void *const hw) |
| 2426 | { |
| 2427 | USB_CRITICAL_SECTION_ENTER(); |
| 2428 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DAPIDER; |
| 2429 | USB_CRITICAL_SECTION_LEAVE(); |
| 2430 | } |
| 2431 | |
| 2432 | static inline bool hri_usbhostdescbank_get_STATUS_PIPE_PIDER_bit(const void *const hw) |
| 2433 | { |
| 2434 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_PIDER) >> USB_HOST_STATUS_PIPE_PIDER_Pos; |
| 2435 | } |
| 2436 | |
| 2437 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_PIDER_bit(const void *const hw) |
| 2438 | { |
| 2439 | USB_CRITICAL_SECTION_ENTER(); |
| 2440 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_PIDER; |
| 2441 | USB_CRITICAL_SECTION_LEAVE(); |
| 2442 | } |
| 2443 | |
| 2444 | static inline bool hri_usbhostdescbank_get_STATUS_PIPE_TOUTER_bit(const void *const hw) |
| 2445 | { |
| 2446 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_TOUTER) >> USB_HOST_STATUS_PIPE_TOUTER_Pos; |
| 2447 | } |
| 2448 | |
| 2449 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_TOUTER_bit(const void *const hw) |
| 2450 | { |
| 2451 | USB_CRITICAL_SECTION_ENTER(); |
| 2452 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_TOUTER; |
| 2453 | USB_CRITICAL_SECTION_LEAVE(); |
| 2454 | } |
| 2455 | |
| 2456 | static inline bool hri_usbhostdescbank_get_STATUS_PIPE_CRC16ER_bit(const void *const hw) |
| 2457 | { |
| 2458 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_CRC16ER) |
| 2459 | >> USB_HOST_STATUS_PIPE_CRC16ER_Pos; |
| 2460 | } |
| 2461 | |
| 2462 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_CRC16ER_bit(const void *const hw) |
| 2463 | { |
| 2464 | USB_CRITICAL_SECTION_ENTER(); |
| 2465 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_CRC16ER; |
| 2466 | USB_CRITICAL_SECTION_LEAVE(); |
| 2467 | } |
| 2468 | |
| 2469 | static inline hri_usbdesc_bank_status_pipe_reg_t |
| 2470 | hri_usbhostdescbank_get_STATUS_PIPE_ERCNT_bf(const void *const hw, hri_usbdesc_bank_status_pipe_reg_t mask) |
| 2471 | { |
| 2472 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT(mask)) |
| 2473 | >> USB_HOST_STATUS_PIPE_ERCNT_Pos; |
| 2474 | } |
| 2475 | |
| 2476 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_ERCNT_bf(const void *const hw, |
| 2477 | hri_usbdesc_bank_status_pipe_reg_t mask) |
| 2478 | { |
| 2479 | USB_CRITICAL_SECTION_ENTER(); |
| 2480 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_ERCNT(mask); |
| 2481 | USB_CRITICAL_SECTION_LEAVE(); |
| 2482 | } |
| 2483 | |
| 2484 | static inline hri_usbdesc_bank_status_pipe_reg_t hri_usbhostdescbank_read_STATUS_PIPE_ERCNT_bf(const void *const hw) |
| 2485 | { |
| 2486 | return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT_Msk) |
| 2487 | >> USB_HOST_STATUS_PIPE_ERCNT_Pos; |
| 2488 | } |
| 2489 | |
| 2490 | static inline hri_usbdesc_bank_status_pipe_reg_t |
| 2491 | hri_usbhostdescbank_get_STATUS_PIPE_reg(const void *const hw, hri_usbdesc_bank_status_pipe_reg_t mask) |
| 2492 | { |
| 2493 | uint16_t tmp; |
| 2494 | tmp = ((UsbHostDescBank *)hw)->STATUS_PIPE.reg; |
| 2495 | tmp &= mask; |
| 2496 | return tmp; |
| 2497 | } |
| 2498 | |
| 2499 | static inline void hri_usbhostdescbank_clear_STATUS_PIPE_reg(const void *const hw, |
| 2500 | hri_usbdesc_bank_status_pipe_reg_t mask) |
| 2501 | { |
| 2502 | USB_CRITICAL_SECTION_ENTER(); |
| 2503 | ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = mask; |
| 2504 | USB_CRITICAL_SECTION_LEAVE(); |
| 2505 | } |
| 2506 | |
| 2507 | static inline hri_usbdesc_bank_status_pipe_reg_t hri_usbhostdescbank_read_STATUS_PIPE_reg(const void *const hw) |
| 2508 | { |
| 2509 | return ((UsbHostDescBank *)hw)->STATUS_PIPE.reg; |
| 2510 | } |
| 2511 | |
| 2512 | static inline void hri_usbhostdescriptor_set_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 2513 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2514 | { |
| 2515 | USB_CRITICAL_SECTION_ENTER(); |
| 2516 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg |= USB_HOST_ADDR_ADDR(mask); |
| 2517 | USB_CRITICAL_SECTION_LEAVE(); |
| 2518 | } |
| 2519 | |
| 2520 | static inline hri_usbdescriptorhost_addr_reg_t |
| 2521 | hri_usbhostdescriptor_get_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 2522 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2523 | { |
| 2524 | uint32_t tmp; |
| 2525 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg; |
| 2526 | tmp = (tmp & USB_HOST_ADDR_ADDR(mask)) >> USB_HOST_ADDR_ADDR_Pos; |
| 2527 | return tmp; |
| 2528 | } |
| 2529 | |
| 2530 | static inline void hri_usbhostdescriptor_write_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 2531 | hri_usbdescriptorhost_addr_reg_t data) |
| 2532 | { |
| 2533 | uint32_t tmp; |
| 2534 | USB_CRITICAL_SECTION_ENTER(); |
| 2535 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg; |
| 2536 | tmp &= ~USB_HOST_ADDR_ADDR_Msk; |
| 2537 | tmp |= USB_HOST_ADDR_ADDR(data); |
| 2538 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg = tmp; |
| 2539 | USB_CRITICAL_SECTION_LEAVE(); |
| 2540 | } |
| 2541 | |
| 2542 | static inline void hri_usbhostdescriptor_clear_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 2543 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2544 | { |
| 2545 | USB_CRITICAL_SECTION_ENTER(); |
| 2546 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg &= ~USB_HOST_ADDR_ADDR(mask); |
| 2547 | USB_CRITICAL_SECTION_LEAVE(); |
| 2548 | } |
| 2549 | |
| 2550 | static inline void hri_usbhostdescriptor_toggle_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 2551 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2552 | { |
| 2553 | USB_CRITICAL_SECTION_ENTER(); |
| 2554 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg ^= USB_HOST_ADDR_ADDR(mask); |
| 2555 | USB_CRITICAL_SECTION_LEAVE(); |
| 2556 | } |
| 2557 | |
| 2558 | static inline hri_usbdescriptorhost_addr_reg_t hri_usbhostdescriptor_read_ADDR_ADDR_bf(const void *const hw, |
| 2559 | uint8_t submodule_index) |
| 2560 | { |
| 2561 | uint32_t tmp; |
| 2562 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg; |
| 2563 | tmp = (tmp & USB_HOST_ADDR_ADDR_Msk) >> USB_HOST_ADDR_ADDR_Pos; |
| 2564 | return tmp; |
| 2565 | } |
| 2566 | |
| 2567 | static inline void hri_usbhostdescriptor_set_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 2568 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2569 | { |
| 2570 | USB_CRITICAL_SECTION_ENTER(); |
| 2571 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg |= mask; |
| 2572 | USB_CRITICAL_SECTION_LEAVE(); |
| 2573 | } |
| 2574 | |
| 2575 | static inline hri_usbdescriptorhost_addr_reg_t |
| 2576 | hri_usbhostdescriptor_get_ADDR_reg(const void *const hw, uint8_t submodule_index, hri_usbdescriptorhost_addr_reg_t mask) |
| 2577 | { |
| 2578 | uint32_t tmp; |
| 2579 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg; |
| 2580 | tmp &= mask; |
| 2581 | return tmp; |
| 2582 | } |
| 2583 | |
| 2584 | static inline void hri_usbhostdescriptor_write_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 2585 | hri_usbdescriptorhost_addr_reg_t data) |
| 2586 | { |
| 2587 | USB_CRITICAL_SECTION_ENTER(); |
| 2588 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg = data; |
| 2589 | USB_CRITICAL_SECTION_LEAVE(); |
| 2590 | } |
| 2591 | |
| 2592 | static inline void hri_usbhostdescriptor_clear_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 2593 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2594 | { |
| 2595 | USB_CRITICAL_SECTION_ENTER(); |
| 2596 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg &= ~mask; |
| 2597 | USB_CRITICAL_SECTION_LEAVE(); |
| 2598 | } |
| 2599 | |
| 2600 | static inline void hri_usbhostdescriptor_toggle_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 2601 | hri_usbdescriptorhost_addr_reg_t mask) |
| 2602 | { |
| 2603 | USB_CRITICAL_SECTION_ENTER(); |
| 2604 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg ^= mask; |
| 2605 | USB_CRITICAL_SECTION_LEAVE(); |
| 2606 | } |
| 2607 | |
| 2608 | static inline hri_usbdescriptorhost_addr_reg_t hri_usbhostdescriptor_read_ADDR_reg(const void *const hw, |
| 2609 | uint8_t submodule_index) |
| 2610 | { |
| 2611 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg; |
| 2612 | } |
| 2613 | |
| 2614 | static inline void hri_usbhostdescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 2615 | { |
| 2616 | USB_CRITICAL_SECTION_ENTER(); |
| 2617 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_AUTO_ZLP; |
| 2618 | USB_CRITICAL_SECTION_LEAVE(); |
| 2619 | } |
| 2620 | |
| 2621 | static inline bool hri_usbhostdescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 2622 | { |
| 2623 | uint32_t tmp; |
| 2624 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2625 | tmp = (tmp & USB_HOST_PCKSIZE_AUTO_ZLP) >> USB_HOST_PCKSIZE_AUTO_ZLP_Pos; |
| 2626 | return (bool)tmp; |
| 2627 | } |
| 2628 | |
| 2629 | static inline void hri_usbhostdescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index, |
| 2630 | bool value) |
| 2631 | { |
| 2632 | uint32_t tmp; |
| 2633 | USB_CRITICAL_SECTION_ENTER(); |
| 2634 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2635 | tmp &= ~USB_HOST_PCKSIZE_AUTO_ZLP; |
| 2636 | tmp |= value << USB_HOST_PCKSIZE_AUTO_ZLP_Pos; |
| 2637 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 2638 | USB_CRITICAL_SECTION_LEAVE(); |
| 2639 | } |
| 2640 | |
| 2641 | static inline void hri_usbhostdescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 2642 | { |
| 2643 | USB_CRITICAL_SECTION_ENTER(); |
| 2644 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_AUTO_ZLP; |
| 2645 | USB_CRITICAL_SECTION_LEAVE(); |
| 2646 | } |
| 2647 | |
| 2648 | static inline void hri_usbhostdescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 2649 | { |
| 2650 | USB_CRITICAL_SECTION_ENTER(); |
| 2651 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_AUTO_ZLP; |
| 2652 | USB_CRITICAL_SECTION_LEAVE(); |
| 2653 | } |
| 2654 | |
| 2655 | static inline void hri_usbhostdescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 2656 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2657 | { |
| 2658 | USB_CRITICAL_SECTION_ENTER(); |
| 2659 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 2660 | USB_CRITICAL_SECTION_LEAVE(); |
| 2661 | } |
| 2662 | |
| 2663 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2664 | hri_usbhostdescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 2665 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2666 | { |
| 2667 | uint32_t tmp; |
| 2668 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2669 | tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT(mask)) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos; |
| 2670 | return tmp; |
| 2671 | } |
| 2672 | |
| 2673 | static inline void hri_usbhostdescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 2674 | hri_usbdescriptorhost_pcksize_reg_t data) |
| 2675 | { |
| 2676 | uint32_t tmp; |
| 2677 | USB_CRITICAL_SECTION_ENTER(); |
| 2678 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2679 | tmp &= ~USB_HOST_PCKSIZE_BYTE_COUNT_Msk; |
| 2680 | tmp |= USB_HOST_PCKSIZE_BYTE_COUNT(data); |
| 2681 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 2682 | USB_CRITICAL_SECTION_LEAVE(); |
| 2683 | } |
| 2684 | |
| 2685 | static inline void hri_usbhostdescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 2686 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2687 | { |
| 2688 | USB_CRITICAL_SECTION_ENTER(); |
| 2689 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 2690 | USB_CRITICAL_SECTION_LEAVE(); |
| 2691 | } |
| 2692 | |
| 2693 | static inline void hri_usbhostdescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 2694 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2695 | { |
| 2696 | USB_CRITICAL_SECTION_ENTER(); |
| 2697 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_BYTE_COUNT(mask); |
| 2698 | USB_CRITICAL_SECTION_LEAVE(); |
| 2699 | } |
| 2700 | |
| 2701 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2702 | hri_usbhostdescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index) |
| 2703 | { |
| 2704 | uint32_t tmp; |
| 2705 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2706 | tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT_Msk) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos; |
| 2707 | return tmp; |
| 2708 | } |
| 2709 | |
| 2710 | static inline void hri_usbhostdescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2711 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2712 | { |
| 2713 | USB_CRITICAL_SECTION_ENTER(); |
| 2714 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 2715 | USB_CRITICAL_SECTION_LEAVE(); |
| 2716 | } |
| 2717 | |
| 2718 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2719 | hri_usbhostdescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2720 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2721 | { |
| 2722 | uint32_t tmp; |
| 2723 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2724 | tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 2725 | return tmp; |
| 2726 | } |
| 2727 | |
| 2728 | static inline void hri_usbhostdescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 2729 | uint8_t submodule_index, |
| 2730 | hri_usbdescriptorhost_pcksize_reg_t data) |
| 2731 | { |
| 2732 | uint32_t tmp; |
| 2733 | USB_CRITICAL_SECTION_ENTER(); |
| 2734 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2735 | tmp &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk; |
| 2736 | tmp |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(data); |
| 2737 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 2738 | USB_CRITICAL_SECTION_LEAVE(); |
| 2739 | } |
| 2740 | |
| 2741 | static inline void hri_usbhostdescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 2742 | uint8_t submodule_index, |
| 2743 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2744 | { |
| 2745 | USB_CRITICAL_SECTION_ENTER(); |
| 2746 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 2747 | USB_CRITICAL_SECTION_LEAVE(); |
| 2748 | } |
| 2749 | |
| 2750 | static inline void hri_usbhostdescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 2751 | uint8_t submodule_index, |
| 2752 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2753 | { |
| 2754 | USB_CRITICAL_SECTION_ENTER(); |
| 2755 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 2756 | USB_CRITICAL_SECTION_LEAVE(); |
| 2757 | } |
| 2758 | |
| 2759 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2760 | hri_usbhostdescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index) |
| 2761 | { |
| 2762 | uint32_t tmp; |
| 2763 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2764 | tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 2765 | return tmp; |
| 2766 | } |
| 2767 | |
| 2768 | static inline void hri_usbhostdescriptor_set_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2769 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2770 | { |
| 2771 | USB_CRITICAL_SECTION_ENTER(); |
| 2772 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_SIZE(mask); |
| 2773 | USB_CRITICAL_SECTION_LEAVE(); |
| 2774 | } |
| 2775 | |
| 2776 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2777 | hri_usbhostdescriptor_get_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2778 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2779 | { |
| 2780 | uint32_t tmp; |
| 2781 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2782 | tmp = (tmp & USB_HOST_PCKSIZE_SIZE(mask)) >> USB_HOST_PCKSIZE_SIZE_Pos; |
| 2783 | return tmp; |
| 2784 | } |
| 2785 | |
| 2786 | static inline void hri_usbhostdescriptor_write_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2787 | hri_usbdescriptorhost_pcksize_reg_t data) |
| 2788 | { |
| 2789 | uint32_t tmp; |
| 2790 | USB_CRITICAL_SECTION_ENTER(); |
| 2791 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2792 | tmp &= ~USB_HOST_PCKSIZE_SIZE_Msk; |
| 2793 | tmp |= USB_HOST_PCKSIZE_SIZE(data); |
| 2794 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 2795 | USB_CRITICAL_SECTION_LEAVE(); |
| 2796 | } |
| 2797 | |
| 2798 | static inline void hri_usbhostdescriptor_clear_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2799 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2800 | { |
| 2801 | USB_CRITICAL_SECTION_ENTER(); |
| 2802 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_SIZE(mask); |
| 2803 | USB_CRITICAL_SECTION_LEAVE(); |
| 2804 | } |
| 2805 | |
| 2806 | static inline void hri_usbhostdescriptor_toggle_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 2807 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2808 | { |
| 2809 | USB_CRITICAL_SECTION_ENTER(); |
| 2810 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_SIZE(mask); |
| 2811 | USB_CRITICAL_SECTION_LEAVE(); |
| 2812 | } |
| 2813 | |
| 2814 | static inline hri_usbdescriptorhost_pcksize_reg_t hri_usbhostdescriptor_read_PCKSIZE_SIZE_bf(const void *const hw, |
| 2815 | uint8_t submodule_index) |
| 2816 | { |
| 2817 | uint32_t tmp; |
| 2818 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2819 | tmp = (tmp & USB_HOST_PCKSIZE_SIZE_Msk) >> USB_HOST_PCKSIZE_SIZE_Pos; |
| 2820 | return tmp; |
| 2821 | } |
| 2822 | |
| 2823 | static inline void hri_usbhostdescriptor_set_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 2824 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2825 | { |
| 2826 | USB_CRITICAL_SECTION_ENTER(); |
| 2827 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= mask; |
| 2828 | USB_CRITICAL_SECTION_LEAVE(); |
| 2829 | } |
| 2830 | |
| 2831 | static inline hri_usbdescriptorhost_pcksize_reg_t |
| 2832 | hri_usbhostdescriptor_get_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 2833 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2834 | { |
| 2835 | uint32_t tmp; |
| 2836 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2837 | tmp &= mask; |
| 2838 | return tmp; |
| 2839 | } |
| 2840 | |
| 2841 | static inline void hri_usbhostdescriptor_write_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 2842 | hri_usbdescriptorhost_pcksize_reg_t data) |
| 2843 | { |
| 2844 | USB_CRITICAL_SECTION_ENTER(); |
| 2845 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = data; |
| 2846 | USB_CRITICAL_SECTION_LEAVE(); |
| 2847 | } |
| 2848 | |
| 2849 | static inline void hri_usbhostdescriptor_clear_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 2850 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2851 | { |
| 2852 | USB_CRITICAL_SECTION_ENTER(); |
| 2853 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~mask; |
| 2854 | USB_CRITICAL_SECTION_LEAVE(); |
| 2855 | } |
| 2856 | |
| 2857 | static inline void hri_usbhostdescriptor_toggle_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 2858 | hri_usbdescriptorhost_pcksize_reg_t mask) |
| 2859 | { |
| 2860 | USB_CRITICAL_SECTION_ENTER(); |
| 2861 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= mask; |
| 2862 | USB_CRITICAL_SECTION_LEAVE(); |
| 2863 | } |
| 2864 | |
| 2865 | static inline hri_usbdescriptorhost_pcksize_reg_t hri_usbhostdescriptor_read_PCKSIZE_reg(const void *const hw, |
| 2866 | uint8_t submodule_index) |
| 2867 | { |
| 2868 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg; |
| 2869 | } |
| 2870 | |
| 2871 | static inline void hri_usbhostdescriptor_set_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 2872 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2873 | { |
| 2874 | USB_CRITICAL_SECTION_ENTER(); |
| 2875 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= USB_HOST_EXTREG_SUBPID(mask); |
| 2876 | USB_CRITICAL_SECTION_LEAVE(); |
| 2877 | } |
| 2878 | |
| 2879 | static inline hri_usbdescriptorhost_extreg_reg_t |
| 2880 | hri_usbhostdescriptor_get_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 2881 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2882 | { |
| 2883 | uint16_t tmp; |
| 2884 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2885 | tmp = (tmp & USB_HOST_EXTREG_SUBPID(mask)) >> USB_HOST_EXTREG_SUBPID_Pos; |
| 2886 | return tmp; |
| 2887 | } |
| 2888 | |
| 2889 | static inline void hri_usbhostdescriptor_write_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 2890 | hri_usbdescriptorhost_extreg_reg_t data) |
| 2891 | { |
| 2892 | uint16_t tmp; |
| 2893 | USB_CRITICAL_SECTION_ENTER(); |
| 2894 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2895 | tmp &= ~USB_HOST_EXTREG_SUBPID_Msk; |
| 2896 | tmp |= USB_HOST_EXTREG_SUBPID(data); |
| 2897 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = tmp; |
| 2898 | USB_CRITICAL_SECTION_LEAVE(); |
| 2899 | } |
| 2900 | |
| 2901 | static inline void hri_usbhostdescriptor_clear_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 2902 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2903 | { |
| 2904 | USB_CRITICAL_SECTION_ENTER(); |
| 2905 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~USB_HOST_EXTREG_SUBPID(mask); |
| 2906 | USB_CRITICAL_SECTION_LEAVE(); |
| 2907 | } |
| 2908 | |
| 2909 | static inline void hri_usbhostdescriptor_toggle_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 2910 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2911 | { |
| 2912 | USB_CRITICAL_SECTION_ENTER(); |
| 2913 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= USB_HOST_EXTREG_SUBPID(mask); |
| 2914 | USB_CRITICAL_SECTION_LEAVE(); |
| 2915 | } |
| 2916 | |
| 2917 | static inline hri_usbdescriptorhost_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_SUBPID_bf(const void *const hw, |
| 2918 | uint8_t submodule_index) |
| 2919 | { |
| 2920 | uint16_t tmp; |
| 2921 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2922 | tmp = (tmp & USB_HOST_EXTREG_SUBPID_Msk) >> USB_HOST_EXTREG_SUBPID_Pos; |
| 2923 | return tmp; |
| 2924 | } |
| 2925 | |
| 2926 | static inline void hri_usbhostdescriptor_set_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 2927 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2928 | { |
| 2929 | USB_CRITICAL_SECTION_ENTER(); |
| 2930 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= USB_HOST_EXTREG_VARIABLE(mask); |
| 2931 | USB_CRITICAL_SECTION_LEAVE(); |
| 2932 | } |
| 2933 | |
| 2934 | static inline hri_usbdescriptorhost_extreg_reg_t |
| 2935 | hri_usbhostdescriptor_get_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 2936 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2937 | { |
| 2938 | uint16_t tmp; |
| 2939 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2940 | tmp = (tmp & USB_HOST_EXTREG_VARIABLE(mask)) >> USB_HOST_EXTREG_VARIABLE_Pos; |
| 2941 | return tmp; |
| 2942 | } |
| 2943 | |
| 2944 | static inline void hri_usbhostdescriptor_write_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 2945 | hri_usbdescriptorhost_extreg_reg_t data) |
| 2946 | { |
| 2947 | uint16_t tmp; |
| 2948 | USB_CRITICAL_SECTION_ENTER(); |
| 2949 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2950 | tmp &= ~USB_HOST_EXTREG_VARIABLE_Msk; |
| 2951 | tmp |= USB_HOST_EXTREG_VARIABLE(data); |
| 2952 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = tmp; |
| 2953 | USB_CRITICAL_SECTION_LEAVE(); |
| 2954 | } |
| 2955 | |
| 2956 | static inline void hri_usbhostdescriptor_clear_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 2957 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2958 | { |
| 2959 | USB_CRITICAL_SECTION_ENTER(); |
| 2960 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~USB_HOST_EXTREG_VARIABLE(mask); |
| 2961 | USB_CRITICAL_SECTION_LEAVE(); |
| 2962 | } |
| 2963 | |
| 2964 | static inline void hri_usbhostdescriptor_toggle_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 2965 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2966 | { |
| 2967 | USB_CRITICAL_SECTION_ENTER(); |
| 2968 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= USB_HOST_EXTREG_VARIABLE(mask); |
| 2969 | USB_CRITICAL_SECTION_LEAVE(); |
| 2970 | } |
| 2971 | |
| 2972 | static inline hri_usbdescriptorhost_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_VARIABLE_bf(const void *const hw, |
| 2973 | uint8_t submodule_index) |
| 2974 | { |
| 2975 | uint16_t tmp; |
| 2976 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2977 | tmp = (tmp & USB_HOST_EXTREG_VARIABLE_Msk) >> USB_HOST_EXTREG_VARIABLE_Pos; |
| 2978 | return tmp; |
| 2979 | } |
| 2980 | |
| 2981 | static inline void hri_usbhostdescriptor_set_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 2982 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2983 | { |
| 2984 | USB_CRITICAL_SECTION_ENTER(); |
| 2985 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= mask; |
| 2986 | USB_CRITICAL_SECTION_LEAVE(); |
| 2987 | } |
| 2988 | |
| 2989 | static inline hri_usbdescriptorhost_extreg_reg_t |
| 2990 | hri_usbhostdescriptor_get_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 2991 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 2992 | { |
| 2993 | uint16_t tmp; |
| 2994 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 2995 | tmp &= mask; |
| 2996 | return tmp; |
| 2997 | } |
| 2998 | |
| 2999 | static inline void hri_usbhostdescriptor_write_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 3000 | hri_usbdescriptorhost_extreg_reg_t data) |
| 3001 | { |
| 3002 | USB_CRITICAL_SECTION_ENTER(); |
| 3003 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = data; |
| 3004 | USB_CRITICAL_SECTION_LEAVE(); |
| 3005 | } |
| 3006 | |
| 3007 | static inline void hri_usbhostdescriptor_clear_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 3008 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 3009 | { |
| 3010 | USB_CRITICAL_SECTION_ENTER(); |
| 3011 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~mask; |
| 3012 | USB_CRITICAL_SECTION_LEAVE(); |
| 3013 | } |
| 3014 | |
| 3015 | static inline void hri_usbhostdescriptor_toggle_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 3016 | hri_usbdescriptorhost_extreg_reg_t mask) |
| 3017 | { |
| 3018 | USB_CRITICAL_SECTION_ENTER(); |
| 3019 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= mask; |
| 3020 | USB_CRITICAL_SECTION_LEAVE(); |
| 3021 | } |
| 3022 | |
| 3023 | static inline hri_usbdescriptorhost_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_reg(const void *const hw, |
| 3024 | uint8_t submodule_index) |
| 3025 | { |
| 3026 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg; |
| 3027 | } |
| 3028 | |
| 3029 | static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index, |
| 3030 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3031 | { |
| 3032 | USB_CRITICAL_SECTION_ENTER(); |
| 3033 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 3034 | USB_CRITICAL_SECTION_LEAVE(); |
| 3035 | } |
| 3036 | |
| 3037 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3038 | hri_usbhostdescriptor_get_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index, |
| 3039 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3040 | { |
| 3041 | uint16_t tmp; |
| 3042 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3043 | tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR(mask)) >> USB_HOST_CTRL_PIPE_PDADDR_Pos; |
| 3044 | return tmp; |
| 3045 | } |
| 3046 | |
| 3047 | static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index, |
| 3048 | hri_usbdescriptorhost_ctrl_pipe_reg_t data) |
| 3049 | { |
| 3050 | uint16_t tmp; |
| 3051 | USB_CRITICAL_SECTION_ENTER(); |
| 3052 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3053 | tmp &= ~USB_HOST_CTRL_PIPE_PDADDR_Msk; |
| 3054 | tmp |= USB_HOST_CTRL_PIPE_PDADDR(data); |
| 3055 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp; |
| 3056 | USB_CRITICAL_SECTION_LEAVE(); |
| 3057 | } |
| 3058 | |
| 3059 | static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index, |
| 3060 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3061 | { |
| 3062 | USB_CRITICAL_SECTION_ENTER(); |
| 3063 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 3064 | USB_CRITICAL_SECTION_LEAVE(); |
| 3065 | } |
| 3066 | |
| 3067 | static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index, |
| 3068 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3069 | { |
| 3070 | USB_CRITICAL_SECTION_ENTER(); |
| 3071 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PDADDR(mask); |
| 3072 | USB_CRITICAL_SECTION_LEAVE(); |
| 3073 | } |
| 3074 | |
| 3075 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3076 | hri_usbhostdescriptor_read_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index) |
| 3077 | { |
| 3078 | uint16_t tmp; |
| 3079 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3080 | tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR_Msk) >> USB_HOST_CTRL_PIPE_PDADDR_Pos; |
| 3081 | return tmp; |
| 3082 | } |
| 3083 | |
| 3084 | static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index, |
| 3085 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3086 | { |
| 3087 | USB_CRITICAL_SECTION_ENTER(); |
| 3088 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 3089 | USB_CRITICAL_SECTION_LEAVE(); |
| 3090 | } |
| 3091 | |
| 3092 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3093 | hri_usbhostdescriptor_get_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index, |
| 3094 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3095 | { |
| 3096 | uint16_t tmp; |
| 3097 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3098 | tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM(mask)) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos; |
| 3099 | return tmp; |
| 3100 | } |
| 3101 | |
| 3102 | static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index, |
| 3103 | hri_usbdescriptorhost_ctrl_pipe_reg_t data) |
| 3104 | { |
| 3105 | uint16_t tmp; |
| 3106 | USB_CRITICAL_SECTION_ENTER(); |
| 3107 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3108 | tmp &= ~USB_HOST_CTRL_PIPE_PEPNUM_Msk; |
| 3109 | tmp |= USB_HOST_CTRL_PIPE_PEPNUM(data); |
| 3110 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp; |
| 3111 | USB_CRITICAL_SECTION_LEAVE(); |
| 3112 | } |
| 3113 | |
| 3114 | static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index, |
| 3115 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3116 | { |
| 3117 | USB_CRITICAL_SECTION_ENTER(); |
| 3118 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 3119 | USB_CRITICAL_SECTION_LEAVE(); |
| 3120 | } |
| 3121 | |
| 3122 | static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index, |
| 3123 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3124 | { |
| 3125 | USB_CRITICAL_SECTION_ENTER(); |
| 3126 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PEPNUM(mask); |
| 3127 | USB_CRITICAL_SECTION_LEAVE(); |
| 3128 | } |
| 3129 | |
| 3130 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3131 | hri_usbhostdescriptor_read_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index) |
| 3132 | { |
| 3133 | uint16_t tmp; |
| 3134 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3135 | tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM_Msk) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos; |
| 3136 | return tmp; |
| 3137 | } |
| 3138 | |
| 3139 | static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index, |
| 3140 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3141 | { |
| 3142 | USB_CRITICAL_SECTION_ENTER(); |
| 3143 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 3144 | USB_CRITICAL_SECTION_LEAVE(); |
| 3145 | } |
| 3146 | |
| 3147 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3148 | hri_usbhostdescriptor_get_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index, |
| 3149 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3150 | { |
| 3151 | uint16_t tmp; |
| 3152 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3153 | tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX(mask)) >> USB_HOST_CTRL_PIPE_PERMAX_Pos; |
| 3154 | return tmp; |
| 3155 | } |
| 3156 | |
| 3157 | static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index, |
| 3158 | hri_usbdescriptorhost_ctrl_pipe_reg_t data) |
| 3159 | { |
| 3160 | uint16_t tmp; |
| 3161 | USB_CRITICAL_SECTION_ENTER(); |
| 3162 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3163 | tmp &= ~USB_HOST_CTRL_PIPE_PERMAX_Msk; |
| 3164 | tmp |= USB_HOST_CTRL_PIPE_PERMAX(data); |
| 3165 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp; |
| 3166 | USB_CRITICAL_SECTION_LEAVE(); |
| 3167 | } |
| 3168 | |
| 3169 | static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index, |
| 3170 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3171 | { |
| 3172 | USB_CRITICAL_SECTION_ENTER(); |
| 3173 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 3174 | USB_CRITICAL_SECTION_LEAVE(); |
| 3175 | } |
| 3176 | |
| 3177 | static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index, |
| 3178 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3179 | { |
| 3180 | USB_CRITICAL_SECTION_ENTER(); |
| 3181 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PERMAX(mask); |
| 3182 | USB_CRITICAL_SECTION_LEAVE(); |
| 3183 | } |
| 3184 | |
| 3185 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3186 | hri_usbhostdescriptor_read_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index) |
| 3187 | { |
| 3188 | uint16_t tmp; |
| 3189 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3190 | tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX_Msk) >> USB_HOST_CTRL_PIPE_PERMAX_Pos; |
| 3191 | return tmp; |
| 3192 | } |
| 3193 | |
| 3194 | static inline void hri_usbhostdescriptor_set_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3195 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3196 | { |
| 3197 | USB_CRITICAL_SECTION_ENTER(); |
| 3198 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= mask; |
| 3199 | USB_CRITICAL_SECTION_LEAVE(); |
| 3200 | } |
| 3201 | |
| 3202 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t |
| 3203 | hri_usbhostdescriptor_get_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3204 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3205 | { |
| 3206 | uint16_t tmp; |
| 3207 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3208 | tmp &= mask; |
| 3209 | return tmp; |
| 3210 | } |
| 3211 | |
| 3212 | static inline void hri_usbhostdescriptor_write_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3213 | hri_usbdescriptorhost_ctrl_pipe_reg_t data) |
| 3214 | { |
| 3215 | USB_CRITICAL_SECTION_ENTER(); |
| 3216 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = data; |
| 3217 | USB_CRITICAL_SECTION_LEAVE(); |
| 3218 | } |
| 3219 | |
| 3220 | static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3221 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3222 | { |
| 3223 | USB_CRITICAL_SECTION_ENTER(); |
| 3224 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~mask; |
| 3225 | USB_CRITICAL_SECTION_LEAVE(); |
| 3226 | } |
| 3227 | |
| 3228 | static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3229 | hri_usbdescriptorhost_ctrl_pipe_reg_t mask) |
| 3230 | { |
| 3231 | USB_CRITICAL_SECTION_ENTER(); |
| 3232 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= mask; |
| 3233 | USB_CRITICAL_SECTION_LEAVE(); |
| 3234 | } |
| 3235 | |
| 3236 | static inline hri_usbdescriptorhost_ctrl_pipe_reg_t hri_usbhostdescriptor_read_CTRL_PIPE_reg(const void *const hw, |
| 3237 | uint8_t submodule_index) |
| 3238 | { |
| 3239 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg; |
| 3240 | } |
| 3241 | |
| 3242 | static inline bool hri_usbhostdescriptor_get_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index) |
| 3243 | { |
| 3244 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg & USB_HOST_STATUS_BK_CRCERR) |
| 3245 | >> USB_HOST_STATUS_BK_CRCERR_Pos; |
| 3246 | } |
| 3247 | |
| 3248 | static inline void hri_usbhostdescriptor_clear_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index) |
| 3249 | { |
| 3250 | USB_CRITICAL_SECTION_ENTER(); |
| 3251 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = USB_HOST_STATUS_BK_CRCERR; |
| 3252 | USB_CRITICAL_SECTION_LEAVE(); |
| 3253 | } |
| 3254 | |
| 3255 | static inline bool hri_usbhostdescriptor_get_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index) |
| 3256 | { |
| 3257 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg & USB_HOST_STATUS_BK_ERRORFLOW) |
| 3258 | >> USB_HOST_STATUS_BK_ERRORFLOW_Pos; |
| 3259 | } |
| 3260 | |
| 3261 | static inline void hri_usbhostdescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index) |
| 3262 | { |
| 3263 | USB_CRITICAL_SECTION_ENTER(); |
| 3264 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = USB_HOST_STATUS_BK_ERRORFLOW; |
| 3265 | USB_CRITICAL_SECTION_LEAVE(); |
| 3266 | } |
| 3267 | |
| 3268 | static inline hri_usbdescriptorhost_status_bk_reg_t |
| 3269 | hri_usbhostdescriptor_get_STATUS_BK_reg(const void *const hw, uint8_t submodule_index, |
| 3270 | hri_usbdescriptorhost_status_bk_reg_t mask) |
| 3271 | { |
| 3272 | uint8_t tmp; |
| 3273 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg; |
| 3274 | tmp &= mask; |
| 3275 | return tmp; |
| 3276 | } |
| 3277 | |
| 3278 | static inline void hri_usbhostdescriptor_clear_STATUS_BK_reg(const void *const hw, uint8_t submodule_index, |
| 3279 | hri_usbdescriptorhost_status_bk_reg_t mask) |
| 3280 | { |
| 3281 | USB_CRITICAL_SECTION_ENTER(); |
| 3282 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = mask; |
| 3283 | USB_CRITICAL_SECTION_LEAVE(); |
| 3284 | } |
| 3285 | |
| 3286 | static inline hri_usbdescriptorhost_status_bk_reg_t hri_usbhostdescriptor_read_STATUS_BK_reg(const void *const hw, |
| 3287 | uint8_t submodule_index) |
| 3288 | { |
| 3289 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg; |
| 3290 | } |
| 3291 | |
| 3292 | static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_DTGLER_bit(const void *const hw, uint8_t submodule_index) |
| 3293 | { |
| 3294 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DTGLER) |
| 3295 | >> USB_HOST_STATUS_PIPE_DTGLER_Pos; |
| 3296 | } |
| 3297 | |
| 3298 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_DTGLER_bit(const void *const hw, uint8_t submodule_index) |
| 3299 | { |
| 3300 | USB_CRITICAL_SECTION_ENTER(); |
| 3301 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DTGLER; |
| 3302 | USB_CRITICAL_SECTION_LEAVE(); |
| 3303 | } |
| 3304 | |
| 3305 | static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_DAPIDER_bit(const void *const hw, uint8_t submodule_index) |
| 3306 | { |
| 3307 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DAPIDER) |
| 3308 | >> USB_HOST_STATUS_PIPE_DAPIDER_Pos; |
| 3309 | } |
| 3310 | |
| 3311 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_DAPIDER_bit(const void *const hw, uint8_t submodule_index) |
| 3312 | { |
| 3313 | USB_CRITICAL_SECTION_ENTER(); |
| 3314 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DAPIDER; |
| 3315 | USB_CRITICAL_SECTION_LEAVE(); |
| 3316 | } |
| 3317 | |
| 3318 | static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_PIDER_bit(const void *const hw, uint8_t submodule_index) |
| 3319 | { |
| 3320 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_PIDER) |
| 3321 | >> USB_HOST_STATUS_PIPE_PIDER_Pos; |
| 3322 | } |
| 3323 | |
| 3324 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_PIDER_bit(const void *const hw, uint8_t submodule_index) |
| 3325 | { |
| 3326 | USB_CRITICAL_SECTION_ENTER(); |
| 3327 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_PIDER; |
| 3328 | USB_CRITICAL_SECTION_LEAVE(); |
| 3329 | } |
| 3330 | |
| 3331 | static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_TOUTER_bit(const void *const hw, uint8_t submodule_index) |
| 3332 | { |
| 3333 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_TOUTER) |
| 3334 | >> USB_HOST_STATUS_PIPE_TOUTER_Pos; |
| 3335 | } |
| 3336 | |
| 3337 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_TOUTER_bit(const void *const hw, uint8_t submodule_index) |
| 3338 | { |
| 3339 | USB_CRITICAL_SECTION_ENTER(); |
| 3340 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_TOUTER; |
| 3341 | USB_CRITICAL_SECTION_LEAVE(); |
| 3342 | } |
| 3343 | |
| 3344 | static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_CRC16ER_bit(const void *const hw, uint8_t submodule_index) |
| 3345 | { |
| 3346 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_CRC16ER) |
| 3347 | >> USB_HOST_STATUS_PIPE_CRC16ER_Pos; |
| 3348 | } |
| 3349 | |
| 3350 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_CRC16ER_bit(const void *const hw, uint8_t submodule_index) |
| 3351 | { |
| 3352 | USB_CRITICAL_SECTION_ENTER(); |
| 3353 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_CRC16ER; |
| 3354 | USB_CRITICAL_SECTION_LEAVE(); |
| 3355 | } |
| 3356 | |
| 3357 | static inline hri_usbdescriptorhost_status_pipe_reg_t |
| 3358 | hri_usbhostdescriptor_get_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index, |
| 3359 | hri_usbdescriptorhost_status_pipe_reg_t mask) |
| 3360 | { |
| 3361 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT(mask)) |
| 3362 | >> USB_HOST_STATUS_PIPE_ERCNT_Pos; |
| 3363 | } |
| 3364 | |
| 3365 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index, |
| 3366 | hri_usbdescriptorhost_status_pipe_reg_t mask) |
| 3367 | { |
| 3368 | USB_CRITICAL_SECTION_ENTER(); |
| 3369 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_ERCNT(mask); |
| 3370 | USB_CRITICAL_SECTION_LEAVE(); |
| 3371 | } |
| 3372 | |
| 3373 | static inline hri_usbdescriptorhost_status_pipe_reg_t |
| 3374 | hri_usbhostdescriptor_read_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index) |
| 3375 | { |
| 3376 | return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT_Msk) |
| 3377 | >> USB_HOST_STATUS_PIPE_ERCNT_Pos; |
| 3378 | } |
| 3379 | |
| 3380 | static inline hri_usbdescriptorhost_status_pipe_reg_t |
| 3381 | hri_usbhostdescriptor_get_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3382 | hri_usbdescriptorhost_status_pipe_reg_t mask) |
| 3383 | { |
| 3384 | uint16_t tmp; |
| 3385 | tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg; |
| 3386 | tmp &= mask; |
| 3387 | return tmp; |
| 3388 | } |
| 3389 | |
| 3390 | static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index, |
| 3391 | hri_usbdescriptorhost_status_pipe_reg_t mask) |
| 3392 | { |
| 3393 | USB_CRITICAL_SECTION_ENTER(); |
| 3394 | ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = mask; |
| 3395 | USB_CRITICAL_SECTION_LEAVE(); |
| 3396 | } |
| 3397 | |
| 3398 | static inline hri_usbdescriptorhost_status_pipe_reg_t |
| 3399 | hri_usbhostdescriptor_read_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index) |
| 3400 | { |
| 3401 | return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg; |
| 3402 | } |
| 3403 | |
| 3404 | static inline bool hri_usbendpoint_get_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3405 | { |
| 3406 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0) |
| 3407 | >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos; |
| 3408 | } |
| 3409 | |
| 3410 | static inline void hri_usbendpoint_clear_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3411 | { |
| 3412 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0; |
| 3413 | } |
| 3414 | |
| 3415 | static inline bool hri_usbendpoint_get_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3416 | { |
| 3417 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1) |
| 3418 | >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos; |
| 3419 | } |
| 3420 | |
| 3421 | static inline void hri_usbendpoint_clear_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3422 | { |
| 3423 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; |
| 3424 | } |
| 3425 | |
| 3426 | static inline bool hri_usbendpoint_get_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3427 | { |
| 3428 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0) |
| 3429 | >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos; |
| 3430 | } |
| 3431 | |
| 3432 | static inline void hri_usbendpoint_clear_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3433 | { |
| 3434 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0; |
| 3435 | } |
| 3436 | |
| 3437 | static inline bool hri_usbendpoint_get_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3438 | { |
| 3439 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1) |
| 3440 | >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos; |
| 3441 | } |
| 3442 | |
| 3443 | static inline void hri_usbendpoint_clear_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3444 | { |
| 3445 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1; |
| 3446 | } |
| 3447 | |
| 3448 | static inline bool hri_usbendpoint_get_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3449 | { |
| 3450 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP) |
| 3451 | >> USB_DEVICE_EPINTFLAG_RXSTP_Pos; |
| 3452 | } |
| 3453 | |
| 3454 | static inline void hri_usbendpoint_clear_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3455 | { |
| 3456 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP; |
| 3457 | } |
| 3458 | |
| 3459 | static inline bool hri_usbendpoint_get_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3460 | { |
| 3461 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0) |
| 3462 | >> USB_DEVICE_EPINTFLAG_STALL0_Pos; |
| 3463 | } |
| 3464 | |
| 3465 | static inline void hri_usbendpoint_clear_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3466 | { |
| 3467 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0; |
| 3468 | } |
| 3469 | |
| 3470 | static inline bool hri_usbendpoint_get_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3471 | { |
| 3472 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1) |
| 3473 | >> USB_DEVICE_EPINTFLAG_STALL1_Pos; |
| 3474 | } |
| 3475 | |
| 3476 | static inline void hri_usbendpoint_clear_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3477 | { |
| 3478 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1; |
| 3479 | } |
| 3480 | |
| 3481 | static inline bool hri_usbendpoint_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3482 | { |
| 3483 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0) |
| 3484 | >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos; |
| 3485 | } |
| 3486 | |
| 3487 | static inline void hri_usbendpoint_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3488 | { |
| 3489 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0; |
| 3490 | } |
| 3491 | |
| 3492 | static inline bool hri_usbendpoint_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3493 | { |
| 3494 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1) |
| 3495 | >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos; |
| 3496 | } |
| 3497 | |
| 3498 | static inline void hri_usbendpoint_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3499 | { |
| 3500 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; |
| 3501 | } |
| 3502 | |
| 3503 | static inline bool hri_usbendpoint_get_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3504 | { |
| 3505 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0) |
| 3506 | >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos; |
| 3507 | } |
| 3508 | |
| 3509 | static inline void hri_usbendpoint_clear_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3510 | { |
| 3511 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0; |
| 3512 | } |
| 3513 | |
| 3514 | static inline bool hri_usbendpoint_get_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3515 | { |
| 3516 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1) |
| 3517 | >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos; |
| 3518 | } |
| 3519 | |
| 3520 | static inline void hri_usbendpoint_clear_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3521 | { |
| 3522 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1; |
| 3523 | } |
| 3524 | |
| 3525 | static inline bool hri_usbendpoint_get_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3526 | { |
| 3527 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP) |
| 3528 | >> USB_DEVICE_EPINTFLAG_RXSTP_Pos; |
| 3529 | } |
| 3530 | |
| 3531 | static inline void hri_usbendpoint_clear_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3532 | { |
| 3533 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP; |
| 3534 | } |
| 3535 | |
| 3536 | static inline bool hri_usbendpoint_get_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3537 | { |
| 3538 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0) |
| 3539 | >> USB_DEVICE_EPINTFLAG_STALL0_Pos; |
| 3540 | } |
| 3541 | |
| 3542 | static inline void hri_usbendpoint_clear_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3543 | { |
| 3544 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0; |
| 3545 | } |
| 3546 | |
| 3547 | static inline bool hri_usbendpoint_get_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3548 | { |
| 3549 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1) |
| 3550 | >> USB_DEVICE_EPINTFLAG_STALL1_Pos; |
| 3551 | } |
| 3552 | |
| 3553 | static inline void hri_usbendpoint_clear_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3554 | { |
| 3555 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1; |
| 3556 | } |
| 3557 | |
| 3558 | static inline hri_usbendpoint_epintflag_reg_t |
| 3559 | hri_usbendpoint_get_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epintflag_reg_t mask) |
| 3560 | { |
| 3561 | uint8_t tmp; |
| 3562 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg; |
| 3563 | tmp &= mask; |
| 3564 | return tmp; |
| 3565 | } |
| 3566 | |
| 3567 | static inline hri_usbendpoint_epintflag_reg_t hri_usbendpoint_read_EPINTFLAG_reg(const void *const hw, |
| 3568 | uint8_t submodule_index) |
| 3569 | { |
| 3570 | return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg; |
| 3571 | } |
| 3572 | |
| 3573 | static inline void hri_usbendpoint_clear_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 3574 | hri_usbendpoint_epintflag_reg_t mask) |
| 3575 | { |
| 3576 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = mask; |
| 3577 | } |
| 3578 | |
| 3579 | static inline void hri_usbendpoint_set_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 3580 | { |
| 3581 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 3582 | } |
| 3583 | |
| 3584 | static inline bool hri_usbendpoint_get_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 3585 | { |
| 3586 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLOUT) |
| 3587 | >> USB_DEVICE_EPSTATUS_DTGLOUT_Pos; |
| 3588 | } |
| 3589 | |
| 3590 | static inline void hri_usbendpoint_write_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3591 | { |
| 3592 | if (value == 0x0) { |
| 3593 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 3594 | } else { |
| 3595 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 3596 | } |
| 3597 | } |
| 3598 | |
| 3599 | static inline void hri_usbendpoint_clear_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 3600 | { |
| 3601 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 3602 | } |
| 3603 | |
| 3604 | static inline void hri_usbendpoint_set_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 3605 | { |
| 3606 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 3607 | } |
| 3608 | |
| 3609 | static inline bool hri_usbendpoint_get_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 3610 | { |
| 3611 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLIN) |
| 3612 | >> USB_DEVICE_EPSTATUS_DTGLIN_Pos; |
| 3613 | } |
| 3614 | |
| 3615 | static inline void hri_usbendpoint_write_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3616 | { |
| 3617 | if (value == 0x0) { |
| 3618 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 3619 | } else { |
| 3620 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 3621 | } |
| 3622 | } |
| 3623 | |
| 3624 | static inline void hri_usbendpoint_clear_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 3625 | { |
| 3626 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 3627 | } |
| 3628 | |
| 3629 | static inline void hri_usbendpoint_set_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 3630 | { |
| 3631 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 3632 | } |
| 3633 | |
| 3634 | static inline bool hri_usbendpoint_get_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 3635 | { |
| 3636 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_CURBK) |
| 3637 | >> USB_DEVICE_EPSTATUS_CURBK_Pos; |
| 3638 | } |
| 3639 | |
| 3640 | static inline void hri_usbendpoint_write_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3641 | { |
| 3642 | if (value == 0x0) { |
| 3643 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 3644 | } else { |
| 3645 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 3646 | } |
| 3647 | } |
| 3648 | |
| 3649 | static inline void hri_usbendpoint_clear_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 3650 | { |
| 3651 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 3652 | } |
| 3653 | |
| 3654 | static inline void hri_usbendpoint_set_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 3655 | { |
| 3656 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 3657 | } |
| 3658 | |
| 3659 | static inline bool hri_usbendpoint_get_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 3660 | { |
| 3661 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ0) |
| 3662 | >> USB_DEVICE_EPSTATUS_STALLRQ0_Pos; |
| 3663 | } |
| 3664 | |
| 3665 | static inline void hri_usbendpoint_write_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index, |
| 3666 | bool value) |
| 3667 | { |
| 3668 | if (value == 0x0) { |
| 3669 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 3670 | } else { |
| 3671 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 3672 | } |
| 3673 | } |
| 3674 | |
| 3675 | static inline void hri_usbendpoint_clear_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 3676 | { |
| 3677 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 3678 | } |
| 3679 | |
| 3680 | static inline void hri_usbendpoint_set_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 3681 | { |
| 3682 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 3683 | } |
| 3684 | |
| 3685 | static inline bool hri_usbendpoint_get_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 3686 | { |
| 3687 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ1) |
| 3688 | >> USB_DEVICE_EPSTATUS_STALLRQ1_Pos; |
| 3689 | } |
| 3690 | |
| 3691 | static inline void hri_usbendpoint_write_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index, |
| 3692 | bool value) |
| 3693 | { |
| 3694 | if (value == 0x0) { |
| 3695 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 3696 | } else { |
| 3697 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 3698 | } |
| 3699 | } |
| 3700 | |
| 3701 | static inline void hri_usbendpoint_clear_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 3702 | { |
| 3703 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 3704 | } |
| 3705 | |
| 3706 | static inline void hri_usbendpoint_set_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3707 | { |
| 3708 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 3709 | } |
| 3710 | |
| 3711 | static inline bool hri_usbendpoint_get_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3712 | { |
| 3713 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK0RDY) |
| 3714 | >> USB_DEVICE_EPSTATUS_BK0RDY_Pos; |
| 3715 | } |
| 3716 | |
| 3717 | static inline void hri_usbendpoint_write_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3718 | { |
| 3719 | if (value == 0x0) { |
| 3720 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 3721 | } else { |
| 3722 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 3723 | } |
| 3724 | } |
| 3725 | |
| 3726 | static inline void hri_usbendpoint_clear_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3727 | { |
| 3728 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 3729 | } |
| 3730 | |
| 3731 | static inline void hri_usbendpoint_set_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3732 | { |
| 3733 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 3734 | } |
| 3735 | |
| 3736 | static inline bool hri_usbendpoint_get_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3737 | { |
| 3738 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK1RDY) |
| 3739 | >> USB_DEVICE_EPSTATUS_BK1RDY_Pos; |
| 3740 | } |
| 3741 | |
| 3742 | static inline void hri_usbendpoint_write_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3743 | { |
| 3744 | if (value == 0x0) { |
| 3745 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 3746 | } else { |
| 3747 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 3748 | } |
| 3749 | } |
| 3750 | |
| 3751 | static inline void hri_usbendpoint_clear_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 3752 | { |
| 3753 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 3754 | } |
| 3755 | |
| 3756 | static inline void hri_usbendpoint_set_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 3757 | hri_usbendpoint_epstatus_reg_t mask) |
| 3758 | { |
| 3759 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = mask; |
| 3760 | } |
| 3761 | |
| 3762 | static inline hri_usbendpoint_epstatus_reg_t |
| 3763 | hri_usbendpoint_get_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epstatus_reg_t mask) |
| 3764 | { |
| 3765 | uint8_t tmp; |
| 3766 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg; |
| 3767 | tmp &= mask; |
| 3768 | return tmp; |
| 3769 | } |
| 3770 | |
| 3771 | static inline hri_usbendpoint_epstatus_reg_t hri_usbendpoint_read_EPSTATUS_reg(const void *const hw, |
| 3772 | uint8_t submodule_index) |
| 3773 | { |
| 3774 | return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg; |
| 3775 | } |
| 3776 | |
| 3777 | static inline void hri_usbendpoint_write_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 3778 | hri_usbendpoint_epstatus_reg_t data) |
| 3779 | { |
| 3780 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = data; |
| 3781 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = ~data; |
| 3782 | } |
| 3783 | |
| 3784 | static inline void hri_usbendpoint_clear_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 3785 | hri_usbendpoint_epstatus_reg_t mask) |
| 3786 | { |
| 3787 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = mask; |
| 3788 | } |
| 3789 | |
| 3790 | static inline void hri_usbendpoint_set_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3791 | { |
| 3792 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 3793 | } |
| 3794 | |
| 3795 | static inline bool hri_usbendpoint_get_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3796 | { |
| 3797 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT0) |
| 3798 | >> USB_DEVICE_EPINTENSET_TRCPT0_Pos; |
| 3799 | } |
| 3800 | |
| 3801 | static inline void hri_usbendpoint_write_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3802 | { |
| 3803 | if (value == 0x0) { |
| 3804 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 3805 | } else { |
| 3806 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 3807 | } |
| 3808 | } |
| 3809 | |
| 3810 | static inline void hri_usbendpoint_clear_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 3811 | { |
| 3812 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 3813 | } |
| 3814 | |
| 3815 | static inline void hri_usbendpoint_set_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3816 | { |
| 3817 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 3818 | } |
| 3819 | |
| 3820 | static inline bool hri_usbendpoint_get_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3821 | { |
| 3822 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT1) |
| 3823 | >> USB_DEVICE_EPINTENSET_TRCPT1_Pos; |
| 3824 | } |
| 3825 | |
| 3826 | static inline void hri_usbendpoint_write_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3827 | { |
| 3828 | if (value == 0x0) { |
| 3829 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 3830 | } else { |
| 3831 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 3832 | } |
| 3833 | } |
| 3834 | |
| 3835 | static inline void hri_usbendpoint_clear_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 3836 | { |
| 3837 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 3838 | } |
| 3839 | |
| 3840 | static inline void hri_usbendpoint_set_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3841 | { |
| 3842 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 3843 | } |
| 3844 | |
| 3845 | static inline bool hri_usbendpoint_get_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3846 | { |
| 3847 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL0) |
| 3848 | >> USB_DEVICE_EPINTENSET_TRFAIL0_Pos; |
| 3849 | } |
| 3850 | |
| 3851 | static inline void hri_usbendpoint_write_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3852 | { |
| 3853 | if (value == 0x0) { |
| 3854 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 3855 | } else { |
| 3856 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 3857 | } |
| 3858 | } |
| 3859 | |
| 3860 | static inline void hri_usbendpoint_clear_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 3861 | { |
| 3862 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 3863 | } |
| 3864 | |
| 3865 | static inline void hri_usbendpoint_set_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3866 | { |
| 3867 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 3868 | } |
| 3869 | |
| 3870 | static inline bool hri_usbendpoint_get_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3871 | { |
| 3872 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL1) |
| 3873 | >> USB_DEVICE_EPINTENSET_TRFAIL1_Pos; |
| 3874 | } |
| 3875 | |
| 3876 | static inline void hri_usbendpoint_write_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3877 | { |
| 3878 | if (value == 0x0) { |
| 3879 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 3880 | } else { |
| 3881 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 3882 | } |
| 3883 | } |
| 3884 | |
| 3885 | static inline void hri_usbendpoint_clear_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 3886 | { |
| 3887 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 3888 | } |
| 3889 | |
| 3890 | static inline void hri_usbendpoint_set_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3891 | { |
| 3892 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 3893 | } |
| 3894 | |
| 3895 | static inline bool hri_usbendpoint_get_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3896 | { |
| 3897 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_RXSTP) |
| 3898 | >> USB_DEVICE_EPINTENSET_RXSTP_Pos; |
| 3899 | } |
| 3900 | |
| 3901 | static inline void hri_usbendpoint_write_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3902 | { |
| 3903 | if (value == 0x0) { |
| 3904 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 3905 | } else { |
| 3906 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 3907 | } |
| 3908 | } |
| 3909 | |
| 3910 | static inline void hri_usbendpoint_clear_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 3911 | { |
| 3912 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 3913 | } |
| 3914 | |
| 3915 | static inline void hri_usbendpoint_set_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3916 | { |
| 3917 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 3918 | } |
| 3919 | |
| 3920 | static inline bool hri_usbendpoint_get_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3921 | { |
| 3922 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL0) |
| 3923 | >> USB_DEVICE_EPINTENSET_STALL0_Pos; |
| 3924 | } |
| 3925 | |
| 3926 | static inline void hri_usbendpoint_write_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3927 | { |
| 3928 | if (value == 0x0) { |
| 3929 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 3930 | } else { |
| 3931 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 3932 | } |
| 3933 | } |
| 3934 | |
| 3935 | static inline void hri_usbendpoint_clear_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 3936 | { |
| 3937 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 3938 | } |
| 3939 | |
| 3940 | static inline void hri_usbendpoint_set_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3941 | { |
| 3942 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 3943 | } |
| 3944 | |
| 3945 | static inline bool hri_usbendpoint_get_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3946 | { |
| 3947 | return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL1) |
| 3948 | >> USB_DEVICE_EPINTENSET_STALL1_Pos; |
| 3949 | } |
| 3950 | |
| 3951 | static inline void hri_usbendpoint_write_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 3952 | { |
| 3953 | if (value == 0x0) { |
| 3954 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 3955 | } else { |
| 3956 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 3957 | } |
| 3958 | } |
| 3959 | |
| 3960 | static inline void hri_usbendpoint_clear_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 3961 | { |
| 3962 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 3963 | } |
| 3964 | |
| 3965 | static inline void hri_usbendpoint_set_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 3966 | hri_usbendpoint_epintenset_reg_t mask) |
| 3967 | { |
| 3968 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = mask; |
| 3969 | } |
| 3970 | |
| 3971 | static inline hri_usbendpoint_epintenset_reg_t |
| 3972 | hri_usbendpoint_get_EPINTEN_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epintenset_reg_t mask) |
| 3973 | { |
| 3974 | uint8_t tmp; |
| 3975 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg; |
| 3976 | tmp &= mask; |
| 3977 | return tmp; |
| 3978 | } |
| 3979 | |
| 3980 | static inline hri_usbendpoint_epintenset_reg_t hri_usbendpoint_read_EPINTEN_reg(const void *const hw, |
| 3981 | uint8_t submodule_index) |
| 3982 | { |
| 3983 | return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg; |
| 3984 | } |
| 3985 | |
| 3986 | static inline void hri_usbendpoint_write_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 3987 | hri_usbendpoint_epintenset_reg_t data) |
| 3988 | { |
| 3989 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = data; |
| 3990 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = ~data; |
| 3991 | } |
| 3992 | |
| 3993 | static inline void hri_usbendpoint_clear_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 3994 | hri_usbendpoint_epintenset_reg_t mask) |
| 3995 | { |
| 3996 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = mask; |
| 3997 | } |
| 3998 | |
| 3999 | static inline void hri_usbendpoint_set_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4000 | { |
| 4001 | USB_CRITICAL_SECTION_ENTER(); |
| 4002 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_NYETDIS; |
| 4003 | USB_CRITICAL_SECTION_LEAVE(); |
| 4004 | } |
| 4005 | |
| 4006 | static inline bool hri_usbendpoint_get_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4007 | { |
| 4008 | uint8_t tmp; |
| 4009 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4010 | tmp = (tmp & USB_DEVICE_EPCFG_NYETDIS) >> USB_DEVICE_EPCFG_NYETDIS_Pos; |
| 4011 | return (bool)tmp; |
| 4012 | } |
| 4013 | |
| 4014 | static inline void hri_usbendpoint_write_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4015 | { |
| 4016 | uint8_t tmp; |
| 4017 | USB_CRITICAL_SECTION_ENTER(); |
| 4018 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4019 | tmp &= ~USB_DEVICE_EPCFG_NYETDIS; |
| 4020 | tmp |= value << USB_DEVICE_EPCFG_NYETDIS_Pos; |
| 4021 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4022 | USB_CRITICAL_SECTION_LEAVE(); |
| 4023 | } |
| 4024 | |
| 4025 | static inline void hri_usbendpoint_clear_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4026 | { |
| 4027 | USB_CRITICAL_SECTION_ENTER(); |
| 4028 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_NYETDIS; |
| 4029 | USB_CRITICAL_SECTION_LEAVE(); |
| 4030 | } |
| 4031 | |
| 4032 | static inline void hri_usbendpoint_toggle_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4033 | { |
| 4034 | USB_CRITICAL_SECTION_ENTER(); |
| 4035 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_NYETDIS; |
| 4036 | USB_CRITICAL_SECTION_LEAVE(); |
| 4037 | } |
| 4038 | |
| 4039 | static inline void hri_usbendpoint_set_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4040 | hri_usbendpoint_epcfg_reg_t mask) |
| 4041 | { |
| 4042 | USB_CRITICAL_SECTION_ENTER(); |
| 4043 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4044 | USB_CRITICAL_SECTION_LEAVE(); |
| 4045 | } |
| 4046 | |
| 4047 | static inline hri_usbendpoint_epcfg_reg_t |
| 4048 | hri_usbendpoint_get_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epcfg_reg_t mask) |
| 4049 | { |
| 4050 | uint8_t tmp; |
| 4051 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4052 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0(mask)) >> USB_DEVICE_EPCFG_EPTYPE0_Pos; |
| 4053 | return tmp; |
| 4054 | } |
| 4055 | |
| 4056 | static inline void hri_usbendpoint_write_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4057 | hri_usbendpoint_epcfg_reg_t data) |
| 4058 | { |
| 4059 | uint8_t tmp; |
| 4060 | USB_CRITICAL_SECTION_ENTER(); |
| 4061 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4062 | tmp &= ~USB_DEVICE_EPCFG_EPTYPE0_Msk; |
| 4063 | tmp |= USB_DEVICE_EPCFG_EPTYPE0(data); |
| 4064 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4065 | USB_CRITICAL_SECTION_LEAVE(); |
| 4066 | } |
| 4067 | |
| 4068 | static inline void hri_usbendpoint_clear_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4069 | hri_usbendpoint_epcfg_reg_t mask) |
| 4070 | { |
| 4071 | USB_CRITICAL_SECTION_ENTER(); |
| 4072 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4073 | USB_CRITICAL_SECTION_LEAVE(); |
| 4074 | } |
| 4075 | |
| 4076 | static inline void hri_usbendpoint_toggle_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4077 | hri_usbendpoint_epcfg_reg_t mask) |
| 4078 | { |
| 4079 | USB_CRITICAL_SECTION_ENTER(); |
| 4080 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4081 | USB_CRITICAL_SECTION_LEAVE(); |
| 4082 | } |
| 4083 | |
| 4084 | static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_EPTYPE0_bf(const void *const hw, |
| 4085 | uint8_t submodule_index) |
| 4086 | { |
| 4087 | uint8_t tmp; |
| 4088 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4089 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0_Msk) >> USB_DEVICE_EPCFG_EPTYPE0_Pos; |
| 4090 | return tmp; |
| 4091 | } |
| 4092 | |
| 4093 | static inline void hri_usbendpoint_set_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4094 | hri_usbendpoint_epcfg_reg_t mask) |
| 4095 | { |
| 4096 | USB_CRITICAL_SECTION_ENTER(); |
| 4097 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4098 | USB_CRITICAL_SECTION_LEAVE(); |
| 4099 | } |
| 4100 | |
| 4101 | static inline hri_usbendpoint_epcfg_reg_t |
| 4102 | hri_usbendpoint_get_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epcfg_reg_t mask) |
| 4103 | { |
| 4104 | uint8_t tmp; |
| 4105 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4106 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1(mask)) >> USB_DEVICE_EPCFG_EPTYPE1_Pos; |
| 4107 | return tmp; |
| 4108 | } |
| 4109 | |
| 4110 | static inline void hri_usbendpoint_write_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4111 | hri_usbendpoint_epcfg_reg_t data) |
| 4112 | { |
| 4113 | uint8_t tmp; |
| 4114 | USB_CRITICAL_SECTION_ENTER(); |
| 4115 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4116 | tmp &= ~USB_DEVICE_EPCFG_EPTYPE1_Msk; |
| 4117 | tmp |= USB_DEVICE_EPCFG_EPTYPE1(data); |
| 4118 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4119 | USB_CRITICAL_SECTION_LEAVE(); |
| 4120 | } |
| 4121 | |
| 4122 | static inline void hri_usbendpoint_clear_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4123 | hri_usbendpoint_epcfg_reg_t mask) |
| 4124 | { |
| 4125 | USB_CRITICAL_SECTION_ENTER(); |
| 4126 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4127 | USB_CRITICAL_SECTION_LEAVE(); |
| 4128 | } |
| 4129 | |
| 4130 | static inline void hri_usbendpoint_toggle_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4131 | hri_usbendpoint_epcfg_reg_t mask) |
| 4132 | { |
| 4133 | USB_CRITICAL_SECTION_ENTER(); |
| 4134 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4135 | USB_CRITICAL_SECTION_LEAVE(); |
| 4136 | } |
| 4137 | |
| 4138 | static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_EPTYPE1_bf(const void *const hw, |
| 4139 | uint8_t submodule_index) |
| 4140 | { |
| 4141 | uint8_t tmp; |
| 4142 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4143 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1_Msk) >> USB_DEVICE_EPCFG_EPTYPE1_Pos; |
| 4144 | return tmp; |
| 4145 | } |
| 4146 | |
| 4147 | static inline void hri_usbendpoint_set_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4148 | hri_usbendpoint_epcfg_reg_t mask) |
| 4149 | { |
| 4150 | USB_CRITICAL_SECTION_ENTER(); |
| 4151 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= mask; |
| 4152 | USB_CRITICAL_SECTION_LEAVE(); |
| 4153 | } |
| 4154 | |
| 4155 | static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_get_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4156 | hri_usbendpoint_epcfg_reg_t mask) |
| 4157 | { |
| 4158 | uint8_t tmp; |
| 4159 | tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4160 | tmp &= mask; |
| 4161 | return tmp; |
| 4162 | } |
| 4163 | |
| 4164 | static inline void hri_usbendpoint_write_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4165 | hri_usbendpoint_epcfg_reg_t data) |
| 4166 | { |
| 4167 | USB_CRITICAL_SECTION_ENTER(); |
| 4168 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = data; |
| 4169 | USB_CRITICAL_SECTION_LEAVE(); |
| 4170 | } |
| 4171 | |
| 4172 | static inline void hri_usbendpoint_clear_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4173 | hri_usbendpoint_epcfg_reg_t mask) |
| 4174 | { |
| 4175 | USB_CRITICAL_SECTION_ENTER(); |
| 4176 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~mask; |
| 4177 | USB_CRITICAL_SECTION_LEAVE(); |
| 4178 | } |
| 4179 | |
| 4180 | static inline void hri_usbendpoint_toggle_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4181 | hri_usbendpoint_epcfg_reg_t mask) |
| 4182 | { |
| 4183 | USB_CRITICAL_SECTION_ENTER(); |
| 4184 | ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= mask; |
| 4185 | USB_CRITICAL_SECTION_LEAVE(); |
| 4186 | } |
| 4187 | |
| 4188 | static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_reg(const void *const hw, uint8_t submodule_index) |
| 4189 | { |
| 4190 | return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4191 | } |
| 4192 | |
| 4193 | static inline bool hri_usbdevice_get_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4194 | { |
| 4195 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0) |
| 4196 | >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos; |
| 4197 | } |
| 4198 | |
| 4199 | static inline void hri_usbdevice_clear_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4200 | { |
| 4201 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0; |
| 4202 | } |
| 4203 | |
| 4204 | static inline bool hri_usbdevice_get_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4205 | { |
| 4206 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1) |
| 4207 | >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos; |
| 4208 | } |
| 4209 | |
| 4210 | static inline void hri_usbdevice_clear_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4211 | { |
| 4212 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; |
| 4213 | } |
| 4214 | |
| 4215 | static inline bool hri_usbdevice_get_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4216 | { |
| 4217 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0) |
| 4218 | >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos; |
| 4219 | } |
| 4220 | |
| 4221 | static inline void hri_usbdevice_clear_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4222 | { |
| 4223 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0; |
| 4224 | } |
| 4225 | |
| 4226 | static inline bool hri_usbdevice_get_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4227 | { |
| 4228 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1) |
| 4229 | >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos; |
| 4230 | } |
| 4231 | |
| 4232 | static inline void hri_usbdevice_clear_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4233 | { |
| 4234 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1; |
| 4235 | } |
| 4236 | |
| 4237 | static inline bool hri_usbdevice_get_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4238 | { |
| 4239 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP) |
| 4240 | >> USB_DEVICE_EPINTFLAG_RXSTP_Pos; |
| 4241 | } |
| 4242 | |
| 4243 | static inline void hri_usbdevice_clear_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4244 | { |
| 4245 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP; |
| 4246 | } |
| 4247 | |
| 4248 | static inline bool hri_usbdevice_get_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4249 | { |
| 4250 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0) |
| 4251 | >> USB_DEVICE_EPINTFLAG_STALL0_Pos; |
| 4252 | } |
| 4253 | |
| 4254 | static inline void hri_usbdevice_clear_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4255 | { |
| 4256 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0; |
| 4257 | } |
| 4258 | |
| 4259 | static inline bool hri_usbdevice_get_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4260 | { |
| 4261 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1) |
| 4262 | >> USB_DEVICE_EPINTFLAG_STALL1_Pos; |
| 4263 | } |
| 4264 | |
| 4265 | static inline void hri_usbdevice_clear_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4266 | { |
| 4267 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1; |
| 4268 | } |
| 4269 | |
| 4270 | static inline bool hri_usbdevice_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4271 | { |
| 4272 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0) |
| 4273 | >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos; |
| 4274 | } |
| 4275 | |
| 4276 | static inline void hri_usbdevice_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4277 | { |
| 4278 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0; |
| 4279 | } |
| 4280 | |
| 4281 | static inline bool hri_usbdevice_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4282 | { |
| 4283 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1) |
| 4284 | >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos; |
| 4285 | } |
| 4286 | |
| 4287 | static inline void hri_usbdevice_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4288 | { |
| 4289 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; |
| 4290 | } |
| 4291 | |
| 4292 | static inline bool hri_usbdevice_get_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4293 | { |
| 4294 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0) |
| 4295 | >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos; |
| 4296 | } |
| 4297 | |
| 4298 | static inline void hri_usbdevice_clear_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4299 | { |
| 4300 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0; |
| 4301 | } |
| 4302 | |
| 4303 | static inline bool hri_usbdevice_get_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4304 | { |
| 4305 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1) |
| 4306 | >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos; |
| 4307 | } |
| 4308 | |
| 4309 | static inline void hri_usbdevice_clear_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4310 | { |
| 4311 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1; |
| 4312 | } |
| 4313 | |
| 4314 | static inline bool hri_usbdevice_get_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4315 | { |
| 4316 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP) |
| 4317 | >> USB_DEVICE_EPINTFLAG_RXSTP_Pos; |
| 4318 | } |
| 4319 | |
| 4320 | static inline void hri_usbdevice_clear_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4321 | { |
| 4322 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP; |
| 4323 | } |
| 4324 | |
| 4325 | static inline bool hri_usbdevice_get_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4326 | { |
| 4327 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0) |
| 4328 | >> USB_DEVICE_EPINTFLAG_STALL0_Pos; |
| 4329 | } |
| 4330 | |
| 4331 | static inline void hri_usbdevice_clear_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4332 | { |
| 4333 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0; |
| 4334 | } |
| 4335 | |
| 4336 | static inline bool hri_usbdevice_get_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4337 | { |
| 4338 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1) |
| 4339 | >> USB_DEVICE_EPINTFLAG_STALL1_Pos; |
| 4340 | } |
| 4341 | |
| 4342 | static inline void hri_usbdevice_clear_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4343 | { |
| 4344 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1; |
| 4345 | } |
| 4346 | |
| 4347 | static inline hri_usbdevice_epintflag_reg_t |
| 4348 | hri_usbdevice_get_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, hri_usbdevice_epintflag_reg_t mask) |
| 4349 | { |
| 4350 | uint8_t tmp; |
| 4351 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg; |
| 4352 | tmp &= mask; |
| 4353 | return tmp; |
| 4354 | } |
| 4355 | |
| 4356 | static inline hri_usbdevice_epintflag_reg_t hri_usbdevice_read_EPINTFLAG_reg(const void *const hw, |
| 4357 | uint8_t submodule_index) |
| 4358 | { |
| 4359 | return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg; |
| 4360 | } |
| 4361 | |
| 4362 | static inline void hri_usbdevice_clear_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, |
| 4363 | hri_usbdevice_epintflag_reg_t mask) |
| 4364 | { |
| 4365 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = mask; |
| 4366 | } |
| 4367 | |
| 4368 | static inline void hri_usbdevice_set_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 4369 | { |
| 4370 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 4371 | } |
| 4372 | |
| 4373 | static inline bool hri_usbdevice_get_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 4374 | { |
| 4375 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLOUT) |
| 4376 | >> USB_DEVICE_EPSTATUS_DTGLOUT_Pos; |
| 4377 | } |
| 4378 | |
| 4379 | static inline void hri_usbdevice_write_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4380 | { |
| 4381 | if (value == 0x0) { |
| 4382 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 4383 | } else { |
| 4384 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 4385 | } |
| 4386 | } |
| 4387 | |
| 4388 | static inline void hri_usbdevice_clear_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index) |
| 4389 | { |
| 4390 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT; |
| 4391 | } |
| 4392 | |
| 4393 | static inline void hri_usbdevice_set_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 4394 | { |
| 4395 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 4396 | } |
| 4397 | |
| 4398 | static inline bool hri_usbdevice_get_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 4399 | { |
| 4400 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLIN) |
| 4401 | >> USB_DEVICE_EPSTATUS_DTGLIN_Pos; |
| 4402 | } |
| 4403 | |
| 4404 | static inline void hri_usbdevice_write_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4405 | { |
| 4406 | if (value == 0x0) { |
| 4407 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 4408 | } else { |
| 4409 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 4410 | } |
| 4411 | } |
| 4412 | |
| 4413 | static inline void hri_usbdevice_clear_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index) |
| 4414 | { |
| 4415 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN; |
| 4416 | } |
| 4417 | |
| 4418 | static inline void hri_usbdevice_set_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 4419 | { |
| 4420 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 4421 | } |
| 4422 | |
| 4423 | static inline bool hri_usbdevice_get_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 4424 | { |
| 4425 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_CURBK) |
| 4426 | >> USB_DEVICE_EPSTATUS_CURBK_Pos; |
| 4427 | } |
| 4428 | |
| 4429 | static inline void hri_usbdevice_write_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4430 | { |
| 4431 | if (value == 0x0) { |
| 4432 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 4433 | } else { |
| 4434 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 4435 | } |
| 4436 | } |
| 4437 | |
| 4438 | static inline void hri_usbdevice_clear_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index) |
| 4439 | { |
| 4440 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK; |
| 4441 | } |
| 4442 | |
| 4443 | static inline void hri_usbdevice_set_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 4444 | { |
| 4445 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 4446 | } |
| 4447 | |
| 4448 | static inline bool hri_usbdevice_get_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 4449 | { |
| 4450 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ0) |
| 4451 | >> USB_DEVICE_EPSTATUS_STALLRQ0_Pos; |
| 4452 | } |
| 4453 | |
| 4454 | static inline void hri_usbdevice_write_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4455 | { |
| 4456 | if (value == 0x0) { |
| 4457 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 4458 | } else { |
| 4459 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 4460 | } |
| 4461 | } |
| 4462 | |
| 4463 | static inline void hri_usbdevice_clear_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index) |
| 4464 | { |
| 4465 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0; |
| 4466 | } |
| 4467 | |
| 4468 | static inline void hri_usbdevice_set_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 4469 | { |
| 4470 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 4471 | } |
| 4472 | |
| 4473 | static inline bool hri_usbdevice_get_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 4474 | { |
| 4475 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ1) |
| 4476 | >> USB_DEVICE_EPSTATUS_STALLRQ1_Pos; |
| 4477 | } |
| 4478 | |
| 4479 | static inline void hri_usbdevice_write_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4480 | { |
| 4481 | if (value == 0x0) { |
| 4482 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 4483 | } else { |
| 4484 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 4485 | } |
| 4486 | } |
| 4487 | |
| 4488 | static inline void hri_usbdevice_clear_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index) |
| 4489 | { |
| 4490 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1; |
| 4491 | } |
| 4492 | |
| 4493 | static inline void hri_usbdevice_set_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4494 | { |
| 4495 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 4496 | } |
| 4497 | |
| 4498 | static inline bool hri_usbdevice_get_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4499 | { |
| 4500 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK0RDY) |
| 4501 | >> USB_DEVICE_EPSTATUS_BK0RDY_Pos; |
| 4502 | } |
| 4503 | |
| 4504 | static inline void hri_usbdevice_write_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4505 | { |
| 4506 | if (value == 0x0) { |
| 4507 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 4508 | } else { |
| 4509 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 4510 | } |
| 4511 | } |
| 4512 | |
| 4513 | static inline void hri_usbdevice_clear_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4514 | { |
| 4515 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY; |
| 4516 | } |
| 4517 | |
| 4518 | static inline void hri_usbdevice_set_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4519 | { |
| 4520 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 4521 | } |
| 4522 | |
| 4523 | static inline bool hri_usbdevice_get_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4524 | { |
| 4525 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK1RDY) |
| 4526 | >> USB_DEVICE_EPSTATUS_BK1RDY_Pos; |
| 4527 | } |
| 4528 | |
| 4529 | static inline void hri_usbdevice_write_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4530 | { |
| 4531 | if (value == 0x0) { |
| 4532 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 4533 | } else { |
| 4534 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 4535 | } |
| 4536 | } |
| 4537 | |
| 4538 | static inline void hri_usbdevice_clear_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index) |
| 4539 | { |
| 4540 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY; |
| 4541 | } |
| 4542 | |
| 4543 | static inline void hri_usbdevice_set_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 4544 | hri_usbdevice_epstatus_reg_t mask) |
| 4545 | { |
| 4546 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = mask; |
| 4547 | } |
| 4548 | |
| 4549 | static inline hri_usbdevice_epstatus_reg_t hri_usbdevice_get_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 4550 | hri_usbdevice_epstatus_reg_t mask) |
| 4551 | { |
| 4552 | uint8_t tmp; |
| 4553 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg; |
| 4554 | tmp &= mask; |
| 4555 | return tmp; |
| 4556 | } |
| 4557 | |
| 4558 | static inline hri_usbdevice_epstatus_reg_t hri_usbdevice_read_EPSTATUS_reg(const void *const hw, |
| 4559 | uint8_t submodule_index) |
| 4560 | { |
| 4561 | return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg; |
| 4562 | } |
| 4563 | |
| 4564 | static inline void hri_usbdevice_write_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 4565 | hri_usbdevice_epstatus_reg_t data) |
| 4566 | { |
| 4567 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = data; |
| 4568 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = ~data; |
| 4569 | } |
| 4570 | |
| 4571 | static inline void hri_usbdevice_clear_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, |
| 4572 | hri_usbdevice_epstatus_reg_t mask) |
| 4573 | { |
| 4574 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = mask; |
| 4575 | } |
| 4576 | |
| 4577 | static inline void hri_usbdevice_set_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4578 | { |
| 4579 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 4580 | } |
| 4581 | |
| 4582 | static inline bool hri_usbdevice_get_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4583 | { |
| 4584 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT0) |
| 4585 | >> USB_DEVICE_EPINTENSET_TRCPT0_Pos; |
| 4586 | } |
| 4587 | |
| 4588 | static inline void hri_usbdevice_write_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4589 | { |
| 4590 | if (value == 0x0) { |
| 4591 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 4592 | } else { |
| 4593 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 4594 | } |
| 4595 | } |
| 4596 | |
| 4597 | static inline void hri_usbdevice_clear_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index) |
| 4598 | { |
| 4599 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0; |
| 4600 | } |
| 4601 | |
| 4602 | static inline void hri_usbdevice_set_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4603 | { |
| 4604 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 4605 | } |
| 4606 | |
| 4607 | static inline bool hri_usbdevice_get_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4608 | { |
| 4609 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT1) |
| 4610 | >> USB_DEVICE_EPINTENSET_TRCPT1_Pos; |
| 4611 | } |
| 4612 | |
| 4613 | static inline void hri_usbdevice_write_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4614 | { |
| 4615 | if (value == 0x0) { |
| 4616 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 4617 | } else { |
| 4618 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 4619 | } |
| 4620 | } |
| 4621 | |
| 4622 | static inline void hri_usbdevice_clear_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index) |
| 4623 | { |
| 4624 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1; |
| 4625 | } |
| 4626 | |
| 4627 | static inline void hri_usbdevice_set_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4628 | { |
| 4629 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 4630 | } |
| 4631 | |
| 4632 | static inline bool hri_usbdevice_get_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4633 | { |
| 4634 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL0) |
| 4635 | >> USB_DEVICE_EPINTENSET_TRFAIL0_Pos; |
| 4636 | } |
| 4637 | |
| 4638 | static inline void hri_usbdevice_write_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4639 | { |
| 4640 | if (value == 0x0) { |
| 4641 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 4642 | } else { |
| 4643 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 4644 | } |
| 4645 | } |
| 4646 | |
| 4647 | static inline void hri_usbdevice_clear_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index) |
| 4648 | { |
| 4649 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0; |
| 4650 | } |
| 4651 | |
| 4652 | static inline void hri_usbdevice_set_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4653 | { |
| 4654 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 4655 | } |
| 4656 | |
| 4657 | static inline bool hri_usbdevice_get_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4658 | { |
| 4659 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL1) |
| 4660 | >> USB_DEVICE_EPINTENSET_TRFAIL1_Pos; |
| 4661 | } |
| 4662 | |
| 4663 | static inline void hri_usbdevice_write_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4664 | { |
| 4665 | if (value == 0x0) { |
| 4666 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 4667 | } else { |
| 4668 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 4669 | } |
| 4670 | } |
| 4671 | |
| 4672 | static inline void hri_usbdevice_clear_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index) |
| 4673 | { |
| 4674 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1; |
| 4675 | } |
| 4676 | |
| 4677 | static inline void hri_usbdevice_set_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4678 | { |
| 4679 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 4680 | } |
| 4681 | |
| 4682 | static inline bool hri_usbdevice_get_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4683 | { |
| 4684 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_RXSTP) |
| 4685 | >> USB_DEVICE_EPINTENSET_RXSTP_Pos; |
| 4686 | } |
| 4687 | |
| 4688 | static inline void hri_usbdevice_write_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4689 | { |
| 4690 | if (value == 0x0) { |
| 4691 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 4692 | } else { |
| 4693 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 4694 | } |
| 4695 | } |
| 4696 | |
| 4697 | static inline void hri_usbdevice_clear_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index) |
| 4698 | { |
| 4699 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP; |
| 4700 | } |
| 4701 | |
| 4702 | static inline void hri_usbdevice_set_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4703 | { |
| 4704 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 4705 | } |
| 4706 | |
| 4707 | static inline bool hri_usbdevice_get_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4708 | { |
| 4709 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL0) |
| 4710 | >> USB_DEVICE_EPINTENSET_STALL0_Pos; |
| 4711 | } |
| 4712 | |
| 4713 | static inline void hri_usbdevice_write_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4714 | { |
| 4715 | if (value == 0x0) { |
| 4716 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 4717 | } else { |
| 4718 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 4719 | } |
| 4720 | } |
| 4721 | |
| 4722 | static inline void hri_usbdevice_clear_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index) |
| 4723 | { |
| 4724 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0; |
| 4725 | } |
| 4726 | |
| 4727 | static inline void hri_usbdevice_set_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4728 | { |
| 4729 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 4730 | } |
| 4731 | |
| 4732 | static inline bool hri_usbdevice_get_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4733 | { |
| 4734 | return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL1) |
| 4735 | >> USB_DEVICE_EPINTENSET_STALL1_Pos; |
| 4736 | } |
| 4737 | |
| 4738 | static inline void hri_usbdevice_write_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4739 | { |
| 4740 | if (value == 0x0) { |
| 4741 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 4742 | } else { |
| 4743 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 4744 | } |
| 4745 | } |
| 4746 | |
| 4747 | static inline void hri_usbdevice_clear_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index) |
| 4748 | { |
| 4749 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1; |
| 4750 | } |
| 4751 | |
| 4752 | static inline void hri_usbdevice_set_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 4753 | hri_usbdevice_epintenset_reg_t mask) |
| 4754 | { |
| 4755 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = mask; |
| 4756 | } |
| 4757 | |
| 4758 | static inline hri_usbdevice_epintenset_reg_t |
| 4759 | hri_usbdevice_get_EPINTEN_reg(const void *const hw, uint8_t submodule_index, hri_usbdevice_epintenset_reg_t mask) |
| 4760 | { |
| 4761 | uint8_t tmp; |
| 4762 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg; |
| 4763 | tmp &= mask; |
| 4764 | return tmp; |
| 4765 | } |
| 4766 | |
| 4767 | static inline hri_usbdevice_epintenset_reg_t hri_usbdevice_read_EPINTEN_reg(const void *const hw, |
| 4768 | uint8_t submodule_index) |
| 4769 | { |
| 4770 | return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg; |
| 4771 | } |
| 4772 | |
| 4773 | static inline void hri_usbdevice_write_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 4774 | hri_usbdevice_epintenset_reg_t data) |
| 4775 | { |
| 4776 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = data; |
| 4777 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = ~data; |
| 4778 | } |
| 4779 | |
| 4780 | static inline void hri_usbdevice_clear_EPINTEN_reg(const void *const hw, uint8_t submodule_index, |
| 4781 | hri_usbdevice_epintenset_reg_t mask) |
| 4782 | { |
| 4783 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = mask; |
| 4784 | } |
| 4785 | |
| 4786 | static inline void hri_usbdevice_set_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4787 | { |
| 4788 | USB_CRITICAL_SECTION_ENTER(); |
| 4789 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_NYETDIS; |
| 4790 | USB_CRITICAL_SECTION_LEAVE(); |
| 4791 | } |
| 4792 | |
| 4793 | static inline bool hri_usbdevice_get_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4794 | { |
| 4795 | uint8_t tmp; |
| 4796 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4797 | tmp = (tmp & USB_DEVICE_EPCFG_NYETDIS) >> USB_DEVICE_EPCFG_NYETDIS_Pos; |
| 4798 | return (bool)tmp; |
| 4799 | } |
| 4800 | |
| 4801 | static inline void hri_usbdevice_write_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index, bool value) |
| 4802 | { |
| 4803 | uint8_t tmp; |
| 4804 | USB_CRITICAL_SECTION_ENTER(); |
| 4805 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4806 | tmp &= ~USB_DEVICE_EPCFG_NYETDIS; |
| 4807 | tmp |= value << USB_DEVICE_EPCFG_NYETDIS_Pos; |
| 4808 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4809 | USB_CRITICAL_SECTION_LEAVE(); |
| 4810 | } |
| 4811 | |
| 4812 | static inline void hri_usbdevice_clear_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4813 | { |
| 4814 | USB_CRITICAL_SECTION_ENTER(); |
| 4815 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_NYETDIS; |
| 4816 | USB_CRITICAL_SECTION_LEAVE(); |
| 4817 | } |
| 4818 | |
| 4819 | static inline void hri_usbdevice_toggle_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index) |
| 4820 | { |
| 4821 | USB_CRITICAL_SECTION_ENTER(); |
| 4822 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_NYETDIS; |
| 4823 | USB_CRITICAL_SECTION_LEAVE(); |
| 4824 | } |
| 4825 | |
| 4826 | static inline void hri_usbdevice_set_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4827 | hri_usbdevice_epcfg_reg_t mask) |
| 4828 | { |
| 4829 | USB_CRITICAL_SECTION_ENTER(); |
| 4830 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4831 | USB_CRITICAL_SECTION_LEAVE(); |
| 4832 | } |
| 4833 | |
| 4834 | static inline hri_usbdevice_epcfg_reg_t |
| 4835 | hri_usbdevice_get_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, hri_usbdevice_epcfg_reg_t mask) |
| 4836 | { |
| 4837 | uint8_t tmp; |
| 4838 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4839 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0(mask)) >> USB_DEVICE_EPCFG_EPTYPE0_Pos; |
| 4840 | return tmp; |
| 4841 | } |
| 4842 | |
| 4843 | static inline void hri_usbdevice_write_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4844 | hri_usbdevice_epcfg_reg_t data) |
| 4845 | { |
| 4846 | uint8_t tmp; |
| 4847 | USB_CRITICAL_SECTION_ENTER(); |
| 4848 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4849 | tmp &= ~USB_DEVICE_EPCFG_EPTYPE0_Msk; |
| 4850 | tmp |= USB_DEVICE_EPCFG_EPTYPE0(data); |
| 4851 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4852 | USB_CRITICAL_SECTION_LEAVE(); |
| 4853 | } |
| 4854 | |
| 4855 | static inline void hri_usbdevice_clear_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4856 | hri_usbdevice_epcfg_reg_t mask) |
| 4857 | { |
| 4858 | USB_CRITICAL_SECTION_ENTER(); |
| 4859 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4860 | USB_CRITICAL_SECTION_LEAVE(); |
| 4861 | } |
| 4862 | |
| 4863 | static inline void hri_usbdevice_toggle_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, |
| 4864 | hri_usbdevice_epcfg_reg_t mask) |
| 4865 | { |
| 4866 | USB_CRITICAL_SECTION_ENTER(); |
| 4867 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE0(mask); |
| 4868 | USB_CRITICAL_SECTION_LEAVE(); |
| 4869 | } |
| 4870 | |
| 4871 | static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_EPTYPE0_bf(const void *const hw, |
| 4872 | uint8_t submodule_index) |
| 4873 | { |
| 4874 | uint8_t tmp; |
| 4875 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4876 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0_Msk) >> USB_DEVICE_EPCFG_EPTYPE0_Pos; |
| 4877 | return tmp; |
| 4878 | } |
| 4879 | |
| 4880 | static inline void hri_usbdevice_set_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4881 | hri_usbdevice_epcfg_reg_t mask) |
| 4882 | { |
| 4883 | USB_CRITICAL_SECTION_ENTER(); |
| 4884 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4885 | USB_CRITICAL_SECTION_LEAVE(); |
| 4886 | } |
| 4887 | |
| 4888 | static inline hri_usbdevice_epcfg_reg_t |
| 4889 | hri_usbdevice_get_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, hri_usbdevice_epcfg_reg_t mask) |
| 4890 | { |
| 4891 | uint8_t tmp; |
| 4892 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4893 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1(mask)) >> USB_DEVICE_EPCFG_EPTYPE1_Pos; |
| 4894 | return tmp; |
| 4895 | } |
| 4896 | |
| 4897 | static inline void hri_usbdevice_write_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4898 | hri_usbdevice_epcfg_reg_t data) |
| 4899 | { |
| 4900 | uint8_t tmp; |
| 4901 | USB_CRITICAL_SECTION_ENTER(); |
| 4902 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4903 | tmp &= ~USB_DEVICE_EPCFG_EPTYPE1_Msk; |
| 4904 | tmp |= USB_DEVICE_EPCFG_EPTYPE1(data); |
| 4905 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp; |
| 4906 | USB_CRITICAL_SECTION_LEAVE(); |
| 4907 | } |
| 4908 | |
| 4909 | static inline void hri_usbdevice_clear_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4910 | hri_usbdevice_epcfg_reg_t mask) |
| 4911 | { |
| 4912 | USB_CRITICAL_SECTION_ENTER(); |
| 4913 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4914 | USB_CRITICAL_SECTION_LEAVE(); |
| 4915 | } |
| 4916 | |
| 4917 | static inline void hri_usbdevice_toggle_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, |
| 4918 | hri_usbdevice_epcfg_reg_t mask) |
| 4919 | { |
| 4920 | USB_CRITICAL_SECTION_ENTER(); |
| 4921 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE1(mask); |
| 4922 | USB_CRITICAL_SECTION_LEAVE(); |
| 4923 | } |
| 4924 | |
| 4925 | static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_EPTYPE1_bf(const void *const hw, |
| 4926 | uint8_t submodule_index) |
| 4927 | { |
| 4928 | uint8_t tmp; |
| 4929 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4930 | tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1_Msk) >> USB_DEVICE_EPCFG_EPTYPE1_Pos; |
| 4931 | return tmp; |
| 4932 | } |
| 4933 | |
| 4934 | static inline void hri_usbdevice_set_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4935 | hri_usbdevice_epcfg_reg_t mask) |
| 4936 | { |
| 4937 | USB_CRITICAL_SECTION_ENTER(); |
| 4938 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= mask; |
| 4939 | USB_CRITICAL_SECTION_LEAVE(); |
| 4940 | } |
| 4941 | |
| 4942 | static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_get_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4943 | hri_usbdevice_epcfg_reg_t mask) |
| 4944 | { |
| 4945 | uint8_t tmp; |
| 4946 | tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4947 | tmp &= mask; |
| 4948 | return tmp; |
| 4949 | } |
| 4950 | |
| 4951 | static inline void hri_usbdevice_write_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4952 | hri_usbdevice_epcfg_reg_t data) |
| 4953 | { |
| 4954 | USB_CRITICAL_SECTION_ENTER(); |
| 4955 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = data; |
| 4956 | USB_CRITICAL_SECTION_LEAVE(); |
| 4957 | } |
| 4958 | |
| 4959 | static inline void hri_usbdevice_clear_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4960 | hri_usbdevice_epcfg_reg_t mask) |
| 4961 | { |
| 4962 | USB_CRITICAL_SECTION_ENTER(); |
| 4963 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~mask; |
| 4964 | USB_CRITICAL_SECTION_LEAVE(); |
| 4965 | } |
| 4966 | |
| 4967 | static inline void hri_usbdevice_toggle_EPCFG_reg(const void *const hw, uint8_t submodule_index, |
| 4968 | hri_usbdevice_epcfg_reg_t mask) |
| 4969 | { |
| 4970 | USB_CRITICAL_SECTION_ENTER(); |
| 4971 | ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= mask; |
| 4972 | USB_CRITICAL_SECTION_LEAVE(); |
| 4973 | } |
| 4974 | |
| 4975 | static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_reg(const void *const hw, uint8_t submodule_index) |
| 4976 | { |
| 4977 | return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg; |
| 4978 | } |
| 4979 | |
| 4980 | static inline bool hri_usbdevice_get_INTFLAG_SUSPEND_bit(const void *const hw) |
| 4981 | { |
| 4982 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SUSPEND) >> USB_DEVICE_INTFLAG_SUSPEND_Pos; |
| 4983 | } |
| 4984 | |
| 4985 | static inline void hri_usbdevice_clear_INTFLAG_SUSPEND_bit(const void *const hw) |
| 4986 | { |
| 4987 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SUSPEND; |
| 4988 | } |
| 4989 | |
| 4990 | static inline bool hri_usbdevice_get_INTFLAG_MSOF_bit(const void *const hw) |
| 4991 | { |
| 4992 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_MSOF) >> USB_DEVICE_INTFLAG_MSOF_Pos; |
| 4993 | } |
| 4994 | |
| 4995 | static inline void hri_usbdevice_clear_INTFLAG_MSOF_bit(const void *const hw) |
| 4996 | { |
| 4997 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_MSOF; |
| 4998 | } |
| 4999 | |
| 5000 | static inline bool hri_usbdevice_get_INTFLAG_SOF_bit(const void *const hw) |
| 5001 | { |
| 5002 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SOF) >> USB_DEVICE_INTFLAG_SOF_Pos; |
| 5003 | } |
| 5004 | |
| 5005 | static inline void hri_usbdevice_clear_INTFLAG_SOF_bit(const void *const hw) |
| 5006 | { |
| 5007 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF; |
| 5008 | } |
| 5009 | |
| 5010 | static inline bool hri_usbdevice_get_INTFLAG_EORST_bit(const void *const hw) |
| 5011 | { |
| 5012 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORST) >> USB_DEVICE_INTFLAG_EORST_Pos; |
| 5013 | } |
| 5014 | |
| 5015 | static inline void hri_usbdevice_clear_INTFLAG_EORST_bit(const void *const hw) |
| 5016 | { |
| 5017 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST; |
| 5018 | } |
| 5019 | |
| 5020 | static inline bool hri_usbdevice_get_INTFLAG_WAKEUP_bit(const void *const hw) |
| 5021 | { |
| 5022 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_WAKEUP) >> USB_DEVICE_INTFLAG_WAKEUP_Pos; |
| 5023 | } |
| 5024 | |
| 5025 | static inline void hri_usbdevice_clear_INTFLAG_WAKEUP_bit(const void *const hw) |
| 5026 | { |
| 5027 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP; |
| 5028 | } |
| 5029 | |
| 5030 | static inline bool hri_usbdevice_get_INTFLAG_EORSM_bit(const void *const hw) |
| 5031 | { |
| 5032 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORSM) >> USB_DEVICE_INTFLAG_EORSM_Pos; |
| 5033 | } |
| 5034 | |
| 5035 | static inline void hri_usbdevice_clear_INTFLAG_EORSM_bit(const void *const hw) |
| 5036 | { |
| 5037 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORSM; |
| 5038 | } |
| 5039 | |
| 5040 | static inline bool hri_usbdevice_get_INTFLAG_UPRSM_bit(const void *const hw) |
| 5041 | { |
| 5042 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_UPRSM) >> USB_DEVICE_INTFLAG_UPRSM_Pos; |
| 5043 | } |
| 5044 | |
| 5045 | static inline void hri_usbdevice_clear_INTFLAG_UPRSM_bit(const void *const hw) |
| 5046 | { |
| 5047 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_UPRSM; |
| 5048 | } |
| 5049 | |
| 5050 | static inline bool hri_usbdevice_get_INTFLAG_RAMACER_bit(const void *const hw) |
| 5051 | { |
| 5052 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_RAMACER) >> USB_DEVICE_INTFLAG_RAMACER_Pos; |
| 5053 | } |
| 5054 | |
| 5055 | static inline void hri_usbdevice_clear_INTFLAG_RAMACER_bit(const void *const hw) |
| 5056 | { |
| 5057 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_RAMACER; |
| 5058 | } |
| 5059 | |
| 5060 | static inline bool hri_usbdevice_get_INTFLAG_LPMNYET_bit(const void *const hw) |
| 5061 | { |
| 5062 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMNYET) >> USB_DEVICE_INTFLAG_LPMNYET_Pos; |
| 5063 | } |
| 5064 | |
| 5065 | static inline void hri_usbdevice_clear_INTFLAG_LPMNYET_bit(const void *const hw) |
| 5066 | { |
| 5067 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMNYET; |
| 5068 | } |
| 5069 | |
| 5070 | static inline bool hri_usbdevice_get_INTFLAG_LPMSUSP_bit(const void *const hw) |
| 5071 | { |
| 5072 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMSUSP) >> USB_DEVICE_INTFLAG_LPMSUSP_Pos; |
| 5073 | } |
| 5074 | |
| 5075 | static inline void hri_usbdevice_clear_INTFLAG_LPMSUSP_bit(const void *const hw) |
| 5076 | { |
| 5077 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMSUSP; |
| 5078 | } |
| 5079 | |
| 5080 | static inline bool hri_usbdevice_get_interrupt_SUSPEND_bit(const void *const hw) |
| 5081 | { |
| 5082 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SUSPEND) >> USB_DEVICE_INTFLAG_SUSPEND_Pos; |
| 5083 | } |
| 5084 | |
| 5085 | static inline void hri_usbdevice_clear_interrupt_SUSPEND_bit(const void *const hw) |
| 5086 | { |
| 5087 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SUSPEND; |
| 5088 | } |
| 5089 | |
| 5090 | static inline bool hri_usbdevice_get_interrupt_MSOF_bit(const void *const hw) |
| 5091 | { |
| 5092 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_MSOF) >> USB_DEVICE_INTFLAG_MSOF_Pos; |
| 5093 | } |
| 5094 | |
| 5095 | static inline void hri_usbdevice_clear_interrupt_MSOF_bit(const void *const hw) |
| 5096 | { |
| 5097 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_MSOF; |
| 5098 | } |
| 5099 | |
| 5100 | static inline bool hri_usbdevice_get_interrupt_SOF_bit(const void *const hw) |
| 5101 | { |
| 5102 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SOF) >> USB_DEVICE_INTFLAG_SOF_Pos; |
| 5103 | } |
| 5104 | |
| 5105 | static inline void hri_usbdevice_clear_interrupt_SOF_bit(const void *const hw) |
| 5106 | { |
| 5107 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF; |
| 5108 | } |
| 5109 | |
| 5110 | static inline bool hri_usbdevice_get_interrupt_EORST_bit(const void *const hw) |
| 5111 | { |
| 5112 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORST) >> USB_DEVICE_INTFLAG_EORST_Pos; |
| 5113 | } |
| 5114 | |
| 5115 | static inline void hri_usbdevice_clear_interrupt_EORST_bit(const void *const hw) |
| 5116 | { |
| 5117 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST; |
| 5118 | } |
| 5119 | |
| 5120 | static inline bool hri_usbdevice_get_interrupt_WAKEUP_bit(const void *const hw) |
| 5121 | { |
| 5122 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_WAKEUP) >> USB_DEVICE_INTFLAG_WAKEUP_Pos; |
| 5123 | } |
| 5124 | |
| 5125 | static inline void hri_usbdevice_clear_interrupt_WAKEUP_bit(const void *const hw) |
| 5126 | { |
| 5127 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP; |
| 5128 | } |
| 5129 | |
| 5130 | static inline bool hri_usbdevice_get_interrupt_EORSM_bit(const void *const hw) |
| 5131 | { |
| 5132 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORSM) >> USB_DEVICE_INTFLAG_EORSM_Pos; |
| 5133 | } |
| 5134 | |
| 5135 | static inline void hri_usbdevice_clear_interrupt_EORSM_bit(const void *const hw) |
| 5136 | { |
| 5137 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORSM; |
| 5138 | } |
| 5139 | |
| 5140 | static inline bool hri_usbdevice_get_interrupt_UPRSM_bit(const void *const hw) |
| 5141 | { |
| 5142 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_UPRSM) >> USB_DEVICE_INTFLAG_UPRSM_Pos; |
| 5143 | } |
| 5144 | |
| 5145 | static inline void hri_usbdevice_clear_interrupt_UPRSM_bit(const void *const hw) |
| 5146 | { |
| 5147 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_UPRSM; |
| 5148 | } |
| 5149 | |
| 5150 | static inline bool hri_usbdevice_get_interrupt_RAMACER_bit(const void *const hw) |
| 5151 | { |
| 5152 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_RAMACER) >> USB_DEVICE_INTFLAG_RAMACER_Pos; |
| 5153 | } |
| 5154 | |
| 5155 | static inline void hri_usbdevice_clear_interrupt_RAMACER_bit(const void *const hw) |
| 5156 | { |
| 5157 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_RAMACER; |
| 5158 | } |
| 5159 | |
| 5160 | static inline bool hri_usbdevice_get_interrupt_LPMNYET_bit(const void *const hw) |
| 5161 | { |
| 5162 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMNYET) >> USB_DEVICE_INTFLAG_LPMNYET_Pos; |
| 5163 | } |
| 5164 | |
| 5165 | static inline void hri_usbdevice_clear_interrupt_LPMNYET_bit(const void *const hw) |
| 5166 | { |
| 5167 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMNYET; |
| 5168 | } |
| 5169 | |
| 5170 | static inline bool hri_usbdevice_get_interrupt_LPMSUSP_bit(const void *const hw) |
| 5171 | { |
| 5172 | return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMSUSP) >> USB_DEVICE_INTFLAG_LPMSUSP_Pos; |
| 5173 | } |
| 5174 | |
| 5175 | static inline void hri_usbdevice_clear_interrupt_LPMSUSP_bit(const void *const hw) |
| 5176 | { |
| 5177 | ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMSUSP; |
| 5178 | } |
| 5179 | |
| 5180 | static inline hri_usbdevice_intflag_reg_t hri_usbdevice_get_INTFLAG_reg(const void *const hw, |
| 5181 | hri_usbdevice_intflag_reg_t mask) |
| 5182 | { |
| 5183 | uint16_t tmp; |
| 5184 | tmp = ((Usb *)hw)->DEVICE.INTFLAG.reg; |
| 5185 | tmp &= mask; |
| 5186 | return tmp; |
| 5187 | } |
| 5188 | |
| 5189 | static inline hri_usbdevice_intflag_reg_t hri_usbdevice_read_INTFLAG_reg(const void *const hw) |
| 5190 | { |
| 5191 | return ((Usb *)hw)->DEVICE.INTFLAG.reg; |
| 5192 | } |
| 5193 | |
| 5194 | static inline void hri_usbdevice_clear_INTFLAG_reg(const void *const hw, hri_usbdevice_intflag_reg_t mask) |
| 5195 | { |
| 5196 | ((Usb *)hw)->DEVICE.INTFLAG.reg = mask; |
| 5197 | } |
| 5198 | |
| 5199 | static inline bool hri_usbhost_get_INTFLAG_HSOF_bit(const void *const hw) |
| 5200 | { |
| 5201 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_HSOF) >> USB_HOST_INTFLAG_HSOF_Pos; |
| 5202 | } |
| 5203 | |
| 5204 | static inline void hri_usbhost_clear_INTFLAG_HSOF_bit(const void *const hw) |
| 5205 | { |
| 5206 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF; |
| 5207 | } |
| 5208 | |
| 5209 | static inline bool hri_usbhost_get_INTFLAG_RST_bit(const void *const hw) |
| 5210 | { |
| 5211 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RST) >> USB_HOST_INTFLAG_RST_Pos; |
| 5212 | } |
| 5213 | |
| 5214 | static inline void hri_usbhost_clear_INTFLAG_RST_bit(const void *const hw) |
| 5215 | { |
| 5216 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST; |
| 5217 | } |
| 5218 | |
| 5219 | static inline bool hri_usbhost_get_INTFLAG_WAKEUP_bit(const void *const hw) |
| 5220 | { |
| 5221 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_WAKEUP) >> USB_HOST_INTFLAG_WAKEUP_Pos; |
| 5222 | } |
| 5223 | |
| 5224 | static inline void hri_usbhost_clear_INTFLAG_WAKEUP_bit(const void *const hw) |
| 5225 | { |
| 5226 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP; |
| 5227 | } |
| 5228 | |
| 5229 | static inline bool hri_usbhost_get_INTFLAG_DNRSM_bit(const void *const hw) |
| 5230 | { |
| 5231 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DNRSM) >> USB_HOST_INTFLAG_DNRSM_Pos; |
| 5232 | } |
| 5233 | |
| 5234 | static inline void hri_usbhost_clear_INTFLAG_DNRSM_bit(const void *const hw) |
| 5235 | { |
| 5236 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM; |
| 5237 | } |
| 5238 | |
| 5239 | static inline bool hri_usbhost_get_INTFLAG_UPRSM_bit(const void *const hw) |
| 5240 | { |
| 5241 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_UPRSM) >> USB_HOST_INTFLAG_UPRSM_Pos; |
| 5242 | } |
| 5243 | |
| 5244 | static inline void hri_usbhost_clear_INTFLAG_UPRSM_bit(const void *const hw) |
| 5245 | { |
| 5246 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM; |
| 5247 | } |
| 5248 | |
| 5249 | static inline bool hri_usbhost_get_INTFLAG_RAMACER_bit(const void *const hw) |
| 5250 | { |
| 5251 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RAMACER) >> USB_HOST_INTFLAG_RAMACER_Pos; |
| 5252 | } |
| 5253 | |
| 5254 | static inline void hri_usbhost_clear_INTFLAG_RAMACER_bit(const void *const hw) |
| 5255 | { |
| 5256 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RAMACER; |
| 5257 | } |
| 5258 | |
| 5259 | static inline bool hri_usbhost_get_INTFLAG_DCONN_bit(const void *const hw) |
| 5260 | { |
| 5261 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DCONN) >> USB_HOST_INTFLAG_DCONN_Pos; |
| 5262 | } |
| 5263 | |
| 5264 | static inline void hri_usbhost_clear_INTFLAG_DCONN_bit(const void *const hw) |
| 5265 | { |
| 5266 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DCONN; |
| 5267 | } |
| 5268 | |
| 5269 | static inline bool hri_usbhost_get_INTFLAG_DDISC_bit(const void *const hw) |
| 5270 | { |
| 5271 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DDISC) >> USB_HOST_INTFLAG_DDISC_Pos; |
| 5272 | } |
| 5273 | |
| 5274 | static inline void hri_usbhost_clear_INTFLAG_DDISC_bit(const void *const hw) |
| 5275 | { |
| 5276 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DDISC; |
| 5277 | } |
| 5278 | |
| 5279 | static inline bool hri_usbhost_get_interrupt_HSOF_bit(const void *const hw) |
| 5280 | { |
| 5281 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_HSOF) >> USB_HOST_INTFLAG_HSOF_Pos; |
| 5282 | } |
| 5283 | |
| 5284 | static inline void hri_usbhost_clear_interrupt_HSOF_bit(const void *const hw) |
| 5285 | { |
| 5286 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF; |
| 5287 | } |
| 5288 | |
| 5289 | static inline bool hri_usbhost_get_interrupt_RST_bit(const void *const hw) |
| 5290 | { |
| 5291 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RST) >> USB_HOST_INTFLAG_RST_Pos; |
| 5292 | } |
| 5293 | |
| 5294 | static inline void hri_usbhost_clear_interrupt_RST_bit(const void *const hw) |
| 5295 | { |
| 5296 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST; |
| 5297 | } |
| 5298 | |
| 5299 | static inline bool hri_usbhost_get_interrupt_WAKEUP_bit(const void *const hw) |
| 5300 | { |
| 5301 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_WAKEUP) >> USB_HOST_INTFLAG_WAKEUP_Pos; |
| 5302 | } |
| 5303 | |
| 5304 | static inline void hri_usbhost_clear_interrupt_WAKEUP_bit(const void *const hw) |
| 5305 | { |
| 5306 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP; |
| 5307 | } |
| 5308 | |
| 5309 | static inline bool hri_usbhost_get_interrupt_DNRSM_bit(const void *const hw) |
| 5310 | { |
| 5311 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DNRSM) >> USB_HOST_INTFLAG_DNRSM_Pos; |
| 5312 | } |
| 5313 | |
| 5314 | static inline void hri_usbhost_clear_interrupt_DNRSM_bit(const void *const hw) |
| 5315 | { |
| 5316 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM; |
| 5317 | } |
| 5318 | |
| 5319 | static inline bool hri_usbhost_get_interrupt_UPRSM_bit(const void *const hw) |
| 5320 | { |
| 5321 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_UPRSM) >> USB_HOST_INTFLAG_UPRSM_Pos; |
| 5322 | } |
| 5323 | |
| 5324 | static inline void hri_usbhost_clear_interrupt_UPRSM_bit(const void *const hw) |
| 5325 | { |
| 5326 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM; |
| 5327 | } |
| 5328 | |
| 5329 | static inline bool hri_usbhost_get_interrupt_RAMACER_bit(const void *const hw) |
| 5330 | { |
| 5331 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RAMACER) >> USB_HOST_INTFLAG_RAMACER_Pos; |
| 5332 | } |
| 5333 | |
| 5334 | static inline void hri_usbhost_clear_interrupt_RAMACER_bit(const void *const hw) |
| 5335 | { |
| 5336 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RAMACER; |
| 5337 | } |
| 5338 | |
| 5339 | static inline bool hri_usbhost_get_interrupt_DCONN_bit(const void *const hw) |
| 5340 | { |
| 5341 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DCONN) >> USB_HOST_INTFLAG_DCONN_Pos; |
| 5342 | } |
| 5343 | |
| 5344 | static inline void hri_usbhost_clear_interrupt_DCONN_bit(const void *const hw) |
| 5345 | { |
| 5346 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DCONN; |
| 5347 | } |
| 5348 | |
| 5349 | static inline bool hri_usbhost_get_interrupt_DDISC_bit(const void *const hw) |
| 5350 | { |
| 5351 | return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DDISC) >> USB_HOST_INTFLAG_DDISC_Pos; |
| 5352 | } |
| 5353 | |
| 5354 | static inline void hri_usbhost_clear_interrupt_DDISC_bit(const void *const hw) |
| 5355 | { |
| 5356 | ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DDISC; |
| 5357 | } |
| 5358 | |
| 5359 | static inline hri_usbhost_intflag_reg_t hri_usbhost_get_INTFLAG_reg(const void *const hw, |
| 5360 | hri_usbhost_intflag_reg_t mask) |
| 5361 | { |
| 5362 | uint16_t tmp; |
| 5363 | tmp = ((Usb *)hw)->HOST.INTFLAG.reg; |
| 5364 | tmp &= mask; |
| 5365 | return tmp; |
| 5366 | } |
| 5367 | |
| 5368 | static inline hri_usbhost_intflag_reg_t hri_usbhost_read_INTFLAG_reg(const void *const hw) |
| 5369 | { |
| 5370 | return ((Usb *)hw)->HOST.INTFLAG.reg; |
| 5371 | } |
| 5372 | |
| 5373 | static inline void hri_usbhost_clear_INTFLAG_reg(const void *const hw, hri_usbhost_intflag_reg_t mask) |
| 5374 | { |
| 5375 | ((Usb *)hw)->HOST.INTFLAG.reg = mask; |
| 5376 | } |
| 5377 | |
| 5378 | static inline void hri_usbdevice_set_INTEN_SUSPEND_bit(const void *const hw) |
| 5379 | { |
| 5380 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND; |
| 5381 | } |
| 5382 | |
| 5383 | static inline bool hri_usbdevice_get_INTEN_SUSPEND_bit(const void *const hw) |
| 5384 | { |
| 5385 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_SUSPEND) >> USB_DEVICE_INTENSET_SUSPEND_Pos; |
| 5386 | } |
| 5387 | |
| 5388 | static inline void hri_usbdevice_write_INTEN_SUSPEND_bit(const void *const hw, bool value) |
| 5389 | { |
| 5390 | if (value == 0x0) { |
| 5391 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SUSPEND; |
| 5392 | } else { |
| 5393 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND; |
| 5394 | } |
| 5395 | } |
| 5396 | |
| 5397 | static inline void hri_usbdevice_clear_INTEN_SUSPEND_bit(const void *const hw) |
| 5398 | { |
| 5399 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SUSPEND; |
| 5400 | } |
| 5401 | |
| 5402 | static inline void hri_usbdevice_set_INTEN_MSOF_bit(const void *const hw) |
| 5403 | { |
| 5404 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_MSOF; |
| 5405 | } |
| 5406 | |
| 5407 | static inline bool hri_usbdevice_get_INTEN_MSOF_bit(const void *const hw) |
| 5408 | { |
| 5409 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_MSOF) >> USB_DEVICE_INTENSET_MSOF_Pos; |
| 5410 | } |
| 5411 | |
| 5412 | static inline void hri_usbdevice_write_INTEN_MSOF_bit(const void *const hw, bool value) |
| 5413 | { |
| 5414 | if (value == 0x0) { |
| 5415 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_MSOF; |
| 5416 | } else { |
| 5417 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_MSOF; |
| 5418 | } |
| 5419 | } |
| 5420 | |
| 5421 | static inline void hri_usbdevice_clear_INTEN_MSOF_bit(const void *const hw) |
| 5422 | { |
| 5423 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_MSOF; |
| 5424 | } |
| 5425 | |
| 5426 | static inline void hri_usbdevice_set_INTEN_SOF_bit(const void *const hw) |
| 5427 | { |
| 5428 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF; |
| 5429 | } |
| 5430 | |
| 5431 | static inline bool hri_usbdevice_get_INTEN_SOF_bit(const void *const hw) |
| 5432 | { |
| 5433 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_SOF) >> USB_DEVICE_INTENSET_SOF_Pos; |
| 5434 | } |
| 5435 | |
| 5436 | static inline void hri_usbdevice_write_INTEN_SOF_bit(const void *const hw, bool value) |
| 5437 | { |
| 5438 | if (value == 0x0) { |
| 5439 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SOF; |
| 5440 | } else { |
| 5441 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF; |
| 5442 | } |
| 5443 | } |
| 5444 | |
| 5445 | static inline void hri_usbdevice_clear_INTEN_SOF_bit(const void *const hw) |
| 5446 | { |
| 5447 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SOF; |
| 5448 | } |
| 5449 | |
| 5450 | static inline void hri_usbdevice_set_INTEN_EORST_bit(const void *const hw) |
| 5451 | { |
| 5452 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORST; |
| 5453 | } |
| 5454 | |
| 5455 | static inline bool hri_usbdevice_get_INTEN_EORST_bit(const void *const hw) |
| 5456 | { |
| 5457 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_EORST) >> USB_DEVICE_INTENSET_EORST_Pos; |
| 5458 | } |
| 5459 | |
| 5460 | static inline void hri_usbdevice_write_INTEN_EORST_bit(const void *const hw, bool value) |
| 5461 | { |
| 5462 | if (value == 0x0) { |
| 5463 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORST; |
| 5464 | } else { |
| 5465 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORST; |
| 5466 | } |
| 5467 | } |
| 5468 | |
| 5469 | static inline void hri_usbdevice_clear_INTEN_EORST_bit(const void *const hw) |
| 5470 | { |
| 5471 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORST; |
| 5472 | } |
| 5473 | |
| 5474 | static inline void hri_usbdevice_set_INTEN_WAKEUP_bit(const void *const hw) |
| 5475 | { |
| 5476 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_WAKEUP; |
| 5477 | } |
| 5478 | |
| 5479 | static inline bool hri_usbdevice_get_INTEN_WAKEUP_bit(const void *const hw) |
| 5480 | { |
| 5481 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_WAKEUP) >> USB_DEVICE_INTENSET_WAKEUP_Pos; |
| 5482 | } |
| 5483 | |
| 5484 | static inline void hri_usbdevice_write_INTEN_WAKEUP_bit(const void *const hw, bool value) |
| 5485 | { |
| 5486 | if (value == 0x0) { |
| 5487 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_WAKEUP; |
| 5488 | } else { |
| 5489 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_WAKEUP; |
| 5490 | } |
| 5491 | } |
| 5492 | |
| 5493 | static inline void hri_usbdevice_clear_INTEN_WAKEUP_bit(const void *const hw) |
| 5494 | { |
| 5495 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_WAKEUP; |
| 5496 | } |
| 5497 | |
| 5498 | static inline void hri_usbdevice_set_INTEN_EORSM_bit(const void *const hw) |
| 5499 | { |
| 5500 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORSM; |
| 5501 | } |
| 5502 | |
| 5503 | static inline bool hri_usbdevice_get_INTEN_EORSM_bit(const void *const hw) |
| 5504 | { |
| 5505 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_EORSM) >> USB_DEVICE_INTENSET_EORSM_Pos; |
| 5506 | } |
| 5507 | |
| 5508 | static inline void hri_usbdevice_write_INTEN_EORSM_bit(const void *const hw, bool value) |
| 5509 | { |
| 5510 | if (value == 0x0) { |
| 5511 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORSM; |
| 5512 | } else { |
| 5513 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORSM; |
| 5514 | } |
| 5515 | } |
| 5516 | |
| 5517 | static inline void hri_usbdevice_clear_INTEN_EORSM_bit(const void *const hw) |
| 5518 | { |
| 5519 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORSM; |
| 5520 | } |
| 5521 | |
| 5522 | static inline void hri_usbdevice_set_INTEN_UPRSM_bit(const void *const hw) |
| 5523 | { |
| 5524 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_UPRSM; |
| 5525 | } |
| 5526 | |
| 5527 | static inline bool hri_usbdevice_get_INTEN_UPRSM_bit(const void *const hw) |
| 5528 | { |
| 5529 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_UPRSM) >> USB_DEVICE_INTENSET_UPRSM_Pos; |
| 5530 | } |
| 5531 | |
| 5532 | static inline void hri_usbdevice_write_INTEN_UPRSM_bit(const void *const hw, bool value) |
| 5533 | { |
| 5534 | if (value == 0x0) { |
| 5535 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_UPRSM; |
| 5536 | } else { |
| 5537 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_UPRSM; |
| 5538 | } |
| 5539 | } |
| 5540 | |
| 5541 | static inline void hri_usbdevice_clear_INTEN_UPRSM_bit(const void *const hw) |
| 5542 | { |
| 5543 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_UPRSM; |
| 5544 | } |
| 5545 | |
| 5546 | static inline void hri_usbdevice_set_INTEN_RAMACER_bit(const void *const hw) |
| 5547 | { |
| 5548 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_RAMACER; |
| 5549 | } |
| 5550 | |
| 5551 | static inline bool hri_usbdevice_get_INTEN_RAMACER_bit(const void *const hw) |
| 5552 | { |
| 5553 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_RAMACER) >> USB_DEVICE_INTENSET_RAMACER_Pos; |
| 5554 | } |
| 5555 | |
| 5556 | static inline void hri_usbdevice_write_INTEN_RAMACER_bit(const void *const hw, bool value) |
| 5557 | { |
| 5558 | if (value == 0x0) { |
| 5559 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_RAMACER; |
| 5560 | } else { |
| 5561 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_RAMACER; |
| 5562 | } |
| 5563 | } |
| 5564 | |
| 5565 | static inline void hri_usbdevice_clear_INTEN_RAMACER_bit(const void *const hw) |
| 5566 | { |
| 5567 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_RAMACER; |
| 5568 | } |
| 5569 | |
| 5570 | static inline void hri_usbdevice_set_INTEN_LPMNYET_bit(const void *const hw) |
| 5571 | { |
| 5572 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMNYET; |
| 5573 | } |
| 5574 | |
| 5575 | static inline bool hri_usbdevice_get_INTEN_LPMNYET_bit(const void *const hw) |
| 5576 | { |
| 5577 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_LPMNYET) >> USB_DEVICE_INTENSET_LPMNYET_Pos; |
| 5578 | } |
| 5579 | |
| 5580 | static inline void hri_usbdevice_write_INTEN_LPMNYET_bit(const void *const hw, bool value) |
| 5581 | { |
| 5582 | if (value == 0x0) { |
| 5583 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMNYET; |
| 5584 | } else { |
| 5585 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMNYET; |
| 5586 | } |
| 5587 | } |
| 5588 | |
| 5589 | static inline void hri_usbdevice_clear_INTEN_LPMNYET_bit(const void *const hw) |
| 5590 | { |
| 5591 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMNYET; |
| 5592 | } |
| 5593 | |
| 5594 | static inline void hri_usbdevice_set_INTEN_LPMSUSP_bit(const void *const hw) |
| 5595 | { |
| 5596 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMSUSP; |
| 5597 | } |
| 5598 | |
| 5599 | static inline bool hri_usbdevice_get_INTEN_LPMSUSP_bit(const void *const hw) |
| 5600 | { |
| 5601 | return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_LPMSUSP) >> USB_DEVICE_INTENSET_LPMSUSP_Pos; |
| 5602 | } |
| 5603 | |
| 5604 | static inline void hri_usbdevice_write_INTEN_LPMSUSP_bit(const void *const hw, bool value) |
| 5605 | { |
| 5606 | if (value == 0x0) { |
| 5607 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMSUSP; |
| 5608 | } else { |
| 5609 | ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMSUSP; |
| 5610 | } |
| 5611 | } |
| 5612 | |
| 5613 | static inline void hri_usbdevice_clear_INTEN_LPMSUSP_bit(const void *const hw) |
| 5614 | { |
| 5615 | ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMSUSP; |
| 5616 | } |
| 5617 | |
| 5618 | static inline void hri_usbdevice_set_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t mask) |
| 5619 | { |
| 5620 | ((Usb *)hw)->DEVICE.INTENSET.reg = mask; |
| 5621 | } |
| 5622 | |
| 5623 | static inline hri_usbdevice_intenset_reg_t hri_usbdevice_get_INTEN_reg(const void *const hw, |
| 5624 | hri_usbdevice_intenset_reg_t mask) |
| 5625 | { |
| 5626 | uint16_t tmp; |
| 5627 | tmp = ((Usb *)hw)->DEVICE.INTENSET.reg; |
| 5628 | tmp &= mask; |
| 5629 | return tmp; |
| 5630 | } |
| 5631 | |
| 5632 | static inline hri_usbdevice_intenset_reg_t hri_usbdevice_read_INTEN_reg(const void *const hw) |
| 5633 | { |
| 5634 | return ((Usb *)hw)->DEVICE.INTENSET.reg; |
| 5635 | } |
| 5636 | |
| 5637 | static inline void hri_usbdevice_write_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t data) |
| 5638 | { |
| 5639 | ((Usb *)hw)->DEVICE.INTENSET.reg = data; |
| 5640 | ((Usb *)hw)->DEVICE.INTENCLR.reg = ~data; |
| 5641 | } |
| 5642 | |
| 5643 | static inline void hri_usbdevice_clear_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t mask) |
| 5644 | { |
| 5645 | ((Usb *)hw)->DEVICE.INTENCLR.reg = mask; |
| 5646 | } |
| 5647 | |
| 5648 | static inline void hri_usbhost_set_INTEN_HSOF_bit(const void *const hw) |
| 5649 | { |
| 5650 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_HSOF; |
| 5651 | } |
| 5652 | |
| 5653 | static inline bool hri_usbhost_get_INTEN_HSOF_bit(const void *const hw) |
| 5654 | { |
| 5655 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_HSOF) >> USB_HOST_INTENSET_HSOF_Pos; |
| 5656 | } |
| 5657 | |
| 5658 | static inline void hri_usbhost_write_INTEN_HSOF_bit(const void *const hw, bool value) |
| 5659 | { |
| 5660 | if (value == 0x0) { |
| 5661 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_HSOF; |
| 5662 | } else { |
| 5663 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_HSOF; |
| 5664 | } |
| 5665 | } |
| 5666 | |
| 5667 | static inline void hri_usbhost_clear_INTEN_HSOF_bit(const void *const hw) |
| 5668 | { |
| 5669 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_HSOF; |
| 5670 | } |
| 5671 | |
| 5672 | static inline void hri_usbhost_set_INTEN_RST_bit(const void *const hw) |
| 5673 | { |
| 5674 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RST; |
| 5675 | } |
| 5676 | |
| 5677 | static inline bool hri_usbhost_get_INTEN_RST_bit(const void *const hw) |
| 5678 | { |
| 5679 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_RST) >> USB_HOST_INTENSET_RST_Pos; |
| 5680 | } |
| 5681 | |
| 5682 | static inline void hri_usbhost_write_INTEN_RST_bit(const void *const hw, bool value) |
| 5683 | { |
| 5684 | if (value == 0x0) { |
| 5685 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RST; |
| 5686 | } else { |
| 5687 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RST; |
| 5688 | } |
| 5689 | } |
| 5690 | |
| 5691 | static inline void hri_usbhost_clear_INTEN_RST_bit(const void *const hw) |
| 5692 | { |
| 5693 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RST; |
| 5694 | } |
| 5695 | |
| 5696 | static inline void hri_usbhost_set_INTEN_WAKEUP_bit(const void *const hw) |
| 5697 | { |
| 5698 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_WAKEUP; |
| 5699 | } |
| 5700 | |
| 5701 | static inline bool hri_usbhost_get_INTEN_WAKEUP_bit(const void *const hw) |
| 5702 | { |
| 5703 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_WAKEUP) >> USB_HOST_INTENSET_WAKEUP_Pos; |
| 5704 | } |
| 5705 | |
| 5706 | static inline void hri_usbhost_write_INTEN_WAKEUP_bit(const void *const hw, bool value) |
| 5707 | { |
| 5708 | if (value == 0x0) { |
| 5709 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_WAKEUP; |
| 5710 | } else { |
| 5711 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_WAKEUP; |
| 5712 | } |
| 5713 | } |
| 5714 | |
| 5715 | static inline void hri_usbhost_clear_INTEN_WAKEUP_bit(const void *const hw) |
| 5716 | { |
| 5717 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_WAKEUP; |
| 5718 | } |
| 5719 | |
| 5720 | static inline void hri_usbhost_set_INTEN_DNRSM_bit(const void *const hw) |
| 5721 | { |
| 5722 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DNRSM; |
| 5723 | } |
| 5724 | |
| 5725 | static inline bool hri_usbhost_get_INTEN_DNRSM_bit(const void *const hw) |
| 5726 | { |
| 5727 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DNRSM) >> USB_HOST_INTENSET_DNRSM_Pos; |
| 5728 | } |
| 5729 | |
| 5730 | static inline void hri_usbhost_write_INTEN_DNRSM_bit(const void *const hw, bool value) |
| 5731 | { |
| 5732 | if (value == 0x0) { |
| 5733 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DNRSM; |
| 5734 | } else { |
| 5735 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DNRSM; |
| 5736 | } |
| 5737 | } |
| 5738 | |
| 5739 | static inline void hri_usbhost_clear_INTEN_DNRSM_bit(const void *const hw) |
| 5740 | { |
| 5741 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DNRSM; |
| 5742 | } |
| 5743 | |
| 5744 | static inline void hri_usbhost_set_INTEN_UPRSM_bit(const void *const hw) |
| 5745 | { |
| 5746 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_UPRSM; |
| 5747 | } |
| 5748 | |
| 5749 | static inline bool hri_usbhost_get_INTEN_UPRSM_bit(const void *const hw) |
| 5750 | { |
| 5751 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_UPRSM) >> USB_HOST_INTENSET_UPRSM_Pos; |
| 5752 | } |
| 5753 | |
| 5754 | static inline void hri_usbhost_write_INTEN_UPRSM_bit(const void *const hw, bool value) |
| 5755 | { |
| 5756 | if (value == 0x0) { |
| 5757 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_UPRSM; |
| 5758 | } else { |
| 5759 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_UPRSM; |
| 5760 | } |
| 5761 | } |
| 5762 | |
| 5763 | static inline void hri_usbhost_clear_INTEN_UPRSM_bit(const void *const hw) |
| 5764 | { |
| 5765 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_UPRSM; |
| 5766 | } |
| 5767 | |
| 5768 | static inline void hri_usbhost_set_INTEN_RAMACER_bit(const void *const hw) |
| 5769 | { |
| 5770 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RAMACER; |
| 5771 | } |
| 5772 | |
| 5773 | static inline bool hri_usbhost_get_INTEN_RAMACER_bit(const void *const hw) |
| 5774 | { |
| 5775 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_RAMACER) >> USB_HOST_INTENSET_RAMACER_Pos; |
| 5776 | } |
| 5777 | |
| 5778 | static inline void hri_usbhost_write_INTEN_RAMACER_bit(const void *const hw, bool value) |
| 5779 | { |
| 5780 | if (value == 0x0) { |
| 5781 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RAMACER; |
| 5782 | } else { |
| 5783 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RAMACER; |
| 5784 | } |
| 5785 | } |
| 5786 | |
| 5787 | static inline void hri_usbhost_clear_INTEN_RAMACER_bit(const void *const hw) |
| 5788 | { |
| 5789 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RAMACER; |
| 5790 | } |
| 5791 | |
| 5792 | static inline void hri_usbhost_set_INTEN_DCONN_bit(const void *const hw) |
| 5793 | { |
| 5794 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DCONN; |
| 5795 | } |
| 5796 | |
| 5797 | static inline bool hri_usbhost_get_INTEN_DCONN_bit(const void *const hw) |
| 5798 | { |
| 5799 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DCONN) >> USB_HOST_INTENSET_DCONN_Pos; |
| 5800 | } |
| 5801 | |
| 5802 | static inline void hri_usbhost_write_INTEN_DCONN_bit(const void *const hw, bool value) |
| 5803 | { |
| 5804 | if (value == 0x0) { |
| 5805 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DCONN; |
| 5806 | } else { |
| 5807 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DCONN; |
| 5808 | } |
| 5809 | } |
| 5810 | |
| 5811 | static inline void hri_usbhost_clear_INTEN_DCONN_bit(const void *const hw) |
| 5812 | { |
| 5813 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DCONN; |
| 5814 | } |
| 5815 | |
| 5816 | static inline void hri_usbhost_set_INTEN_DDISC_bit(const void *const hw) |
| 5817 | { |
| 5818 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DDISC; |
| 5819 | } |
| 5820 | |
| 5821 | static inline bool hri_usbhost_get_INTEN_DDISC_bit(const void *const hw) |
| 5822 | { |
| 5823 | return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DDISC) >> USB_HOST_INTENSET_DDISC_Pos; |
| 5824 | } |
| 5825 | |
| 5826 | static inline void hri_usbhost_write_INTEN_DDISC_bit(const void *const hw, bool value) |
| 5827 | { |
| 5828 | if (value == 0x0) { |
| 5829 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DDISC; |
| 5830 | } else { |
| 5831 | ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DDISC; |
| 5832 | } |
| 5833 | } |
| 5834 | |
| 5835 | static inline void hri_usbhost_clear_INTEN_DDISC_bit(const void *const hw) |
| 5836 | { |
| 5837 | ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DDISC; |
| 5838 | } |
| 5839 | |
| 5840 | static inline void hri_usbhost_set_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t mask) |
| 5841 | { |
| 5842 | ((Usb *)hw)->HOST.INTENSET.reg = mask; |
| 5843 | } |
| 5844 | |
| 5845 | static inline hri_usbhost_intenset_reg_t hri_usbhost_get_INTEN_reg(const void *const hw, |
| 5846 | hri_usbhost_intenset_reg_t mask) |
| 5847 | { |
| 5848 | uint16_t tmp; |
| 5849 | tmp = ((Usb *)hw)->HOST.INTENSET.reg; |
| 5850 | tmp &= mask; |
| 5851 | return tmp; |
| 5852 | } |
| 5853 | |
| 5854 | static inline hri_usbhost_intenset_reg_t hri_usbhost_read_INTEN_reg(const void *const hw) |
| 5855 | { |
| 5856 | return ((Usb *)hw)->HOST.INTENSET.reg; |
| 5857 | } |
| 5858 | |
| 5859 | static inline void hri_usbhost_write_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t data) |
| 5860 | { |
| 5861 | ((Usb *)hw)->HOST.INTENSET.reg = data; |
| 5862 | ((Usb *)hw)->HOST.INTENCLR.reg = ~data; |
| 5863 | } |
| 5864 | |
| 5865 | static inline void hri_usbhost_clear_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t mask) |
| 5866 | { |
| 5867 | ((Usb *)hw)->HOST.INTENCLR.reg = mask; |
| 5868 | } |
| 5869 | |
| 5870 | static inline bool hri_usb_get_SYNCBUSY_SWRST_bit(const void *const hw) |
| 5871 | { |
| 5872 | return (((Usb *)hw)->HOST.SYNCBUSY.reg & USB_SYNCBUSY_SWRST) >> USB_SYNCBUSY_SWRST_Pos; |
| 5873 | } |
| 5874 | |
| 5875 | static inline bool hri_usb_get_SYNCBUSY_ENABLE_bit(const void *const hw) |
| 5876 | { |
| 5877 | return (((Usb *)hw)->HOST.SYNCBUSY.reg & USB_SYNCBUSY_ENABLE) >> USB_SYNCBUSY_ENABLE_Pos; |
| 5878 | } |
| 5879 | |
| 5880 | static inline hri_usb_syncbusy_reg_t hri_usb_get_SYNCBUSY_reg(const void *const hw, hri_usb_syncbusy_reg_t mask) |
| 5881 | { |
| 5882 | uint8_t tmp; |
| 5883 | tmp = ((Usb *)hw)->HOST.SYNCBUSY.reg; |
| 5884 | tmp &= mask; |
| 5885 | return tmp; |
| 5886 | } |
| 5887 | |
| 5888 | static inline hri_usb_syncbusy_reg_t hri_usb_read_SYNCBUSY_reg(const void *const hw) |
| 5889 | { |
| 5890 | return ((Usb *)hw)->HOST.SYNCBUSY.reg; |
| 5891 | } |
| 5892 | |
| 5893 | static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_SPEED_bf(const void *const hw, |
| 5894 | hri_usbdevice_status_reg_t mask) |
| 5895 | { |
| 5896 | return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_SPEED(mask)) >> USB_DEVICE_STATUS_SPEED_Pos; |
| 5897 | } |
| 5898 | |
| 5899 | static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_SPEED_bf(const void *const hw) |
| 5900 | { |
| 5901 | return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_SPEED_Msk) >> USB_DEVICE_STATUS_SPEED_Pos; |
| 5902 | } |
| 5903 | |
| 5904 | static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_LINESTATE_bf(const void *const hw, |
| 5905 | hri_usbdevice_status_reg_t mask) |
| 5906 | { |
| 5907 | return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_LINESTATE(mask)) >> USB_DEVICE_STATUS_LINESTATE_Pos; |
| 5908 | } |
| 5909 | |
| 5910 | static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_LINESTATE_bf(const void *const hw) |
| 5911 | { |
| 5912 | return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_LINESTATE_Msk) >> USB_DEVICE_STATUS_LINESTATE_Pos; |
| 5913 | } |
| 5914 | |
| 5915 | static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_reg(const void *const hw, |
| 5916 | hri_usbdevice_status_reg_t mask) |
| 5917 | { |
| 5918 | uint8_t tmp; |
| 5919 | tmp = ((Usb *)hw)->DEVICE.STATUS.reg; |
| 5920 | tmp &= mask; |
| 5921 | return tmp; |
| 5922 | } |
| 5923 | |
| 5924 | static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_reg(const void *const hw) |
| 5925 | { |
| 5926 | return ((Usb *)hw)->DEVICE.STATUS.reg; |
| 5927 | } |
| 5928 | |
| 5929 | static inline hri_usb_fsmstatus_reg_t hri_usb_get_FSMSTATUS_FSMSTATE_bf(const void *const hw, |
| 5930 | hri_usb_fsmstatus_reg_t mask) |
| 5931 | { |
| 5932 | return (((Usb *)hw)->HOST.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE(mask)) >> USB_FSMSTATUS_FSMSTATE_Pos; |
| 5933 | } |
| 5934 | |
| 5935 | static inline hri_usb_fsmstatus_reg_t hri_usb_read_FSMSTATUS_FSMSTATE_bf(const void *const hw) |
| 5936 | { |
| 5937 | return (((Usb *)hw)->HOST.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE_Msk) >> USB_FSMSTATUS_FSMSTATE_Pos; |
| 5938 | } |
| 5939 | |
| 5940 | static inline hri_usb_fsmstatus_reg_t hri_usb_get_FSMSTATUS_reg(const void *const hw, hri_usb_fsmstatus_reg_t mask) |
| 5941 | { |
| 5942 | uint8_t tmp; |
| 5943 | tmp = ((Usb *)hw)->HOST.FSMSTATUS.reg; |
| 5944 | tmp &= mask; |
| 5945 | return tmp; |
| 5946 | } |
| 5947 | |
| 5948 | static inline hri_usb_fsmstatus_reg_t hri_usb_read_FSMSTATUS_reg(const void *const hw) |
| 5949 | { |
| 5950 | return ((Usb *)hw)->HOST.FSMSTATUS.reg; |
| 5951 | } |
| 5952 | |
| 5953 | static inline bool hri_usbdevice_get_FNUM_FNCERR_bit(const void *const hw) |
| 5954 | { |
| 5955 | return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNCERR) >> USB_DEVICE_FNUM_FNCERR_Pos; |
| 5956 | } |
| 5957 | |
| 5958 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_MFNUM_bf(const void *const hw, |
| 5959 | hri_usbdevice_fnum_reg_t mask) |
| 5960 | { |
| 5961 | return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_MFNUM(mask)) >> USB_DEVICE_FNUM_MFNUM_Pos; |
| 5962 | } |
| 5963 | |
| 5964 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_MFNUM_bf(const void *const hw) |
| 5965 | { |
| 5966 | return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_MFNUM_Msk) >> USB_DEVICE_FNUM_MFNUM_Pos; |
| 5967 | } |
| 5968 | |
| 5969 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_FNUM_bf(const void *const hw, |
| 5970 | hri_usbdevice_fnum_reg_t mask) |
| 5971 | { |
| 5972 | return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNUM(mask)) >> USB_DEVICE_FNUM_FNUM_Pos; |
| 5973 | } |
| 5974 | |
| 5975 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_FNUM_bf(const void *const hw) |
| 5976 | { |
| 5977 | return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNUM_Msk) >> USB_DEVICE_FNUM_FNUM_Pos; |
| 5978 | } |
| 5979 | |
| 5980 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_reg(const void *const hw, hri_usbdevice_fnum_reg_t mask) |
| 5981 | { |
| 5982 | uint16_t tmp; |
| 5983 | tmp = ((Usb *)hw)->DEVICE.FNUM.reg; |
| 5984 | tmp &= mask; |
| 5985 | return tmp; |
| 5986 | } |
| 5987 | |
| 5988 | static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_reg(const void *const hw) |
| 5989 | { |
| 5990 | return ((Usb *)hw)->DEVICE.FNUM.reg; |
| 5991 | } |
| 5992 | |
| 5993 | static inline hri_usbhost_flenhigh_reg_t hri_usbhost_get_FLENHIGH_FLENHIGH_bf(const void *const hw, |
| 5994 | hri_usbhost_flenhigh_reg_t mask) |
| 5995 | { |
| 5996 | return (((Usb *)hw)->HOST.FLENHIGH.reg & USB_HOST_FLENHIGH_FLENHIGH(mask)) >> USB_HOST_FLENHIGH_FLENHIGH_Pos; |
| 5997 | } |
| 5998 | |
| 5999 | static inline hri_usbhost_flenhigh_reg_t hri_usbhost_read_FLENHIGH_FLENHIGH_bf(const void *const hw) |
| 6000 | { |
| 6001 | return (((Usb *)hw)->HOST.FLENHIGH.reg & USB_HOST_FLENHIGH_FLENHIGH_Msk) >> USB_HOST_FLENHIGH_FLENHIGH_Pos; |
| 6002 | } |
| 6003 | |
| 6004 | static inline hri_usbhost_flenhigh_reg_t hri_usbhost_get_FLENHIGH_reg(const void *const hw, |
| 6005 | hri_usbhost_flenhigh_reg_t mask) |
| 6006 | { |
| 6007 | uint8_t tmp; |
| 6008 | tmp = ((Usb *)hw)->HOST.FLENHIGH.reg; |
| 6009 | tmp &= mask; |
| 6010 | return tmp; |
| 6011 | } |
| 6012 | |
| 6013 | static inline hri_usbhost_flenhigh_reg_t hri_usbhost_read_FLENHIGH_reg(const void *const hw) |
| 6014 | { |
| 6015 | return ((Usb *)hw)->HOST.FLENHIGH.reg; |
| 6016 | } |
| 6017 | |
| 6018 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT0_bit(const void *const hw) |
| 6019 | { |
| 6020 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT0) >> USB_DEVICE_EPINTSMRY_EPINT0_Pos; |
| 6021 | } |
| 6022 | |
| 6023 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT1_bit(const void *const hw) |
| 6024 | { |
| 6025 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT1) >> USB_DEVICE_EPINTSMRY_EPINT1_Pos; |
| 6026 | } |
| 6027 | |
| 6028 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT2_bit(const void *const hw) |
| 6029 | { |
| 6030 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT2) >> USB_DEVICE_EPINTSMRY_EPINT2_Pos; |
| 6031 | } |
| 6032 | |
| 6033 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT3_bit(const void *const hw) |
| 6034 | { |
| 6035 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT3) >> USB_DEVICE_EPINTSMRY_EPINT3_Pos; |
| 6036 | } |
| 6037 | |
| 6038 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT4_bit(const void *const hw) |
| 6039 | { |
| 6040 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT4) >> USB_DEVICE_EPINTSMRY_EPINT4_Pos; |
| 6041 | } |
| 6042 | |
| 6043 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT5_bit(const void *const hw) |
| 6044 | { |
| 6045 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT5) >> USB_DEVICE_EPINTSMRY_EPINT5_Pos; |
| 6046 | } |
| 6047 | |
| 6048 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT6_bit(const void *const hw) |
| 6049 | { |
| 6050 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT6) >> USB_DEVICE_EPINTSMRY_EPINT6_Pos; |
| 6051 | } |
| 6052 | |
| 6053 | static inline bool hri_usbdevice_get_EPINTSMRY_EPINT7_bit(const void *const hw) |
| 6054 | { |
| 6055 | return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT7) >> USB_DEVICE_EPINTSMRY_EPINT7_Pos; |
| 6056 | } |
| 6057 | |
| 6058 | static inline hri_usbdevice_epintsmry_reg_t hri_usbdevice_get_EPINTSMRY_reg(const void *const hw, |
| 6059 | hri_usbdevice_epintsmry_reg_t mask) |
| 6060 | { |
| 6061 | uint16_t tmp; |
| 6062 | tmp = ((Usb *)hw)->DEVICE.EPINTSMRY.reg; |
| 6063 | tmp &= mask; |
| 6064 | return tmp; |
| 6065 | } |
| 6066 | |
| 6067 | static inline hri_usbdevice_epintsmry_reg_t hri_usbdevice_read_EPINTSMRY_reg(const void *const hw) |
| 6068 | { |
| 6069 | return ((Usb *)hw)->DEVICE.EPINTSMRY.reg; |
| 6070 | } |
| 6071 | |
| 6072 | static inline bool hri_usbhost_get_PINTSMRY_EPINT0_bit(const void *const hw) |
| 6073 | { |
| 6074 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT0) >> USB_HOST_PINTSMRY_EPINT0_Pos; |
| 6075 | } |
| 6076 | |
| 6077 | static inline bool hri_usbhost_get_PINTSMRY_EPINT1_bit(const void *const hw) |
| 6078 | { |
| 6079 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT1) >> USB_HOST_PINTSMRY_EPINT1_Pos; |
| 6080 | } |
| 6081 | |
| 6082 | static inline bool hri_usbhost_get_PINTSMRY_EPINT2_bit(const void *const hw) |
| 6083 | { |
| 6084 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT2) >> USB_HOST_PINTSMRY_EPINT2_Pos; |
| 6085 | } |
| 6086 | |
| 6087 | static inline bool hri_usbhost_get_PINTSMRY_EPINT3_bit(const void *const hw) |
| 6088 | { |
| 6089 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT3) >> USB_HOST_PINTSMRY_EPINT3_Pos; |
| 6090 | } |
| 6091 | |
| 6092 | static inline bool hri_usbhost_get_PINTSMRY_EPINT4_bit(const void *const hw) |
| 6093 | { |
| 6094 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT4) >> USB_HOST_PINTSMRY_EPINT4_Pos; |
| 6095 | } |
| 6096 | |
| 6097 | static inline bool hri_usbhost_get_PINTSMRY_EPINT5_bit(const void *const hw) |
| 6098 | { |
| 6099 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT5) >> USB_HOST_PINTSMRY_EPINT5_Pos; |
| 6100 | } |
| 6101 | |
| 6102 | static inline bool hri_usbhost_get_PINTSMRY_EPINT6_bit(const void *const hw) |
| 6103 | { |
| 6104 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT6) >> USB_HOST_PINTSMRY_EPINT6_Pos; |
| 6105 | } |
| 6106 | |
| 6107 | static inline bool hri_usbhost_get_PINTSMRY_EPINT7_bit(const void *const hw) |
| 6108 | { |
| 6109 | return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT7) >> USB_HOST_PINTSMRY_EPINT7_Pos; |
| 6110 | } |
| 6111 | |
| 6112 | static inline hri_usbhost_pintsmry_reg_t hri_usbhost_get_PINTSMRY_reg(const void *const hw, |
| 6113 | hri_usbhost_pintsmry_reg_t mask) |
| 6114 | { |
| 6115 | uint16_t tmp; |
| 6116 | tmp = ((Usb *)hw)->HOST.PINTSMRY.reg; |
| 6117 | tmp &= mask; |
| 6118 | return tmp; |
| 6119 | } |
| 6120 | |
| 6121 | static inline hri_usbhost_pintsmry_reg_t hri_usbhost_read_PINTSMRY_reg(const void *const hw) |
| 6122 | { |
| 6123 | return ((Usb *)hw)->HOST.PINTSMRY.reg; |
| 6124 | } |
| 6125 | |
| 6126 | static inline void hri_usb_set_CTRLA_SWRST_bit(const void *const hw) |
| 6127 | { |
| 6128 | USB_CRITICAL_SECTION_ENTER(); |
| 6129 | ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_SWRST; |
| 6130 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST); |
| 6131 | USB_CRITICAL_SECTION_LEAVE(); |
| 6132 | } |
| 6133 | |
| 6134 | static inline bool hri_usb_get_CTRLA_SWRST_bit(const void *const hw) |
| 6135 | { |
| 6136 | uint8_t tmp; |
| 6137 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST); |
| 6138 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6139 | tmp = (tmp & USB_CTRLA_SWRST) >> USB_CTRLA_SWRST_Pos; |
| 6140 | return (bool)tmp; |
| 6141 | } |
| 6142 | |
| 6143 | static inline void hri_usb_set_CTRLA_ENABLE_bit(const void *const hw) |
| 6144 | { |
| 6145 | USB_CRITICAL_SECTION_ENTER(); |
| 6146 | ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_ENABLE; |
| 6147 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE); |
| 6148 | USB_CRITICAL_SECTION_LEAVE(); |
| 6149 | } |
| 6150 | |
| 6151 | static inline bool hri_usb_get_CTRLA_ENABLE_bit(const void *const hw) |
| 6152 | { |
| 6153 | uint8_t tmp; |
| 6154 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE); |
| 6155 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6156 | tmp = (tmp & USB_CTRLA_ENABLE) >> USB_CTRLA_ENABLE_Pos; |
| 6157 | return (bool)tmp; |
| 6158 | } |
| 6159 | |
| 6160 | static inline void hri_usb_write_CTRLA_ENABLE_bit(const void *const hw, bool value) |
| 6161 | { |
| 6162 | uint8_t tmp; |
| 6163 | USB_CRITICAL_SECTION_ENTER(); |
| 6164 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6165 | tmp &= ~USB_CTRLA_ENABLE; |
| 6166 | tmp |= value << USB_CTRLA_ENABLE_Pos; |
| 6167 | ((Usb *)hw)->HOST.CTRLA.reg = tmp; |
| 6168 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE); |
| 6169 | USB_CRITICAL_SECTION_LEAVE(); |
| 6170 | } |
| 6171 | |
| 6172 | static inline void hri_usb_clear_CTRLA_ENABLE_bit(const void *const hw) |
| 6173 | { |
| 6174 | USB_CRITICAL_SECTION_ENTER(); |
| 6175 | ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_ENABLE; |
| 6176 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE); |
| 6177 | USB_CRITICAL_SECTION_LEAVE(); |
| 6178 | } |
| 6179 | |
| 6180 | static inline void hri_usb_toggle_CTRLA_ENABLE_bit(const void *const hw) |
| 6181 | { |
| 6182 | USB_CRITICAL_SECTION_ENTER(); |
| 6183 | ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_ENABLE; |
| 6184 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE); |
| 6185 | USB_CRITICAL_SECTION_LEAVE(); |
| 6186 | } |
| 6187 | |
| 6188 | static inline void hri_usb_set_CTRLA_RUNSTDBY_bit(const void *const hw) |
| 6189 | { |
| 6190 | USB_CRITICAL_SECTION_ENTER(); |
| 6191 | ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_RUNSTDBY; |
| 6192 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6193 | USB_CRITICAL_SECTION_LEAVE(); |
| 6194 | } |
| 6195 | |
| 6196 | static inline bool hri_usb_get_CTRLA_RUNSTDBY_bit(const void *const hw) |
| 6197 | { |
| 6198 | uint8_t tmp; |
| 6199 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6200 | tmp = (tmp & USB_CTRLA_RUNSTDBY) >> USB_CTRLA_RUNSTDBY_Pos; |
| 6201 | return (bool)tmp; |
| 6202 | } |
| 6203 | |
| 6204 | static inline void hri_usb_write_CTRLA_RUNSTDBY_bit(const void *const hw, bool value) |
| 6205 | { |
| 6206 | uint8_t tmp; |
| 6207 | USB_CRITICAL_SECTION_ENTER(); |
| 6208 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6209 | tmp &= ~USB_CTRLA_RUNSTDBY; |
| 6210 | tmp |= value << USB_CTRLA_RUNSTDBY_Pos; |
| 6211 | ((Usb *)hw)->HOST.CTRLA.reg = tmp; |
| 6212 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6213 | USB_CRITICAL_SECTION_LEAVE(); |
| 6214 | } |
| 6215 | |
| 6216 | static inline void hri_usb_clear_CTRLA_RUNSTDBY_bit(const void *const hw) |
| 6217 | { |
| 6218 | USB_CRITICAL_SECTION_ENTER(); |
| 6219 | ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_RUNSTDBY; |
| 6220 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6221 | USB_CRITICAL_SECTION_LEAVE(); |
| 6222 | } |
| 6223 | |
| 6224 | static inline void hri_usb_toggle_CTRLA_RUNSTDBY_bit(const void *const hw) |
| 6225 | { |
| 6226 | USB_CRITICAL_SECTION_ENTER(); |
| 6227 | ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_RUNSTDBY; |
| 6228 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6229 | USB_CRITICAL_SECTION_LEAVE(); |
| 6230 | } |
| 6231 | |
| 6232 | static inline void hri_usb_set_CTRLA_MODE_bit(const void *const hw) |
| 6233 | { |
| 6234 | USB_CRITICAL_SECTION_ENTER(); |
| 6235 | ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_MODE; |
| 6236 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6237 | USB_CRITICAL_SECTION_LEAVE(); |
| 6238 | } |
| 6239 | |
| 6240 | static inline bool hri_usb_get_CTRLA_MODE_bit(const void *const hw) |
| 6241 | { |
| 6242 | uint8_t tmp; |
| 6243 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6244 | tmp = (tmp & USB_CTRLA_MODE) >> USB_CTRLA_MODE_Pos; |
| 6245 | return (bool)tmp; |
| 6246 | } |
| 6247 | |
| 6248 | static inline void hri_usb_write_CTRLA_MODE_bit(const void *const hw, bool value) |
| 6249 | { |
| 6250 | uint8_t tmp; |
| 6251 | USB_CRITICAL_SECTION_ENTER(); |
| 6252 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6253 | tmp &= ~USB_CTRLA_MODE; |
| 6254 | tmp |= value << USB_CTRLA_MODE_Pos; |
| 6255 | ((Usb *)hw)->HOST.CTRLA.reg = tmp; |
| 6256 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6257 | USB_CRITICAL_SECTION_LEAVE(); |
| 6258 | } |
| 6259 | |
| 6260 | static inline void hri_usb_clear_CTRLA_MODE_bit(const void *const hw) |
| 6261 | { |
| 6262 | USB_CRITICAL_SECTION_ENTER(); |
| 6263 | ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_MODE; |
| 6264 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6265 | USB_CRITICAL_SECTION_LEAVE(); |
| 6266 | } |
| 6267 | |
| 6268 | static inline void hri_usb_toggle_CTRLA_MODE_bit(const void *const hw) |
| 6269 | { |
| 6270 | USB_CRITICAL_SECTION_ENTER(); |
| 6271 | ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_MODE; |
| 6272 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6273 | USB_CRITICAL_SECTION_LEAVE(); |
| 6274 | } |
| 6275 | |
| 6276 | static inline void hri_usb_set_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t mask) |
| 6277 | { |
| 6278 | USB_CRITICAL_SECTION_ENTER(); |
| 6279 | ((Usb *)hw)->HOST.CTRLA.reg |= mask; |
| 6280 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6281 | USB_CRITICAL_SECTION_LEAVE(); |
| 6282 | } |
| 6283 | |
| 6284 | static inline hri_usb_ctrla_reg_t hri_usb_get_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t mask) |
| 6285 | { |
| 6286 | uint8_t tmp; |
| 6287 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6288 | tmp = ((Usb *)hw)->HOST.CTRLA.reg; |
| 6289 | tmp &= mask; |
| 6290 | return tmp; |
| 6291 | } |
| 6292 | |
| 6293 | static inline void hri_usb_write_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t data) |
| 6294 | { |
| 6295 | USB_CRITICAL_SECTION_ENTER(); |
| 6296 | ((Usb *)hw)->HOST.CTRLA.reg = data; |
| 6297 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6298 | USB_CRITICAL_SECTION_LEAVE(); |
| 6299 | } |
| 6300 | |
| 6301 | static inline void hri_usb_clear_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t mask) |
| 6302 | { |
| 6303 | USB_CRITICAL_SECTION_ENTER(); |
| 6304 | ((Usb *)hw)->HOST.CTRLA.reg &= ~mask; |
| 6305 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6306 | USB_CRITICAL_SECTION_LEAVE(); |
| 6307 | } |
| 6308 | |
| 6309 | static inline void hri_usb_toggle_CTRLA_reg(const void *const hw, hri_usb_ctrla_reg_t mask) |
| 6310 | { |
| 6311 | USB_CRITICAL_SECTION_ENTER(); |
| 6312 | ((Usb *)hw)->HOST.CTRLA.reg ^= mask; |
| 6313 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6314 | USB_CRITICAL_SECTION_LEAVE(); |
| 6315 | } |
| 6316 | |
| 6317 | static inline hri_usb_ctrla_reg_t hri_usb_read_CTRLA_reg(const void *const hw) |
| 6318 | { |
| 6319 | hri_usb_wait_for_sync(hw, USB_SYNCBUSY_MASK); |
| 6320 | return ((Usb *)hw)->HOST.CTRLA.reg; |
| 6321 | } |
| 6322 | |
| 6323 | static inline void hri_usb_set_QOSCTRL_CQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6324 | { |
| 6325 | USB_CRITICAL_SECTION_ENTER(); |
| 6326 | ((Usb *)hw)->HOST.QOSCTRL.reg |= USB_QOSCTRL_CQOS(mask); |
| 6327 | USB_CRITICAL_SECTION_LEAVE(); |
| 6328 | } |
| 6329 | |
| 6330 | static inline hri_usb_qosctrl_reg_t hri_usb_get_QOSCTRL_CQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6331 | { |
| 6332 | uint8_t tmp; |
| 6333 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6334 | tmp = (tmp & USB_QOSCTRL_CQOS(mask)) >> USB_QOSCTRL_CQOS_Pos; |
| 6335 | return tmp; |
| 6336 | } |
| 6337 | |
| 6338 | static inline void hri_usb_write_QOSCTRL_CQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t data) |
| 6339 | { |
| 6340 | uint8_t tmp; |
| 6341 | USB_CRITICAL_SECTION_ENTER(); |
| 6342 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6343 | tmp &= ~USB_QOSCTRL_CQOS_Msk; |
| 6344 | tmp |= USB_QOSCTRL_CQOS(data); |
| 6345 | ((Usb *)hw)->HOST.QOSCTRL.reg = tmp; |
| 6346 | USB_CRITICAL_SECTION_LEAVE(); |
| 6347 | } |
| 6348 | |
| 6349 | static inline void hri_usb_clear_QOSCTRL_CQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6350 | { |
| 6351 | USB_CRITICAL_SECTION_ENTER(); |
| 6352 | ((Usb *)hw)->HOST.QOSCTRL.reg &= ~USB_QOSCTRL_CQOS(mask); |
| 6353 | USB_CRITICAL_SECTION_LEAVE(); |
| 6354 | } |
| 6355 | |
| 6356 | static inline void hri_usb_toggle_QOSCTRL_CQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6357 | { |
| 6358 | USB_CRITICAL_SECTION_ENTER(); |
| 6359 | ((Usb *)hw)->HOST.QOSCTRL.reg ^= USB_QOSCTRL_CQOS(mask); |
| 6360 | USB_CRITICAL_SECTION_LEAVE(); |
| 6361 | } |
| 6362 | |
| 6363 | static inline hri_usb_qosctrl_reg_t hri_usb_read_QOSCTRL_CQOS_bf(const void *const hw) |
| 6364 | { |
| 6365 | uint8_t tmp; |
| 6366 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6367 | tmp = (tmp & USB_QOSCTRL_CQOS_Msk) >> USB_QOSCTRL_CQOS_Pos; |
| 6368 | return tmp; |
| 6369 | } |
| 6370 | |
| 6371 | static inline void hri_usb_set_QOSCTRL_DQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6372 | { |
| 6373 | USB_CRITICAL_SECTION_ENTER(); |
| 6374 | ((Usb *)hw)->HOST.QOSCTRL.reg |= USB_QOSCTRL_DQOS(mask); |
| 6375 | USB_CRITICAL_SECTION_LEAVE(); |
| 6376 | } |
| 6377 | |
| 6378 | static inline hri_usb_qosctrl_reg_t hri_usb_get_QOSCTRL_DQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6379 | { |
| 6380 | uint8_t tmp; |
| 6381 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6382 | tmp = (tmp & USB_QOSCTRL_DQOS(mask)) >> USB_QOSCTRL_DQOS_Pos; |
| 6383 | return tmp; |
| 6384 | } |
| 6385 | |
| 6386 | static inline void hri_usb_write_QOSCTRL_DQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t data) |
| 6387 | { |
| 6388 | uint8_t tmp; |
| 6389 | USB_CRITICAL_SECTION_ENTER(); |
| 6390 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6391 | tmp &= ~USB_QOSCTRL_DQOS_Msk; |
| 6392 | tmp |= USB_QOSCTRL_DQOS(data); |
| 6393 | ((Usb *)hw)->HOST.QOSCTRL.reg = tmp; |
| 6394 | USB_CRITICAL_SECTION_LEAVE(); |
| 6395 | } |
| 6396 | |
| 6397 | static inline void hri_usb_clear_QOSCTRL_DQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6398 | { |
| 6399 | USB_CRITICAL_SECTION_ENTER(); |
| 6400 | ((Usb *)hw)->HOST.QOSCTRL.reg &= ~USB_QOSCTRL_DQOS(mask); |
| 6401 | USB_CRITICAL_SECTION_LEAVE(); |
| 6402 | } |
| 6403 | |
| 6404 | static inline void hri_usb_toggle_QOSCTRL_DQOS_bf(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6405 | { |
| 6406 | USB_CRITICAL_SECTION_ENTER(); |
| 6407 | ((Usb *)hw)->HOST.QOSCTRL.reg ^= USB_QOSCTRL_DQOS(mask); |
| 6408 | USB_CRITICAL_SECTION_LEAVE(); |
| 6409 | } |
| 6410 | |
| 6411 | static inline hri_usb_qosctrl_reg_t hri_usb_read_QOSCTRL_DQOS_bf(const void *const hw) |
| 6412 | { |
| 6413 | uint8_t tmp; |
| 6414 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6415 | tmp = (tmp & USB_QOSCTRL_DQOS_Msk) >> USB_QOSCTRL_DQOS_Pos; |
| 6416 | return tmp; |
| 6417 | } |
| 6418 | |
| 6419 | static inline void hri_usb_set_QOSCTRL_reg(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6420 | { |
| 6421 | USB_CRITICAL_SECTION_ENTER(); |
| 6422 | ((Usb *)hw)->HOST.QOSCTRL.reg |= mask; |
| 6423 | USB_CRITICAL_SECTION_LEAVE(); |
| 6424 | } |
| 6425 | |
| 6426 | static inline hri_usb_qosctrl_reg_t hri_usb_get_QOSCTRL_reg(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6427 | { |
| 6428 | uint8_t tmp; |
| 6429 | tmp = ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6430 | tmp &= mask; |
| 6431 | return tmp; |
| 6432 | } |
| 6433 | |
| 6434 | static inline void hri_usb_write_QOSCTRL_reg(const void *const hw, hri_usb_qosctrl_reg_t data) |
| 6435 | { |
| 6436 | USB_CRITICAL_SECTION_ENTER(); |
| 6437 | ((Usb *)hw)->HOST.QOSCTRL.reg = data; |
| 6438 | USB_CRITICAL_SECTION_LEAVE(); |
| 6439 | } |
| 6440 | |
| 6441 | static inline void hri_usb_clear_QOSCTRL_reg(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6442 | { |
| 6443 | USB_CRITICAL_SECTION_ENTER(); |
| 6444 | ((Usb *)hw)->HOST.QOSCTRL.reg &= ~mask; |
| 6445 | USB_CRITICAL_SECTION_LEAVE(); |
| 6446 | } |
| 6447 | |
| 6448 | static inline void hri_usb_toggle_QOSCTRL_reg(const void *const hw, hri_usb_qosctrl_reg_t mask) |
| 6449 | { |
| 6450 | USB_CRITICAL_SECTION_ENTER(); |
| 6451 | ((Usb *)hw)->HOST.QOSCTRL.reg ^= mask; |
| 6452 | USB_CRITICAL_SECTION_LEAVE(); |
| 6453 | } |
| 6454 | |
| 6455 | static inline hri_usb_qosctrl_reg_t hri_usb_read_QOSCTRL_reg(const void *const hw) |
| 6456 | { |
| 6457 | return ((Usb *)hw)->HOST.QOSCTRL.reg; |
| 6458 | } |
| 6459 | |
| 6460 | static inline void hri_usbdevice_set_CTRLB_DETACH_bit(const void *const hw) |
| 6461 | { |
| 6462 | USB_CRITICAL_SECTION_ENTER(); |
| 6463 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_DETACH; |
| 6464 | USB_CRITICAL_SECTION_LEAVE(); |
| 6465 | } |
| 6466 | |
| 6467 | static inline bool hri_usbdevice_get_CTRLB_DETACH_bit(const void *const hw) |
| 6468 | { |
| 6469 | uint16_t tmp; |
| 6470 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6471 | tmp = (tmp & USB_DEVICE_CTRLB_DETACH) >> USB_DEVICE_CTRLB_DETACH_Pos; |
| 6472 | return (bool)tmp; |
| 6473 | } |
| 6474 | |
| 6475 | static inline void hri_usbdevice_write_CTRLB_DETACH_bit(const void *const hw, bool value) |
| 6476 | { |
| 6477 | uint16_t tmp; |
| 6478 | USB_CRITICAL_SECTION_ENTER(); |
| 6479 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6480 | tmp &= ~USB_DEVICE_CTRLB_DETACH; |
| 6481 | tmp |= value << USB_DEVICE_CTRLB_DETACH_Pos; |
| 6482 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6483 | USB_CRITICAL_SECTION_LEAVE(); |
| 6484 | } |
| 6485 | |
| 6486 | static inline void hri_usbdevice_clear_CTRLB_DETACH_bit(const void *const hw) |
| 6487 | { |
| 6488 | USB_CRITICAL_SECTION_ENTER(); |
| 6489 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_DETACH; |
| 6490 | USB_CRITICAL_SECTION_LEAVE(); |
| 6491 | } |
| 6492 | |
| 6493 | static inline void hri_usbdevice_toggle_CTRLB_DETACH_bit(const void *const hw) |
| 6494 | { |
| 6495 | USB_CRITICAL_SECTION_ENTER(); |
| 6496 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_DETACH; |
| 6497 | USB_CRITICAL_SECTION_LEAVE(); |
| 6498 | } |
| 6499 | |
| 6500 | static inline void hri_usbdevice_set_CTRLB_UPRSM_bit(const void *const hw) |
| 6501 | { |
| 6502 | USB_CRITICAL_SECTION_ENTER(); |
| 6503 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_UPRSM; |
| 6504 | USB_CRITICAL_SECTION_LEAVE(); |
| 6505 | } |
| 6506 | |
| 6507 | static inline bool hri_usbdevice_get_CTRLB_UPRSM_bit(const void *const hw) |
| 6508 | { |
| 6509 | uint16_t tmp; |
| 6510 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6511 | tmp = (tmp & USB_DEVICE_CTRLB_UPRSM) >> USB_DEVICE_CTRLB_UPRSM_Pos; |
| 6512 | return (bool)tmp; |
| 6513 | } |
| 6514 | |
| 6515 | static inline void hri_usbdevice_write_CTRLB_UPRSM_bit(const void *const hw, bool value) |
| 6516 | { |
| 6517 | uint16_t tmp; |
| 6518 | USB_CRITICAL_SECTION_ENTER(); |
| 6519 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6520 | tmp &= ~USB_DEVICE_CTRLB_UPRSM; |
| 6521 | tmp |= value << USB_DEVICE_CTRLB_UPRSM_Pos; |
| 6522 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6523 | USB_CRITICAL_SECTION_LEAVE(); |
| 6524 | } |
| 6525 | |
| 6526 | static inline void hri_usbdevice_clear_CTRLB_UPRSM_bit(const void *const hw) |
| 6527 | { |
| 6528 | USB_CRITICAL_SECTION_ENTER(); |
| 6529 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_UPRSM; |
| 6530 | USB_CRITICAL_SECTION_LEAVE(); |
| 6531 | } |
| 6532 | |
| 6533 | static inline void hri_usbdevice_toggle_CTRLB_UPRSM_bit(const void *const hw) |
| 6534 | { |
| 6535 | USB_CRITICAL_SECTION_ENTER(); |
| 6536 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_UPRSM; |
| 6537 | USB_CRITICAL_SECTION_LEAVE(); |
| 6538 | } |
| 6539 | |
| 6540 | static inline void hri_usbdevice_set_CTRLB_NREPLY_bit(const void *const hw) |
| 6541 | { |
| 6542 | USB_CRITICAL_SECTION_ENTER(); |
| 6543 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_NREPLY; |
| 6544 | USB_CRITICAL_SECTION_LEAVE(); |
| 6545 | } |
| 6546 | |
| 6547 | static inline bool hri_usbdevice_get_CTRLB_NREPLY_bit(const void *const hw) |
| 6548 | { |
| 6549 | uint16_t tmp; |
| 6550 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6551 | tmp = (tmp & USB_DEVICE_CTRLB_NREPLY) >> USB_DEVICE_CTRLB_NREPLY_Pos; |
| 6552 | return (bool)tmp; |
| 6553 | } |
| 6554 | |
| 6555 | static inline void hri_usbdevice_write_CTRLB_NREPLY_bit(const void *const hw, bool value) |
| 6556 | { |
| 6557 | uint16_t tmp; |
| 6558 | USB_CRITICAL_SECTION_ENTER(); |
| 6559 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6560 | tmp &= ~USB_DEVICE_CTRLB_NREPLY; |
| 6561 | tmp |= value << USB_DEVICE_CTRLB_NREPLY_Pos; |
| 6562 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6563 | USB_CRITICAL_SECTION_LEAVE(); |
| 6564 | } |
| 6565 | |
| 6566 | static inline void hri_usbdevice_clear_CTRLB_NREPLY_bit(const void *const hw) |
| 6567 | { |
| 6568 | USB_CRITICAL_SECTION_ENTER(); |
| 6569 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_NREPLY; |
| 6570 | USB_CRITICAL_SECTION_LEAVE(); |
| 6571 | } |
| 6572 | |
| 6573 | static inline void hri_usbdevice_toggle_CTRLB_NREPLY_bit(const void *const hw) |
| 6574 | { |
| 6575 | USB_CRITICAL_SECTION_ENTER(); |
| 6576 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_NREPLY; |
| 6577 | USB_CRITICAL_SECTION_LEAVE(); |
| 6578 | } |
| 6579 | |
| 6580 | static inline void hri_usbdevice_set_CTRLB_TSTJ_bit(const void *const hw) |
| 6581 | { |
| 6582 | USB_CRITICAL_SECTION_ENTER(); |
| 6583 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTJ; |
| 6584 | USB_CRITICAL_SECTION_LEAVE(); |
| 6585 | } |
| 6586 | |
| 6587 | static inline bool hri_usbdevice_get_CTRLB_TSTJ_bit(const void *const hw) |
| 6588 | { |
| 6589 | uint16_t tmp; |
| 6590 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6591 | tmp = (tmp & USB_DEVICE_CTRLB_TSTJ) >> USB_DEVICE_CTRLB_TSTJ_Pos; |
| 6592 | return (bool)tmp; |
| 6593 | } |
| 6594 | |
| 6595 | static inline void hri_usbdevice_write_CTRLB_TSTJ_bit(const void *const hw, bool value) |
| 6596 | { |
| 6597 | uint16_t tmp; |
| 6598 | USB_CRITICAL_SECTION_ENTER(); |
| 6599 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6600 | tmp &= ~USB_DEVICE_CTRLB_TSTJ; |
| 6601 | tmp |= value << USB_DEVICE_CTRLB_TSTJ_Pos; |
| 6602 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6603 | USB_CRITICAL_SECTION_LEAVE(); |
| 6604 | } |
| 6605 | |
| 6606 | static inline void hri_usbdevice_clear_CTRLB_TSTJ_bit(const void *const hw) |
| 6607 | { |
| 6608 | USB_CRITICAL_SECTION_ENTER(); |
| 6609 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTJ; |
| 6610 | USB_CRITICAL_SECTION_LEAVE(); |
| 6611 | } |
| 6612 | |
| 6613 | static inline void hri_usbdevice_toggle_CTRLB_TSTJ_bit(const void *const hw) |
| 6614 | { |
| 6615 | USB_CRITICAL_SECTION_ENTER(); |
| 6616 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTJ; |
| 6617 | USB_CRITICAL_SECTION_LEAVE(); |
| 6618 | } |
| 6619 | |
| 6620 | static inline void hri_usbdevice_set_CTRLB_TSTK_bit(const void *const hw) |
| 6621 | { |
| 6622 | USB_CRITICAL_SECTION_ENTER(); |
| 6623 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTK; |
| 6624 | USB_CRITICAL_SECTION_LEAVE(); |
| 6625 | } |
| 6626 | |
| 6627 | static inline bool hri_usbdevice_get_CTRLB_TSTK_bit(const void *const hw) |
| 6628 | { |
| 6629 | uint16_t tmp; |
| 6630 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6631 | tmp = (tmp & USB_DEVICE_CTRLB_TSTK) >> USB_DEVICE_CTRLB_TSTK_Pos; |
| 6632 | return (bool)tmp; |
| 6633 | } |
| 6634 | |
| 6635 | static inline void hri_usbdevice_write_CTRLB_TSTK_bit(const void *const hw, bool value) |
| 6636 | { |
| 6637 | uint16_t tmp; |
| 6638 | USB_CRITICAL_SECTION_ENTER(); |
| 6639 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6640 | tmp &= ~USB_DEVICE_CTRLB_TSTK; |
| 6641 | tmp |= value << USB_DEVICE_CTRLB_TSTK_Pos; |
| 6642 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6643 | USB_CRITICAL_SECTION_LEAVE(); |
| 6644 | } |
| 6645 | |
| 6646 | static inline void hri_usbdevice_clear_CTRLB_TSTK_bit(const void *const hw) |
| 6647 | { |
| 6648 | USB_CRITICAL_SECTION_ENTER(); |
| 6649 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTK; |
| 6650 | USB_CRITICAL_SECTION_LEAVE(); |
| 6651 | } |
| 6652 | |
| 6653 | static inline void hri_usbdevice_toggle_CTRLB_TSTK_bit(const void *const hw) |
| 6654 | { |
| 6655 | USB_CRITICAL_SECTION_ENTER(); |
| 6656 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTK; |
| 6657 | USB_CRITICAL_SECTION_LEAVE(); |
| 6658 | } |
| 6659 | |
| 6660 | static inline void hri_usbdevice_set_CTRLB_TSTPCKT_bit(const void *const hw) |
| 6661 | { |
| 6662 | USB_CRITICAL_SECTION_ENTER(); |
| 6663 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTPCKT; |
| 6664 | USB_CRITICAL_SECTION_LEAVE(); |
| 6665 | } |
| 6666 | |
| 6667 | static inline bool hri_usbdevice_get_CTRLB_TSTPCKT_bit(const void *const hw) |
| 6668 | { |
| 6669 | uint16_t tmp; |
| 6670 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6671 | tmp = (tmp & USB_DEVICE_CTRLB_TSTPCKT) >> USB_DEVICE_CTRLB_TSTPCKT_Pos; |
| 6672 | return (bool)tmp; |
| 6673 | } |
| 6674 | |
| 6675 | static inline void hri_usbdevice_write_CTRLB_TSTPCKT_bit(const void *const hw, bool value) |
| 6676 | { |
| 6677 | uint16_t tmp; |
| 6678 | USB_CRITICAL_SECTION_ENTER(); |
| 6679 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6680 | tmp &= ~USB_DEVICE_CTRLB_TSTPCKT; |
| 6681 | tmp |= value << USB_DEVICE_CTRLB_TSTPCKT_Pos; |
| 6682 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6683 | USB_CRITICAL_SECTION_LEAVE(); |
| 6684 | } |
| 6685 | |
| 6686 | static inline void hri_usbdevice_clear_CTRLB_TSTPCKT_bit(const void *const hw) |
| 6687 | { |
| 6688 | USB_CRITICAL_SECTION_ENTER(); |
| 6689 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTPCKT; |
| 6690 | USB_CRITICAL_SECTION_LEAVE(); |
| 6691 | } |
| 6692 | |
| 6693 | static inline void hri_usbdevice_toggle_CTRLB_TSTPCKT_bit(const void *const hw) |
| 6694 | { |
| 6695 | USB_CRITICAL_SECTION_ENTER(); |
| 6696 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTPCKT; |
| 6697 | USB_CRITICAL_SECTION_LEAVE(); |
| 6698 | } |
| 6699 | |
| 6700 | static inline void hri_usbdevice_set_CTRLB_OPMODE2_bit(const void *const hw) |
| 6701 | { |
| 6702 | USB_CRITICAL_SECTION_ENTER(); |
| 6703 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_OPMODE2; |
| 6704 | USB_CRITICAL_SECTION_LEAVE(); |
| 6705 | } |
| 6706 | |
| 6707 | static inline bool hri_usbdevice_get_CTRLB_OPMODE2_bit(const void *const hw) |
| 6708 | { |
| 6709 | uint16_t tmp; |
| 6710 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6711 | tmp = (tmp & USB_DEVICE_CTRLB_OPMODE2) >> USB_DEVICE_CTRLB_OPMODE2_Pos; |
| 6712 | return (bool)tmp; |
| 6713 | } |
| 6714 | |
| 6715 | static inline void hri_usbdevice_write_CTRLB_OPMODE2_bit(const void *const hw, bool value) |
| 6716 | { |
| 6717 | uint16_t tmp; |
| 6718 | USB_CRITICAL_SECTION_ENTER(); |
| 6719 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6720 | tmp &= ~USB_DEVICE_CTRLB_OPMODE2; |
| 6721 | tmp |= value << USB_DEVICE_CTRLB_OPMODE2_Pos; |
| 6722 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6723 | USB_CRITICAL_SECTION_LEAVE(); |
| 6724 | } |
| 6725 | |
| 6726 | static inline void hri_usbdevice_clear_CTRLB_OPMODE2_bit(const void *const hw) |
| 6727 | { |
| 6728 | USB_CRITICAL_SECTION_ENTER(); |
| 6729 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_OPMODE2; |
| 6730 | USB_CRITICAL_SECTION_LEAVE(); |
| 6731 | } |
| 6732 | |
| 6733 | static inline void hri_usbdevice_toggle_CTRLB_OPMODE2_bit(const void *const hw) |
| 6734 | { |
| 6735 | USB_CRITICAL_SECTION_ENTER(); |
| 6736 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_OPMODE2; |
| 6737 | USB_CRITICAL_SECTION_LEAVE(); |
| 6738 | } |
| 6739 | |
| 6740 | static inline void hri_usbdevice_set_CTRLB_GNAK_bit(const void *const hw) |
| 6741 | { |
| 6742 | USB_CRITICAL_SECTION_ENTER(); |
| 6743 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_GNAK; |
| 6744 | USB_CRITICAL_SECTION_LEAVE(); |
| 6745 | } |
| 6746 | |
| 6747 | static inline bool hri_usbdevice_get_CTRLB_GNAK_bit(const void *const hw) |
| 6748 | { |
| 6749 | uint16_t tmp; |
| 6750 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6751 | tmp = (tmp & USB_DEVICE_CTRLB_GNAK) >> USB_DEVICE_CTRLB_GNAK_Pos; |
| 6752 | return (bool)tmp; |
| 6753 | } |
| 6754 | |
| 6755 | static inline void hri_usbdevice_write_CTRLB_GNAK_bit(const void *const hw, bool value) |
| 6756 | { |
| 6757 | uint16_t tmp; |
| 6758 | USB_CRITICAL_SECTION_ENTER(); |
| 6759 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6760 | tmp &= ~USB_DEVICE_CTRLB_GNAK; |
| 6761 | tmp |= value << USB_DEVICE_CTRLB_GNAK_Pos; |
| 6762 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6763 | USB_CRITICAL_SECTION_LEAVE(); |
| 6764 | } |
| 6765 | |
| 6766 | static inline void hri_usbdevice_clear_CTRLB_GNAK_bit(const void *const hw) |
| 6767 | { |
| 6768 | USB_CRITICAL_SECTION_ENTER(); |
| 6769 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_GNAK; |
| 6770 | USB_CRITICAL_SECTION_LEAVE(); |
| 6771 | } |
| 6772 | |
| 6773 | static inline void hri_usbdevice_toggle_CTRLB_GNAK_bit(const void *const hw) |
| 6774 | { |
| 6775 | USB_CRITICAL_SECTION_ENTER(); |
| 6776 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_GNAK; |
| 6777 | USB_CRITICAL_SECTION_LEAVE(); |
| 6778 | } |
| 6779 | |
| 6780 | static inline void hri_usbdevice_set_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6781 | { |
| 6782 | USB_CRITICAL_SECTION_ENTER(); |
| 6783 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_SPDCONF(mask); |
| 6784 | USB_CRITICAL_SECTION_LEAVE(); |
| 6785 | } |
| 6786 | |
| 6787 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_SPDCONF_bf(const void *const hw, |
| 6788 | hri_usbdevice_ctrlb_reg_t mask) |
| 6789 | { |
| 6790 | uint16_t tmp; |
| 6791 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6792 | tmp = (tmp & USB_DEVICE_CTRLB_SPDCONF(mask)) >> USB_DEVICE_CTRLB_SPDCONF_Pos; |
| 6793 | return tmp; |
| 6794 | } |
| 6795 | |
| 6796 | static inline void hri_usbdevice_write_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t data) |
| 6797 | { |
| 6798 | uint16_t tmp; |
| 6799 | USB_CRITICAL_SECTION_ENTER(); |
| 6800 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6801 | tmp &= ~USB_DEVICE_CTRLB_SPDCONF_Msk; |
| 6802 | tmp |= USB_DEVICE_CTRLB_SPDCONF(data); |
| 6803 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6804 | USB_CRITICAL_SECTION_LEAVE(); |
| 6805 | } |
| 6806 | |
| 6807 | static inline void hri_usbdevice_clear_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6808 | { |
| 6809 | USB_CRITICAL_SECTION_ENTER(); |
| 6810 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_SPDCONF(mask); |
| 6811 | USB_CRITICAL_SECTION_LEAVE(); |
| 6812 | } |
| 6813 | |
| 6814 | static inline void hri_usbdevice_toggle_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6815 | { |
| 6816 | USB_CRITICAL_SECTION_ENTER(); |
| 6817 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_SPDCONF(mask); |
| 6818 | USB_CRITICAL_SECTION_LEAVE(); |
| 6819 | } |
| 6820 | |
| 6821 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_SPDCONF_bf(const void *const hw) |
| 6822 | { |
| 6823 | uint16_t tmp; |
| 6824 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6825 | tmp = (tmp & USB_DEVICE_CTRLB_SPDCONF_Msk) >> USB_DEVICE_CTRLB_SPDCONF_Pos; |
| 6826 | return tmp; |
| 6827 | } |
| 6828 | |
| 6829 | static inline void hri_usbdevice_set_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6830 | { |
| 6831 | USB_CRITICAL_SECTION_ENTER(); |
| 6832 | ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_LPMHDSK(mask); |
| 6833 | USB_CRITICAL_SECTION_LEAVE(); |
| 6834 | } |
| 6835 | |
| 6836 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_LPMHDSK_bf(const void *const hw, |
| 6837 | hri_usbdevice_ctrlb_reg_t mask) |
| 6838 | { |
| 6839 | uint16_t tmp; |
| 6840 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6841 | tmp = (tmp & USB_DEVICE_CTRLB_LPMHDSK(mask)) >> USB_DEVICE_CTRLB_LPMHDSK_Pos; |
| 6842 | return tmp; |
| 6843 | } |
| 6844 | |
| 6845 | static inline void hri_usbdevice_write_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t data) |
| 6846 | { |
| 6847 | uint16_t tmp; |
| 6848 | USB_CRITICAL_SECTION_ENTER(); |
| 6849 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6850 | tmp &= ~USB_DEVICE_CTRLB_LPMHDSK_Msk; |
| 6851 | tmp |= USB_DEVICE_CTRLB_LPMHDSK(data); |
| 6852 | ((Usb *)hw)->DEVICE.CTRLB.reg = tmp; |
| 6853 | USB_CRITICAL_SECTION_LEAVE(); |
| 6854 | } |
| 6855 | |
| 6856 | static inline void hri_usbdevice_clear_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6857 | { |
| 6858 | USB_CRITICAL_SECTION_ENTER(); |
| 6859 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_LPMHDSK(mask); |
| 6860 | USB_CRITICAL_SECTION_LEAVE(); |
| 6861 | } |
| 6862 | |
| 6863 | static inline void hri_usbdevice_toggle_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6864 | { |
| 6865 | USB_CRITICAL_SECTION_ENTER(); |
| 6866 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_LPMHDSK(mask); |
| 6867 | USB_CRITICAL_SECTION_LEAVE(); |
| 6868 | } |
| 6869 | |
| 6870 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_LPMHDSK_bf(const void *const hw) |
| 6871 | { |
| 6872 | uint16_t tmp; |
| 6873 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6874 | tmp = (tmp & USB_DEVICE_CTRLB_LPMHDSK_Msk) >> USB_DEVICE_CTRLB_LPMHDSK_Pos; |
| 6875 | return tmp; |
| 6876 | } |
| 6877 | |
| 6878 | static inline void hri_usbdevice_set_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6879 | { |
| 6880 | USB_CRITICAL_SECTION_ENTER(); |
| 6881 | ((Usb *)hw)->DEVICE.CTRLB.reg |= mask; |
| 6882 | USB_CRITICAL_SECTION_LEAVE(); |
| 6883 | } |
| 6884 | |
| 6885 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_reg(const void *const hw, |
| 6886 | hri_usbdevice_ctrlb_reg_t mask) |
| 6887 | { |
| 6888 | uint16_t tmp; |
| 6889 | tmp = ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6890 | tmp &= mask; |
| 6891 | return tmp; |
| 6892 | } |
| 6893 | |
| 6894 | static inline void hri_usbdevice_write_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t data) |
| 6895 | { |
| 6896 | USB_CRITICAL_SECTION_ENTER(); |
| 6897 | ((Usb *)hw)->DEVICE.CTRLB.reg = data; |
| 6898 | USB_CRITICAL_SECTION_LEAVE(); |
| 6899 | } |
| 6900 | |
| 6901 | static inline void hri_usbdevice_clear_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6902 | { |
| 6903 | USB_CRITICAL_SECTION_ENTER(); |
| 6904 | ((Usb *)hw)->DEVICE.CTRLB.reg &= ~mask; |
| 6905 | USB_CRITICAL_SECTION_LEAVE(); |
| 6906 | } |
| 6907 | |
| 6908 | static inline void hri_usbdevice_toggle_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask) |
| 6909 | { |
| 6910 | USB_CRITICAL_SECTION_ENTER(); |
| 6911 | ((Usb *)hw)->DEVICE.CTRLB.reg ^= mask; |
| 6912 | USB_CRITICAL_SECTION_LEAVE(); |
| 6913 | } |
| 6914 | |
| 6915 | static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_reg(const void *const hw) |
| 6916 | { |
| 6917 | return ((Usb *)hw)->DEVICE.CTRLB.reg; |
| 6918 | } |
| 6919 | |
| 6920 | static inline void hri_usbhost_set_CTRLB_RESUME_bit(const void *const hw) |
| 6921 | { |
| 6922 | USB_CRITICAL_SECTION_ENTER(); |
| 6923 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_RESUME; |
| 6924 | USB_CRITICAL_SECTION_LEAVE(); |
| 6925 | } |
| 6926 | |
| 6927 | static inline bool hri_usbhost_get_CTRLB_RESUME_bit(const void *const hw) |
| 6928 | { |
| 6929 | uint16_t tmp; |
| 6930 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 6931 | tmp = (tmp & USB_HOST_CTRLB_RESUME) >> USB_HOST_CTRLB_RESUME_Pos; |
| 6932 | return (bool)tmp; |
| 6933 | } |
| 6934 | |
| 6935 | static inline void hri_usbhost_write_CTRLB_RESUME_bit(const void *const hw, bool value) |
| 6936 | { |
| 6937 | uint16_t tmp; |
| 6938 | USB_CRITICAL_SECTION_ENTER(); |
| 6939 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 6940 | tmp &= ~USB_HOST_CTRLB_RESUME; |
| 6941 | tmp |= value << USB_HOST_CTRLB_RESUME_Pos; |
| 6942 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 6943 | USB_CRITICAL_SECTION_LEAVE(); |
| 6944 | } |
| 6945 | |
| 6946 | static inline void hri_usbhost_clear_CTRLB_RESUME_bit(const void *const hw) |
| 6947 | { |
| 6948 | USB_CRITICAL_SECTION_ENTER(); |
| 6949 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_RESUME; |
| 6950 | USB_CRITICAL_SECTION_LEAVE(); |
| 6951 | } |
| 6952 | |
| 6953 | static inline void hri_usbhost_toggle_CTRLB_RESUME_bit(const void *const hw) |
| 6954 | { |
| 6955 | USB_CRITICAL_SECTION_ENTER(); |
| 6956 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_RESUME; |
| 6957 | USB_CRITICAL_SECTION_LEAVE(); |
| 6958 | } |
| 6959 | |
| 6960 | static inline void hri_usbhost_set_CTRLB_AUTORESUME_bit(const void *const hw) |
| 6961 | { |
| 6962 | USB_CRITICAL_SECTION_ENTER(); |
| 6963 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_AUTORESUME; |
| 6964 | USB_CRITICAL_SECTION_LEAVE(); |
| 6965 | } |
| 6966 | |
| 6967 | static inline bool hri_usbhost_get_CTRLB_AUTORESUME_bit(const void *const hw) |
| 6968 | { |
| 6969 | uint16_t tmp; |
| 6970 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 6971 | tmp = (tmp & USB_HOST_CTRLB_AUTORESUME) >> USB_HOST_CTRLB_AUTORESUME_Pos; |
| 6972 | return (bool)tmp; |
| 6973 | } |
| 6974 | |
| 6975 | static inline void hri_usbhost_write_CTRLB_AUTORESUME_bit(const void *const hw, bool value) |
| 6976 | { |
| 6977 | uint16_t tmp; |
| 6978 | USB_CRITICAL_SECTION_ENTER(); |
| 6979 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 6980 | tmp &= ~USB_HOST_CTRLB_AUTORESUME; |
| 6981 | tmp |= value << USB_HOST_CTRLB_AUTORESUME_Pos; |
| 6982 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 6983 | USB_CRITICAL_SECTION_LEAVE(); |
| 6984 | } |
| 6985 | |
| 6986 | static inline void hri_usbhost_clear_CTRLB_AUTORESUME_bit(const void *const hw) |
| 6987 | { |
| 6988 | USB_CRITICAL_SECTION_ENTER(); |
| 6989 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_AUTORESUME; |
| 6990 | USB_CRITICAL_SECTION_LEAVE(); |
| 6991 | } |
| 6992 | |
| 6993 | static inline void hri_usbhost_toggle_CTRLB_AUTORESUME_bit(const void *const hw) |
| 6994 | { |
| 6995 | USB_CRITICAL_SECTION_ENTER(); |
| 6996 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_AUTORESUME; |
| 6997 | USB_CRITICAL_SECTION_LEAVE(); |
| 6998 | } |
| 6999 | |
| 7000 | static inline void hri_usbhost_set_CTRLB_TSTJ_bit(const void *const hw) |
| 7001 | { |
| 7002 | USB_CRITICAL_SECTION_ENTER(); |
| 7003 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_TSTJ; |
| 7004 | USB_CRITICAL_SECTION_LEAVE(); |
| 7005 | } |
| 7006 | |
| 7007 | static inline bool hri_usbhost_get_CTRLB_TSTJ_bit(const void *const hw) |
| 7008 | { |
| 7009 | uint16_t tmp; |
| 7010 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7011 | tmp = (tmp & USB_HOST_CTRLB_TSTJ) >> USB_HOST_CTRLB_TSTJ_Pos; |
| 7012 | return (bool)tmp; |
| 7013 | } |
| 7014 | |
| 7015 | static inline void hri_usbhost_write_CTRLB_TSTJ_bit(const void *const hw, bool value) |
| 7016 | { |
| 7017 | uint16_t tmp; |
| 7018 | USB_CRITICAL_SECTION_ENTER(); |
| 7019 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7020 | tmp &= ~USB_HOST_CTRLB_TSTJ; |
| 7021 | tmp |= value << USB_HOST_CTRLB_TSTJ_Pos; |
| 7022 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7023 | USB_CRITICAL_SECTION_LEAVE(); |
| 7024 | } |
| 7025 | |
| 7026 | static inline void hri_usbhost_clear_CTRLB_TSTJ_bit(const void *const hw) |
| 7027 | { |
| 7028 | USB_CRITICAL_SECTION_ENTER(); |
| 7029 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_TSTJ; |
| 7030 | USB_CRITICAL_SECTION_LEAVE(); |
| 7031 | } |
| 7032 | |
| 7033 | static inline void hri_usbhost_toggle_CTRLB_TSTJ_bit(const void *const hw) |
| 7034 | { |
| 7035 | USB_CRITICAL_SECTION_ENTER(); |
| 7036 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_TSTJ; |
| 7037 | USB_CRITICAL_SECTION_LEAVE(); |
| 7038 | } |
| 7039 | |
| 7040 | static inline void hri_usbhost_set_CTRLB_TSTK_bit(const void *const hw) |
| 7041 | { |
| 7042 | USB_CRITICAL_SECTION_ENTER(); |
| 7043 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_TSTK; |
| 7044 | USB_CRITICAL_SECTION_LEAVE(); |
| 7045 | } |
| 7046 | |
| 7047 | static inline bool hri_usbhost_get_CTRLB_TSTK_bit(const void *const hw) |
| 7048 | { |
| 7049 | uint16_t tmp; |
| 7050 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7051 | tmp = (tmp & USB_HOST_CTRLB_TSTK) >> USB_HOST_CTRLB_TSTK_Pos; |
| 7052 | return (bool)tmp; |
| 7053 | } |
| 7054 | |
| 7055 | static inline void hri_usbhost_write_CTRLB_TSTK_bit(const void *const hw, bool value) |
| 7056 | { |
| 7057 | uint16_t tmp; |
| 7058 | USB_CRITICAL_SECTION_ENTER(); |
| 7059 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7060 | tmp &= ~USB_HOST_CTRLB_TSTK; |
| 7061 | tmp |= value << USB_HOST_CTRLB_TSTK_Pos; |
| 7062 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7063 | USB_CRITICAL_SECTION_LEAVE(); |
| 7064 | } |
| 7065 | |
| 7066 | static inline void hri_usbhost_clear_CTRLB_TSTK_bit(const void *const hw) |
| 7067 | { |
| 7068 | USB_CRITICAL_SECTION_ENTER(); |
| 7069 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_TSTK; |
| 7070 | USB_CRITICAL_SECTION_LEAVE(); |
| 7071 | } |
| 7072 | |
| 7073 | static inline void hri_usbhost_toggle_CTRLB_TSTK_bit(const void *const hw) |
| 7074 | { |
| 7075 | USB_CRITICAL_SECTION_ENTER(); |
| 7076 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_TSTK; |
| 7077 | USB_CRITICAL_SECTION_LEAVE(); |
| 7078 | } |
| 7079 | |
| 7080 | static inline void hri_usbhost_set_CTRLB_SOFE_bit(const void *const hw) |
| 7081 | { |
| 7082 | USB_CRITICAL_SECTION_ENTER(); |
| 7083 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SOFE; |
| 7084 | USB_CRITICAL_SECTION_LEAVE(); |
| 7085 | } |
| 7086 | |
| 7087 | static inline bool hri_usbhost_get_CTRLB_SOFE_bit(const void *const hw) |
| 7088 | { |
| 7089 | uint16_t tmp; |
| 7090 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7091 | tmp = (tmp & USB_HOST_CTRLB_SOFE) >> USB_HOST_CTRLB_SOFE_Pos; |
| 7092 | return (bool)tmp; |
| 7093 | } |
| 7094 | |
| 7095 | static inline void hri_usbhost_write_CTRLB_SOFE_bit(const void *const hw, bool value) |
| 7096 | { |
| 7097 | uint16_t tmp; |
| 7098 | USB_CRITICAL_SECTION_ENTER(); |
| 7099 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7100 | tmp &= ~USB_HOST_CTRLB_SOFE; |
| 7101 | tmp |= value << USB_HOST_CTRLB_SOFE_Pos; |
| 7102 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7103 | USB_CRITICAL_SECTION_LEAVE(); |
| 7104 | } |
| 7105 | |
| 7106 | static inline void hri_usbhost_clear_CTRLB_SOFE_bit(const void *const hw) |
| 7107 | { |
| 7108 | USB_CRITICAL_SECTION_ENTER(); |
| 7109 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_SOFE; |
| 7110 | USB_CRITICAL_SECTION_LEAVE(); |
| 7111 | } |
| 7112 | |
| 7113 | static inline void hri_usbhost_toggle_CTRLB_SOFE_bit(const void *const hw) |
| 7114 | { |
| 7115 | USB_CRITICAL_SECTION_ENTER(); |
| 7116 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_SOFE; |
| 7117 | USB_CRITICAL_SECTION_LEAVE(); |
| 7118 | } |
| 7119 | |
| 7120 | static inline void hri_usbhost_set_CTRLB_BUSRESET_bit(const void *const hw) |
| 7121 | { |
| 7122 | USB_CRITICAL_SECTION_ENTER(); |
| 7123 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_BUSRESET; |
| 7124 | USB_CRITICAL_SECTION_LEAVE(); |
| 7125 | } |
| 7126 | |
| 7127 | static inline bool hri_usbhost_get_CTRLB_BUSRESET_bit(const void *const hw) |
| 7128 | { |
| 7129 | uint16_t tmp; |
| 7130 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7131 | tmp = (tmp & USB_HOST_CTRLB_BUSRESET) >> USB_HOST_CTRLB_BUSRESET_Pos; |
| 7132 | return (bool)tmp; |
| 7133 | } |
| 7134 | |
| 7135 | static inline void hri_usbhost_write_CTRLB_BUSRESET_bit(const void *const hw, bool value) |
| 7136 | { |
| 7137 | uint16_t tmp; |
| 7138 | USB_CRITICAL_SECTION_ENTER(); |
| 7139 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7140 | tmp &= ~USB_HOST_CTRLB_BUSRESET; |
| 7141 | tmp |= value << USB_HOST_CTRLB_BUSRESET_Pos; |
| 7142 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7143 | USB_CRITICAL_SECTION_LEAVE(); |
| 7144 | } |
| 7145 | |
| 7146 | static inline void hri_usbhost_clear_CTRLB_BUSRESET_bit(const void *const hw) |
| 7147 | { |
| 7148 | USB_CRITICAL_SECTION_ENTER(); |
| 7149 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_BUSRESET; |
| 7150 | USB_CRITICAL_SECTION_LEAVE(); |
| 7151 | } |
| 7152 | |
| 7153 | static inline void hri_usbhost_toggle_CTRLB_BUSRESET_bit(const void *const hw) |
| 7154 | { |
| 7155 | USB_CRITICAL_SECTION_ENTER(); |
| 7156 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_BUSRESET; |
| 7157 | USB_CRITICAL_SECTION_LEAVE(); |
| 7158 | } |
| 7159 | |
| 7160 | static inline void hri_usbhost_set_CTRLB_VBUSOK_bit(const void *const hw) |
| 7161 | { |
| 7162 | USB_CRITICAL_SECTION_ENTER(); |
| 7163 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_VBUSOK; |
| 7164 | USB_CRITICAL_SECTION_LEAVE(); |
| 7165 | } |
| 7166 | |
| 7167 | static inline bool hri_usbhost_get_CTRLB_VBUSOK_bit(const void *const hw) |
| 7168 | { |
| 7169 | uint16_t tmp; |
| 7170 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7171 | tmp = (tmp & USB_HOST_CTRLB_VBUSOK) >> USB_HOST_CTRLB_VBUSOK_Pos; |
| 7172 | return (bool)tmp; |
| 7173 | } |
| 7174 | |
| 7175 | static inline void hri_usbhost_write_CTRLB_VBUSOK_bit(const void *const hw, bool value) |
| 7176 | { |
| 7177 | uint16_t tmp; |
| 7178 | USB_CRITICAL_SECTION_ENTER(); |
| 7179 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7180 | tmp &= ~USB_HOST_CTRLB_VBUSOK; |
| 7181 | tmp |= value << USB_HOST_CTRLB_VBUSOK_Pos; |
| 7182 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7183 | USB_CRITICAL_SECTION_LEAVE(); |
| 7184 | } |
| 7185 | |
| 7186 | static inline void hri_usbhost_clear_CTRLB_VBUSOK_bit(const void *const hw) |
| 7187 | { |
| 7188 | USB_CRITICAL_SECTION_ENTER(); |
| 7189 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_VBUSOK; |
| 7190 | USB_CRITICAL_SECTION_LEAVE(); |
| 7191 | } |
| 7192 | |
| 7193 | static inline void hri_usbhost_toggle_CTRLB_VBUSOK_bit(const void *const hw) |
| 7194 | { |
| 7195 | USB_CRITICAL_SECTION_ENTER(); |
| 7196 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_VBUSOK; |
| 7197 | USB_CRITICAL_SECTION_LEAVE(); |
| 7198 | } |
| 7199 | |
| 7200 | static inline void hri_usbhost_set_CTRLB_L1RESUME_bit(const void *const hw) |
| 7201 | { |
| 7202 | USB_CRITICAL_SECTION_ENTER(); |
| 7203 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_L1RESUME; |
| 7204 | USB_CRITICAL_SECTION_LEAVE(); |
| 7205 | } |
| 7206 | |
| 7207 | static inline bool hri_usbhost_get_CTRLB_L1RESUME_bit(const void *const hw) |
| 7208 | { |
| 7209 | uint16_t tmp; |
| 7210 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7211 | tmp = (tmp & USB_HOST_CTRLB_L1RESUME) >> USB_HOST_CTRLB_L1RESUME_Pos; |
| 7212 | return (bool)tmp; |
| 7213 | } |
| 7214 | |
| 7215 | static inline void hri_usbhost_write_CTRLB_L1RESUME_bit(const void *const hw, bool value) |
| 7216 | { |
| 7217 | uint16_t tmp; |
| 7218 | USB_CRITICAL_SECTION_ENTER(); |
| 7219 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7220 | tmp &= ~USB_HOST_CTRLB_L1RESUME; |
| 7221 | tmp |= value << USB_HOST_CTRLB_L1RESUME_Pos; |
| 7222 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7223 | USB_CRITICAL_SECTION_LEAVE(); |
| 7224 | } |
| 7225 | |
| 7226 | static inline void hri_usbhost_clear_CTRLB_L1RESUME_bit(const void *const hw) |
| 7227 | { |
| 7228 | USB_CRITICAL_SECTION_ENTER(); |
| 7229 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_L1RESUME; |
| 7230 | USB_CRITICAL_SECTION_LEAVE(); |
| 7231 | } |
| 7232 | |
| 7233 | static inline void hri_usbhost_toggle_CTRLB_L1RESUME_bit(const void *const hw) |
| 7234 | { |
| 7235 | USB_CRITICAL_SECTION_ENTER(); |
| 7236 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_L1RESUME; |
| 7237 | USB_CRITICAL_SECTION_LEAVE(); |
| 7238 | } |
| 7239 | |
| 7240 | static inline void hri_usbhost_set_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7241 | { |
| 7242 | USB_CRITICAL_SECTION_ENTER(); |
| 7243 | ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SPDCONF(mask); |
| 7244 | USB_CRITICAL_SECTION_LEAVE(); |
| 7245 | } |
| 7246 | |
| 7247 | static inline hri_usbhost_ctrlb_reg_t hri_usbhost_get_CTRLB_SPDCONF_bf(const void *const hw, |
| 7248 | hri_usbhost_ctrlb_reg_t mask) |
| 7249 | { |
| 7250 | uint16_t tmp; |
| 7251 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7252 | tmp = (tmp & USB_HOST_CTRLB_SPDCONF(mask)) >> USB_HOST_CTRLB_SPDCONF_Pos; |
| 7253 | return tmp; |
| 7254 | } |
| 7255 | |
| 7256 | static inline void hri_usbhost_write_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t data) |
| 7257 | { |
| 7258 | uint16_t tmp; |
| 7259 | USB_CRITICAL_SECTION_ENTER(); |
| 7260 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7261 | tmp &= ~USB_HOST_CTRLB_SPDCONF_Msk; |
| 7262 | tmp |= USB_HOST_CTRLB_SPDCONF(data); |
| 7263 | ((Usb *)hw)->HOST.CTRLB.reg = tmp; |
| 7264 | USB_CRITICAL_SECTION_LEAVE(); |
| 7265 | } |
| 7266 | |
| 7267 | static inline void hri_usbhost_clear_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7268 | { |
| 7269 | USB_CRITICAL_SECTION_ENTER(); |
| 7270 | ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_SPDCONF(mask); |
| 7271 | USB_CRITICAL_SECTION_LEAVE(); |
| 7272 | } |
| 7273 | |
| 7274 | static inline void hri_usbhost_toggle_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7275 | { |
| 7276 | USB_CRITICAL_SECTION_ENTER(); |
| 7277 | ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_SPDCONF(mask); |
| 7278 | USB_CRITICAL_SECTION_LEAVE(); |
| 7279 | } |
| 7280 | |
| 7281 | static inline hri_usbhost_ctrlb_reg_t hri_usbhost_read_CTRLB_SPDCONF_bf(const void *const hw) |
| 7282 | { |
| 7283 | uint16_t tmp; |
| 7284 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7285 | tmp = (tmp & USB_HOST_CTRLB_SPDCONF_Msk) >> USB_HOST_CTRLB_SPDCONF_Pos; |
| 7286 | return tmp; |
| 7287 | } |
| 7288 | |
| 7289 | static inline void hri_usbhost_set_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7290 | { |
| 7291 | USB_CRITICAL_SECTION_ENTER(); |
| 7292 | ((Usb *)hw)->HOST.CTRLB.reg |= mask; |
| 7293 | USB_CRITICAL_SECTION_LEAVE(); |
| 7294 | } |
| 7295 | |
| 7296 | static inline hri_usbhost_ctrlb_reg_t hri_usbhost_get_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7297 | { |
| 7298 | uint16_t tmp; |
| 7299 | tmp = ((Usb *)hw)->HOST.CTRLB.reg; |
| 7300 | tmp &= mask; |
| 7301 | return tmp; |
| 7302 | } |
| 7303 | |
| 7304 | static inline void hri_usbhost_write_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t data) |
| 7305 | { |
| 7306 | USB_CRITICAL_SECTION_ENTER(); |
| 7307 | ((Usb *)hw)->HOST.CTRLB.reg = data; |
| 7308 | USB_CRITICAL_SECTION_LEAVE(); |
| 7309 | } |
| 7310 | |
| 7311 | static inline void hri_usbhost_clear_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7312 | { |
| 7313 | USB_CRITICAL_SECTION_ENTER(); |
| 7314 | ((Usb *)hw)->HOST.CTRLB.reg &= ~mask; |
| 7315 | USB_CRITICAL_SECTION_LEAVE(); |
| 7316 | } |
| 7317 | |
| 7318 | static inline void hri_usbhost_toggle_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask) |
| 7319 | { |
| 7320 | USB_CRITICAL_SECTION_ENTER(); |
| 7321 | ((Usb *)hw)->HOST.CTRLB.reg ^= mask; |
| 7322 | USB_CRITICAL_SECTION_LEAVE(); |
| 7323 | } |
| 7324 | |
| 7325 | static inline hri_usbhost_ctrlb_reg_t hri_usbhost_read_CTRLB_reg(const void *const hw) |
| 7326 | { |
| 7327 | return ((Usb *)hw)->HOST.CTRLB.reg; |
| 7328 | } |
| 7329 | |
| 7330 | static inline void hri_usbdevice_set_DADD_ADDEN_bit(const void *const hw) |
| 7331 | { |
| 7332 | USB_CRITICAL_SECTION_ENTER(); |
| 7333 | ((Usb *)hw)->DEVICE.DADD.reg |= USB_DEVICE_DADD_ADDEN; |
| 7334 | USB_CRITICAL_SECTION_LEAVE(); |
| 7335 | } |
| 7336 | |
| 7337 | static inline bool hri_usbdevice_get_DADD_ADDEN_bit(const void *const hw) |
| 7338 | { |
| 7339 | uint8_t tmp; |
| 7340 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7341 | tmp = (tmp & USB_DEVICE_DADD_ADDEN) >> USB_DEVICE_DADD_ADDEN_Pos; |
| 7342 | return (bool)tmp; |
| 7343 | } |
| 7344 | |
| 7345 | static inline void hri_usbdevice_write_DADD_ADDEN_bit(const void *const hw, bool value) |
| 7346 | { |
| 7347 | uint8_t tmp; |
| 7348 | USB_CRITICAL_SECTION_ENTER(); |
| 7349 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7350 | tmp &= ~USB_DEVICE_DADD_ADDEN; |
| 7351 | tmp |= value << USB_DEVICE_DADD_ADDEN_Pos; |
| 7352 | ((Usb *)hw)->DEVICE.DADD.reg = tmp; |
| 7353 | USB_CRITICAL_SECTION_LEAVE(); |
| 7354 | } |
| 7355 | |
| 7356 | static inline void hri_usbdevice_clear_DADD_ADDEN_bit(const void *const hw) |
| 7357 | { |
| 7358 | USB_CRITICAL_SECTION_ENTER(); |
| 7359 | ((Usb *)hw)->DEVICE.DADD.reg &= ~USB_DEVICE_DADD_ADDEN; |
| 7360 | USB_CRITICAL_SECTION_LEAVE(); |
| 7361 | } |
| 7362 | |
| 7363 | static inline void hri_usbdevice_toggle_DADD_ADDEN_bit(const void *const hw) |
| 7364 | { |
| 7365 | USB_CRITICAL_SECTION_ENTER(); |
| 7366 | ((Usb *)hw)->DEVICE.DADD.reg ^= USB_DEVICE_DADD_ADDEN; |
| 7367 | USB_CRITICAL_SECTION_LEAVE(); |
| 7368 | } |
| 7369 | |
| 7370 | static inline void hri_usbdevice_set_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7371 | { |
| 7372 | USB_CRITICAL_SECTION_ENTER(); |
| 7373 | ((Usb *)hw)->DEVICE.DADD.reg |= USB_DEVICE_DADD_DADD(mask); |
| 7374 | USB_CRITICAL_SECTION_LEAVE(); |
| 7375 | } |
| 7376 | |
| 7377 | static inline hri_usbdevice_dadd_reg_t hri_usbdevice_get_DADD_DADD_bf(const void *const hw, |
| 7378 | hri_usbdevice_dadd_reg_t mask) |
| 7379 | { |
| 7380 | uint8_t tmp; |
| 7381 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7382 | tmp = (tmp & USB_DEVICE_DADD_DADD(mask)) >> USB_DEVICE_DADD_DADD_Pos; |
| 7383 | return tmp; |
| 7384 | } |
| 7385 | |
| 7386 | static inline void hri_usbdevice_write_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t data) |
| 7387 | { |
| 7388 | uint8_t tmp; |
| 7389 | USB_CRITICAL_SECTION_ENTER(); |
| 7390 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7391 | tmp &= ~USB_DEVICE_DADD_DADD_Msk; |
| 7392 | tmp |= USB_DEVICE_DADD_DADD(data); |
| 7393 | ((Usb *)hw)->DEVICE.DADD.reg = tmp; |
| 7394 | USB_CRITICAL_SECTION_LEAVE(); |
| 7395 | } |
| 7396 | |
| 7397 | static inline void hri_usbdevice_clear_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7398 | { |
| 7399 | USB_CRITICAL_SECTION_ENTER(); |
| 7400 | ((Usb *)hw)->DEVICE.DADD.reg &= ~USB_DEVICE_DADD_DADD(mask); |
| 7401 | USB_CRITICAL_SECTION_LEAVE(); |
| 7402 | } |
| 7403 | |
| 7404 | static inline void hri_usbdevice_toggle_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7405 | { |
| 7406 | USB_CRITICAL_SECTION_ENTER(); |
| 7407 | ((Usb *)hw)->DEVICE.DADD.reg ^= USB_DEVICE_DADD_DADD(mask); |
| 7408 | USB_CRITICAL_SECTION_LEAVE(); |
| 7409 | } |
| 7410 | |
| 7411 | static inline hri_usbdevice_dadd_reg_t hri_usbdevice_read_DADD_DADD_bf(const void *const hw) |
| 7412 | { |
| 7413 | uint8_t tmp; |
| 7414 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7415 | tmp = (tmp & USB_DEVICE_DADD_DADD_Msk) >> USB_DEVICE_DADD_DADD_Pos; |
| 7416 | return tmp; |
| 7417 | } |
| 7418 | |
| 7419 | static inline void hri_usbdevice_set_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7420 | { |
| 7421 | USB_CRITICAL_SECTION_ENTER(); |
| 7422 | ((Usb *)hw)->DEVICE.DADD.reg |= mask; |
| 7423 | USB_CRITICAL_SECTION_LEAVE(); |
| 7424 | } |
| 7425 | |
| 7426 | static inline hri_usbdevice_dadd_reg_t hri_usbdevice_get_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7427 | { |
| 7428 | uint8_t tmp; |
| 7429 | tmp = ((Usb *)hw)->DEVICE.DADD.reg; |
| 7430 | tmp &= mask; |
| 7431 | return tmp; |
| 7432 | } |
| 7433 | |
| 7434 | static inline void hri_usbdevice_write_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t data) |
| 7435 | { |
| 7436 | USB_CRITICAL_SECTION_ENTER(); |
| 7437 | ((Usb *)hw)->DEVICE.DADD.reg = data; |
| 7438 | USB_CRITICAL_SECTION_LEAVE(); |
| 7439 | } |
| 7440 | |
| 7441 | static inline void hri_usbdevice_clear_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7442 | { |
| 7443 | USB_CRITICAL_SECTION_ENTER(); |
| 7444 | ((Usb *)hw)->DEVICE.DADD.reg &= ~mask; |
| 7445 | USB_CRITICAL_SECTION_LEAVE(); |
| 7446 | } |
| 7447 | |
| 7448 | static inline void hri_usbdevice_toggle_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask) |
| 7449 | { |
| 7450 | USB_CRITICAL_SECTION_ENTER(); |
| 7451 | ((Usb *)hw)->DEVICE.DADD.reg ^= mask; |
| 7452 | USB_CRITICAL_SECTION_LEAVE(); |
| 7453 | } |
| 7454 | |
| 7455 | static inline hri_usbdevice_dadd_reg_t hri_usbdevice_read_DADD_reg(const void *const hw) |
| 7456 | { |
| 7457 | return ((Usb *)hw)->DEVICE.DADD.reg; |
| 7458 | } |
| 7459 | |
| 7460 | static inline void hri_usbhost_set_HSOFC_FLENCE_bit(const void *const hw) |
| 7461 | { |
| 7462 | USB_CRITICAL_SECTION_ENTER(); |
| 7463 | ((Usb *)hw)->HOST.HSOFC.reg |= USB_HOST_HSOFC_FLENCE; |
| 7464 | USB_CRITICAL_SECTION_LEAVE(); |
| 7465 | } |
| 7466 | |
| 7467 | static inline bool hri_usbhost_get_HSOFC_FLENCE_bit(const void *const hw) |
| 7468 | { |
| 7469 | uint8_t tmp; |
| 7470 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7471 | tmp = (tmp & USB_HOST_HSOFC_FLENCE) >> USB_HOST_HSOFC_FLENCE_Pos; |
| 7472 | return (bool)tmp; |
| 7473 | } |
| 7474 | |
| 7475 | static inline void hri_usbhost_write_HSOFC_FLENCE_bit(const void *const hw, bool value) |
| 7476 | { |
| 7477 | uint8_t tmp; |
| 7478 | USB_CRITICAL_SECTION_ENTER(); |
| 7479 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7480 | tmp &= ~USB_HOST_HSOFC_FLENCE; |
| 7481 | tmp |= value << USB_HOST_HSOFC_FLENCE_Pos; |
| 7482 | ((Usb *)hw)->HOST.HSOFC.reg = tmp; |
| 7483 | USB_CRITICAL_SECTION_LEAVE(); |
| 7484 | } |
| 7485 | |
| 7486 | static inline void hri_usbhost_clear_HSOFC_FLENCE_bit(const void *const hw) |
| 7487 | { |
| 7488 | USB_CRITICAL_SECTION_ENTER(); |
| 7489 | ((Usb *)hw)->HOST.HSOFC.reg &= ~USB_HOST_HSOFC_FLENCE; |
| 7490 | USB_CRITICAL_SECTION_LEAVE(); |
| 7491 | } |
| 7492 | |
| 7493 | static inline void hri_usbhost_toggle_HSOFC_FLENCE_bit(const void *const hw) |
| 7494 | { |
| 7495 | USB_CRITICAL_SECTION_ENTER(); |
| 7496 | ((Usb *)hw)->HOST.HSOFC.reg ^= USB_HOST_HSOFC_FLENCE; |
| 7497 | USB_CRITICAL_SECTION_LEAVE(); |
| 7498 | } |
| 7499 | |
| 7500 | static inline void hri_usbhost_set_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7501 | { |
| 7502 | USB_CRITICAL_SECTION_ENTER(); |
| 7503 | ((Usb *)hw)->HOST.HSOFC.reg |= USB_HOST_HSOFC_FLENC(mask); |
| 7504 | USB_CRITICAL_SECTION_LEAVE(); |
| 7505 | } |
| 7506 | |
| 7507 | static inline hri_usbhost_hsofc_reg_t hri_usbhost_get_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7508 | { |
| 7509 | uint8_t tmp; |
| 7510 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7511 | tmp = (tmp & USB_HOST_HSOFC_FLENC(mask)) >> USB_HOST_HSOFC_FLENC_Pos; |
| 7512 | return tmp; |
| 7513 | } |
| 7514 | |
| 7515 | static inline void hri_usbhost_write_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t data) |
| 7516 | { |
| 7517 | uint8_t tmp; |
| 7518 | USB_CRITICAL_SECTION_ENTER(); |
| 7519 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7520 | tmp &= ~USB_HOST_HSOFC_FLENC_Msk; |
| 7521 | tmp |= USB_HOST_HSOFC_FLENC(data); |
| 7522 | ((Usb *)hw)->HOST.HSOFC.reg = tmp; |
| 7523 | USB_CRITICAL_SECTION_LEAVE(); |
| 7524 | } |
| 7525 | |
| 7526 | static inline void hri_usbhost_clear_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7527 | { |
| 7528 | USB_CRITICAL_SECTION_ENTER(); |
| 7529 | ((Usb *)hw)->HOST.HSOFC.reg &= ~USB_HOST_HSOFC_FLENC(mask); |
| 7530 | USB_CRITICAL_SECTION_LEAVE(); |
| 7531 | } |
| 7532 | |
| 7533 | static inline void hri_usbhost_toggle_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7534 | { |
| 7535 | USB_CRITICAL_SECTION_ENTER(); |
| 7536 | ((Usb *)hw)->HOST.HSOFC.reg ^= USB_HOST_HSOFC_FLENC(mask); |
| 7537 | USB_CRITICAL_SECTION_LEAVE(); |
| 7538 | } |
| 7539 | |
| 7540 | static inline hri_usbhost_hsofc_reg_t hri_usbhost_read_HSOFC_FLENC_bf(const void *const hw) |
| 7541 | { |
| 7542 | uint8_t tmp; |
| 7543 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7544 | tmp = (tmp & USB_HOST_HSOFC_FLENC_Msk) >> USB_HOST_HSOFC_FLENC_Pos; |
| 7545 | return tmp; |
| 7546 | } |
| 7547 | |
| 7548 | static inline void hri_usbhost_set_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7549 | { |
| 7550 | USB_CRITICAL_SECTION_ENTER(); |
| 7551 | ((Usb *)hw)->HOST.HSOFC.reg |= mask; |
| 7552 | USB_CRITICAL_SECTION_LEAVE(); |
| 7553 | } |
| 7554 | |
| 7555 | static inline hri_usbhost_hsofc_reg_t hri_usbhost_get_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7556 | { |
| 7557 | uint8_t tmp; |
| 7558 | tmp = ((Usb *)hw)->HOST.HSOFC.reg; |
| 7559 | tmp &= mask; |
| 7560 | return tmp; |
| 7561 | } |
| 7562 | |
| 7563 | static inline void hri_usbhost_write_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t data) |
| 7564 | { |
| 7565 | USB_CRITICAL_SECTION_ENTER(); |
| 7566 | ((Usb *)hw)->HOST.HSOFC.reg = data; |
| 7567 | USB_CRITICAL_SECTION_LEAVE(); |
| 7568 | } |
| 7569 | |
| 7570 | static inline void hri_usbhost_clear_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7571 | { |
| 7572 | USB_CRITICAL_SECTION_ENTER(); |
| 7573 | ((Usb *)hw)->HOST.HSOFC.reg &= ~mask; |
| 7574 | USB_CRITICAL_SECTION_LEAVE(); |
| 7575 | } |
| 7576 | |
| 7577 | static inline void hri_usbhost_toggle_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask) |
| 7578 | { |
| 7579 | USB_CRITICAL_SECTION_ENTER(); |
| 7580 | ((Usb *)hw)->HOST.HSOFC.reg ^= mask; |
| 7581 | USB_CRITICAL_SECTION_LEAVE(); |
| 7582 | } |
| 7583 | |
| 7584 | static inline hri_usbhost_hsofc_reg_t hri_usbhost_read_HSOFC_reg(const void *const hw) |
| 7585 | { |
| 7586 | return ((Usb *)hw)->HOST.HSOFC.reg; |
| 7587 | } |
| 7588 | |
| 7589 | static inline void hri_usbhost_set_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7590 | { |
| 7591 | USB_CRITICAL_SECTION_ENTER(); |
| 7592 | ((Usb *)hw)->HOST.FNUM.reg |= USB_HOST_FNUM_MFNUM(mask); |
| 7593 | USB_CRITICAL_SECTION_LEAVE(); |
| 7594 | } |
| 7595 | |
| 7596 | static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7597 | { |
| 7598 | uint16_t tmp; |
| 7599 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7600 | tmp = (tmp & USB_HOST_FNUM_MFNUM(mask)) >> USB_HOST_FNUM_MFNUM_Pos; |
| 7601 | return tmp; |
| 7602 | } |
| 7603 | |
| 7604 | static inline void hri_usbhost_write_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t data) |
| 7605 | { |
| 7606 | uint16_t tmp; |
| 7607 | USB_CRITICAL_SECTION_ENTER(); |
| 7608 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7609 | tmp &= ~USB_HOST_FNUM_MFNUM_Msk; |
| 7610 | tmp |= USB_HOST_FNUM_MFNUM(data); |
| 7611 | ((Usb *)hw)->HOST.FNUM.reg = tmp; |
| 7612 | USB_CRITICAL_SECTION_LEAVE(); |
| 7613 | } |
| 7614 | |
| 7615 | static inline void hri_usbhost_clear_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7616 | { |
| 7617 | USB_CRITICAL_SECTION_ENTER(); |
| 7618 | ((Usb *)hw)->HOST.FNUM.reg &= ~USB_HOST_FNUM_MFNUM(mask); |
| 7619 | USB_CRITICAL_SECTION_LEAVE(); |
| 7620 | } |
| 7621 | |
| 7622 | static inline void hri_usbhost_toggle_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7623 | { |
| 7624 | USB_CRITICAL_SECTION_ENTER(); |
| 7625 | ((Usb *)hw)->HOST.FNUM.reg ^= USB_HOST_FNUM_MFNUM(mask); |
| 7626 | USB_CRITICAL_SECTION_LEAVE(); |
| 7627 | } |
| 7628 | |
| 7629 | static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_MFNUM_bf(const void *const hw) |
| 7630 | { |
| 7631 | uint16_t tmp; |
| 7632 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7633 | tmp = (tmp & USB_HOST_FNUM_MFNUM_Msk) >> USB_HOST_FNUM_MFNUM_Pos; |
| 7634 | return tmp; |
| 7635 | } |
| 7636 | |
| 7637 | static inline void hri_usbhost_set_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7638 | { |
| 7639 | USB_CRITICAL_SECTION_ENTER(); |
| 7640 | ((Usb *)hw)->HOST.FNUM.reg |= USB_HOST_FNUM_FNUM(mask); |
| 7641 | USB_CRITICAL_SECTION_LEAVE(); |
| 7642 | } |
| 7643 | |
| 7644 | static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7645 | { |
| 7646 | uint16_t tmp; |
| 7647 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7648 | tmp = (tmp & USB_HOST_FNUM_FNUM(mask)) >> USB_HOST_FNUM_FNUM_Pos; |
| 7649 | return tmp; |
| 7650 | } |
| 7651 | |
| 7652 | static inline void hri_usbhost_write_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t data) |
| 7653 | { |
| 7654 | uint16_t tmp; |
| 7655 | USB_CRITICAL_SECTION_ENTER(); |
| 7656 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7657 | tmp &= ~USB_HOST_FNUM_FNUM_Msk; |
| 7658 | tmp |= USB_HOST_FNUM_FNUM(data); |
| 7659 | ((Usb *)hw)->HOST.FNUM.reg = tmp; |
| 7660 | USB_CRITICAL_SECTION_LEAVE(); |
| 7661 | } |
| 7662 | |
| 7663 | static inline void hri_usbhost_clear_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7664 | { |
| 7665 | USB_CRITICAL_SECTION_ENTER(); |
| 7666 | ((Usb *)hw)->HOST.FNUM.reg &= ~USB_HOST_FNUM_FNUM(mask); |
| 7667 | USB_CRITICAL_SECTION_LEAVE(); |
| 7668 | } |
| 7669 | |
| 7670 | static inline void hri_usbhost_toggle_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7671 | { |
| 7672 | USB_CRITICAL_SECTION_ENTER(); |
| 7673 | ((Usb *)hw)->HOST.FNUM.reg ^= USB_HOST_FNUM_FNUM(mask); |
| 7674 | USB_CRITICAL_SECTION_LEAVE(); |
| 7675 | } |
| 7676 | |
| 7677 | static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_FNUM_bf(const void *const hw) |
| 7678 | { |
| 7679 | uint16_t tmp; |
| 7680 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7681 | tmp = (tmp & USB_HOST_FNUM_FNUM_Msk) >> USB_HOST_FNUM_FNUM_Pos; |
| 7682 | return tmp; |
| 7683 | } |
| 7684 | |
| 7685 | static inline void hri_usbhost_set_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7686 | { |
| 7687 | USB_CRITICAL_SECTION_ENTER(); |
| 7688 | ((Usb *)hw)->HOST.FNUM.reg |= mask; |
| 7689 | USB_CRITICAL_SECTION_LEAVE(); |
| 7690 | } |
| 7691 | |
| 7692 | static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7693 | { |
| 7694 | uint16_t tmp; |
| 7695 | tmp = ((Usb *)hw)->HOST.FNUM.reg; |
| 7696 | tmp &= mask; |
| 7697 | return tmp; |
| 7698 | } |
| 7699 | |
| 7700 | static inline void hri_usbhost_write_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t data) |
| 7701 | { |
| 7702 | USB_CRITICAL_SECTION_ENTER(); |
| 7703 | ((Usb *)hw)->HOST.FNUM.reg = data; |
| 7704 | USB_CRITICAL_SECTION_LEAVE(); |
| 7705 | } |
| 7706 | |
| 7707 | static inline void hri_usbhost_clear_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7708 | { |
| 7709 | USB_CRITICAL_SECTION_ENTER(); |
| 7710 | ((Usb *)hw)->HOST.FNUM.reg &= ~mask; |
| 7711 | USB_CRITICAL_SECTION_LEAVE(); |
| 7712 | } |
| 7713 | |
| 7714 | static inline void hri_usbhost_toggle_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask) |
| 7715 | { |
| 7716 | USB_CRITICAL_SECTION_ENTER(); |
| 7717 | ((Usb *)hw)->HOST.FNUM.reg ^= mask; |
| 7718 | USB_CRITICAL_SECTION_LEAVE(); |
| 7719 | } |
| 7720 | |
| 7721 | static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_reg(const void *const hw) |
| 7722 | { |
| 7723 | return ((Usb *)hw)->HOST.FNUM.reg; |
| 7724 | } |
| 7725 | |
| 7726 | static inline void hri_usb_set_DESCADD_DESCADD_bf(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7727 | { |
| 7728 | USB_CRITICAL_SECTION_ENTER(); |
| 7729 | ((Usb *)hw)->HOST.DESCADD.reg |= USB_DESCADD_DESCADD(mask); |
| 7730 | USB_CRITICAL_SECTION_LEAVE(); |
| 7731 | } |
| 7732 | |
| 7733 | static inline hri_usb_descadd_reg_t hri_usb_get_DESCADD_DESCADD_bf(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7734 | { |
| 7735 | uint32_t tmp; |
| 7736 | tmp = ((Usb *)hw)->HOST.DESCADD.reg; |
| 7737 | tmp = (tmp & USB_DESCADD_DESCADD(mask)) >> USB_DESCADD_DESCADD_Pos; |
| 7738 | return tmp; |
| 7739 | } |
| 7740 | |
| 7741 | static inline void hri_usb_write_DESCADD_DESCADD_bf(const void *const hw, hri_usb_descadd_reg_t data) |
| 7742 | { |
| 7743 | uint32_t tmp; |
| 7744 | USB_CRITICAL_SECTION_ENTER(); |
| 7745 | tmp = ((Usb *)hw)->HOST.DESCADD.reg; |
| 7746 | tmp &= ~USB_DESCADD_DESCADD_Msk; |
| 7747 | tmp |= USB_DESCADD_DESCADD(data); |
| 7748 | ((Usb *)hw)->HOST.DESCADD.reg = tmp; |
| 7749 | USB_CRITICAL_SECTION_LEAVE(); |
| 7750 | } |
| 7751 | |
| 7752 | static inline void hri_usb_clear_DESCADD_DESCADD_bf(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7753 | { |
| 7754 | USB_CRITICAL_SECTION_ENTER(); |
| 7755 | ((Usb *)hw)->HOST.DESCADD.reg &= ~USB_DESCADD_DESCADD(mask); |
| 7756 | USB_CRITICAL_SECTION_LEAVE(); |
| 7757 | } |
| 7758 | |
| 7759 | static inline void hri_usb_toggle_DESCADD_DESCADD_bf(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7760 | { |
| 7761 | USB_CRITICAL_SECTION_ENTER(); |
| 7762 | ((Usb *)hw)->HOST.DESCADD.reg ^= USB_DESCADD_DESCADD(mask); |
| 7763 | USB_CRITICAL_SECTION_LEAVE(); |
| 7764 | } |
| 7765 | |
| 7766 | static inline hri_usb_descadd_reg_t hri_usb_read_DESCADD_DESCADD_bf(const void *const hw) |
| 7767 | { |
| 7768 | uint32_t tmp; |
| 7769 | tmp = ((Usb *)hw)->HOST.DESCADD.reg; |
| 7770 | tmp = (tmp & USB_DESCADD_DESCADD_Msk) >> USB_DESCADD_DESCADD_Pos; |
| 7771 | return tmp; |
| 7772 | } |
| 7773 | |
| 7774 | static inline void hri_usb_set_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7775 | { |
| 7776 | USB_CRITICAL_SECTION_ENTER(); |
| 7777 | ((Usb *)hw)->HOST.DESCADD.reg |= mask; |
| 7778 | USB_CRITICAL_SECTION_LEAVE(); |
| 7779 | } |
| 7780 | |
| 7781 | static inline hri_usb_descadd_reg_t hri_usb_get_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7782 | { |
| 7783 | uint32_t tmp; |
| 7784 | tmp = ((Usb *)hw)->HOST.DESCADD.reg; |
| 7785 | tmp &= mask; |
| 7786 | return tmp; |
| 7787 | } |
| 7788 | |
| 7789 | static inline void hri_usb_write_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t data) |
| 7790 | { |
| 7791 | USB_CRITICAL_SECTION_ENTER(); |
| 7792 | ((Usb *)hw)->HOST.DESCADD.reg = data; |
| 7793 | USB_CRITICAL_SECTION_LEAVE(); |
| 7794 | } |
| 7795 | |
| 7796 | static inline void hri_usb_clear_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7797 | { |
| 7798 | USB_CRITICAL_SECTION_ENTER(); |
| 7799 | ((Usb *)hw)->HOST.DESCADD.reg &= ~mask; |
| 7800 | USB_CRITICAL_SECTION_LEAVE(); |
| 7801 | } |
| 7802 | |
| 7803 | static inline void hri_usb_toggle_DESCADD_reg(const void *const hw, hri_usb_descadd_reg_t mask) |
| 7804 | { |
| 7805 | USB_CRITICAL_SECTION_ENTER(); |
| 7806 | ((Usb *)hw)->HOST.DESCADD.reg ^= mask; |
| 7807 | USB_CRITICAL_SECTION_LEAVE(); |
| 7808 | } |
| 7809 | |
| 7810 | static inline hri_usb_descadd_reg_t hri_usb_read_DESCADD_reg(const void *const hw) |
| 7811 | { |
| 7812 | return ((Usb *)hw)->HOST.DESCADD.reg; |
| 7813 | } |
| 7814 | |
| 7815 | static inline void hri_usb_set_PADCAL_TRANSP_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7816 | { |
| 7817 | USB_CRITICAL_SECTION_ENTER(); |
| 7818 | ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRANSP(mask); |
| 7819 | USB_CRITICAL_SECTION_LEAVE(); |
| 7820 | } |
| 7821 | |
| 7822 | static inline hri_usb_padcal_reg_t hri_usb_get_PADCAL_TRANSP_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7823 | { |
| 7824 | uint16_t tmp; |
| 7825 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7826 | tmp = (tmp & USB_PADCAL_TRANSP(mask)) >> USB_PADCAL_TRANSP_Pos; |
| 7827 | return tmp; |
| 7828 | } |
| 7829 | |
| 7830 | static inline void hri_usb_write_PADCAL_TRANSP_bf(const void *const hw, hri_usb_padcal_reg_t data) |
| 7831 | { |
| 7832 | uint16_t tmp; |
| 7833 | USB_CRITICAL_SECTION_ENTER(); |
| 7834 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7835 | tmp &= ~USB_PADCAL_TRANSP_Msk; |
| 7836 | tmp |= USB_PADCAL_TRANSP(data); |
| 7837 | ((Usb *)hw)->HOST.PADCAL.reg = tmp; |
| 7838 | USB_CRITICAL_SECTION_LEAVE(); |
| 7839 | } |
| 7840 | |
| 7841 | static inline void hri_usb_clear_PADCAL_TRANSP_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7842 | { |
| 7843 | USB_CRITICAL_SECTION_ENTER(); |
| 7844 | ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRANSP(mask); |
| 7845 | USB_CRITICAL_SECTION_LEAVE(); |
| 7846 | } |
| 7847 | |
| 7848 | static inline void hri_usb_toggle_PADCAL_TRANSP_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7849 | { |
| 7850 | USB_CRITICAL_SECTION_ENTER(); |
| 7851 | ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRANSP(mask); |
| 7852 | USB_CRITICAL_SECTION_LEAVE(); |
| 7853 | } |
| 7854 | |
| 7855 | static inline hri_usb_padcal_reg_t hri_usb_read_PADCAL_TRANSP_bf(const void *const hw) |
| 7856 | { |
| 7857 | uint16_t tmp; |
| 7858 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7859 | tmp = (tmp & USB_PADCAL_TRANSP_Msk) >> USB_PADCAL_TRANSP_Pos; |
| 7860 | return tmp; |
| 7861 | } |
| 7862 | |
| 7863 | static inline void hri_usb_set_PADCAL_TRANSN_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7864 | { |
| 7865 | USB_CRITICAL_SECTION_ENTER(); |
| 7866 | ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRANSN(mask); |
| 7867 | USB_CRITICAL_SECTION_LEAVE(); |
| 7868 | } |
| 7869 | |
| 7870 | static inline hri_usb_padcal_reg_t hri_usb_get_PADCAL_TRANSN_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7871 | { |
| 7872 | uint16_t tmp; |
| 7873 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7874 | tmp = (tmp & USB_PADCAL_TRANSN(mask)) >> USB_PADCAL_TRANSN_Pos; |
| 7875 | return tmp; |
| 7876 | } |
| 7877 | |
| 7878 | static inline void hri_usb_write_PADCAL_TRANSN_bf(const void *const hw, hri_usb_padcal_reg_t data) |
| 7879 | { |
| 7880 | uint16_t tmp; |
| 7881 | USB_CRITICAL_SECTION_ENTER(); |
| 7882 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7883 | tmp &= ~USB_PADCAL_TRANSN_Msk; |
| 7884 | tmp |= USB_PADCAL_TRANSN(data); |
| 7885 | ((Usb *)hw)->HOST.PADCAL.reg = tmp; |
| 7886 | USB_CRITICAL_SECTION_LEAVE(); |
| 7887 | } |
| 7888 | |
| 7889 | static inline void hri_usb_clear_PADCAL_TRANSN_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7890 | { |
| 7891 | USB_CRITICAL_SECTION_ENTER(); |
| 7892 | ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRANSN(mask); |
| 7893 | USB_CRITICAL_SECTION_LEAVE(); |
| 7894 | } |
| 7895 | |
| 7896 | static inline void hri_usb_toggle_PADCAL_TRANSN_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7897 | { |
| 7898 | USB_CRITICAL_SECTION_ENTER(); |
| 7899 | ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRANSN(mask); |
| 7900 | USB_CRITICAL_SECTION_LEAVE(); |
| 7901 | } |
| 7902 | |
| 7903 | static inline hri_usb_padcal_reg_t hri_usb_read_PADCAL_TRANSN_bf(const void *const hw) |
| 7904 | { |
| 7905 | uint16_t tmp; |
| 7906 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7907 | tmp = (tmp & USB_PADCAL_TRANSN_Msk) >> USB_PADCAL_TRANSN_Pos; |
| 7908 | return tmp; |
| 7909 | } |
| 7910 | |
| 7911 | static inline void hri_usb_set_PADCAL_TRIM_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7912 | { |
| 7913 | USB_CRITICAL_SECTION_ENTER(); |
| 7914 | ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRIM(mask); |
| 7915 | USB_CRITICAL_SECTION_LEAVE(); |
| 7916 | } |
| 7917 | |
| 7918 | static inline hri_usb_padcal_reg_t hri_usb_get_PADCAL_TRIM_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7919 | { |
| 7920 | uint16_t tmp; |
| 7921 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7922 | tmp = (tmp & USB_PADCAL_TRIM(mask)) >> USB_PADCAL_TRIM_Pos; |
| 7923 | return tmp; |
| 7924 | } |
| 7925 | |
| 7926 | static inline void hri_usb_write_PADCAL_TRIM_bf(const void *const hw, hri_usb_padcal_reg_t data) |
| 7927 | { |
| 7928 | uint16_t tmp; |
| 7929 | USB_CRITICAL_SECTION_ENTER(); |
| 7930 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7931 | tmp &= ~USB_PADCAL_TRIM_Msk; |
| 7932 | tmp |= USB_PADCAL_TRIM(data); |
| 7933 | ((Usb *)hw)->HOST.PADCAL.reg = tmp; |
| 7934 | USB_CRITICAL_SECTION_LEAVE(); |
| 7935 | } |
| 7936 | |
| 7937 | static inline void hri_usb_clear_PADCAL_TRIM_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7938 | { |
| 7939 | USB_CRITICAL_SECTION_ENTER(); |
| 7940 | ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRIM(mask); |
| 7941 | USB_CRITICAL_SECTION_LEAVE(); |
| 7942 | } |
| 7943 | |
| 7944 | static inline void hri_usb_toggle_PADCAL_TRIM_bf(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7945 | { |
| 7946 | USB_CRITICAL_SECTION_ENTER(); |
| 7947 | ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRIM(mask); |
| 7948 | USB_CRITICAL_SECTION_LEAVE(); |
| 7949 | } |
| 7950 | |
| 7951 | static inline hri_usb_padcal_reg_t hri_usb_read_PADCAL_TRIM_bf(const void *const hw) |
| 7952 | { |
| 7953 | uint16_t tmp; |
| 7954 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7955 | tmp = (tmp & USB_PADCAL_TRIM_Msk) >> USB_PADCAL_TRIM_Pos; |
| 7956 | return tmp; |
| 7957 | } |
| 7958 | |
| 7959 | static inline void hri_usb_set_PADCAL_reg(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7960 | { |
| 7961 | USB_CRITICAL_SECTION_ENTER(); |
| 7962 | ((Usb *)hw)->HOST.PADCAL.reg |= mask; |
| 7963 | USB_CRITICAL_SECTION_LEAVE(); |
| 7964 | } |
| 7965 | |
| 7966 | static inline hri_usb_padcal_reg_t hri_usb_get_PADCAL_reg(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7967 | { |
| 7968 | uint16_t tmp; |
| 7969 | tmp = ((Usb *)hw)->HOST.PADCAL.reg; |
| 7970 | tmp &= mask; |
| 7971 | return tmp; |
| 7972 | } |
| 7973 | |
| 7974 | static inline void hri_usb_write_PADCAL_reg(const void *const hw, hri_usb_padcal_reg_t data) |
| 7975 | { |
| 7976 | USB_CRITICAL_SECTION_ENTER(); |
| 7977 | ((Usb *)hw)->HOST.PADCAL.reg = data; |
| 7978 | USB_CRITICAL_SECTION_LEAVE(); |
| 7979 | } |
| 7980 | |
| 7981 | static inline void hri_usb_clear_PADCAL_reg(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7982 | { |
| 7983 | USB_CRITICAL_SECTION_ENTER(); |
| 7984 | ((Usb *)hw)->HOST.PADCAL.reg &= ~mask; |
| 7985 | USB_CRITICAL_SECTION_LEAVE(); |
| 7986 | } |
| 7987 | |
| 7988 | static inline void hri_usb_toggle_PADCAL_reg(const void *const hw, hri_usb_padcal_reg_t mask) |
| 7989 | { |
| 7990 | USB_CRITICAL_SECTION_ENTER(); |
| 7991 | ((Usb *)hw)->HOST.PADCAL.reg ^= mask; |
| 7992 | USB_CRITICAL_SECTION_LEAVE(); |
| 7993 | } |
| 7994 | |
| 7995 | static inline hri_usb_padcal_reg_t hri_usb_read_PADCAL_reg(const void *const hw) |
| 7996 | { |
| 7997 | return ((Usb *)hw)->HOST.PADCAL.reg; |
| 7998 | } |
| 7999 | |
| 8000 | static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_SPEED_bf(const void *const hw, |
| 8001 | hri_usbhost_status_reg_t mask) |
| 8002 | { |
| 8003 | return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_SPEED(mask)) >> USB_HOST_STATUS_SPEED_Pos; |
| 8004 | } |
| 8005 | |
| 8006 | static inline void hri_usbhost_clear_STATUS_SPEED_bf(const void *const hw, hri_usbhost_status_reg_t mask) |
| 8007 | { |
| 8008 | USB_CRITICAL_SECTION_ENTER(); |
| 8009 | ((Usb *)hw)->HOST.STATUS.reg = USB_HOST_STATUS_SPEED(mask); |
| 8010 | USB_CRITICAL_SECTION_LEAVE(); |
| 8011 | } |
| 8012 | |
| 8013 | static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_SPEED_bf(const void *const hw) |
| 8014 | { |
| 8015 | return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_SPEED_Msk) >> USB_HOST_STATUS_SPEED_Pos; |
| 8016 | } |
| 8017 | |
| 8018 | static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_LINESTATE_bf(const void *const hw, |
| 8019 | hri_usbhost_status_reg_t mask) |
| 8020 | { |
| 8021 | return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_LINESTATE(mask)) >> USB_HOST_STATUS_LINESTATE_Pos; |
| 8022 | } |
| 8023 | |
| 8024 | static inline void hri_usbhost_clear_STATUS_LINESTATE_bf(const void *const hw, hri_usbhost_status_reg_t mask) |
| 8025 | { |
| 8026 | USB_CRITICAL_SECTION_ENTER(); |
| 8027 | ((Usb *)hw)->HOST.STATUS.reg = USB_HOST_STATUS_LINESTATE(mask); |
| 8028 | USB_CRITICAL_SECTION_LEAVE(); |
| 8029 | } |
| 8030 | |
| 8031 | static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_LINESTATE_bf(const void *const hw) |
| 8032 | { |
| 8033 | return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_LINESTATE_Msk) >> USB_HOST_STATUS_LINESTATE_Pos; |
| 8034 | } |
| 8035 | |
| 8036 | static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_reg(const void *const hw, hri_usbhost_status_reg_t mask) |
| 8037 | { |
| 8038 | uint8_t tmp; |
| 8039 | tmp = ((Usb *)hw)->HOST.STATUS.reg; |
| 8040 | tmp &= mask; |
| 8041 | return tmp; |
| 8042 | } |
| 8043 | |
| 8044 | static inline void hri_usbhost_clear_STATUS_reg(const void *const hw, hri_usbhost_status_reg_t mask) |
| 8045 | { |
| 8046 | USB_CRITICAL_SECTION_ENTER(); |
| 8047 | ((Usb *)hw)->HOST.STATUS.reg = mask; |
| 8048 | USB_CRITICAL_SECTION_LEAVE(); |
| 8049 | } |
| 8050 | |
| 8051 | static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_reg(const void *const hw) |
| 8052 | { |
| 8053 | return ((Usb *)hw)->HOST.STATUS.reg; |
| 8054 | } |
| 8055 | |
| 8056 | static inline void hri_usbdevicedescbank_set_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8057 | { |
| 8058 | USB_CRITICAL_SECTION_ENTER(); |
| 8059 | ((UsbDeviceDescBank *)hw)->ADDR.reg |= USB_DEVICE_ADDR_ADDR(mask); |
| 8060 | USB_CRITICAL_SECTION_LEAVE(); |
| 8061 | } |
| 8062 | |
| 8063 | static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_get_ADDR_ADDR_bf(const void *const hw, |
| 8064 | hri_usbdesc_bank_addr_reg_t mask) |
| 8065 | { |
| 8066 | uint32_t tmp; |
| 8067 | tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg; |
| 8068 | tmp = (tmp & USB_DEVICE_ADDR_ADDR(mask)) >> USB_DEVICE_ADDR_ADDR_Pos; |
| 8069 | return tmp; |
| 8070 | } |
| 8071 | |
| 8072 | static inline void hri_usbdevicedescbank_write_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t data) |
| 8073 | { |
| 8074 | uint32_t tmp; |
| 8075 | USB_CRITICAL_SECTION_ENTER(); |
| 8076 | tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg; |
| 8077 | tmp &= ~USB_DEVICE_ADDR_ADDR_Msk; |
| 8078 | tmp |= USB_DEVICE_ADDR_ADDR(data); |
| 8079 | ((UsbDeviceDescBank *)hw)->ADDR.reg = tmp; |
| 8080 | USB_CRITICAL_SECTION_LEAVE(); |
| 8081 | } |
| 8082 | |
| 8083 | static inline void hri_usbdevicedescbank_clear_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8084 | { |
| 8085 | USB_CRITICAL_SECTION_ENTER(); |
| 8086 | ((UsbDeviceDescBank *)hw)->ADDR.reg &= ~USB_DEVICE_ADDR_ADDR(mask); |
| 8087 | USB_CRITICAL_SECTION_LEAVE(); |
| 8088 | } |
| 8089 | |
| 8090 | static inline void hri_usbdevicedescbank_toggle_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8091 | { |
| 8092 | USB_CRITICAL_SECTION_ENTER(); |
| 8093 | ((UsbDeviceDescBank *)hw)->ADDR.reg ^= USB_DEVICE_ADDR_ADDR(mask); |
| 8094 | USB_CRITICAL_SECTION_LEAVE(); |
| 8095 | } |
| 8096 | |
| 8097 | static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_read_ADDR_ADDR_bf(const void *const hw) |
| 8098 | { |
| 8099 | uint32_t tmp; |
| 8100 | tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg; |
| 8101 | tmp = (tmp & USB_DEVICE_ADDR_ADDR_Msk) >> USB_DEVICE_ADDR_ADDR_Pos; |
| 8102 | return tmp; |
| 8103 | } |
| 8104 | |
| 8105 | static inline void hri_usbdevicedescbank_set_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8106 | { |
| 8107 | USB_CRITICAL_SECTION_ENTER(); |
| 8108 | ((UsbDeviceDescBank *)hw)->ADDR.reg |= mask; |
| 8109 | USB_CRITICAL_SECTION_LEAVE(); |
| 8110 | } |
| 8111 | |
| 8112 | static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_get_ADDR_reg(const void *const hw, |
| 8113 | hri_usbdesc_bank_addr_reg_t mask) |
| 8114 | { |
| 8115 | uint32_t tmp; |
| 8116 | tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg; |
| 8117 | tmp &= mask; |
| 8118 | return tmp; |
| 8119 | } |
| 8120 | |
| 8121 | static inline void hri_usbdevicedescbank_write_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t data) |
| 8122 | { |
| 8123 | USB_CRITICAL_SECTION_ENTER(); |
| 8124 | ((UsbDeviceDescBank *)hw)->ADDR.reg = data; |
| 8125 | USB_CRITICAL_SECTION_LEAVE(); |
| 8126 | } |
| 8127 | |
| 8128 | static inline void hri_usbdevicedescbank_clear_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8129 | { |
| 8130 | USB_CRITICAL_SECTION_ENTER(); |
| 8131 | ((UsbDeviceDescBank *)hw)->ADDR.reg &= ~mask; |
| 8132 | USB_CRITICAL_SECTION_LEAVE(); |
| 8133 | } |
| 8134 | |
| 8135 | static inline void hri_usbdevicedescbank_toggle_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask) |
| 8136 | { |
| 8137 | USB_CRITICAL_SECTION_ENTER(); |
| 8138 | ((UsbDeviceDescBank *)hw)->ADDR.reg ^= mask; |
| 8139 | USB_CRITICAL_SECTION_LEAVE(); |
| 8140 | } |
| 8141 | |
| 8142 | static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_read_ADDR_reg(const void *const hw) |
| 8143 | { |
| 8144 | return ((UsbDeviceDescBank *)hw)->ADDR.reg; |
| 8145 | } |
| 8146 | |
| 8147 | static inline void hri_usbdevicedescbank_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 8148 | { |
| 8149 | USB_CRITICAL_SECTION_ENTER(); |
| 8150 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8151 | USB_CRITICAL_SECTION_LEAVE(); |
| 8152 | } |
| 8153 | |
| 8154 | static inline bool hri_usbdevicedescbank_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 8155 | { |
| 8156 | uint32_t tmp; |
| 8157 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8158 | tmp = (tmp & USB_DEVICE_PCKSIZE_AUTO_ZLP) >> USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos; |
| 8159 | return (bool)tmp; |
| 8160 | } |
| 8161 | |
| 8162 | static inline void hri_usbdevicedescbank_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, bool value) |
| 8163 | { |
| 8164 | uint32_t tmp; |
| 8165 | USB_CRITICAL_SECTION_ENTER(); |
| 8166 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8167 | tmp &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8168 | tmp |= value << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos; |
| 8169 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp; |
| 8170 | USB_CRITICAL_SECTION_LEAVE(); |
| 8171 | } |
| 8172 | |
| 8173 | static inline void hri_usbdevicedescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 8174 | { |
| 8175 | USB_CRITICAL_SECTION_ENTER(); |
| 8176 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8177 | USB_CRITICAL_SECTION_LEAVE(); |
| 8178 | } |
| 8179 | |
| 8180 | static inline void hri_usbdevicedescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw) |
| 8181 | { |
| 8182 | USB_CRITICAL_SECTION_ENTER(); |
| 8183 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8184 | USB_CRITICAL_SECTION_LEAVE(); |
| 8185 | } |
| 8186 | |
| 8187 | static inline void hri_usbdevicedescbank_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 8188 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8189 | { |
| 8190 | USB_CRITICAL_SECTION_ENTER(); |
| 8191 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8192 | USB_CRITICAL_SECTION_LEAVE(); |
| 8193 | } |
| 8194 | |
| 8195 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 8196 | hri_usbdevicedescbank_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8197 | { |
| 8198 | uint32_t tmp; |
| 8199 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8200 | tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT(mask)) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos; |
| 8201 | return tmp; |
| 8202 | } |
| 8203 | |
| 8204 | static inline void hri_usbdevicedescbank_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 8205 | hri_usbdesc_bank_pcksize_reg_t data) |
| 8206 | { |
| 8207 | uint32_t tmp; |
| 8208 | USB_CRITICAL_SECTION_ENTER(); |
| 8209 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8210 | tmp &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk; |
| 8211 | tmp |= USB_DEVICE_PCKSIZE_BYTE_COUNT(data); |
| 8212 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp; |
| 8213 | USB_CRITICAL_SECTION_LEAVE(); |
| 8214 | } |
| 8215 | |
| 8216 | static inline void hri_usbdevicedescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 8217 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8218 | { |
| 8219 | USB_CRITICAL_SECTION_ENTER(); |
| 8220 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8221 | USB_CRITICAL_SECTION_LEAVE(); |
| 8222 | } |
| 8223 | |
| 8224 | static inline void hri_usbdevicedescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, |
| 8225 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8226 | { |
| 8227 | USB_CRITICAL_SECTION_ENTER(); |
| 8228 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8229 | USB_CRITICAL_SECTION_LEAVE(); |
| 8230 | } |
| 8231 | |
| 8232 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw) |
| 8233 | { |
| 8234 | uint32_t tmp; |
| 8235 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8236 | tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos; |
| 8237 | return tmp; |
| 8238 | } |
| 8239 | |
| 8240 | static inline void hri_usbdevicedescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 8241 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8242 | { |
| 8243 | USB_CRITICAL_SECTION_ENTER(); |
| 8244 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8245 | USB_CRITICAL_SECTION_LEAVE(); |
| 8246 | } |
| 8247 | |
| 8248 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 8249 | hri_usbdevicedescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8250 | { |
| 8251 | uint32_t tmp; |
| 8252 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8253 | tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 8254 | return tmp; |
| 8255 | } |
| 8256 | |
| 8257 | static inline void hri_usbdevicedescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 8258 | hri_usbdesc_bank_pcksize_reg_t data) |
| 8259 | { |
| 8260 | uint32_t tmp; |
| 8261 | USB_CRITICAL_SECTION_ENTER(); |
| 8262 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8263 | tmp &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk; |
| 8264 | tmp |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(data); |
| 8265 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp; |
| 8266 | USB_CRITICAL_SECTION_LEAVE(); |
| 8267 | } |
| 8268 | |
| 8269 | static inline void hri_usbdevicedescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 8270 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8271 | { |
| 8272 | USB_CRITICAL_SECTION_ENTER(); |
| 8273 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8274 | USB_CRITICAL_SECTION_LEAVE(); |
| 8275 | } |
| 8276 | |
| 8277 | static inline void hri_usbdevicedescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 8278 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8279 | { |
| 8280 | USB_CRITICAL_SECTION_ENTER(); |
| 8281 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8282 | USB_CRITICAL_SECTION_LEAVE(); |
| 8283 | } |
| 8284 | |
| 8285 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 8286 | hri_usbdevicedescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw) |
| 8287 | { |
| 8288 | uint32_t tmp; |
| 8289 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8290 | tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 8291 | return tmp; |
| 8292 | } |
| 8293 | |
| 8294 | static inline void hri_usbdevicedescbank_set_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8295 | { |
| 8296 | USB_CRITICAL_SECTION_ENTER(); |
| 8297 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8298 | USB_CRITICAL_SECTION_LEAVE(); |
| 8299 | } |
| 8300 | |
| 8301 | static inline hri_usbdesc_bank_pcksize_reg_t |
| 8302 | hri_usbdevicedescbank_get_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8303 | { |
| 8304 | uint32_t tmp; |
| 8305 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8306 | tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE(mask)) >> USB_DEVICE_PCKSIZE_SIZE_Pos; |
| 8307 | return tmp; |
| 8308 | } |
| 8309 | |
| 8310 | static inline void hri_usbdevicedescbank_write_PCKSIZE_SIZE_bf(const void *const hw, |
| 8311 | hri_usbdesc_bank_pcksize_reg_t data) |
| 8312 | { |
| 8313 | uint32_t tmp; |
| 8314 | USB_CRITICAL_SECTION_ENTER(); |
| 8315 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8316 | tmp &= ~USB_DEVICE_PCKSIZE_SIZE_Msk; |
| 8317 | tmp |= USB_DEVICE_PCKSIZE_SIZE(data); |
| 8318 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp; |
| 8319 | USB_CRITICAL_SECTION_LEAVE(); |
| 8320 | } |
| 8321 | |
| 8322 | static inline void hri_usbdevicedescbank_clear_PCKSIZE_SIZE_bf(const void *const hw, |
| 8323 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8324 | { |
| 8325 | USB_CRITICAL_SECTION_ENTER(); |
| 8326 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8327 | USB_CRITICAL_SECTION_LEAVE(); |
| 8328 | } |
| 8329 | |
| 8330 | static inline void hri_usbdevicedescbank_toggle_PCKSIZE_SIZE_bf(const void *const hw, |
| 8331 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8332 | { |
| 8333 | USB_CRITICAL_SECTION_ENTER(); |
| 8334 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8335 | USB_CRITICAL_SECTION_LEAVE(); |
| 8336 | } |
| 8337 | |
| 8338 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_SIZE_bf(const void *const hw) |
| 8339 | { |
| 8340 | uint32_t tmp; |
| 8341 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8342 | tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE_Msk) >> USB_DEVICE_PCKSIZE_SIZE_Pos; |
| 8343 | return tmp; |
| 8344 | } |
| 8345 | |
| 8346 | static inline void hri_usbdevicedescbank_set_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8347 | { |
| 8348 | USB_CRITICAL_SECTION_ENTER(); |
| 8349 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= mask; |
| 8350 | USB_CRITICAL_SECTION_LEAVE(); |
| 8351 | } |
| 8352 | |
| 8353 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_get_PCKSIZE_reg(const void *const hw, |
| 8354 | hri_usbdesc_bank_pcksize_reg_t mask) |
| 8355 | { |
| 8356 | uint32_t tmp; |
| 8357 | tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8358 | tmp &= mask; |
| 8359 | return tmp; |
| 8360 | } |
| 8361 | |
| 8362 | static inline void hri_usbdevicedescbank_write_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data) |
| 8363 | { |
| 8364 | USB_CRITICAL_SECTION_ENTER(); |
| 8365 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = data; |
| 8366 | USB_CRITICAL_SECTION_LEAVE(); |
| 8367 | } |
| 8368 | |
| 8369 | static inline void hri_usbdevicedescbank_clear_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8370 | { |
| 8371 | USB_CRITICAL_SECTION_ENTER(); |
| 8372 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~mask; |
| 8373 | USB_CRITICAL_SECTION_LEAVE(); |
| 8374 | } |
| 8375 | |
| 8376 | static inline void hri_usbdevicedescbank_toggle_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask) |
| 8377 | { |
| 8378 | USB_CRITICAL_SECTION_ENTER(); |
| 8379 | ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= mask; |
| 8380 | USB_CRITICAL_SECTION_LEAVE(); |
| 8381 | } |
| 8382 | |
| 8383 | static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_reg(const void *const hw) |
| 8384 | { |
| 8385 | return ((UsbDeviceDescBank *)hw)->PCKSIZE.reg; |
| 8386 | } |
| 8387 | |
| 8388 | static inline void hri_usbdevicedescbank_set_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8389 | { |
| 8390 | USB_CRITICAL_SECTION_ENTER(); |
| 8391 | ((UsbDeviceDescBank *)hw)->EXTREG.reg |= USB_DEVICE_EXTREG_SUBPID(mask); |
| 8392 | USB_CRITICAL_SECTION_LEAVE(); |
| 8393 | } |
| 8394 | |
| 8395 | static inline hri_usbdesc_bank_extreg_reg_t |
| 8396 | hri_usbdevicedescbank_get_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8397 | { |
| 8398 | uint16_t tmp; |
| 8399 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8400 | tmp = (tmp & USB_DEVICE_EXTREG_SUBPID(mask)) >> USB_DEVICE_EXTREG_SUBPID_Pos; |
| 8401 | return tmp; |
| 8402 | } |
| 8403 | |
| 8404 | static inline void hri_usbdevicedescbank_write_EXTREG_SUBPID_bf(const void *const hw, |
| 8405 | hri_usbdesc_bank_extreg_reg_t data) |
| 8406 | { |
| 8407 | uint16_t tmp; |
| 8408 | USB_CRITICAL_SECTION_ENTER(); |
| 8409 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8410 | tmp &= ~USB_DEVICE_EXTREG_SUBPID_Msk; |
| 8411 | tmp |= USB_DEVICE_EXTREG_SUBPID(data); |
| 8412 | ((UsbDeviceDescBank *)hw)->EXTREG.reg = tmp; |
| 8413 | USB_CRITICAL_SECTION_LEAVE(); |
| 8414 | } |
| 8415 | |
| 8416 | static inline void hri_usbdevicedescbank_clear_EXTREG_SUBPID_bf(const void *const hw, |
| 8417 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8418 | { |
| 8419 | USB_CRITICAL_SECTION_ENTER(); |
| 8420 | ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~USB_DEVICE_EXTREG_SUBPID(mask); |
| 8421 | USB_CRITICAL_SECTION_LEAVE(); |
| 8422 | } |
| 8423 | |
| 8424 | static inline void hri_usbdevicedescbank_toggle_EXTREG_SUBPID_bf(const void *const hw, |
| 8425 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8426 | { |
| 8427 | USB_CRITICAL_SECTION_ENTER(); |
| 8428 | ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= USB_DEVICE_EXTREG_SUBPID(mask); |
| 8429 | USB_CRITICAL_SECTION_LEAVE(); |
| 8430 | } |
| 8431 | |
| 8432 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_SUBPID_bf(const void *const hw) |
| 8433 | { |
| 8434 | uint16_t tmp; |
| 8435 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8436 | tmp = (tmp & USB_DEVICE_EXTREG_SUBPID_Msk) >> USB_DEVICE_EXTREG_SUBPID_Pos; |
| 8437 | return tmp; |
| 8438 | } |
| 8439 | |
| 8440 | static inline void hri_usbdevicedescbank_set_EXTREG_VARIABLE_bf(const void *const hw, |
| 8441 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8442 | { |
| 8443 | USB_CRITICAL_SECTION_ENTER(); |
| 8444 | ((UsbDeviceDescBank *)hw)->EXTREG.reg |= USB_DEVICE_EXTREG_VARIABLE(mask); |
| 8445 | USB_CRITICAL_SECTION_LEAVE(); |
| 8446 | } |
| 8447 | |
| 8448 | static inline hri_usbdesc_bank_extreg_reg_t |
| 8449 | hri_usbdevicedescbank_get_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8450 | { |
| 8451 | uint16_t tmp; |
| 8452 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8453 | tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE(mask)) >> USB_DEVICE_EXTREG_VARIABLE_Pos; |
| 8454 | return tmp; |
| 8455 | } |
| 8456 | |
| 8457 | static inline void hri_usbdevicedescbank_write_EXTREG_VARIABLE_bf(const void *const hw, |
| 8458 | hri_usbdesc_bank_extreg_reg_t data) |
| 8459 | { |
| 8460 | uint16_t tmp; |
| 8461 | USB_CRITICAL_SECTION_ENTER(); |
| 8462 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8463 | tmp &= ~USB_DEVICE_EXTREG_VARIABLE_Msk; |
| 8464 | tmp |= USB_DEVICE_EXTREG_VARIABLE(data); |
| 8465 | ((UsbDeviceDescBank *)hw)->EXTREG.reg = tmp; |
| 8466 | USB_CRITICAL_SECTION_LEAVE(); |
| 8467 | } |
| 8468 | |
| 8469 | static inline void hri_usbdevicedescbank_clear_EXTREG_VARIABLE_bf(const void *const hw, |
| 8470 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8471 | { |
| 8472 | USB_CRITICAL_SECTION_ENTER(); |
| 8473 | ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~USB_DEVICE_EXTREG_VARIABLE(mask); |
| 8474 | USB_CRITICAL_SECTION_LEAVE(); |
| 8475 | } |
| 8476 | |
| 8477 | static inline void hri_usbdevicedescbank_toggle_EXTREG_VARIABLE_bf(const void *const hw, |
| 8478 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8479 | { |
| 8480 | USB_CRITICAL_SECTION_ENTER(); |
| 8481 | ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= USB_DEVICE_EXTREG_VARIABLE(mask); |
| 8482 | USB_CRITICAL_SECTION_LEAVE(); |
| 8483 | } |
| 8484 | |
| 8485 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_VARIABLE_bf(const void *const hw) |
| 8486 | { |
| 8487 | uint16_t tmp; |
| 8488 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8489 | tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE_Msk) >> USB_DEVICE_EXTREG_VARIABLE_Pos; |
| 8490 | return tmp; |
| 8491 | } |
| 8492 | |
| 8493 | static inline void hri_usbdevicedescbank_set_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8494 | { |
| 8495 | USB_CRITICAL_SECTION_ENTER(); |
| 8496 | ((UsbDeviceDescBank *)hw)->EXTREG.reg |= mask; |
| 8497 | USB_CRITICAL_SECTION_LEAVE(); |
| 8498 | } |
| 8499 | |
| 8500 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_get_EXTREG_reg(const void *const hw, |
| 8501 | hri_usbdesc_bank_extreg_reg_t mask) |
| 8502 | { |
| 8503 | uint16_t tmp; |
| 8504 | tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8505 | tmp &= mask; |
| 8506 | return tmp; |
| 8507 | } |
| 8508 | |
| 8509 | static inline void hri_usbdevicedescbank_write_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t data) |
| 8510 | { |
| 8511 | USB_CRITICAL_SECTION_ENTER(); |
| 8512 | ((UsbDeviceDescBank *)hw)->EXTREG.reg = data; |
| 8513 | USB_CRITICAL_SECTION_LEAVE(); |
| 8514 | } |
| 8515 | |
| 8516 | static inline void hri_usbdevicedescbank_clear_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8517 | { |
| 8518 | USB_CRITICAL_SECTION_ENTER(); |
| 8519 | ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~mask; |
| 8520 | USB_CRITICAL_SECTION_LEAVE(); |
| 8521 | } |
| 8522 | |
| 8523 | static inline void hri_usbdevicedescbank_toggle_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask) |
| 8524 | { |
| 8525 | USB_CRITICAL_SECTION_ENTER(); |
| 8526 | ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= mask; |
| 8527 | USB_CRITICAL_SECTION_LEAVE(); |
| 8528 | } |
| 8529 | |
| 8530 | static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_reg(const void *const hw) |
| 8531 | { |
| 8532 | return ((UsbDeviceDescBank *)hw)->EXTREG.reg; |
| 8533 | } |
| 8534 | |
| 8535 | static inline bool hri_usbdevicedescbank_get_STATUS_BK_CRCERR_bit(const void *const hw) |
| 8536 | { |
| 8537 | return (((UsbDeviceDescBank *)hw)->STATUS_BK.reg & USB_DEVICE_STATUS_BK_CRCERR) >> USB_DEVICE_STATUS_BK_CRCERR_Pos; |
| 8538 | } |
| 8539 | |
| 8540 | static inline void hri_usbdevicedescbank_clear_STATUS_BK_CRCERR_bit(const void *const hw) |
| 8541 | { |
| 8542 | USB_CRITICAL_SECTION_ENTER(); |
| 8543 | ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = USB_DEVICE_STATUS_BK_CRCERR; |
| 8544 | USB_CRITICAL_SECTION_LEAVE(); |
| 8545 | } |
| 8546 | |
| 8547 | static inline bool hri_usbdevicedescbank_get_STATUS_BK_ERRORFLOW_bit(const void *const hw) |
| 8548 | { |
| 8549 | return (((UsbDeviceDescBank *)hw)->STATUS_BK.reg & USB_DEVICE_STATUS_BK_ERRORFLOW) |
| 8550 | >> USB_DEVICE_STATUS_BK_ERRORFLOW_Pos; |
| 8551 | } |
| 8552 | |
| 8553 | static inline void hri_usbdevicedescbank_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw) |
| 8554 | { |
| 8555 | USB_CRITICAL_SECTION_ENTER(); |
| 8556 | ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = USB_DEVICE_STATUS_BK_ERRORFLOW; |
| 8557 | USB_CRITICAL_SECTION_LEAVE(); |
| 8558 | } |
| 8559 | |
| 8560 | static inline hri_usbdesc_bank_status_bk_reg_t |
| 8561 | hri_usbdevicedescbank_get_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask) |
| 8562 | { |
| 8563 | uint8_t tmp; |
| 8564 | tmp = ((UsbDeviceDescBank *)hw)->STATUS_BK.reg; |
| 8565 | tmp &= mask; |
| 8566 | return tmp; |
| 8567 | } |
| 8568 | |
| 8569 | static inline void hri_usbdevicedescbank_clear_STATUS_BK_reg(const void *const hw, |
| 8570 | hri_usbdesc_bank_status_bk_reg_t mask) |
| 8571 | { |
| 8572 | USB_CRITICAL_SECTION_ENTER(); |
| 8573 | ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = mask; |
| 8574 | USB_CRITICAL_SECTION_LEAVE(); |
| 8575 | } |
| 8576 | |
| 8577 | static inline hri_usbdesc_bank_status_bk_reg_t hri_usbdevicedescbank_read_STATUS_BK_reg(const void *const hw) |
| 8578 | { |
| 8579 | return ((UsbDeviceDescBank *)hw)->STATUS_BK.reg; |
| 8580 | } |
| 8581 | |
| 8582 | static inline void hri_usbdevicedescriptor_set_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 8583 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8584 | { |
| 8585 | USB_CRITICAL_SECTION_ENTER(); |
| 8586 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg |= USB_DEVICE_ADDR_ADDR(mask); |
| 8587 | USB_CRITICAL_SECTION_LEAVE(); |
| 8588 | } |
| 8589 | |
| 8590 | static inline hri_usbdescriptordevice_addr_reg_t |
| 8591 | hri_usbdevicedescriptor_get_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 8592 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8593 | { |
| 8594 | uint32_t tmp; |
| 8595 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg; |
| 8596 | tmp = (tmp & USB_DEVICE_ADDR_ADDR(mask)) >> USB_DEVICE_ADDR_ADDR_Pos; |
| 8597 | return tmp; |
| 8598 | } |
| 8599 | |
| 8600 | static inline void hri_usbdevicedescriptor_write_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 8601 | hri_usbdescriptordevice_addr_reg_t data) |
| 8602 | { |
| 8603 | uint32_t tmp; |
| 8604 | USB_CRITICAL_SECTION_ENTER(); |
| 8605 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg; |
| 8606 | tmp &= ~USB_DEVICE_ADDR_ADDR_Msk; |
| 8607 | tmp |= USB_DEVICE_ADDR_ADDR(data); |
| 8608 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg = tmp; |
| 8609 | USB_CRITICAL_SECTION_LEAVE(); |
| 8610 | } |
| 8611 | |
| 8612 | static inline void hri_usbdevicedescriptor_clear_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 8613 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8614 | { |
| 8615 | USB_CRITICAL_SECTION_ENTER(); |
| 8616 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg &= ~USB_DEVICE_ADDR_ADDR(mask); |
| 8617 | USB_CRITICAL_SECTION_LEAVE(); |
| 8618 | } |
| 8619 | |
| 8620 | static inline void hri_usbdevicedescriptor_toggle_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index, |
| 8621 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8622 | { |
| 8623 | USB_CRITICAL_SECTION_ENTER(); |
| 8624 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg ^= USB_DEVICE_ADDR_ADDR(mask); |
| 8625 | USB_CRITICAL_SECTION_LEAVE(); |
| 8626 | } |
| 8627 | |
| 8628 | static inline hri_usbdescriptordevice_addr_reg_t hri_usbdevicedescriptor_read_ADDR_ADDR_bf(const void *const hw, |
| 8629 | uint8_t submodule_index) |
| 8630 | { |
| 8631 | uint32_t tmp; |
| 8632 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg; |
| 8633 | tmp = (tmp & USB_DEVICE_ADDR_ADDR_Msk) >> USB_DEVICE_ADDR_ADDR_Pos; |
| 8634 | return tmp; |
| 8635 | } |
| 8636 | |
| 8637 | static inline void hri_usbdevicedescriptor_set_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 8638 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8639 | { |
| 8640 | USB_CRITICAL_SECTION_ENTER(); |
| 8641 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg |= mask; |
| 8642 | USB_CRITICAL_SECTION_LEAVE(); |
| 8643 | } |
| 8644 | |
| 8645 | static inline hri_usbdescriptordevice_addr_reg_t |
| 8646 | hri_usbdevicedescriptor_get_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 8647 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8648 | { |
| 8649 | uint32_t tmp; |
| 8650 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg; |
| 8651 | tmp &= mask; |
| 8652 | return tmp; |
| 8653 | } |
| 8654 | |
| 8655 | static inline void hri_usbdevicedescriptor_write_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 8656 | hri_usbdescriptordevice_addr_reg_t data) |
| 8657 | { |
| 8658 | USB_CRITICAL_SECTION_ENTER(); |
| 8659 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg = data; |
| 8660 | USB_CRITICAL_SECTION_LEAVE(); |
| 8661 | } |
| 8662 | |
| 8663 | static inline void hri_usbdevicedescriptor_clear_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 8664 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8665 | { |
| 8666 | USB_CRITICAL_SECTION_ENTER(); |
| 8667 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg &= ~mask; |
| 8668 | USB_CRITICAL_SECTION_LEAVE(); |
| 8669 | } |
| 8670 | |
| 8671 | static inline void hri_usbdevicedescriptor_toggle_ADDR_reg(const void *const hw, uint8_t submodule_index, |
| 8672 | hri_usbdescriptordevice_addr_reg_t mask) |
| 8673 | { |
| 8674 | USB_CRITICAL_SECTION_ENTER(); |
| 8675 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg ^= mask; |
| 8676 | USB_CRITICAL_SECTION_LEAVE(); |
| 8677 | } |
| 8678 | |
| 8679 | static inline hri_usbdescriptordevice_addr_reg_t hri_usbdevicedescriptor_read_ADDR_reg(const void *const hw, |
| 8680 | uint8_t submodule_index) |
| 8681 | { |
| 8682 | return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg; |
| 8683 | } |
| 8684 | |
| 8685 | static inline void hri_usbdevicedescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 8686 | { |
| 8687 | USB_CRITICAL_SECTION_ENTER(); |
| 8688 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8689 | USB_CRITICAL_SECTION_LEAVE(); |
| 8690 | } |
| 8691 | |
| 8692 | static inline bool hri_usbdevicedescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 8693 | { |
| 8694 | uint32_t tmp; |
| 8695 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8696 | tmp = (tmp & USB_DEVICE_PCKSIZE_AUTO_ZLP) >> USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos; |
| 8697 | return (bool)tmp; |
| 8698 | } |
| 8699 | |
| 8700 | static inline void hri_usbdevicedescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index, |
| 8701 | bool value) |
| 8702 | { |
| 8703 | uint32_t tmp; |
| 8704 | USB_CRITICAL_SECTION_ENTER(); |
| 8705 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8706 | tmp &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8707 | tmp |= value << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos; |
| 8708 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 8709 | USB_CRITICAL_SECTION_LEAVE(); |
| 8710 | } |
| 8711 | |
| 8712 | static inline void hri_usbdevicedescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 8713 | { |
| 8714 | USB_CRITICAL_SECTION_ENTER(); |
| 8715 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8716 | USB_CRITICAL_SECTION_LEAVE(); |
| 8717 | } |
| 8718 | |
| 8719 | static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index) |
| 8720 | { |
| 8721 | USB_CRITICAL_SECTION_ENTER(); |
| 8722 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_AUTO_ZLP; |
| 8723 | USB_CRITICAL_SECTION_LEAVE(); |
| 8724 | } |
| 8725 | |
| 8726 | static inline void hri_usbdevicedescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 8727 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8728 | { |
| 8729 | USB_CRITICAL_SECTION_ENTER(); |
| 8730 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8731 | USB_CRITICAL_SECTION_LEAVE(); |
| 8732 | } |
| 8733 | |
| 8734 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8735 | hri_usbdevicedescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 8736 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8737 | { |
| 8738 | uint32_t tmp; |
| 8739 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8740 | tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT(mask)) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos; |
| 8741 | return tmp; |
| 8742 | } |
| 8743 | |
| 8744 | static inline void hri_usbdevicedescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 8745 | hri_usbdescriptordevice_pcksize_reg_t data) |
| 8746 | { |
| 8747 | uint32_t tmp; |
| 8748 | USB_CRITICAL_SECTION_ENTER(); |
| 8749 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8750 | tmp &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk; |
| 8751 | tmp |= USB_DEVICE_PCKSIZE_BYTE_COUNT(data); |
| 8752 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 8753 | USB_CRITICAL_SECTION_LEAVE(); |
| 8754 | } |
| 8755 | |
| 8756 | static inline void hri_usbdevicedescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 8757 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8758 | { |
| 8759 | USB_CRITICAL_SECTION_ENTER(); |
| 8760 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8761 | USB_CRITICAL_SECTION_LEAVE(); |
| 8762 | } |
| 8763 | |
| 8764 | static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index, |
| 8765 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8766 | { |
| 8767 | USB_CRITICAL_SECTION_ENTER(); |
| 8768 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask); |
| 8769 | USB_CRITICAL_SECTION_LEAVE(); |
| 8770 | } |
| 8771 | |
| 8772 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8773 | hri_usbdevicedescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index) |
| 8774 | { |
| 8775 | uint32_t tmp; |
| 8776 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8777 | tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos; |
| 8778 | return tmp; |
| 8779 | } |
| 8780 | |
| 8781 | static inline void hri_usbdevicedescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, |
| 8782 | uint8_t submodule_index, |
| 8783 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8784 | { |
| 8785 | USB_CRITICAL_SECTION_ENTER(); |
| 8786 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |
| 8787 | |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8788 | USB_CRITICAL_SECTION_LEAVE(); |
| 8789 | } |
| 8790 | |
| 8791 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8792 | hri_usbdevicedescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8793 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8794 | { |
| 8795 | uint32_t tmp; |
| 8796 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8797 | tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 8798 | return tmp; |
| 8799 | } |
| 8800 | |
| 8801 | static inline void |
| 8802 | hri_usbdevicedescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8803 | hri_usbdescriptordevice_pcksize_reg_t data) |
| 8804 | { |
| 8805 | uint32_t tmp; |
| 8806 | USB_CRITICAL_SECTION_ENTER(); |
| 8807 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8808 | tmp &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk; |
| 8809 | tmp |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(data); |
| 8810 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 8811 | USB_CRITICAL_SECTION_LEAVE(); |
| 8812 | } |
| 8813 | |
| 8814 | static inline void |
| 8815 | hri_usbdevicedescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8816 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8817 | { |
| 8818 | USB_CRITICAL_SECTION_ENTER(); |
| 8819 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |
| 8820 | &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8821 | USB_CRITICAL_SECTION_LEAVE(); |
| 8822 | } |
| 8823 | |
| 8824 | static inline void |
| 8825 | hri_usbdevicedescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8826 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8827 | { |
| 8828 | USB_CRITICAL_SECTION_ENTER(); |
| 8829 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |
| 8830 | ^= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask); |
| 8831 | USB_CRITICAL_SECTION_LEAVE(); |
| 8832 | } |
| 8833 | |
| 8834 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8835 | hri_usbdevicedescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index) |
| 8836 | { |
| 8837 | uint32_t tmp; |
| 8838 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8839 | tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos; |
| 8840 | return tmp; |
| 8841 | } |
| 8842 | |
| 8843 | static inline void hri_usbdevicedescriptor_set_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8844 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8845 | { |
| 8846 | USB_CRITICAL_SECTION_ENTER(); |
| 8847 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8848 | USB_CRITICAL_SECTION_LEAVE(); |
| 8849 | } |
| 8850 | |
| 8851 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8852 | hri_usbdevicedescriptor_get_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8853 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8854 | { |
| 8855 | uint32_t tmp; |
| 8856 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8857 | tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE(mask)) >> USB_DEVICE_PCKSIZE_SIZE_Pos; |
| 8858 | return tmp; |
| 8859 | } |
| 8860 | |
| 8861 | static inline void hri_usbdevicedescriptor_write_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8862 | hri_usbdescriptordevice_pcksize_reg_t data) |
| 8863 | { |
| 8864 | uint32_t tmp; |
| 8865 | USB_CRITICAL_SECTION_ENTER(); |
| 8866 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8867 | tmp &= ~USB_DEVICE_PCKSIZE_SIZE_Msk; |
| 8868 | tmp |= USB_DEVICE_PCKSIZE_SIZE(data); |
| 8869 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp; |
| 8870 | USB_CRITICAL_SECTION_LEAVE(); |
| 8871 | } |
| 8872 | |
| 8873 | static inline void hri_usbdevicedescriptor_clear_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8874 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8875 | { |
| 8876 | USB_CRITICAL_SECTION_ENTER(); |
| 8877 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8878 | USB_CRITICAL_SECTION_LEAVE(); |
| 8879 | } |
| 8880 | |
| 8881 | static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index, |
| 8882 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8883 | { |
| 8884 | USB_CRITICAL_SECTION_ENTER(); |
| 8885 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_SIZE(mask); |
| 8886 | USB_CRITICAL_SECTION_LEAVE(); |
| 8887 | } |
| 8888 | |
| 8889 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8890 | hri_usbdevicedescriptor_read_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index) |
| 8891 | { |
| 8892 | uint32_t tmp; |
| 8893 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8894 | tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE_Msk) >> USB_DEVICE_PCKSIZE_SIZE_Pos; |
| 8895 | return tmp; |
| 8896 | } |
| 8897 | |
| 8898 | static inline void hri_usbdevicedescriptor_set_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 8899 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8900 | { |
| 8901 | USB_CRITICAL_SECTION_ENTER(); |
| 8902 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= mask; |
| 8903 | USB_CRITICAL_SECTION_LEAVE(); |
| 8904 | } |
| 8905 | |
| 8906 | static inline hri_usbdescriptordevice_pcksize_reg_t |
| 8907 | hri_usbdevicedescriptor_get_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 8908 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8909 | { |
| 8910 | uint32_t tmp; |
| 8911 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8912 | tmp &= mask; |
| 8913 | return tmp; |
| 8914 | } |
| 8915 | |
| 8916 | static inline void hri_usbdevicedescriptor_write_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 8917 | hri_usbdescriptordevice_pcksize_reg_t data) |
| 8918 | { |
| 8919 | USB_CRITICAL_SECTION_ENTER(); |
| 8920 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = data; |
| 8921 | USB_CRITICAL_SECTION_LEAVE(); |
| 8922 | } |
| 8923 | |
| 8924 | static inline void hri_usbdevicedescriptor_clear_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 8925 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8926 | { |
| 8927 | USB_CRITICAL_SECTION_ENTER(); |
| 8928 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~mask; |
| 8929 | USB_CRITICAL_SECTION_LEAVE(); |
| 8930 | } |
| 8931 | |
| 8932 | static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_reg(const void *const hw, uint8_t submodule_index, |
| 8933 | hri_usbdescriptordevice_pcksize_reg_t mask) |
| 8934 | { |
| 8935 | USB_CRITICAL_SECTION_ENTER(); |
| 8936 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= mask; |
| 8937 | USB_CRITICAL_SECTION_LEAVE(); |
| 8938 | } |
| 8939 | |
| 8940 | static inline hri_usbdescriptordevice_pcksize_reg_t hri_usbdevicedescriptor_read_PCKSIZE_reg(const void *const hw, |
| 8941 | uint8_t submodule_index) |
| 8942 | { |
| 8943 | return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg; |
| 8944 | } |
| 8945 | |
| 8946 | static inline void hri_usbdevicedescriptor_set_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 8947 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 8948 | { |
| 8949 | USB_CRITICAL_SECTION_ENTER(); |
| 8950 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= USB_DEVICE_EXTREG_SUBPID(mask); |
| 8951 | USB_CRITICAL_SECTION_LEAVE(); |
| 8952 | } |
| 8953 | |
| 8954 | static inline hri_usbdescriptordevice_extreg_reg_t |
| 8955 | hri_usbdevicedescriptor_get_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 8956 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 8957 | { |
| 8958 | uint16_t tmp; |
| 8959 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 8960 | tmp = (tmp & USB_DEVICE_EXTREG_SUBPID(mask)) >> USB_DEVICE_EXTREG_SUBPID_Pos; |
| 8961 | return tmp; |
| 8962 | } |
| 8963 | |
| 8964 | static inline void hri_usbdevicedescriptor_write_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 8965 | hri_usbdescriptordevice_extreg_reg_t data) |
| 8966 | { |
| 8967 | uint16_t tmp; |
| 8968 | USB_CRITICAL_SECTION_ENTER(); |
| 8969 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 8970 | tmp &= ~USB_DEVICE_EXTREG_SUBPID_Msk; |
| 8971 | tmp |= USB_DEVICE_EXTREG_SUBPID(data); |
| 8972 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = tmp; |
| 8973 | USB_CRITICAL_SECTION_LEAVE(); |
| 8974 | } |
| 8975 | |
| 8976 | static inline void hri_usbdevicedescriptor_clear_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 8977 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 8978 | { |
| 8979 | USB_CRITICAL_SECTION_ENTER(); |
| 8980 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~USB_DEVICE_EXTREG_SUBPID(mask); |
| 8981 | USB_CRITICAL_SECTION_LEAVE(); |
| 8982 | } |
| 8983 | |
| 8984 | static inline void hri_usbdevicedescriptor_toggle_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index, |
| 8985 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 8986 | { |
| 8987 | USB_CRITICAL_SECTION_ENTER(); |
| 8988 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= USB_DEVICE_EXTREG_SUBPID(mask); |
| 8989 | USB_CRITICAL_SECTION_LEAVE(); |
| 8990 | } |
| 8991 | |
| 8992 | static inline hri_usbdescriptordevice_extreg_reg_t |
| 8993 | hri_usbdevicedescriptor_read_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index) |
| 8994 | { |
| 8995 | uint16_t tmp; |
| 8996 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 8997 | tmp = (tmp & USB_DEVICE_EXTREG_SUBPID_Msk) >> USB_DEVICE_EXTREG_SUBPID_Pos; |
| 8998 | return tmp; |
| 8999 | } |
| 9000 | |
| 9001 | static inline void hri_usbdevicedescriptor_set_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 9002 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9003 | { |
| 9004 | USB_CRITICAL_SECTION_ENTER(); |
| 9005 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= USB_DEVICE_EXTREG_VARIABLE(mask); |
| 9006 | USB_CRITICAL_SECTION_LEAVE(); |
| 9007 | } |
| 9008 | |
| 9009 | static inline hri_usbdescriptordevice_extreg_reg_t |
| 9010 | hri_usbdevicedescriptor_get_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 9011 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9012 | { |
| 9013 | uint16_t tmp; |
| 9014 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 9015 | tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE(mask)) >> USB_DEVICE_EXTREG_VARIABLE_Pos; |
| 9016 | return tmp; |
| 9017 | } |
| 9018 | |
| 9019 | static inline void hri_usbdevicedescriptor_write_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 9020 | hri_usbdescriptordevice_extreg_reg_t data) |
| 9021 | { |
| 9022 | uint16_t tmp; |
| 9023 | USB_CRITICAL_SECTION_ENTER(); |
| 9024 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 9025 | tmp &= ~USB_DEVICE_EXTREG_VARIABLE_Msk; |
| 9026 | tmp |= USB_DEVICE_EXTREG_VARIABLE(data); |
| 9027 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = tmp; |
| 9028 | USB_CRITICAL_SECTION_LEAVE(); |
| 9029 | } |
| 9030 | |
| 9031 | static inline void hri_usbdevicedescriptor_clear_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 9032 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9033 | { |
| 9034 | USB_CRITICAL_SECTION_ENTER(); |
| 9035 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~USB_DEVICE_EXTREG_VARIABLE(mask); |
| 9036 | USB_CRITICAL_SECTION_LEAVE(); |
| 9037 | } |
| 9038 | |
| 9039 | static inline void hri_usbdevicedescriptor_toggle_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index, |
| 9040 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9041 | { |
| 9042 | USB_CRITICAL_SECTION_ENTER(); |
| 9043 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= USB_DEVICE_EXTREG_VARIABLE(mask); |
| 9044 | USB_CRITICAL_SECTION_LEAVE(); |
| 9045 | } |
| 9046 | |
| 9047 | static inline hri_usbdescriptordevice_extreg_reg_t |
| 9048 | hri_usbdevicedescriptor_read_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index) |
| 9049 | { |
| 9050 | uint16_t tmp; |
| 9051 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 9052 | tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE_Msk) >> USB_DEVICE_EXTREG_VARIABLE_Pos; |
| 9053 | return tmp; |
| 9054 | } |
| 9055 | |
| 9056 | static inline void hri_usbdevicedescriptor_set_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 9057 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9058 | { |
| 9059 | USB_CRITICAL_SECTION_ENTER(); |
| 9060 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= mask; |
| 9061 | USB_CRITICAL_SECTION_LEAVE(); |
| 9062 | } |
| 9063 | |
| 9064 | static inline hri_usbdescriptordevice_extreg_reg_t |
| 9065 | hri_usbdevicedescriptor_get_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 9066 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9067 | { |
| 9068 | uint16_t tmp; |
| 9069 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 9070 | tmp &= mask; |
| 9071 | return tmp; |
| 9072 | } |
| 9073 | |
| 9074 | static inline void hri_usbdevicedescriptor_write_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 9075 | hri_usbdescriptordevice_extreg_reg_t data) |
| 9076 | { |
| 9077 | USB_CRITICAL_SECTION_ENTER(); |
| 9078 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = data; |
| 9079 | USB_CRITICAL_SECTION_LEAVE(); |
| 9080 | } |
| 9081 | |
| 9082 | static inline void hri_usbdevicedescriptor_clear_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 9083 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9084 | { |
| 9085 | USB_CRITICAL_SECTION_ENTER(); |
| 9086 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~mask; |
| 9087 | USB_CRITICAL_SECTION_LEAVE(); |
| 9088 | } |
| 9089 | |
| 9090 | static inline void hri_usbdevicedescriptor_toggle_EXTREG_reg(const void *const hw, uint8_t submodule_index, |
| 9091 | hri_usbdescriptordevice_extreg_reg_t mask) |
| 9092 | { |
| 9093 | USB_CRITICAL_SECTION_ENTER(); |
| 9094 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= mask; |
| 9095 | USB_CRITICAL_SECTION_LEAVE(); |
| 9096 | } |
| 9097 | |
| 9098 | static inline hri_usbdescriptordevice_extreg_reg_t hri_usbdevicedescriptor_read_EXTREG_reg(const void *const hw, |
| 9099 | uint8_t submodule_index) |
| 9100 | { |
| 9101 | return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg; |
| 9102 | } |
| 9103 | |
| 9104 | static inline bool hri_usbdevicedescriptor_get_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index) |
| 9105 | { |
| 9106 | return (((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg & USB_DEVICE_STATUS_BK_CRCERR) |
| 9107 | >> USB_DEVICE_STATUS_BK_CRCERR_Pos; |
| 9108 | } |
| 9109 | |
| 9110 | static inline void hri_usbdevicedescriptor_clear_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index) |
| 9111 | { |
| 9112 | USB_CRITICAL_SECTION_ENTER(); |
| 9113 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = USB_DEVICE_STATUS_BK_CRCERR; |
| 9114 | USB_CRITICAL_SECTION_LEAVE(); |
| 9115 | } |
| 9116 | |
| 9117 | static inline bool hri_usbdevicedescriptor_get_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index) |
| 9118 | { |
| 9119 | return (((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg & USB_DEVICE_STATUS_BK_ERRORFLOW) |
| 9120 | >> USB_DEVICE_STATUS_BK_ERRORFLOW_Pos; |
| 9121 | } |
| 9122 | |
| 9123 | static inline void hri_usbdevicedescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index) |
| 9124 | { |
| 9125 | USB_CRITICAL_SECTION_ENTER(); |
| 9126 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = USB_DEVICE_STATUS_BK_ERRORFLOW; |
| 9127 | USB_CRITICAL_SECTION_LEAVE(); |
| 9128 | } |
| 9129 | |
| 9130 | static inline hri_usbdescriptordevice_status_bk_reg_t |
| 9131 | hri_usbdevicedescriptor_get_STATUS_BK_reg(const void *const hw, uint8_t submodule_index, |
| 9132 | hri_usbdescriptordevice_status_bk_reg_t mask) |
| 9133 | { |
| 9134 | uint8_t tmp; |
| 9135 | tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg; |
| 9136 | tmp &= mask; |
| 9137 | return tmp; |
| 9138 | } |
| 9139 | |
| 9140 | static inline void hri_usbdevicedescriptor_clear_STATUS_BK_reg(const void *const hw, uint8_t submodule_index, |
| 9141 | hri_usbdescriptordevice_status_bk_reg_t mask) |
| 9142 | { |
| 9143 | USB_CRITICAL_SECTION_ENTER(); |
| 9144 | ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = mask; |
| 9145 | USB_CRITICAL_SECTION_LEAVE(); |
| 9146 | } |
| 9147 | |
| 9148 | static inline hri_usbdescriptordevice_status_bk_reg_t |
| 9149 | hri_usbdevicedescriptor_read_STATUS_BK_reg(const void *const hw, uint8_t submodule_index) |
| 9150 | { |
| 9151 | return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg; |
| 9152 | } |
| 9153 | |
| 9154 | /* Below section is for legacy hri apis name, not recommended to use below left side apis in application */ |
| 9155 | #define hri_usbdevice_wait_for_sync(a, b) hri_usb_wait_for_sync(a, b) |
| 9156 | #define hri_usbdevice_is_syncing(a, b) hri_usb_is_syncing(a, b) |
| 9157 | #define hri_usbhost_wait_for_sync(a, b) hri_usb_wait_for_sync(a, b) |
| 9158 | #define hri_usbhost_is_syncing(a, b) hri_usb_is_syncing(a, b) |
| 9159 | #define hri_usbhost_set_CTRLA_SWRST_bit(a) hri_usb_set_CTRLA_SWRST_bit(a) |
| 9160 | #define hri_usbhost_get_CTRLA_SWRST_bit(a) hri_usb_get_CTRLA_SWRST_bit(a) |
| 9161 | #define hri_usbhost_set_CTRLA_ENABLE_bit(a) hri_usb_set_CTRLA_ENABLE_bit(a) |
| 9162 | #define hri_usbhost_get_CTRLA_ENABLE_bit(a) hri_usb_get_CTRLA_ENABLE_bit(a) |
| 9163 | #define hri_usbhost_write_CTRLA_ENABLE_bit(a, b) hri_usb_write_CTRLA_ENABLE_bit(a, b) |
| 9164 | #define hri_usbhost_clear_CTRLA_ENABLE_bit(a) hri_usb_clear_CTRLA_ENABLE_bit(a) |
| 9165 | #define hri_usbhost_toggle_CTRLA_ENABLE_bit(a) hri_usb_toggle_CTRLA_ENABLE_bit(a) |
| 9166 | #define hri_usbhost_set_CTRLA_RUNSTDBY_bit(a) hri_usb_set_CTRLA_RUNSTDBY_bit(a) |
| 9167 | #define hri_usbhost_get_CTRLA_RUNSTDBY_bit(a) hri_usb_get_CTRLA_RUNSTDBY_bit(a) |
| 9168 | #define hri_usbhost_write_CTRLA_RUNSTDBY_bit(a, b) hri_usb_write_CTRLA_RUNSTDBY_bit(a, b) |
| 9169 | #define hri_usbhost_clear_CTRLA_RUNSTDBY_bit(a) hri_usb_clear_CTRLA_RUNSTDBY_bit(a) |
| 9170 | #define hri_usbhost_toggle_CTRLA_RUNSTDBY_bit(a) hri_usb_toggle_CTRLA_RUNSTDBY_bit(a) |
| 9171 | #define hri_usbhost_set_CTRLA_MODE_bit(a) hri_usb_set_CTRLA_MODE_bit(a) |
| 9172 | #define hri_usbhost_get_CTRLA_MODE_bit(a) hri_usb_get_CTRLA_MODE_bit(a) |
| 9173 | #define hri_usbhost_write_CTRLA_MODE_bit(a, b) hri_usb_write_CTRLA_MODE_bit(a, b) |
| 9174 | #define hri_usbhost_clear_CTRLA_MODE_bit(a) hri_usb_clear_CTRLA_MODE_bit(a) |
| 9175 | #define hri_usbhost_toggle_CTRLA_MODE_bit(a) hri_usb_toggle_CTRLA_MODE_bit(a) |
| 9176 | #define hri_usbhost_set_CTRLA_reg(a, b) hri_usb_set_CTRLA_reg(a, b) |
| 9177 | #define hri_usbhost_get_CTRLA_reg(a, b) hri_usb_get_CTRLA_reg(a, b) |
| 9178 | #define hri_usbhost_write_CTRLA_reg(a, b) hri_usb_write_CTRLA_reg(a, b) |
| 9179 | #define hri_usbhost_clear_CTRLA_reg(a, b) hri_usb_clear_CTRLA_reg(a, b) |
| 9180 | #define hri_usbhost_toggle_CTRLA_reg(a, b) hri_usb_toggle_CTRLA_reg(a, b) |
| 9181 | #define hri_usbhost_read_CTRLA_reg(a) hri_usb_read_CTRLA_reg(a) |
| 9182 | #define hri_usbhost_set_QOSCTRL_CQOS_bf(a, b) hri_usb_set_QOSCTRL_CQOS_bf(a, b) |
| 9183 | #define hri_usbhost_get_QOSCTRL_CQOS_bf(a, b) hri_usb_get_QOSCTRL_CQOS_bf(a, b) |
| 9184 | #define hri_usbhost_write_QOSCTRL_CQOS_bf(a, b) hri_usb_write_QOSCTRL_CQOS_bf(a, b) |
| 9185 | #define hri_usbhost_clear_QOSCTRL_CQOS_bf(a, b) hri_usb_clear_QOSCTRL_CQOS_bf(a, b) |
| 9186 | #define hri_usbhost_toggle_QOSCTRL_CQOS_bf(a, b) hri_usb_toggle_QOSCTRL_CQOS_bf(a, b) |
| 9187 | #define hri_usbhost_read_QOSCTRL_CQOS_bf(a) hri_usb_read_QOSCTRL_CQOS_bf(a) |
| 9188 | #define hri_usbhost_set_QOSCTRL_DQOS_bf(a, b) hri_usb_set_QOSCTRL_DQOS_bf(a, b) |
| 9189 | #define hri_usbhost_get_QOSCTRL_DQOS_bf(a, b) hri_usb_get_QOSCTRL_DQOS_bf(a, b) |
| 9190 | #define hri_usbhost_write_QOSCTRL_DQOS_bf(a, b) hri_usb_write_QOSCTRL_DQOS_bf(a, b) |
| 9191 | #define hri_usbhost_clear_QOSCTRL_DQOS_bf(a, b) hri_usb_clear_QOSCTRL_DQOS_bf(a, b) |
| 9192 | #define hri_usbhost_toggle_QOSCTRL_DQOS_bf(a, b) hri_usb_toggle_QOSCTRL_DQOS_bf(a, b) |
| 9193 | #define hri_usbhost_read_QOSCTRL_DQOS_bf(a) hri_usb_read_QOSCTRL_DQOS_bf(a) |
| 9194 | #define hri_usbhost_set_QOSCTRL_reg(a, b) hri_usb_set_QOSCTRL_reg(a, b) |
| 9195 | #define hri_usbhost_get_QOSCTRL_reg(a, b) hri_usb_get_QOSCTRL_reg(a, b) |
| 9196 | #define hri_usbhost_write_QOSCTRL_reg(a, b) hri_usb_write_QOSCTRL_reg(a, b) |
| 9197 | #define hri_usbhost_clear_QOSCTRL_reg(a, b) hri_usb_clear_QOSCTRL_reg(a, b) |
| 9198 | #define hri_usbhost_toggle_QOSCTRL_reg(a, b) hri_usb_toggle_QOSCTRL_reg(a, b) |
| 9199 | #define hri_usbhost_read_QOSCTRL_reg(a) hri_usb_read_QOSCTRL_reg(a) |
| 9200 | #define hri_usbhost_set_DESCADD_DESCADD_bf(a, b) hri_usb_set_DESCADD_DESCADD_bf(a, b) |
| 9201 | #define hri_usbhost_get_DESCADD_DESCADD_bf(a, b) hri_usb_get_DESCADD_DESCADD_bf(a, b) |
| 9202 | #define hri_usbhost_write_DESCADD_DESCADD_bf(a, b) hri_usb_write_DESCADD_DESCADD_bf(a, b) |
| 9203 | #define hri_usbhost_clear_DESCADD_DESCADD_bf(a, b) hri_usb_clear_DESCADD_DESCADD_bf(a, b) |
| 9204 | #define hri_usbhost_toggle_DESCADD_DESCADD_bf(a, b) hri_usb_toggle_DESCADD_DESCADD_bf(a, b) |
| 9205 | #define hri_usbhost_read_DESCADD_DESCADD_bf(a) hri_usb_read_DESCADD_DESCADD_bf(a) |
| 9206 | #define hri_usbhost_set_DESCADD_reg(a, b) hri_usb_set_DESCADD_reg(a, b) |
| 9207 | #define hri_usbhost_get_DESCADD_reg(a, b) hri_usb_get_DESCADD_reg(a, b) |
| 9208 | #define hri_usbhost_write_DESCADD_reg(a, b) hri_usb_write_DESCADD_reg(a, b) |
| 9209 | #define hri_usbhost_clear_DESCADD_reg(a, b) hri_usb_clear_DESCADD_reg(a, b) |
| 9210 | #define hri_usbhost_toggle_DESCADD_reg(a, b) hri_usb_toggle_DESCADD_reg(a, b) |
| 9211 | #define hri_usbhost_read_DESCADD_reg(a) hri_usb_read_DESCADD_reg(a) |
| 9212 | #define hri_usbhost_set_PADCAL_TRANSP_bf(a, b) hri_usb_set_PADCAL_TRANSP_bf(a, b) |
| 9213 | #define hri_usbhost_get_PADCAL_TRANSP_bf(a, b) hri_usb_get_PADCAL_TRANSP_bf(a, b) |
| 9214 | #define hri_usbhost_write_PADCAL_TRANSP_bf(a, b) hri_usb_write_PADCAL_TRANSP_bf(a, b) |
| 9215 | #define hri_usbhost_clear_PADCAL_TRANSP_bf(a, b) hri_usb_clear_PADCAL_TRANSP_bf(a, b) |
| 9216 | #define hri_usbhost_toggle_PADCAL_TRANSP_bf(a, b) hri_usb_toggle_PADCAL_TRANSP_bf(a, b) |
| 9217 | #define hri_usbhost_read_PADCAL_TRANSP_bf(a) hri_usb_read_PADCAL_TRANSP_bf(a) |
| 9218 | #define hri_usbhost_set_PADCAL_TRANSN_bf(a, b) hri_usb_set_PADCAL_TRANSN_bf(a, b) |
| 9219 | #define hri_usbhost_get_PADCAL_TRANSN_bf(a, b) hri_usb_get_PADCAL_TRANSN_bf(a, b) |
| 9220 | #define hri_usbhost_write_PADCAL_TRANSN_bf(a, b) hri_usb_write_PADCAL_TRANSN_bf(a, b) |
| 9221 | #define hri_usbhost_clear_PADCAL_TRANSN_bf(a, b) hri_usb_clear_PADCAL_TRANSN_bf(a, b) |
| 9222 | #define hri_usbhost_toggle_PADCAL_TRANSN_bf(a, b) hri_usb_toggle_PADCAL_TRANSN_bf(a, b) |
| 9223 | #define hri_usbhost_read_PADCAL_TRANSN_bf(a) hri_usb_read_PADCAL_TRANSN_bf(a) |
| 9224 | #define hri_usbhost_set_PADCAL_TRIM_bf(a, b) hri_usb_set_PADCAL_TRIM_bf(a, b) |
| 9225 | #define hri_usbhost_get_PADCAL_TRIM_bf(a, b) hri_usb_get_PADCAL_TRIM_bf(a, b) |
| 9226 | #define hri_usbhost_write_PADCAL_TRIM_bf(a, b) hri_usb_write_PADCAL_TRIM_bf(a, b) |
| 9227 | #define hri_usbhost_clear_PADCAL_TRIM_bf(a, b) hri_usb_clear_PADCAL_TRIM_bf(a, b) |
| 9228 | #define hri_usbhost_toggle_PADCAL_TRIM_bf(a, b) hri_usb_toggle_PADCAL_TRIM_bf(a, b) |
| 9229 | #define hri_usbhost_read_PADCAL_TRIM_bf(a) hri_usb_read_PADCAL_TRIM_bf(a) |
| 9230 | #define hri_usbhost_set_PADCAL_reg(a, b) hri_usb_set_PADCAL_reg(a, b) |
| 9231 | #define hri_usbhost_get_PADCAL_reg(a, b) hri_usb_get_PADCAL_reg(a, b) |
| 9232 | #define hri_usbhost_write_PADCAL_reg(a, b) hri_usb_write_PADCAL_reg(a, b) |
| 9233 | #define hri_usbhost_clear_PADCAL_reg(a, b) hri_usb_clear_PADCAL_reg(a, b) |
| 9234 | #define hri_usbhost_toggle_PADCAL_reg(a, b) hri_usb_toggle_PADCAL_reg(a, b) |
| 9235 | #define hri_usbhost_read_PADCAL_reg(a) hri_usb_read_PADCAL_reg(a) |
| 9236 | #define hri_usbhost_get_SYNCBUSY_SWRST_bit(a) hri_usb_get_SYNCBUSY_SWRST_bit(a) |
| 9237 | #define hri_usbhost_get_SYNCBUSY_ENABLE_bit(a) hri_usb_get_SYNCBUSY_ENABLE_bit(a) |
| 9238 | #define hri_usbhost_get_SYNCBUSY_reg(a, b) hri_usb_get_SYNCBUSY_reg(a, b) |
| 9239 | #define hri_usbhost_read_SYNCBUSY_reg(a) hri_usb_read_SYNCBUSY_reg(a) |
| 9240 | #define hri_usbhost_get_FSMSTATUS_FSMSTATE_bf(a, b) hri_usb_get_FSMSTATUS_FSMSTATE_bf(a, b) |
| 9241 | #define hri_usbhost_read_FSMSTATUS_FSMSTATE_bf(a) hri_usb_read_FSMSTATUS_FSMSTATE_bf(a) |
| 9242 | #define hri_usbhost_get_FSMSTATUS_reg(a, b) hri_usb_get_FSMSTATUS_reg(a, b) |
| 9243 | #define hri_usbhost_read_FSMSTATUS_reg(a) hri_usb_read_FSMSTATUS_reg(a) |
| 9244 | #define hri_usbdevice_set_CTRLA_SWRST_bit(a) hri_usb_set_CTRLA_SWRST_bit(a) |
| 9245 | #define hri_usbdevice_get_CTRLA_SWRST_bit(a) hri_usb_get_CTRLA_SWRST_bit(a) |
| 9246 | #define hri_usbdevice_set_CTRLA_ENABLE_bit(a) hri_usb_set_CTRLA_ENABLE_bit(a) |
| 9247 | #define hri_usbdevice_get_CTRLA_ENABLE_bit(a) hri_usb_get_CTRLA_ENABLE_bit(a) |
| 9248 | #define hri_usbdevice_write_CTRLA_ENABLE_bit(a, b) hri_usb_write_CTRLA_ENABLE_bit(a, b) |
| 9249 | #define hri_usbdevice_clear_CTRLA_ENABLE_bit(a) hri_usb_clear_CTRLA_ENABLE_bit(a) |
| 9250 | #define hri_usbdevice_toggle_CTRLA_ENABLE_bit(a) hri_usb_toggle_CTRLA_ENABLE_bit(a) |
| 9251 | #define hri_usbdevice_set_CTRLA_RUNSTDBY_bit(a) hri_usb_set_CTRLA_RUNSTDBY_bit(a) |
| 9252 | #define hri_usbdevice_get_CTRLA_RUNSTDBY_bit(a) hri_usb_get_CTRLA_RUNSTDBY_bit(a) |
| 9253 | #define hri_usbdevice_write_CTRLA_RUNSTDBY_bit(a, b) hri_usb_write_CTRLA_RUNSTDBY_bit(a, b) |
| 9254 | #define hri_usbdevice_clear_CTRLA_RUNSTDBY_bit(a) hri_usb_clear_CTRLA_RUNSTDBY_bit(a) |
| 9255 | #define hri_usbdevice_toggle_CTRLA_RUNSTDBY_bit(a) hri_usb_toggle_CTRLA_RUNSTDBY_bit(a) |
| 9256 | #define hri_usbdevice_set_CTRLA_MODE_bit(a) hri_usb_set_CTRLA_MODE_bit(a) |
| 9257 | #define hri_usbdevice_get_CTRLA_MODE_bit(a) hri_usb_get_CTRLA_MODE_bit(a) |
| 9258 | #define hri_usbdevice_write_CTRLA_MODE_bit(a, b) hri_usb_write_CTRLA_MODE_bit(a, b) |
| 9259 | #define hri_usbdevice_clear_CTRLA_MODE_bit(a) hri_usb_clear_CTRLA_MODE_bit(a) |
| 9260 | #define hri_usbdevice_toggle_CTRLA_MODE_bit(a) hri_usb_toggle_CTRLA_MODE_bit(a) |
| 9261 | #define hri_usbdevice_set_CTRLA_reg(a, b) hri_usb_set_CTRLA_reg(a, b) |
| 9262 | #define hri_usbdevice_get_CTRLA_reg(a, b) hri_usb_get_CTRLA_reg(a, b) |
| 9263 | #define hri_usbdevice_write_CTRLA_reg(a, b) hri_usb_write_CTRLA_reg(a, b) |
| 9264 | #define hri_usbdevice_clear_CTRLA_reg(a, b) hri_usb_clear_CTRLA_reg(a, b) |
| 9265 | #define hri_usbdevice_toggle_CTRLA_reg(a, b) hri_usb_toggle_CTRLA_reg(a, b) |
| 9266 | #define hri_usbdevice_read_CTRLA_reg(a) hri_usb_read_CTRLA_reg(a) |
| 9267 | #define hri_usbdevice_set_QOSCTRL_CQOS_bf(a, b) hri_usb_set_QOSCTRL_CQOS_bf(a, b) |
| 9268 | #define hri_usbdevice_get_QOSCTRL_CQOS_bf(a, b) hri_usb_get_QOSCTRL_CQOS_bf(a, b) |
| 9269 | #define hri_usbdevice_write_QOSCTRL_CQOS_bf(a, b) hri_usb_write_QOSCTRL_CQOS_bf(a, b) |
| 9270 | #define hri_usbdevice_clear_QOSCTRL_CQOS_bf(a, b) hri_usb_clear_QOSCTRL_CQOS_bf(a, b) |
| 9271 | #define hri_usbdevice_toggle_QOSCTRL_CQOS_bf(a, b) hri_usb_toggle_QOSCTRL_CQOS_bf(a, b) |
| 9272 | #define hri_usbdevice_read_QOSCTRL_CQOS_bf(a) hri_usb_read_QOSCTRL_CQOS_bf(a) |
| 9273 | #define hri_usbdevice_set_QOSCTRL_DQOS_bf(a, b) hri_usb_set_QOSCTRL_DQOS_bf(a, b) |
| 9274 | #define hri_usbdevice_get_QOSCTRL_DQOS_bf(a, b) hri_usb_get_QOSCTRL_DQOS_bf(a, b) |
| 9275 | #define hri_usbdevice_write_QOSCTRL_DQOS_bf(a, b) hri_usb_write_QOSCTRL_DQOS_bf(a, b) |
| 9276 | #define hri_usbdevice_clear_QOSCTRL_DQOS_bf(a, b) hri_usb_clear_QOSCTRL_DQOS_bf(a, b) |
| 9277 | #define hri_usbdevice_toggle_QOSCTRL_DQOS_bf(a, b) hri_usb_toggle_QOSCTRL_DQOS_bf(a, b) |
| 9278 | #define hri_usbdevice_read_QOSCTRL_DQOS_bf(a) hri_usb_read_QOSCTRL_DQOS_bf(a) |
| 9279 | #define hri_usbdevice_set_QOSCTRL_reg(a, b) hri_usb_set_QOSCTRL_reg(a, b) |
| 9280 | #define hri_usbdevice_get_QOSCTRL_reg(a, b) hri_usb_get_QOSCTRL_reg(a, b) |
| 9281 | #define hri_usbdevice_write_QOSCTRL_reg(a, b) hri_usb_write_QOSCTRL_reg(a, b) |
| 9282 | #define hri_usbdevice_clear_QOSCTRL_reg(a, b) hri_usb_clear_QOSCTRL_reg(a, b) |
| 9283 | #define hri_usbdevice_toggle_QOSCTRL_reg(a, b) hri_usb_toggle_QOSCTRL_reg(a, b) |
| 9284 | #define hri_usbdevice_read_QOSCTRL_reg(a) hri_usb_read_QOSCTRL_reg(a) |
| 9285 | #define hri_usbdevice_set_DESCADD_DESCADD_bf(a, b) hri_usb_set_DESCADD_DESCADD_bf(a, b) |
| 9286 | #define hri_usbdevice_get_DESCADD_DESCADD_bf(a, b) hri_usb_get_DESCADD_DESCADD_bf(a, b) |
| 9287 | #define hri_usbdevice_write_DESCADD_DESCADD_bf(a, b) hri_usb_write_DESCADD_DESCADD_bf(a, b) |
| 9288 | #define hri_usbdevice_clear_DESCADD_DESCADD_bf(a, b) hri_usb_clear_DESCADD_DESCADD_bf(a, b) |
| 9289 | #define hri_usbdevice_toggle_DESCADD_DESCADD_bf(a, b) hri_usb_toggle_DESCADD_DESCADD_bf(a, b) |
| 9290 | #define hri_usbdevice_read_DESCADD_DESCADD_bf(a) hri_usb_read_DESCADD_DESCADD_bf(a) |
| 9291 | #define hri_usbdevice_set_DESCADD_reg(a, b) hri_usb_set_DESCADD_reg(a, b) |
| 9292 | #define hri_usbdevice_get_DESCADD_reg(a, b) hri_usb_get_DESCADD_reg(a, b) |
| 9293 | #define hri_usbdevice_write_DESCADD_reg(a, b) hri_usb_write_DESCADD_reg(a, b) |
| 9294 | #define hri_usbdevice_clear_DESCADD_reg(a, b) hri_usb_clear_DESCADD_reg(a, b) |
| 9295 | #define hri_usbdevice_toggle_DESCADD_reg(a, b) hri_usb_toggle_DESCADD_reg(a, b) |
| 9296 | #define hri_usbdevice_read_DESCADD_reg(a) hri_usb_read_DESCADD_reg(a) |
| 9297 | #define hri_usbdevice_set_PADCAL_TRANSP_bf(a, b) hri_usb_set_PADCAL_TRANSP_bf(a, b) |
| 9298 | #define hri_usbdevice_get_PADCAL_TRANSP_bf(a, b) hri_usb_get_PADCAL_TRANSP_bf(a, b) |
| 9299 | #define hri_usbdevice_write_PADCAL_TRANSP_bf(a, b) hri_usb_write_PADCAL_TRANSP_bf(a, b) |
| 9300 | #define hri_usbdevice_clear_PADCAL_TRANSP_bf(a, b) hri_usb_clear_PADCAL_TRANSP_bf(a, b) |
| 9301 | #define hri_usbdevice_toggle_PADCAL_TRANSP_bf(a, b) hri_usb_toggle_PADCAL_TRANSP_bf(a, b) |
| 9302 | #define hri_usbdevice_read_PADCAL_TRANSP_bf(a) hri_usb_read_PADCAL_TRANSP_bf(a) |
| 9303 | #define hri_usbdevice_set_PADCAL_TRANSN_bf(a, b) hri_usb_set_PADCAL_TRANSN_bf(a, b) |
| 9304 | #define hri_usbdevice_get_PADCAL_TRANSN_bf(a, b) hri_usb_get_PADCAL_TRANSN_bf(a, b) |
| 9305 | #define hri_usbdevice_write_PADCAL_TRANSN_bf(a, b) hri_usb_write_PADCAL_TRANSN_bf(a, b) |
| 9306 | #define hri_usbdevice_clear_PADCAL_TRANSN_bf(a, b) hri_usb_clear_PADCAL_TRANSN_bf(a, b) |
| 9307 | #define hri_usbdevice_toggle_PADCAL_TRANSN_bf(a, b) hri_usb_toggle_PADCAL_TRANSN_bf(a, b) |
| 9308 | #define hri_usbdevice_read_PADCAL_TRANSN_bf(a) hri_usb_read_PADCAL_TRANSN_bf(a) |
| 9309 | #define hri_usbdevice_set_PADCAL_TRIM_bf(a, b) hri_usb_set_PADCAL_TRIM_bf(a, b) |
| 9310 | #define hri_usbdevice_get_PADCAL_TRIM_bf(a, b) hri_usb_get_PADCAL_TRIM_bf(a, b) |
| 9311 | #define hri_usbdevice_write_PADCAL_TRIM_bf(a, b) hri_usb_write_PADCAL_TRIM_bf(a, b) |
| 9312 | #define hri_usbdevice_clear_PADCAL_TRIM_bf(a, b) hri_usb_clear_PADCAL_TRIM_bf(a, b) |
| 9313 | #define hri_usbdevice_toggle_PADCAL_TRIM_bf(a, b) hri_usb_toggle_PADCAL_TRIM_bf(a, b) |
| 9314 | #define hri_usbdevice_read_PADCAL_TRIM_bf(a) hri_usb_read_PADCAL_TRIM_bf(a) |
| 9315 | #define hri_usbdevice_set_PADCAL_reg(a, b) hri_usb_set_PADCAL_reg(a, b) |
| 9316 | #define hri_usbdevice_get_PADCAL_reg(a, b) hri_usb_get_PADCAL_reg(a, b) |
| 9317 | #define hri_usbdevice_write_PADCAL_reg(a, b) hri_usb_write_PADCAL_reg(a, b) |
| 9318 | #define hri_usbdevice_clear_PADCAL_reg(a, b) hri_usb_clear_PADCAL_reg(a, b) |
| 9319 | #define hri_usbdevice_toggle_PADCAL_reg(a, b) hri_usb_toggle_PADCAL_reg(a, b) |
| 9320 | #define hri_usbdevice_read_PADCAL_reg(a) hri_usb_read_PADCAL_reg(a) |
| 9321 | #define hri_usbdevice_get_SYNCBUSY_SWRST_bit(a) hri_usb_get_SYNCBUSY_SWRST_bit(a) |
| 9322 | #define hri_usbdevice_get_SYNCBUSY_ENABLE_bit(a) hri_usb_get_SYNCBUSY_ENABLE_bit(a) |
| 9323 | #define hri_usbdevice_get_SYNCBUSY_reg(a, b) hri_usb_get_SYNCBUSY_reg(a, b) |
| 9324 | #define hri_usbdevice_read_SYNCBUSY_reg(a) hri_usb_read_SYNCBUSY_reg(a) |
| 9325 | #define hri_usbdevice_get_FSMSTATUS_FSMSTATE_bf(a, b) hri_usb_get_FSMSTATUS_FSMSTATE_bf(a, b) |
| 9326 | #define hri_usbdevice_read_FSMSTATUS_FSMSTATE_bf(a) hri_usb_read_FSMSTATUS_FSMSTATE_bf(a) |
| 9327 | #define hri_usbdevice_get_FSMSTATUS_reg(a, b) hri_usb_get_FSMSTATUS_reg(a, b) |
| 9328 | #define hri_usbdevice_read_FSMSTATUS_reg(a) hri_usb_read_FSMSTATUS_reg(a) |
| 9329 | |
| 9330 | #ifdef __cplusplus |
| 9331 | } |
| 9332 | #endif |
| 9333 | |
| 9334 | #endif /* _HRI_USB_E54_H_INCLUDED */ |
| 9335 | #endif /* _SAME54_USB_COMPONENT_ */ |