| Kévin Redon | 69b92d9 | 2019-01-24 16:39:20 +0100 | [diff] [blame] | 1 | |
| 2 | /** |
| 3 | * \file |
| 4 | * |
| 5 | * \brief SAM Power manager |
| 6 | * |
| 7 | * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. |
| 8 | * |
| 9 | * \asf_license_start |
| 10 | * |
| 11 | * \page License |
| 12 | * |
| 13 | * Subject to your compliance with these terms, you may use Microchip |
| 14 | * software and any derivatives exclusively with Microchip products. |
| 15 | * It is your responsibility to comply with third party license terms applicable |
| 16 | * to your use of third party software (including open source software) that |
| 17 | * may accompany Microchip software. |
| 18 | * |
| 19 | * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, |
| 20 | * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, |
| 21 | * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, |
| 22 | * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE |
| 23 | * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL |
| 24 | * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE |
| 25 | * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE |
| 26 | * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT |
| 27 | * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY |
| 28 | * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, |
| 29 | * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. |
| 30 | * |
| 31 | * \asf_license_stop |
| 32 | * |
| 33 | */ |
| 34 | |
| 35 | #include <hpl_sleep.h> |
| 36 | #include <hpl_init.h> |
| 37 | |
| 38 | /** |
| 39 | * \brief Set the sleep mode for the device |
| 40 | */ |
| 41 | int32_t _set_sleep_mode(const uint8_t mode) |
| 42 | { |
| 43 | uint8_t delay = 10; |
| 44 | |
| 45 | switch (mode) { |
| 46 | case 2: |
| 47 | case 4: |
| 48 | case 5: |
| 49 | case 6: |
| 50 | case 7: |
| 51 | hri_pm_write_SLEEPCFG_reg(PM, mode); |
| 52 | /* A small latency happens between the store instruction and actual |
| 53 | * writing of the SLEEPCFG register due to bridges. Software has to make |
| 54 | * sure the SLEEPCFG register reads the wanted value before issuing WFI |
| 55 | * instruction. |
| 56 | */ |
| 57 | do { |
| 58 | if (hri_pm_read_SLEEPCFG_reg(PM) == mode) { |
| 59 | break; |
| 60 | } |
| 61 | } while (--delay); |
| 62 | break; |
| 63 | default: |
| 64 | return ERR_INVALID_ARG; |
| 65 | } |
| 66 | |
| 67 | return ERR_NONE; |
| 68 | } |